* [PATCH RESEND 0/2] Allwinner V3s DMA support
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: Vinod Koul, Maxime Ripard, Chen-Yu Tsai
Cc: dmaengine, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi, Icenowy Zheng
This is a dedicated patchset of Allwinner V3s DMA support, which used
to be part of the audio codec support patchset.
It's a derivation of the DMA part of v3 of the codec patchset.
Icenowy Zheng (2):
dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
dmaengine: sun6i: support V3s SoC variant
.../devicetree/bindings/dma/sun6i-dma.txt | 1 +
drivers/dma/sun6i-dma.c | 33 +++++++++++++++++-----
2 files changed, 27 insertions(+), 7 deletions(-)
--
2.13.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH RESEND 0/2] Allwinner V3s DMA support
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: Vinod Koul, Maxime Ripard, Chen-Yu Tsai
Cc: dmaengine-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Icenowy Zheng
This is a dedicated patchset of Allwinner V3s DMA support, which used
to be part of the audio codec support patchset.
It's a derivation of the DMA part of v3 of the codec patchset.
Icenowy Zheng (2):
dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
dmaengine: sun6i: support V3s SoC variant
.../devicetree/bindings/dma/sun6i-dma.txt | 1 +
drivers/dma/sun6i-dma.c | 33 +++++++++++++++++-----
2 files changed, 27 insertions(+), 7 deletions(-)
--
2.13.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH RESEND 0/2] Allwinner V3s DMA support
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: linux-arm-kernel
This is a dedicated patchset of Allwinner V3s DMA support, which used
to be part of the audio codec support patchset.
It's a derivation of the DMA part of v3 of the codec patchset.
Icenowy Zheng (2):
dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
dmaengine: sun6i: support V3s SoC variant
.../devicetree/bindings/dma/sun6i-dma.txt | 1 +
drivers/dma/sun6i-dma.c | 33 +++++++++++++++++-----
2 files changed, 27 insertions(+), 7 deletions(-)
--
2.13.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH RESEND 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: Vinod Koul, Maxime Ripard, Chen-Yu Tsai
Cc: dmaengine, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi, Icenowy Zheng
From: Icenowy Zheng <icenowy@aosc.xyz>
Originally we enable a special gate bit when the compatible indicates
A23/33.
But according to BSP sources and user manuals, more SoCs will need this
gate bit.
So make it a common quirk configured in the config struct.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
---
drivers/dma/sun6i-dma.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index a2358780ab2c..252b59c1d1d5 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -101,6 +101,17 @@ struct sun6i_dma_config {
u32 nr_max_channels;
u32 nr_max_requests;
u32 nr_max_vchans;
+ /*
+ * In the datasheets/user manuals of newer Allwinner SoCs, a special
+ * bit (bit 2 at register 0x20) is present.
+ * It's named "DMA MCLK interface circuit auto gating bit" in the
+ * documents, and the footnote of this register says that this bit
+ * should be set up when initializing the DMA controller.
+ * Allwinner A23/A33 user manuals do not have this bit documented,
+ * however these SoCs really have and need this bit, as seen in the
+ * BSP kernel source code.
+ */
+ bool gate_needed;
};
/*
@@ -1009,6 +1020,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
.nr_max_channels = 8,
.nr_max_requests = 24,
.nr_max_vchans = 37,
+ .gate_needed = true,
};
static struct sun6i_dma_config sun8i_a83t_dma_cfg = {
@@ -1174,13 +1186,7 @@ static int sun6i_dma_probe(struct platform_device *pdev)
goto err_dma_unregister;
}
- /*
- * sun8i variant requires us to toggle a dma gating register,
- * as seen in Allwinner's SDK. This register is not documented
- * in the A23 user manual.
- */
- if (of_device_is_compatible(pdev->dev.of_node,
- "allwinner,sun8i-a23-dma"))
+ if (sdc->cfg->gate_needed)
writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);
return 0;
--
2.13.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH RESEND 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: Vinod Koul, Maxime Ripard, Chen-Yu Tsai
Cc: dmaengine-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Icenowy Zheng
From: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Originally we enable a special gate bit when the compatible indicates
A23/33.
But according to BSP sources and user manuals, more SoCs will need this
gate bit.
So make it a common quirk configured in the config struct.
Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
drivers/dma/sun6i-dma.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index a2358780ab2c..252b59c1d1d5 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -101,6 +101,17 @@ struct sun6i_dma_config {
u32 nr_max_channels;
u32 nr_max_requests;
u32 nr_max_vchans;
+ /*
+ * In the datasheets/user manuals of newer Allwinner SoCs, a special
+ * bit (bit 2 at register 0x20) is present.
+ * It's named "DMA MCLK interface circuit auto gating bit" in the
+ * documents, and the footnote of this register says that this bit
+ * should be set up when initializing the DMA controller.
+ * Allwinner A23/A33 user manuals do not have this bit documented,
+ * however these SoCs really have and need this bit, as seen in the
+ * BSP kernel source code.
+ */
+ bool gate_needed;
};
/*
@@ -1009,6 +1020,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
.nr_max_channels = 8,
.nr_max_requests = 24,
.nr_max_vchans = 37,
+ .gate_needed = true,
};
static struct sun6i_dma_config sun8i_a83t_dma_cfg = {
@@ -1174,13 +1186,7 @@ static int sun6i_dma_probe(struct platform_device *pdev)
goto err_dma_unregister;
}
- /*
- * sun8i variant requires us to toggle a dma gating register,
- * as seen in Allwinner's SDK. This register is not documented
- * in the A23 user manual.
- */
- if (of_device_is_compatible(pdev->dev.of_node,
- "allwinner,sun8i-a23-dma"))
+ if (sdc->cfg->gate_needed)
writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);
return 0;
--
2.13.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH RESEND 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Icenowy Zheng <icenowy@aosc.xyz>
Originally we enable a special gate bit when the compatible indicates
A23/33.
But according to BSP sources and user manuals, more SoCs will need this
gate bit.
So make it a common quirk configured in the config struct.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
---
drivers/dma/sun6i-dma.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index a2358780ab2c..252b59c1d1d5 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -101,6 +101,17 @@ struct sun6i_dma_config {
u32 nr_max_channels;
u32 nr_max_requests;
u32 nr_max_vchans;
+ /*
+ * In the datasheets/user manuals of newer Allwinner SoCs, a special
+ * bit (bit 2 at register 0x20) is present.
+ * It's named "DMA MCLK interface circuit auto gating bit" in the
+ * documents, and the footnote of this register says that this bit
+ * should be set up when initializing the DMA controller.
+ * Allwinner A23/A33 user manuals do not have this bit documented,
+ * however these SoCs really have and need this bit, as seen in the
+ * BSP kernel source code.
+ */
+ bool gate_needed;
};
/*
@@ -1009,6 +1020,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
.nr_max_channels = 8,
.nr_max_requests = 24,
.nr_max_vchans = 37,
+ .gate_needed = true,
};
static struct sun6i_dma_config sun8i_a83t_dma_cfg = {
@@ -1174,13 +1186,7 @@ static int sun6i_dma_probe(struct platform_device *pdev)
goto err_dma_unregister;
}
- /*
- * sun8i variant requires us to toggle a dma gating register,
- * as seen in Allwinner's SDK. This register is not documented
- * in the A23 user manual.
- */
- if (of_device_is_compatible(pdev->dev.of_node,
- "allwinner,sun8i-a23-dma"))
+ if (sdc->cfg->gate_needed)
writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);
return 0;
--
2.13.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH RESEND 2/2] dmaengine: sun6i: support V3s SoC variant
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: Vinod Koul, Maxime Ripard, Chen-Yu Tsai
Cc: dmaengine, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi, Icenowy Zheng
From: Icenowy Zheng <icenowy@aosc.xyz>
Allwinner V3s has a DMA engine similar to the ones from A31, but with
fewer channels and DRQs.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/dma/sun6i-dma.txt | 1 +
drivers/dma/sun6i-dma.c | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
index 6b267045f522..98fbe1a5c6dd 100644
--- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt
+++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
@@ -9,6 +9,7 @@ Required properties:
"allwinner,sun8i-a23-dma"
"allwinner,sun8i-a83t-dma"
"allwinner,sun8i-h3-dma"
+ "allwinner,sun8i-v3s-dma"
- reg: Should contain the registers base address and length
- interrupts: Should contain a reference to the interrupt used by this device
- clocks: Should contain a reference to the parent AHB clock
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 252b59c1d1d5..bcd496edc70f 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -1040,11 +1040,24 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {
.nr_max_vchans = 34,
};
+/*
+ * The V3s have only 8 physical channels, a maximum DRQ port id of 23,
+ * and a total of 24 usable source and destination endpoints.
+ */
+
+static struct sun6i_dma_config sun8i_v3s_dma_cfg = {
+ .nr_max_channels = 8,
+ .nr_max_requests = 23,
+ .nr_max_vchans = 24,
+ .gate_needed = true,
+};
+
static const struct of_device_id sun6i_dma_match[] = {
{ .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
{ .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
{ .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
+ { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sun6i_dma_match);
--
2.13.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH RESEND 2/2] dmaengine: sun6i: support V3s SoC variant
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: Vinod Koul, Maxime Ripard, Chen-Yu Tsai
Cc: dmaengine-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Icenowy Zheng
From: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Allwinner V3s has a DMA engine similar to the ones from A31, but with
fewer channels and DRQs.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Acked-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
Documentation/devicetree/bindings/dma/sun6i-dma.txt | 1 +
drivers/dma/sun6i-dma.c | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
index 6b267045f522..98fbe1a5c6dd 100644
--- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt
+++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
@@ -9,6 +9,7 @@ Required properties:
"allwinner,sun8i-a23-dma"
"allwinner,sun8i-a83t-dma"
"allwinner,sun8i-h3-dma"
+ "allwinner,sun8i-v3s-dma"
- reg: Should contain the registers base address and length
- interrupts: Should contain a reference to the interrupt used by this device
- clocks: Should contain a reference to the parent AHB clock
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 252b59c1d1d5..bcd496edc70f 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -1040,11 +1040,24 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {
.nr_max_vchans = 34,
};
+/*
+ * The V3s have only 8 physical channels, a maximum DRQ port id of 23,
+ * and a total of 24 usable source and destination endpoints.
+ */
+
+static struct sun6i_dma_config sun8i_v3s_dma_cfg = {
+ .nr_max_channels = 8,
+ .nr_max_requests = 23,
+ .nr_max_vchans = 24,
+ .gate_needed = true,
+};
+
static const struct of_device_id sun6i_dma_match[] = {
{ .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
{ .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
{ .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
+ { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sun6i_dma_match);
--
2.13.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH RESEND 2/2] dmaengine: sun6i: support V3s SoC variant
@ 2017-08-29 4:51 ` Icenowy Zheng
0 siblings, 0 replies; 11+ messages in thread
From: Icenowy Zheng @ 2017-08-29 4:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Icenowy Zheng <icenowy@aosc.xyz>
Allwinner V3s has a DMA engine similar to the ones from A31, but with
fewer channels and DRQs.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/dma/sun6i-dma.txt | 1 +
drivers/dma/sun6i-dma.c | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
index 6b267045f522..98fbe1a5c6dd 100644
--- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt
+++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
@@ -9,6 +9,7 @@ Required properties:
"allwinner,sun8i-a23-dma"
"allwinner,sun8i-a83t-dma"
"allwinner,sun8i-h3-dma"
+ "allwinner,sun8i-v3s-dma"
- reg: Should contain the registers base address and length
- interrupts: Should contain a reference to the interrupt used by this device
- clocks: Should contain a reference to the parent AHB clock
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 252b59c1d1d5..bcd496edc70f 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -1040,11 +1040,24 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {
.nr_max_vchans = 34,
};
+/*
+ * The V3s have only 8 physical channels, a maximum DRQ port id of 23,
+ * and a total of 24 usable source and destination endpoints.
+ */
+
+static struct sun6i_dma_config sun8i_v3s_dma_cfg = {
+ .nr_max_channels = 8,
+ .nr_max_requests = 23,
+ .nr_max_vchans = 24,
+ .gate_needed = true,
+};
+
static const struct of_device_id sun6i_dma_match[] = {
{ .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
{ .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
{ .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
+ { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sun6i_dma_match);
--
2.13.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH RESEND 0/2] Allwinner V3s DMA support
2017-08-29 4:51 ` Icenowy Zheng
@ 2017-09-05 3:37 ` Vinod Koul
-1 siblings, 0 replies; 11+ messages in thread
From: Vinod Koul @ 2017-09-05 3:37 UTC (permalink / raw)
To: Icenowy Zheng
Cc: Maxime Ripard, Chen-Yu Tsai, dmaengine, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
On Tue, Aug 29, 2017 at 12:51:25PM +0800, Icenowy Zheng wrote:
> This is a dedicated patchset of Allwinner V3s DMA support, which used
> to be part of the audio codec support patchset.
>
> It's a derivation of the DMA part of v3 of the codec patchset.
Applied, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH RESEND 0/2] Allwinner V3s DMA support
@ 2017-09-05 3:37 ` Vinod Koul
0 siblings, 0 replies; 11+ messages in thread
From: Vinod Koul @ 2017-09-05 3:37 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Aug 29, 2017 at 12:51:25PM +0800, Icenowy Zheng wrote:
> This is a dedicated patchset of Allwinner V3s DMA support, which used
> to be part of the audio codec support patchset.
>
> It's a derivation of the DMA part of v3 of the codec patchset.
Applied, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2017-09-05 3:37 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-29 4:51 [PATCH RESEND 0/2] Allwinner V3s DMA support Icenowy Zheng
2017-08-29 4:51 ` Icenowy Zheng
2017-08-29 4:51 ` Icenowy Zheng
2017-08-29 4:51 ` [PATCH RESEND 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk Icenowy Zheng
2017-08-29 4:51 ` Icenowy Zheng
2017-08-29 4:51 ` Icenowy Zheng
2017-08-29 4:51 ` [PATCH RESEND 2/2] dmaengine: sun6i: support V3s SoC variant Icenowy Zheng
2017-08-29 4:51 ` Icenowy Zheng
2017-08-29 4:51 ` Icenowy Zheng
2017-09-05 3:37 ` [PATCH RESEND 0/2] Allwinner V3s DMA support Vinod Koul
2017-09-05 3:37 ` Vinod Koul
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