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* [PATCH] drm/i915/cnl: WaDisableI2mCycleOnWRPort
@ 2017-08-29 23:07 Rodrigo Vivi
  2017-08-29 23:43 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Rodrigo Vivi @ 2017-08-29 23:07 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mika Kuoppala, Rodrigo Vivi

On CNL B0 stepping GAM is not able to detect some deadlock
condition and then rise the rise the gam_coh_flush.

WA database and spec both mentions to set 4AB8[24]=1 as
workaround. Alghouth register offset 0x4AB8 is not
documented for any platform.

Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h        | 1 +
 drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e2908ae34004..bbacdac5c794 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2373,6 +2373,7 @@ enum i915_power_well_id {
 
 #define GAMT_CHKN_BIT_REG	_MMIO(0x4ab8)
 #define   GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING	(1<<28)
+#define   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT	(1<<24)
 
 #if 0
 #define PRB0_TAIL	_MMIO(0x2030)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index a6ac9d0a4156..f087eb6b0134 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1070,6 +1070,11 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
 	struct drm_i915_private *dev_priv = engine->i915;
 	int ret;
 
+	/* WaDisableI2mCycleOnWRPort: cnl (pre-prod) */
+	if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0))
+		WA_SET_BIT(GAMT_CHKN_BIT_REG,
+			   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT);
+
 	/* WaForceContextSaveRestoreNonCoherent:cnl */
 	WA_SET_BIT_MASKED(CNL_HDC_CHICKEN0,
 			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
-- 
2.13.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915/cnl: WaDisableI2mCycleOnWRPort
  2017-08-29 23:07 [PATCH] drm/i915/cnl: WaDisableI2mCycleOnWRPort Rodrigo Vivi
@ 2017-08-29 23:43 ` Patchwork
  2017-08-30  2:42 ` ✓ Fi.CI.IGT: " Patchwork
  2017-08-30  8:45 ` [PATCH] " Mika Kuoppala
  2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-08-29 23:43 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: WaDisableI2mCycleOnWRPort
URL   : https://patchwork.freedesktop.org/series/29506/
State : success

== Summary ==

Series 29506v1 drm/i915/cnl: WaDisableI2mCycleOnWRPort
https://patchwork.freedesktop.org/api/1.0/series/29506/revisions/1/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                pass       -> FAIL       (fi-snb-2600) fdo#100007
Test gem_ringfill:
        Subgroup basic-default-hang:
                incomplete -> DMESG-WARN (fi-pnv-d510) fdo#101600
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                pass       -> FAIL       (fi-snb-2600) fdo#100215
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                pass       -> SKIP       (fi-skl-x1585l) fdo#101781
Test kms_frontbuffer_tracking:
        Subgroup basic:
                dmesg-warn -> PASS       (fi-bdw-5557u)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-byt-n2820) fdo#101705

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#101600 https://bugs.freedesktop.org/show_bug.cgi?id=101600
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:455s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:358s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:548s
fi-bwr-2160      total:279  pass:184  dwarn:0   dfail:0   fail:0   skip:95  time:255s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:518s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:521s
fi-byt-n2820     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:519s
fi-elk-e7500     total:279  pass:230  dwarn:0   dfail:0   fail:0   skip:49  time:437s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:611s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:446s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:423s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:421s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:501s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:471s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:473s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:591s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:596s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:524s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:472s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:484s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:443s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:482s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:548s
fi-snb-2600      total:279  pass:248  dwarn:0   dfail:0   fail:2   skip:29  time:409s
fi-bdw-gvtdvm failed to connect after reboot

428ed27345fbf9be530d01ca6dc862eb5895db81 drm-tip: 2017y-08m-29d-17h-43m-11s UTC integration manifest
a1d60281b605 drm/i915/cnl: WaDisableI2mCycleOnWRPort

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5531/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* ✓ Fi.CI.IGT: success for drm/i915/cnl: WaDisableI2mCycleOnWRPort
  2017-08-29 23:07 [PATCH] drm/i915/cnl: WaDisableI2mCycleOnWRPort Rodrigo Vivi
  2017-08-29 23:43 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-08-30  2:42 ` Patchwork
  2017-08-30  8:45 ` [PATCH] " Mika Kuoppala
  2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-08-30  2:42 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: WaDisableI2mCycleOnWRPort
URL   : https://patchwork.freedesktop.org/series/29506/
State : success

== Summary ==

Test kms_cursor_legacy:
        Subgroup short-flip-before-cursor-atomic-transitions-varying-size:
                skip       -> PASS       (shard-hsw)
Test perf:
        Subgroup polling:
                pass       -> FAIL       (shard-hsw) fdo#102252
Test kms_setmode:
        Subgroup basic:
                fail       -> PASS       (shard-hsw) fdo#99912

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hsw        total:2230 pass:1230 dwarn:0   dfail:0   fail:18  skip:982 time:9610s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5531/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] drm/i915/cnl: WaDisableI2mCycleOnWRPort
  2017-08-29 23:07 [PATCH] drm/i915/cnl: WaDisableI2mCycleOnWRPort Rodrigo Vivi
  2017-08-29 23:43 ` ✓ Fi.CI.BAT: success for " Patchwork
  2017-08-30  2:42 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-08-30  8:45 ` Mika Kuoppala
  2017-08-31  4:59   ` Vivi, Rodrigo
  2 siblings, 1 reply; 5+ messages in thread
From: Mika Kuoppala @ 2017-08-30  8:45 UTC (permalink / raw)
  To: intel-gfx; +Cc: Rodrigo Vivi

Rodrigo Vivi <rodrigo.vivi@intel.com> writes:

> On CNL B0 stepping GAM is not able to detect some deadlock
> condition and then rise the rise the gam_coh_flush.
>
> WA database and spec both mentions to set 4AB8[24]=1 as
> workaround. Alghouth register offset 0x4AB8 is not
s/Alghouth/Although

> documented for any platform.
>

References: HSD#1945815, BSID#1112

> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h        | 1 +
>  drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++++
>  2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e2908ae34004..bbacdac5c794 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2373,6 +2373,7 @@ enum i915_power_well_id {
>  
>  #define GAMT_CHKN_BIT_REG	_MMIO(0x4ab8)
>  #define   GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING	(1<<28)
> +#define   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT	(1<<24)
>  
>  #if 0
>  #define PRB0_TAIL	_MMIO(0x2030)
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index a6ac9d0a4156..f087eb6b0134 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1070,6 +1070,11 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
>  	struct drm_i915_private *dev_priv = engine->i915;
>  	int ret;
>  
> +	/* WaDisableI2mCycleOnWRPort: cnl (pre-prod) */
> +	if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0))
> +		WA_SET_BIT(GAMT_CHKN_BIT_REG,
> +			   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT);
> +
>  	/* WaForceContextSaveRestoreNonCoherent:cnl */
>  	WA_SET_BIT_MASKED(CNL_HDC_CHICKEN0,
>  			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
> -- 
> 2.13.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] drm/i915/cnl: WaDisableI2mCycleOnWRPort
  2017-08-30  8:45 ` [PATCH] " Mika Kuoppala
@ 2017-08-31  4:59   ` Vivi, Rodrigo
  0 siblings, 0 replies; 5+ messages in thread
From: Vivi, Rodrigo @ 2017-08-31  4:59 UTC (permalink / raw)
  To: mika.kuoppala; +Cc: intel-gfx

merged to dinq. thanks for the review

On Wed, 2017-08-30 at 11:45 +0300, Mika Kuoppala wrote:
> Rodrigo Vivi <rodrigo.vivi@intel.com> writes:
> 
> > On CNL B0 stepping GAM is not able to detect some deadlock
> > condition and then rise the rise the gam_coh_flush.
> >
> > WA database and spec both mentions to set 4AB8[24]=1 as
> > workaround. Alghouth register offset 0x4AB8 is not
> s/Alghouth/Although
> 
> > documented for any platform.
> >
> 
> References: HSD#1945815, BSID#1112
> 
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h        | 1 +
> >  drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++++
> >  2 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index e2908ae34004..bbacdac5c794 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -2373,6 +2373,7 @@ enum i915_power_well_id {
> >  
> >  #define GAMT_CHKN_BIT_REG	_MMIO(0x4ab8)
> >  #define   GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING	(1<<28)
> > +#define   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT	(1<<24)
> >  
> >  #if 0
> >  #define PRB0_TAIL	_MMIO(0x2030)
> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> > index a6ac9d0a4156..f087eb6b0134 100644
> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > @@ -1070,6 +1070,11 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
> >  	struct drm_i915_private *dev_priv = engine->i915;
> >  	int ret;
> >  
> > +	/* WaDisableI2mCycleOnWRPort: cnl (pre-prod) */
> > +	if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0))
> > +		WA_SET_BIT(GAMT_CHKN_BIT_REG,
> > +			   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT);
> > +
> >  	/* WaForceContextSaveRestoreNonCoherent:cnl */
> >  	WA_SET_BIT_MASKED(CNL_HDC_CHICKEN0,
> >  			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
> > -- 
> > 2.13.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-08-31  4:59 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-29 23:07 [PATCH] drm/i915/cnl: WaDisableI2mCycleOnWRPort Rodrigo Vivi
2017-08-29 23:43 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-30  2:42 ` ✓ Fi.CI.IGT: " Patchwork
2017-08-30  8:45 ` [PATCH] " Mika Kuoppala
2017-08-31  4:59   ` Vivi, Rodrigo

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