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From: Stephen Boyd <sboyd@codeaurora.org>
To: Quentin Schulz <quentin.schulz@free-electrons.com>
Cc: mturquette@baylibre.com, robh+dt@kernel.org,
	mark.rutland@arm.com, lgirdwood@gmail.com, broonie@kernel.org,
	nicolas.ferre@microchip.com,
	alexandre.belloni@free-electrons.com, linux@armlinux.org.uk,
	boris.brezillon@free-electrons.com, perex@perex.cz,
	tiwai@suse.com, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	alsa-devel@alsa-project.org,
	linux-arm-kernel@lists.infradead.org, cyrille.pitchen@wedev4u.fr,
	thomas.petazzoni@free-electrons.com
Subject: Re: [PATCH v5 5/7] clk: at91: clk-generated: make gclk determine audio_pll rate
Date: Fri, 1 Sep 2017 15:55:20 -0700	[thread overview]
Message-ID: <20170901225520.GG21656@codeaurora.org> (raw)
In-Reply-To: <600ed1e3623477c8083c6c4fa16299e33f7b76a9.1502346448.git-series.quentin.schulz@free-electrons.com>

On 08/10, Quentin Schulz wrote:
> This allows gclk to determine audio_pll rate and set the parent rate
> accordingly.
> 
> However, there are multiple children clocks that could technically
> change the rate of audio_pll (via gck). With the rate locking, the first
> consumer to enable the clock will be the one definitely setting the rate
> of the clock.
> 
> Since audio IPs are most likely to request the same rate, we enforce
> that the only clks able to modify gck rate are those of audio IPs.
> 
> To remain consistent, we deny other clocks to be children of audio_pll.
> 
> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 5/7] clk: at91: clk-generated: make gclk determine audio_pll rate
Date: Fri, 1 Sep 2017 15:55:20 -0700	[thread overview]
Message-ID: <20170901225520.GG21656@codeaurora.org> (raw)
In-Reply-To: <600ed1e3623477c8083c6c4fa16299e33f7b76a9.1502346448.git-series.quentin.schulz@free-electrons.com>

On 08/10, Quentin Schulz wrote:
> This allows gclk to determine audio_pll rate and set the parent rate
> accordingly.
> 
> However, there are multiple children clocks that could technically
> change the rate of audio_pll (via gck). With the rate locking, the first
> consumer to enable the clock will be the one definitely setting the rate
> of the clock.
> 
> Since audio IPs are most likely to request the same rate, we enforce
> that the only clks able to modify gck rate are those of audio IPs.
> 
> To remain consistent, we deny other clocks to be children of audio_pll.
> 
> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2017-09-01 22:55 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-10  6:34 [PATCH v5 0/7] add support for Sama5d2 audio PLLs and enable ClassD Quentin Schulz
2017-08-10  6:34 ` Quentin Schulz
2017-08-10  6:34 ` Quentin Schulz
2017-08-10  6:34 ` [PATCH v5 1/7] clk: at91: clk-generated: remove useless divisor loop Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-09-01 22:55   ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-08-10  6:34 ` [PATCH v5 2/7] dt-bindings: clk: at91: add audio plls to the compatible list Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-09-01 22:55   ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-08-10  6:34 ` [PATCH v5 3/7] clk: at91: add audio pll clock drivers Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-09-01 22:55   ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-08-10  6:34 ` [PATCH v5 4/7] clk: at91: clk-generated: create function to find best_diff Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-09-01 22:55   ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-08-10  6:34 ` [PATCH v5 5/7] clk: at91: clk-generated: make gclk determine audio_pll rate Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-09-01 22:55   ` Stephen Boyd [this message]
2017-09-01 22:55     ` Stephen Boyd
2017-08-10  6:34 ` [PATCH v5 6/7] ASoC: atmel-classd: remove aclk clock from DT binding Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-09-01 22:55   ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd
2017-08-10  6:34 ` [PATCH v5 7/7] ASoC: atmel-classd: remove aclk clock Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-08-10  6:34   ` Quentin Schulz
2017-09-01 22:55   ` Stephen Boyd
2017-09-01 22:55     ` Stephen Boyd

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