From: Dirk Behme <dirk.behme@de.bosch.com> To: <linux-renesas-soc@vger.kernel.org>, <linux-spi@vger.kernel.org>, Geert Uytterhoeven <geert+renesas@glider.be> Cc: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>, Dirk Behme <dirk.behme@de.bosch.com> Subject: [PATCH 8/8] spi: sh-msiof: Add registers reset Date: Wed, 6 Sep 2017 09:05:07 +0200 [thread overview] Message-ID: <20170906070507.26223-9-dirk.behme@de.bosch.com> (raw) In-Reply-To: <20170906070507.26223-1-dirk.behme@de.bosch.com> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> Reset register before starting transfer. Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> --- drivers/spi/spi-sh-msiof.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index fdad8d852602..e8aebd406477 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -130,6 +130,8 @@ struct sh_msiof_spi_priv { #define CTR_TFSE 0x00004000 /* Transmit Frame Sync Signal Output Enable */ #define CTR_TXE 0x00000200 /* Transmit Enable */ #define CTR_RXE 0x00000100 /* Receive Enable */ +#define CTR_TXRST 0x00000002 /* Transmit Reset */ +#define CTR_RXRST 0x00000001 /* Receive Reset */ /* FCTR */ #define FCTR_TFWM_MASK 0xe0000000 /* Transmit FIFO Watermark */ @@ -254,6 +256,25 @@ static irqreturn_t sh_msiof_spi_irq(int irq, void *data) return IRQ_HANDLED; } +static void sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) +{ + u32 mask = CTR_TXRST | CTR_RXRST; + u32 data; + int k; + + data = sh_msiof_read(p, CTR); + data |= mask; + + sh_msiof_write(p, CTR, data); + + for (k = 100; k > 0; k--) { + if (!(sh_msiof_read(p, CTR) & mask)) + break; + + udelay(10); + } +} + static struct { unsigned short div; unsigned short brdv; @@ -924,6 +945,9 @@ static int sh_msiof_transfer_one(struct spi_master *master, bool swab; int ret; + /* reset registers */ + sh_msiof_spi_reset_regs(p); + /* setup clocks (clock already enabled in chipselect()) */ if (!spi_controller_is_slave(p->master)) sh_msiof_spi_set_clk_regs(p, clk_get_rate(p->clk), t->speed_hz); -- 2.14.1
WARNING: multiple messages have this Message-ID (diff)
From: Dirk Behme <dirk.behme-V5te9oGctAVWk0Htik3J/w@public.gmane.org> To: <linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org> Cc: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>, Dirk Behme <dirk.behme-V5te9oGctAVWk0Htik3J/w@public.gmane.org> Subject: [PATCH 8/8] spi: sh-msiof: Add registers reset Date: Wed, 6 Sep 2017 09:05:07 +0200 [thread overview] Message-ID: <20170906070507.26223-9-dirk.behme@de.bosch.com> (raw) In-Reply-To: <20170906070507.26223-1-dirk.behme-V5te9oGctAVWk0Htik3J/w@public.gmane.org> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org> Reset register before starting transfer. Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org> Signed-off-by: Dirk Behme <dirk.behme-V5te9oGctAVWk0Htik3J/w@public.gmane.org> --- drivers/spi/spi-sh-msiof.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index fdad8d852602..e8aebd406477 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -130,6 +130,8 @@ struct sh_msiof_spi_priv { #define CTR_TFSE 0x00004000 /* Transmit Frame Sync Signal Output Enable */ #define CTR_TXE 0x00000200 /* Transmit Enable */ #define CTR_RXE 0x00000100 /* Receive Enable */ +#define CTR_TXRST 0x00000002 /* Transmit Reset */ +#define CTR_RXRST 0x00000001 /* Receive Reset */ /* FCTR */ #define FCTR_TFWM_MASK 0xe0000000 /* Transmit FIFO Watermark */ @@ -254,6 +256,25 @@ static irqreturn_t sh_msiof_spi_irq(int irq, void *data) return IRQ_HANDLED; } +static void sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) +{ + u32 mask = CTR_TXRST | CTR_RXRST; + u32 data; + int k; + + data = sh_msiof_read(p, CTR); + data |= mask; + + sh_msiof_write(p, CTR, data); + + for (k = 100; k > 0; k--) { + if (!(sh_msiof_read(p, CTR) & mask)) + break; + + udelay(10); + } +} + static struct { unsigned short div; unsigned short brdv; @@ -924,6 +945,9 @@ static int sh_msiof_transfer_one(struct spi_master *master, bool swab; int ret; + /* reset registers */ + sh_msiof_spi_reset_regs(p); + /* setup clocks (clock already enabled in chipselect()) */ if (!spi_controller_is_slave(p->master)) sh_msiof_spi_set_clk_regs(p, clk_get_rate(p->clk), t->speed_hz); -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2017-09-06 7:05 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-09-06 7:04 [PATCH 0/8] spi: sh-msiof: Import some BSP patches Dirk Behme 2017-09-06 7:05 ` [PATCH 1/8] spi: sh-msiof: Add sleep before master transfer for test Dirk Behme 2017-09-07 7:04 ` Vladimir Zapolskiy 2017-09-07 7:04 ` Vladimir Zapolskiy 2017-09-07 7:16 ` Dirk Behme 2017-09-07 7:16 ` Dirk Behme 2017-09-07 8:11 ` Geert Uytterhoeven 2017-09-07 8:26 ` Dirk Behme 2017-09-07 8:26 ` Dirk Behme 2017-09-06 7:05 ` [PATCH 2/8] spi: sh-msiof: Fix DMA transfer size check Dirk Behme 2017-09-07 8:31 ` Geert Uytterhoeven 2017-09-07 8:33 ` Dirk Behme 2017-09-07 8:39 ` Geert Uytterhoeven 2017-09-07 8:39 ` Geert Uytterhoeven 2017-09-07 8:42 ` Dirk Behme 2017-09-07 8:59 ` Geert Uytterhoeven 2017-09-07 9:05 ` Dirk Behme 2017-09-07 9:05 ` Dirk Behme 2017-09-07 9:12 ` Geert Uytterhoeven 2017-09-07 9:12 ` Geert Uytterhoeven 2018-01-03 17:25 ` Geert Uytterhoeven 2018-01-03 17:25 ` Geert Uytterhoeven 2018-01-04 7:19 ` Dirk Behme 2018-01-04 8:24 ` Geert Uytterhoeven 2017-09-06 7:05 ` [PATCH 3/8] spi: sh-msiof: Fix MSIOF address for DMAC Dirk Behme 2017-09-06 7:05 ` Dirk Behme 2017-09-06 9:22 ` Geert Uytterhoeven 2017-09-06 10:09 ` Dirk Behme 2017-09-06 10:09 ` Dirk Behme 2017-09-06 10:42 ` Geert Uytterhoeven 2017-09-06 10:59 ` Dirk Behme 2017-09-06 10:59 ` Dirk Behme 2017-09-06 11:01 ` Geert Uytterhoeven 2017-09-06 7:05 ` [PATCH 4/8] spi: sh-msiof: Fix DMA completion Dirk Behme 2017-09-07 8:33 ` Geert Uytterhoeven 2017-09-07 8:33 ` Geert Uytterhoeven 2017-09-07 8:41 ` Dirk Behme 2017-09-07 8:41 ` Dirk Behme 2017-09-06 7:05 ` [PATCH 5/8] spi: sh-msiof: Wait for Tx FIFO empty after DMA Dirk Behme 2017-09-06 17:57 ` Sergei Shtylyov 2017-09-07 8:34 ` Geert Uytterhoeven 2017-09-07 8:34 ` Geert Uytterhoeven 2017-09-06 7:05 ` [PATCH 6/8] spi: sh-msiof: Add MSIOF parent clock changing function for R-Car Gen3 Dirk Behme 2017-09-07 8:38 ` Geert Uytterhoeven 2017-09-06 7:05 ` [PATCH 7/8] spi: sh-msiof: Fix gpio function Dirk Behme 2017-09-06 7:05 ` Dirk Behme 2017-09-07 8:24 ` Geert Uytterhoeven 2017-09-06 7:05 ` Dirk Behme [this message] 2017-09-06 7:05 ` [PATCH 8/8] spi: sh-msiof: Add registers reset Dirk Behme 2017-09-06 18:11 ` Sergei Shtylyov 2017-09-07 8:11 ` Geert Uytterhoeven 2017-09-07 8:11 ` Geert Uytterhoeven
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170906070507.26223-9-dirk.behme@de.bosch.com \ --to=dirk.behme@de.bosch.com \ --cc=geert+renesas@glider.be \ --cc=hiromitsu.yamasaki.ym@renesas.com \ --cc=linux-renesas-soc@vger.kernel.org \ --cc=linux-spi@vger.kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.