* [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] @ 2017-09-12 9:19 Juha-Pekka Heikkila 2017-09-12 9:19 ` [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila ` (5 more replies) 0 siblings, 6 replies; 9+ messages in thread From: Juha-Pekka Heikkila @ 2017-09-12 9:19 UTC (permalink / raw) To: intel-gfx [v4] rebase [v3] Took into account fbc adjusted y/x for primary plane (ville syrjälä) [v2] Fixed missed references which were brough on rebase. /Juha-Pekka Juha-Pekka Heikkila (3): drm/i915: dspaddr_offset doesn't need to be more than local variable drm/i915: Unify skylake plane update drm/i915: Unify skylake plane disable drivers/gpu/drm/i915/i915_drv.h | 8 +++ drivers/gpu/drm/i915/intel_display.c | 117 +++-------------------------------- drivers/gpu/drm/i915/intel_drv.h | 11 ++-- drivers/gpu/drm/i915/intel_fbc.c | 11 +++- drivers/gpu/drm/i915/intel_sprite.c | 4 +- 5 files changed, 32 insertions(+), 119 deletions(-) -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable 2017-09-12 9:19 [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] Juha-Pekka Heikkila @ 2017-09-12 9:19 ` Juha-Pekka Heikkila 2017-09-12 17:48 ` Ville Syrjälä 2017-09-12 9:19 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila ` (4 subsequent siblings) 5 siblings, 1 reply; 9+ messages in thread From: Juha-Pekka Heikkila @ 2017-09-12 9:19 UTC (permalink / raw) To: intel-gfx Move u32 dspaddr_offset from struct intel_crtc member into local variable in i9xx_update_primary_plane() Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 11 ++++++----- drivers/gpu/drm/i915/intel_drv.h | 1 - 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0871807..0dd0e2a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3307,13 +3307,14 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, int x = plane_state->main.x; int y = plane_state->main.y; unsigned long irqflags; + u32 dspaddr_offset; linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); if (INTEL_GEN(dev_priv) >= 4) - crtc->dspaddr_offset = plane_state->main.offset; + dspaddr_offset = plane_state->main.offset; else - crtc->dspaddr_offset = linear_offset; + dspaddr_offset = linear_offset; crtc->adjusted_x = x; crtc->adjusted_y = y; @@ -3342,18 +3343,18 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { I915_WRITE_FW(DSPSURF(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); I915_WRITE_FW(DSPOFFSET(plane), (y << 16) | x); } else if (INTEL_GEN(dev_priv) >= 4) { I915_WRITE_FW(DSPSURF(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); I915_WRITE_FW(DSPTILEOFF(plane), (y << 16) | x); I915_WRITE_FW(DSPLINOFF(plane), linear_offset); } else { I915_WRITE_FW(DSPADDR(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); } POSTING_READ_FW(reg); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 3078076..d58cd10 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -806,7 +806,6 @@ struct intel_crtc { /* Display surface base address adjustement for pageflips. Note that on * gen4+ this only adjusts up to a tile, offsets within a tile are * handled in the hw itself (with the TILEOFF register). */ - u32 dspaddr_offset; int adjusted_x; int adjusted_y; -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable 2017-09-12 9:19 ` [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila @ 2017-09-12 17:48 ` Ville Syrjälä 0 siblings, 0 replies; 9+ messages in thread From: Ville Syrjälä @ 2017-09-12 17:48 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: intel-gfx On Tue, Sep 12, 2017 at 12:19:38PM +0300, Juha-Pekka Heikkila wrote: > Move u32 dspaddr_offset from struct intel_crtc member into local > variable in i9xx_update_primary_plane() You fail to update the skl function, so this won't build. Please make sure each step in the series builds (and ideally also works). That way people can actually bisect through the series. > > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> > --- > drivers/gpu/drm/i915/intel_display.c | 11 ++++++----- > drivers/gpu/drm/i915/intel_drv.h | 1 - > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 0871807..0dd0e2a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3307,13 +3307,14 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, > int x = plane_state->main.x; > int y = plane_state->main.y; > unsigned long irqflags; > + u32 dspaddr_offset; > > linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); > > if (INTEL_GEN(dev_priv) >= 4) > - crtc->dspaddr_offset = plane_state->main.offset; > + dspaddr_offset = plane_state->main.offset; > else > - crtc->dspaddr_offset = linear_offset; > + dspaddr_offset = linear_offset; > > crtc->adjusted_x = x; > crtc->adjusted_y = y; > @@ -3342,18 +3343,18 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, > if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > I915_WRITE_FW(DSPSURF(plane), > intel_plane_ggtt_offset(plane_state) + > - crtc->dspaddr_offset); > + dspaddr_offset); > I915_WRITE_FW(DSPOFFSET(plane), (y << 16) | x); > } else if (INTEL_GEN(dev_priv) >= 4) { > I915_WRITE_FW(DSPSURF(plane), > intel_plane_ggtt_offset(plane_state) + > - crtc->dspaddr_offset); > + dspaddr_offset); > I915_WRITE_FW(DSPTILEOFF(plane), (y << 16) | x); > I915_WRITE_FW(DSPLINOFF(plane), linear_offset); > } else { > I915_WRITE_FW(DSPADDR(plane), > intel_plane_ggtt_offset(plane_state) + > - crtc->dspaddr_offset); > + dspaddr_offset); > } > POSTING_READ_FW(reg); > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 3078076..d58cd10 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -806,7 +806,6 @@ struct intel_crtc { > /* Display surface base address adjustement for pageflips. Note that on > * gen4+ this only adjusts up to a tile, offsets within a tile are > * handled in the hw itself (with the TILEOFF register). */ > - u32 dspaddr_offset; > int adjusted_x; > int adjusted_y; > > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/3] drm/i915: Unify skylake plane update 2017-09-12 9:19 [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] Juha-Pekka Heikkila 2017-09-12 9:19 ` [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila @ 2017-09-12 9:19 ` Juha-Pekka Heikkila 2017-09-12 18:07 ` Ville Syrjälä 2017-09-12 9:19 ` [PATCH 3/3] drm/i915: Unify skylake plane disable Juha-Pekka Heikkila ` (3 subsequent siblings) 5 siblings, 1 reply; 9+ messages in thread From: Juha-Pekka Heikkila @ 2017-09-12 9:19 UTC (permalink / raw) To: intel-gfx Don't handle skylake primary plane separately as it is similar plane as the others. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/i915_drv.h | 8 ++++ drivers/gpu/drm/i915/intel_display.c | 85 +----------------------------------- drivers/gpu/drm/i915/intel_drv.h | 9 ++-- drivers/gpu/drm/i915/intel_fbc.c | 11 +++-- drivers/gpu/drm/i915/intel_sprite.c | 2 +- 5 files changed, 22 insertions(+), 93 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d07d110..24d52d70 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1096,6 +1096,14 @@ struct intel_fbc { int src_w; int src_h; bool visible; + /* + * Display surface base address adjustement for + * pageflips. Note that on gen4+ this only adjusts up + * to a tile, offsets within a tile are handled in + * the hw itself (with the TILEOFF register). + */ + int adjusted_x; + int adjusted_y; } plane; struct { diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0dd0e2a..739003d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3298,7 +3298,6 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, const struct intel_plane_state *plane_state) { struct drm_i915_private *dev_priv = to_i915(primary->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); const struct drm_framebuffer *fb = plane_state->base.fb; enum plane plane = primary->plane; u32 linear_offset; @@ -3316,9 +3315,6 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, else dspaddr_offset = linear_offset; - crtc->adjusted_x = x; - crtc->adjusted_y = y; - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); if (INTEL_GEN(dev_priv) < 4) { @@ -3554,83 +3550,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, return plane_ctl; } -static void skylake_update_primary_plane(struct intel_plane *plane, - const struct intel_crtc_state *crtc_state, - const struct intel_plane_state *plane_state) -{ - struct drm_i915_private *dev_priv = to_i915(plane->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); - const struct drm_framebuffer *fb = plane_state->base.fb; - enum plane_id plane_id = plane->id; - enum pipe pipe = plane->pipe; - u32 plane_ctl = plane_state->ctl; - unsigned int rotation = plane_state->base.rotation; - u32 stride = skl_plane_stride(fb, 0, rotation); - u32 aux_stride = skl_plane_stride(fb, 1, rotation); - u32 surf_addr = plane_state->main.offset; - int scaler_id = plane_state->scaler_id; - int src_x = plane_state->main.x; - int src_y = plane_state->main.y; - int src_w = drm_rect_width(&plane_state->base.src) >> 16; - int src_h = drm_rect_height(&plane_state->base.src) >> 16; - int dst_x = plane_state->base.dst.x1; - int dst_y = plane_state->base.dst.y1; - int dst_w = drm_rect_width(&plane_state->base.dst); - int dst_h = drm_rect_height(&plane_state->base.dst); - unsigned long irqflags; - - /* Sizes are 0 based */ - src_w--; - src_h--; - dst_w--; - dst_h--; - - crtc->dspaddr_offset = surf_addr; - - crtc->adjusted_x = src_x; - crtc->adjusted_y = src_y; - - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); - - if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) { - I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id), - PLANE_COLOR_PIPE_GAMMA_ENABLE | - PLANE_COLOR_PIPE_CSC_ENABLE | - PLANE_COLOR_PLANE_GAMMA_DISABLE); - } - - I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl); - I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x); - I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); - I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); - I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), - (plane_state->aux.offset - surf_addr) | aux_stride); - I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), - (plane_state->aux.y << 16) | plane_state->aux.x); - - if (scaler_id >= 0) { - uint32_t ps_ctrl = 0; - - WARN_ON(!dst_w || !dst_h); - ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane_id) | - crtc_state->scaler_state.scalers[scaler_id].mode; - I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl); - I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0); - I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (dst_x << 16) | dst_y); - I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h); - I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0); - } else { - I915_WRITE_FW(PLANE_POS(pipe, plane_id), (dst_y << 16) | dst_x); - } - - I915_WRITE_FW(PLANE_SURF(pipe, plane_id), - intel_plane_ggtt_offset(plane_state) + surf_addr); - - POSTING_READ_FW(PLANE_SURF(pipe, plane_id)); - - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); -} - static void skylake_disable_primary_plane(struct intel_plane *primary, struct intel_crtc *crtc) { @@ -13230,7 +13149,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) num_formats = ARRAY_SIZE(skl_primary_formats); modifiers = skl_format_modifiers_ccs; - primary->update_plane = skylake_update_primary_plane; + primary->update_plane = skl_update_plane; primary->disable_plane = skylake_disable_primary_plane; } else if (INTEL_GEN(dev_priv) >= 9) { intel_primary_formats = skl_primary_formats; @@ -13240,7 +13159,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) else modifiers = skl_format_modifiers_noccs; - primary->update_plane = skylake_update_primary_plane; + primary->update_plane = skl_update_plane; primary->disable_plane = skylake_disable_primary_plane; } else if (INTEL_GEN(dev_priv) >= 4) { intel_primary_formats = i965_primary_formats; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index d58cd10..a690cc5 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -803,12 +803,6 @@ struct intel_crtc { unsigned long long enabled_power_domains; struct intel_overlay *overlay; - /* Display surface base address adjustement for pageflips. Note that on - * gen4+ this only adjusts up to a tile, offsets within a tile are - * handled in the hw itself (with the TILEOFF register). */ - int adjusted_x; - int adjusted_y; - struct intel_crtc_state *config; /* global reset count when the last flip was submitted */ @@ -1918,6 +1912,9 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, struct drm_file *file_priv); void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state); void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state); +void skl_update_plane(struct intel_plane *plane, + const struct intel_crtc_state *crtc_state, + const struct intel_plane_state *plane_state); /* intel_tv.c */ void intel_tv_init(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 58a772d..dc059808 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -71,7 +71,10 @@ static inline bool no_fbc_on_multiple_pipes(struct drm_i915_private *dev_priv) */ static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc) { - return crtc->base.y - crtc->adjusted_y; + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_fbc *fbc = &dev_priv->fbc; + + return crtc->base.y - fbc->state_cache.plane.adjusted_y; } /* @@ -727,8 +730,8 @@ static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc) intel_fbc_get_plane_source_size(&fbc->state_cache, &effective_w, &effective_h); - effective_w += crtc->adjusted_x; - effective_h += crtc->adjusted_y; + effective_w += fbc->state_cache.plane.adjusted_x; + effective_h += fbc->state_cache.plane.adjusted_y; return effective_w <= max_w && effective_h <= max_h; } @@ -757,6 +760,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16; cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16; cache->plane.visible = plane_state->base.visible; + cache->plane.adjusted_x = plane_state->main.x; + cache->plane.adjusted_y = plane_state->main.y; if (!cache->plane.visible) return; diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index b0d6e3e..2ec4108 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -224,7 +224,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) #endif } -static void +void skl_update_plane(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] drm/i915: Unify skylake plane update 2017-09-12 9:19 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila @ 2017-09-12 18:07 ` Ville Syrjälä 0 siblings, 0 replies; 9+ messages in thread From: Ville Syrjälä @ 2017-09-12 18:07 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: intel-gfx On Tue, Sep 12, 2017 at 12:19:39PM +0300, Juha-Pekka Heikkila wrote: > Don't handle skylake primary plane separately as it is similar > plane as the others. > > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 8 ++++ > drivers/gpu/drm/i915/intel_display.c | 85 +----------------------------------- > drivers/gpu/drm/i915/intel_drv.h | 9 ++-- > drivers/gpu/drm/i915/intel_fbc.c | 11 +++-- > drivers/gpu/drm/i915/intel_sprite.c | 2 +- > 5 files changed, 22 insertions(+), 93 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index d07d110..24d52d70 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1096,6 +1096,14 @@ struct intel_fbc { > int src_w; > int src_h; > bool visible; > + /* > + * Display surface base address adjustement for > + * pageflips. Note that on gen4+ this only adjusts up > + * to a tile, offsets within a tile are handled in > + * the hw itself (with the TILEOFF register). > + */ > + int adjusted_x; > + int adjusted_y; Please split this into two patches. First one should nuke the adjusted_x/y from the crtc, the second should do the skl function unification. > } plane; > > struct { > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 0dd0e2a..739003d 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3298,7 +3298,6 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, > const struct intel_plane_state *plane_state) > { > struct drm_i915_private *dev_priv = to_i915(primary->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > const struct drm_framebuffer *fb = plane_state->base.fb; > enum plane plane = primary->plane; > u32 linear_offset; > @@ -3316,9 +3315,6 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, > else > dspaddr_offset = linear_offset; > > - crtc->adjusted_x = x; > - crtc->adjusted_y = y; > - > spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); > > if (INTEL_GEN(dev_priv) < 4) { > @@ -3554,83 +3550,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, > return plane_ctl; > } > > -static void skylake_update_primary_plane(struct intel_plane *plane, > - const struct intel_crtc_state *crtc_state, > - const struct intel_plane_state *plane_state) > -{ > - struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > - const struct drm_framebuffer *fb = plane_state->base.fb; > - enum plane_id plane_id = plane->id; > - enum pipe pipe = plane->pipe; > - u32 plane_ctl = plane_state->ctl; > - unsigned int rotation = plane_state->base.rotation; > - u32 stride = skl_plane_stride(fb, 0, rotation); > - u32 aux_stride = skl_plane_stride(fb, 1, rotation); > - u32 surf_addr = plane_state->main.offset; > - int scaler_id = plane_state->scaler_id; > - int src_x = plane_state->main.x; > - int src_y = plane_state->main.y; > - int src_w = drm_rect_width(&plane_state->base.src) >> 16; > - int src_h = drm_rect_height(&plane_state->base.src) >> 16; > - int dst_x = plane_state->base.dst.x1; > - int dst_y = plane_state->base.dst.y1; > - int dst_w = drm_rect_width(&plane_state->base.dst); > - int dst_h = drm_rect_height(&plane_state->base.dst); > - unsigned long irqflags; > - > - /* Sizes are 0 based */ > - src_w--; > - src_h--; > - dst_w--; > - dst_h--; > - > - crtc->dspaddr_offset = surf_addr; > - > - crtc->adjusted_x = src_x; > - crtc->adjusted_y = src_y; > - > - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); > - > - if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) { > - I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id), > - PLANE_COLOR_PIPE_GAMMA_ENABLE | > - PLANE_COLOR_PIPE_CSC_ENABLE | > - PLANE_COLOR_PLANE_GAMMA_DISABLE); > - } > - > - I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl); > - I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x); > - I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); > - I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); > - I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), > - (plane_state->aux.offset - surf_addr) | aux_stride); > - I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), > - (plane_state->aux.y << 16) | plane_state->aux.x); > - > - if (scaler_id >= 0) { > - uint32_t ps_ctrl = 0; > - > - WARN_ON(!dst_w || !dst_h); > - ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane_id) | > - crtc_state->scaler_state.scalers[scaler_id].mode; > - I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl); > - I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0); > - I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (dst_x << 16) | dst_y); > - I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h); > - I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0); > - } else { > - I915_WRITE_FW(PLANE_POS(pipe, plane_id), (dst_y << 16) | dst_x); > - } > - > - I915_WRITE_FW(PLANE_SURF(pipe, plane_id), > - intel_plane_ggtt_offset(plane_state) + surf_addr); > - > - POSTING_READ_FW(PLANE_SURF(pipe, plane_id)); > - > - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); > -} > - > static void skylake_disable_primary_plane(struct intel_plane *primary, > struct intel_crtc *crtc) > { > @@ -13230,7 +13149,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) > num_formats = ARRAY_SIZE(skl_primary_formats); > modifiers = skl_format_modifiers_ccs; > > - primary->update_plane = skylake_update_primary_plane; > + primary->update_plane = skl_update_plane; > primary->disable_plane = skylake_disable_primary_plane; > } else if (INTEL_GEN(dev_priv) >= 9) { > intel_primary_formats = skl_primary_formats; > @@ -13240,7 +13159,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) > else > modifiers = skl_format_modifiers_noccs; > > - primary->update_plane = skylake_update_primary_plane; > + primary->update_plane = skl_update_plane; > primary->disable_plane = skylake_disable_primary_plane; > } else if (INTEL_GEN(dev_priv) >= 4) { > intel_primary_formats = i965_primary_formats; > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index d58cd10..a690cc5 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -803,12 +803,6 @@ struct intel_crtc { > unsigned long long enabled_power_domains; > struct intel_overlay *overlay; > > - /* Display surface base address adjustement for pageflips. Note that on > - * gen4+ this only adjusts up to a tile, offsets within a tile are > - * handled in the hw itself (with the TILEOFF register). */ > - int adjusted_x; > - int adjusted_y; > - > struct intel_crtc_state *config; > > /* global reset count when the last flip was submitted */ > @@ -1918,6 +1912,9 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > struct drm_file *file_priv); > void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state); > void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state); > +void skl_update_plane(struct intel_plane *plane, > + const struct intel_crtc_state *crtc_state, > + const struct intel_plane_state *plane_state); > > /* intel_tv.c */ > void intel_tv_init(struct drm_i915_private *dev_priv); > diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c > index 58a772d..dc059808 100644 > --- a/drivers/gpu/drm/i915/intel_fbc.c > +++ b/drivers/gpu/drm/i915/intel_fbc.c > @@ -71,7 +71,10 @@ static inline bool no_fbc_on_multiple_pipes(struct drm_i915_private *dev_priv) > */ > static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc) > { > - return crtc->base.y - crtc->adjusted_y; > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_fbc *fbc = &dev_priv->fbc; > + > + return crtc->base.y - fbc->state_cache.plane.adjusted_y; As I said earlier, we'll want to get rid if this crtc->base.y thing as well. I think it's actually semi broken at the moment since we seem to be stuffing the unclipped coordinate in there. It should really be the clipped one (ie. plane_state->src.y1 >> 16). So we'll want to put that (or potentially the whole fence_offset) into the fbc cache as well. I guess we could do that part as a separate patch though. While I was looking at the fbc code it occurred to me that it's doing way too much checking in the can_activate() function. Most of the checks it's doing there we could have done already when we had the plane/crtc states around. So I think we should pre-compute more of the answer to the "can this plane/crtc do fbc?" question. It might allow us to nuke some stuff from the fbc state cache as well. > } > > /* > @@ -727,8 +730,8 @@ static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc) > > intel_fbc_get_plane_source_size(&fbc->state_cache, &effective_w, > &effective_h); > - effective_w += crtc->adjusted_x; > - effective_h += crtc->adjusted_y; > + effective_w += fbc->state_cache.plane.adjusted_x; > + effective_h += fbc->state_cache.plane.adjusted_y; > > return effective_w <= max_w && effective_h <= max_h; > } > @@ -757,6 +760,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, > cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16; > cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16; > cache->plane.visible = plane_state->base.visible; > + cache->plane.adjusted_x = plane_state->main.x; > + cache->plane.adjusted_y = plane_state->main.y; > > if (!cache->plane.visible) > return; > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index b0d6e3e..2ec4108 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -224,7 +224,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > #endif > } > > -static void > +void > skl_update_plane(struct intel_plane *plane, > const struct intel_crtc_state *crtc_state, > const struct intel_plane_state *plane_state) > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/3] drm/i915: Unify skylake plane disable 2017-09-12 9:19 [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] Juha-Pekka Heikkila 2017-09-12 9:19 ` [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila 2017-09-12 9:19 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila @ 2017-09-12 9:19 ` Juha-Pekka Heikkila 2017-09-12 9:47 ` ✗ Fi.CI.BAT: warning for drm/i915: Skylake plane update/disable unifications [v4] Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 9+ messages in thread From: Juha-Pekka Heikkila @ 2017-09-12 9:19 UTC (permalink / raw) To: intel-gfx Don't handle skylake primary plane separately as it is similar plane as the others. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 21 ++------------------- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_sprite.c | 2 +- 3 files changed, 4 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 739003d..afead21 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3550,23 +3550,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, return plane_ctl; } -static void skylake_disable_primary_plane(struct intel_plane *primary, - struct intel_crtc *crtc) -{ - struct drm_i915_private *dev_priv = to_i915(primary->base.dev); - enum plane_id plane_id = primary->id; - enum pipe pipe = primary->pipe; - unsigned long irqflags; - - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); - - I915_WRITE_FW(PLANE_CTL(pipe, plane_id), 0); - I915_WRITE_FW(PLANE_SURF(pipe, plane_id), 0); - POSTING_READ_FW(PLANE_SURF(pipe, plane_id)); - - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); -} - static int __intel_display_resume(struct drm_device *dev, struct drm_atomic_state *state, @@ -13150,7 +13133,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) modifiers = skl_format_modifiers_ccs; primary->update_plane = skl_update_plane; - primary->disable_plane = skylake_disable_primary_plane; + primary->disable_plane = skl_disable_plane; } else if (INTEL_GEN(dev_priv) >= 9) { intel_primary_formats = skl_primary_formats; num_formats = ARRAY_SIZE(skl_primary_formats); @@ -13160,7 +13143,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) modifiers = skl_format_modifiers_noccs; primary->update_plane = skl_update_plane; - primary->disable_plane = skylake_disable_primary_plane; + primary->disable_plane = skl_disable_plane; } else if (INTEL_GEN(dev_priv) >= 4) { intel_primary_formats = i965_primary_formats; num_formats = ARRAY_SIZE(i965_primary_formats); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index a690cc5..a92c2e2 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1915,6 +1915,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state); void skl_update_plane(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state); +void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc); /* intel_tv.c */ void intel_tv_init(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 2ec4108..22598c2 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -305,7 +305,7 @@ skl_update_plane(struct intel_plane *plane, spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); } -static void +void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(plane->base.dev); -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Skylake plane update/disable unifications [v4] 2017-09-12 9:19 [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] Juha-Pekka Heikkila ` (2 preceding siblings ...) 2017-09-12 9:19 ` [PATCH 3/3] drm/i915: Unify skylake plane disable Juha-Pekka Heikkila @ 2017-09-12 9:47 ` Patchwork 2017-09-12 10:42 ` ✓ Fi.CI.BAT: success " Patchwork 2017-09-12 13:26 ` ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2017-09-12 9:47 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: intel-gfx == Series Details == Series: drm/i915: Skylake plane update/disable unifications [v4] URL : https://patchwork.freedesktop.org/series/30185/ State : warning == Summary == Series 30185v1 drm/i915: Skylake plane update/disable unifications [v4] https://patchwork.freedesktop.org/api/1.0/series/30185/revisions/1/mbox/ Test chamelium: Subgroup dp-edid-read: fail -> PASS (fi-kbl-7500u) fdo#102672 Test gem_ringfill: Subgroup basic-default: pass -> SKIP (fi-bsw-n3050) Test kms_cursor_legacy: Subgroup basic-busy-flip-before-cursor-atomic: pass -> FAIL (fi-snb-2600) fdo#100215 +1 Test kms_frontbuffer_tracking: Subgroup basic: dmesg-warn -> PASS (fi-bdw-5557u) fdo#102473 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: dmesg-warn -> PASS (fi-byt-n2820) fdo#101705 fdo#102672 https://bugs.freedesktop.org/show_bug.cgi?id=102672 fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215 fdo#102473 https://bugs.freedesktop.org/show_bug.cgi?id=102473 fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:447s fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:454s fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:377s fi-bsw-n3050 total:289 pass:242 dwarn:0 dfail:0 fail:0 skip:47 time:522s fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:269s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:512s fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:498s fi-byt-n2820 total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:496s fi-cfl-s total:289 pass:250 dwarn:4 dfail:0 fail:0 skip:35 time:457s fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:451s fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:600s fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:428s fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:413s fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:437s fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:487s fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:469s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:491s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:573s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:584s fi-pnv-d510 total:156 pass:113 dwarn:0 dfail:0 fail:0 skip:42 fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:468s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:528s fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:495s fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:464s fi-skl-x1585l total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:473s fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:568s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:1 skip:39 time:424s 3cbfafbde5bb92b6ecdbfd47e189d2742aa6fbec drm-tip: 2017y-09m-11d-23h-04m-21s UTC integration manifest 5ef8e43e70de drm/i915: Unify skylake plane disable 4e3958f66205 drm/i915: Unify skylake plane update 816933d27463 drm/i915: dspaddr_offset doesn't need to be more than local variable == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5654/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Skylake plane update/disable unifications [v4] 2017-09-12 9:19 [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] Juha-Pekka Heikkila ` (3 preceding siblings ...) 2017-09-12 9:47 ` ✗ Fi.CI.BAT: warning for drm/i915: Skylake plane update/disable unifications [v4] Patchwork @ 2017-09-12 10:42 ` Patchwork 2017-09-12 13:26 ` ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2017-09-12 10:42 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: intel-gfx == Series Details == Series: drm/i915: Skylake plane update/disable unifications [v4] URL : https://patchwork.freedesktop.org/series/30185/ State : success == Summary == Series 30185v1 drm/i915: Skylake plane update/disable unifications [v4] https://patchwork.freedesktop.org/api/1.0/series/30185/revisions/1/mbox/ Test kms_cursor_legacy: Subgroup basic-busy-flip-before-cursor-legacy: pass -> FAIL (fi-snb-2600) fdo#100215 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> FAIL (fi-skl-6700k) fdo#100367 fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215 fdo#100367 https://bugs.freedesktop.org/show_bug.cgi?id=100367 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:448s fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:374s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:533s fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:269s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:507s fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:504s fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:496s fi-cfl-s total:289 pass:250 dwarn:4 dfail:0 fail:0 skip:35 time:450s fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:454s fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:594s fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:425s fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:406s fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:438s fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:487s fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:466s fi-kbl-7500u total:289 pass:263 dwarn:1 dfail:0 fail:1 skip:24 time:479s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:579s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:588s fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:555s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:454s fi-skl-6700k total:289 pass:264 dwarn:0 dfail:0 fail:1 skip:24 time:514s fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:501s fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:454s fi-skl-x1585l total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:466s fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:568s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:1 skip:39 time:425s fi-bdw-gvtdvm failed to connect after reboot 694f07d3df18c02da3f526ae0e1238eb12534e1e drm-tip: 2017y-09m-12d-09h-59m-00s UTC integration manifest cf8eed1a327c drm/i915: Unify skylake plane disable 1fd6d5a0a554 drm/i915: Unify skylake plane update 442d1197df5f drm/i915: dspaddr_offset doesn't need to be more than local variable == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5655/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Skylake plane update/disable unifications [v4] 2017-09-12 9:19 [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] Juha-Pekka Heikkila ` (4 preceding siblings ...) 2017-09-12 10:42 ` ✓ Fi.CI.BAT: success " Patchwork @ 2017-09-12 13:26 ` Patchwork 5 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2017-09-12 13:26 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: intel-gfx == Series Details == Series: drm/i915: Skylake plane update/disable unifications [v4] URL : https://patchwork.freedesktop.org/series/30185/ State : success == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 shard-hsw total:2301 pass:1237 dwarn:0 dfail:0 fail:12 skip:1052 time:9421s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5655/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2017-09-12 18:07 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-09-12 9:19 [PATCH 0/3] drm/i915: Skylake plane update/disable unifications [v4] Juha-Pekka Heikkila 2017-09-12 9:19 ` [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila 2017-09-12 17:48 ` Ville Syrjälä 2017-09-12 9:19 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila 2017-09-12 18:07 ` Ville Syrjälä 2017-09-12 9:19 ` [PATCH 3/3] drm/i915: Unify skylake plane disable Juha-Pekka Heikkila 2017-09-12 9:47 ` ✗ Fi.CI.BAT: warning for drm/i915: Skylake plane update/disable unifications [v4] Patchwork 2017-09-12 10:42 ` ✓ Fi.CI.BAT: success " Patchwork 2017-09-12 13:26 ` ✓ Fi.CI.IGT: " Patchwork
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