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From: Josh Poimboeuf <jpoimboe@redhat.com>
To: Andy Lutomirski <luto@kernel.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
	Borislav Petkov <bp@alien8.de>, Brian Gerst <brgerst@gmail.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Juergen Gross <jgross@suse.com>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Kees Cook <keescook@chromium.org>
Subject: Re: [RFC 04/17] x86/asm/64: Simplify reg restore code in the standard IRET paths
Date: Tue, 12 Sep 2017 15:05:45 -0500	[thread overview]
Message-ID: <20170912200545.tvyvcomtz7rv4xg3@treble> (raw)
In-Reply-To: <704276f098b124c6bbe3a6dab3815736c7d01c4a.1504733277.git.luto@kernel.org>

On Wed, Sep 06, 2017 at 02:36:49PM -0700, Andy Lutomirski wrote:
> The old code restored all the registers with movq instead of pop.
> In theory, this was done because some CPUs have higher movq
> throughput, but any gain there would be tiny and is almost certainly
> outweighed by the higher text size.
> 
> This saves 96 bytes of text.
> 
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> ---
>  arch/x86/entry/calling.h  |  9 +++++++++
>  arch/x86/entry/entry_64.S | 28 ++++++++++++++++++++++------
>  2 files changed, 31 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h
> index 05ed3d393da7..0a2c73fe2cfc 100644
> --- a/arch/x86/entry/calling.h
> +++ b/arch/x86/entry/calling.h
> @@ -147,6 +147,15 @@ For 32-bit we have the following conventions - kernel is built with
>  	movq 5*8+\offset(%rsp), %rbx
>  	.endm
>  
> +	.macro POP_EXTRA_REGS
> +	popq %r15
> +	popq %r14
> +	popq %r13
> +	popq %r12
> +	popq %rbp
> +	popq %rbx
> +	.endm
> +
>  	.macro RESTORE_C_REGS_HELPER rstor_rax=1, rstor_rcx=1, rstor_r11=1, rstor_r8910=1, rstor_rdx=1
>  	.if \rstor_r11
>  	movq 6*8(%rsp), %r11
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index 2cd01ed9cd59..7f1a83b17b4a 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -521,9 +521,17 @@ GLOBAL(retint_user)
>  
>  GLOBAL(swapgs_restore_regs_and_return_to_usermode)
>  	SWAPGS
> -	RESTORE_EXTRA_REGS
> -	RESTORE_C_REGS
> -	REMOVE_PT_GPREGS_FROM_STACK 8
> +	POP_EXTRA_REGS
> +	popq	%r11
> +	popq	%r10
> +	popq	%r9
> +	popq	%r8
> +	popq	%rax
> +	popq	%rcx
> +	popq	%rdx
> +	popq	%rsi
> +	popq	%rdi
> +	addq	$8, %rsp
>  	INTERRUPT_RETURN
>  
>  
> @@ -546,9 +554,17 @@ retint_kernel:
>  	TRACE_IRQS_IRETQ
>  
>  GLOBAL(restore_regs_and_return_to_kernel)
> -	RESTORE_EXTRA_REGS
> -	RESTORE_C_REGS
> -	REMOVE_PT_GPREGS_FROM_STACK 8
> +	POP_EXTRA_REGS
> +	popq	%r11
> +	popq	%r10
> +	popq	%r9
> +	popq	%r8
> +	popq	%rax
> +	popq	%rcx
> +	popq	%rdx
> +	popq	%rsi
> +	popq	%rdi
> +	addq	$8, %rsp
>  	INTERRUPT_RETURN

Any reason why these aren't in a POP_C_REGS macro?  I think that would
make it easier to verify correctness when reading the code.

-- 
Josh

  reply	other threads:[~2017-09-12 20:05 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-06 21:36 [RFC 00/17] Pile o' entry stack changes Andy Lutomirski
2017-09-06 21:36 ` [RFC 01/17] x86/asm/64: Remove the restore_c_regs_and_iret label Andy Lutomirski
2017-09-07  9:40   ` Borislav Petkov
2017-09-07  9:46     ` Ingo Molnar
2017-09-07  9:49       ` Ingo Molnar
2017-09-07  9:57         ` Borislav Petkov
2017-09-07 10:29           ` Ingo Molnar
2017-09-06 21:36 ` [RFC 02/17] x86/asm/64: Split the iret-to-user and iret-to-kernel paths Andy Lutomirski
2017-09-06 21:36 ` [RFC 03/17] x86/asm/64: Move SWAPGS into the common iret-to-usermode path Andy Lutomirski
2017-09-06 21:36 ` [RFC 04/17] x86/asm/64: Simplify reg restore code in the standard IRET paths Andy Lutomirski
2017-09-12 20:05   ` Josh Poimboeuf [this message]
2017-09-06 21:36 ` [RFC 05/17] x86/asm/64: Shrink paranoid_exit_restore and make labels local Andy Lutomirski
2017-09-06 21:36 ` [RFC 06/17] x86/asm/64: Use pop instead of movq in syscall_return_via_sysret Andy Lutomirski
2017-09-06 21:36 ` [RFC 07/17] x86/asm/64: Merge the fast and slow SYSRET paths Andy Lutomirski
2017-09-06 21:36 ` [RFC 08/17] x86/asm/64: De-Xen-ify our NMI code Andy Lutomirski
2017-09-07  9:34   ` Juergen Gross
2017-09-07 18:38     ` Andy Lutomirski
2017-09-08  4:26       ` Juergen Gross
2017-09-06 21:36 ` [RFC 09/17] x86/asm/32: Pull MSR_IA32_SYSENTER_CS update code out of native_load_sp0() Andy Lutomirski
2017-09-12 20:06   ` Josh Poimboeuf
2017-09-06 21:36 ` [RFC 10/17] x86/asm/64: Pass sp0 directly to load_sp0() Andy Lutomirski
2017-09-06 21:36 ` [RFC 11/17] x86/asm: Add task_top_of_stack() to find the top of a task's stack Andy Lutomirski
2017-09-06 21:36 ` [RFC 12/17] x86/xen/64: Clean up SP code in cpu_initialize_context() Andy Lutomirski
2017-09-12 20:09   ` Josh Poimboeuf
2017-09-06 21:36 ` [RFC 13/17] x86/boot/64: Stop initializing TSS.sp0 at boot Andy Lutomirski
2017-09-06 21:36 ` [RFC 14/17] x86/asm/64: Remove all remaining direct thread_struct::sp0 reads Andy Lutomirski
2017-09-06 21:37 ` [RFC 15/17] x86/boot/32: Fix cpu_current_top_of_stack initialization at boot Andy Lutomirski
2017-09-06 21:37 ` [RFC 16/17] x86/asm/64: Remove thread_struct::sp0 Andy Lutomirski
2017-09-06 21:37 ` [RFC 17/17] x86/traps: Use a new on_thread_stack() helper to clean up an assertion Andy Lutomirski
2017-09-12 20:11   ` Josh Poimboeuf
2017-09-12 20:25     ` Andrew Cooper
2017-09-06 22:16 ` [RFC 00/17] Pile o' entry stack changes Andi Kleen
2017-09-07  0:01   ` Andy Lutomirski
2017-09-07  7:04     ` Ingo Molnar

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