* [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
@ 2017-09-13 10:51 Chris Wilson
2017-09-13 10:51 ` [PATCH 2/2] drm/i915/selftests: " Chris Wilson
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Chris Wilson @ 2017-09-13 10:51 UTC (permalink / raw)
To: intel-gfx
As realised by commit 9e3d6223d209 ("math64, timers: Fix 32bit
mul_u64_u32_shr() and friends"), GCC does not always generate ideal code
for performing a 32b x 32b multiply returning a 64b result (i.e. where
we idiomatically use u64 result = (u64)x * (u32)x). This catches a
couple of instances in the display code using (u64)x * (u32)y.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_tv.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6b3de6ad86d3..8f19d0b3512e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10223,7 +10223,7 @@ int intel_dotclock_calculate(int link_freq,
if (!m_n->link_n)
return 0;
- return div_u64((u64)m_n->link_m * link_freq, m_n->link_n);
+ return div_u64(mul_u32_u32(m_n->link_m, link_freq), m_n->link_n);
}
static void ironlake_pch_clock_get(struct intel_crtc *crtc,
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 0cc999fa09c5..a79a7591b2cf 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1385,7 +1385,7 @@ intel_tv_get_modes(struct drm_connector *connector)
mode_ptr->vsync_end = mode_ptr->vsync_start + 1;
mode_ptr->vtotal = vactive_s + 33;
- tmp = (u64) tv_mode->refresh * mode_ptr->vtotal;
+ tmp = mul_u32_u32(tv_mode->refresh, mode_ptr->vtotal);
tmp *= mode_ptr->htotal;
tmp = div_u64(tmp, 1000000);
mode_ptr->clock = (int) tmp;
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] drm/i915/selftests: Use mul_u32_u32() for 32b x 32b -> 64b result
2017-09-13 10:51 [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result Chris Wilson
@ 2017-09-13 10:51 ` Chris Wilson
2017-09-13 11:53 ` Ville Syrjälä
2017-09-13 11:22 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: " Patchwork
2017-09-13 11:51 ` [PATCH 1/2] " Ville Syrjälä
2 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2017-09-13 10:51 UTC (permalink / raw)
To: intel-gfx
As realised by commit 9e3d6223d209 ("math64, timers: Fix 32bit
mul_u64_u32_shr() and friends"), GCC does not always generate ideal code
for performing a 32b x 32b multiply returning a 64b result (i.e. where
we idiomatically use u64 result = (u64)x * (u32)x).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/selftests/i915_gem_timeline.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_random.c | 5 -----
drivers/gpu/drm/i915/selftests/i915_random.h | 5 +++++
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c b/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
index 7a44dab631b8..4795877abe56 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
@@ -121,7 +121,7 @@ static int igt_sync(void *arg)
static unsigned int random_engine(struct rnd_state *rnd)
{
- return ((u64)prandom_u32_state(rnd) * I915_NUM_ENGINES) >> 32;
+ return i915_prandom_u32_max_state(I915_NUM_ENGINES, rnd);
}
static int bench_sync(void *arg)
diff --git a/drivers/gpu/drm/i915/selftests/i915_random.c b/drivers/gpu/drm/i915/selftests/i915_random.c
index d044bf9a6feb..ea0f5dbc0eb7 100644
--- a/drivers/gpu/drm/i915/selftests/i915_random.c
+++ b/drivers/gpu/drm/i915/selftests/i915_random.c
@@ -41,11 +41,6 @@ u64 i915_prandom_u64_state(struct rnd_state *rnd)
return x;
}
-static inline u32 i915_prandom_u32_max_state(u32 ep_ro, struct rnd_state *state)
-{
- return upper_32_bits((u64)prandom_u32_state(state) * ep_ro);
-}
-
void i915_random_reorder(unsigned int *order, unsigned int count,
struct rnd_state *state)
{
diff --git a/drivers/gpu/drm/i915/selftests/i915_random.h b/drivers/gpu/drm/i915/selftests/i915_random.h
index 6c9379871384..7dffedc501ca 100644
--- a/drivers/gpu/drm/i915/selftests/i915_random.h
+++ b/drivers/gpu/drm/i915/selftests/i915_random.h
@@ -43,6 +43,11 @@
u64 i915_prandom_u64_state(struct rnd_state *rnd);
+static inline u32 i915_prandom_u32_max_state(u32 ep_ro, struct rnd_state *state)
+{
+ return upper_32_bits(mul_u32_u32(prandom_u32_state(state), ep_ro));
+}
+
unsigned int *i915_random_order(unsigned int count,
struct rnd_state *state);
void i915_random_reorder(unsigned int *order,
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
2017-09-13 10:51 [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result Chris Wilson
2017-09-13 10:51 ` [PATCH 2/2] drm/i915/selftests: " Chris Wilson
@ 2017-09-13 11:22 ` Patchwork
2017-09-13 13:54 ` Chris Wilson
2017-09-13 11:51 ` [PATCH 1/2] " Ville Syrjälä
2 siblings, 1 reply; 7+ messages in thread
From: Patchwork @ 2017-09-13 11:22 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
URL : https://patchwork.freedesktop.org/series/30279/
State : failure
== Summary ==
Series 30279v1 series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
https://patchwork.freedesktop.org/api/1.0/series/30279/revisions/1/mbox/
Test gem_mmap_gtt:
Subgroup basic-wc:
pass -> INCOMPLETE (fi-cfl-s)
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
fail -> PASS (fi-snb-2600) fdo#100215
Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip -> PASS (fi-skl-x1585l) fdo#101781
Subgroup basic-flip-vs-wf_vblank:
fail -> PASS (fi-ivb-3520m) fdo#102699
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#102699 https://bugs.freedesktop.org/show_bug.cgi?id=102699
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:451s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:457s
fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:380s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:544s
fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:270s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:509s
fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:510s
fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:501s
fi-cfl-s total:140 pass:118 dwarn:1 dfail:0 fail:0 skip:20
fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:458s
fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:596s
fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:431s
fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:407s
fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:439s
fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:484s
fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:463s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:495s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:584s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:591s
fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:555s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:461s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:525s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:502s
fi-skl-x1585l total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:515s
fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:578s
fi-snb-2600 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:433s
fi-skl-gvtdvm failed to connect after reboot
29603d09af9af9882a230162fd50674ff94aa05c drm-tip: 2017y-09m-13d-09h-38m-49s UTC integration manifest
d15352369716 drm/i915/selftests: Use mul_u32_u32() for 32b x 32b -> 64b result
6ece8d5d5c9f drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5679/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
2017-09-13 10:51 [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result Chris Wilson
2017-09-13 10:51 ` [PATCH 2/2] drm/i915/selftests: " Chris Wilson
2017-09-13 11:22 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: " Patchwork
@ 2017-09-13 11:51 ` Ville Syrjälä
2 siblings, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2017-09-13 11:51 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Wed, Sep 13, 2017 at 11:51:53AM +0100, Chris Wilson wrote:
> As realised by commit 9e3d6223d209 ("math64, timers: Fix 32bit
> mul_u64_u32_shr() and friends"), GCC does not always generate ideal code
> for performing a 32b x 32b multiply returning a 64b result (i.e. where
> we idiomatically use u64 result = (u64)x * (u32)x). This catches a
> couple of instances in the display code using (u64)x * (u32)y.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> drivers/gpu/drm/i915/intel_tv.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6b3de6ad86d3..8f19d0b3512e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10223,7 +10223,7 @@ int intel_dotclock_calculate(int link_freq,
> if (!m_n->link_n)
> return 0;
>
> - return div_u64((u64)m_n->link_m * link_freq, m_n->link_n);
> + return div_u64(mul_u32_u32(m_n->link_m, link_freq), m_n->link_n);
> }
>
> static void ironlake_pch_clock_get(struct intel_crtc *crtc,
> diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
> index 0cc999fa09c5..a79a7591b2cf 100644
> --- a/drivers/gpu/drm/i915/intel_tv.c
> +++ b/drivers/gpu/drm/i915/intel_tv.c
> @@ -1385,7 +1385,7 @@ intel_tv_get_modes(struct drm_connector *connector)
> mode_ptr->vsync_end = mode_ptr->vsync_start + 1;
> mode_ptr->vtotal = vactive_s + 33;
>
> - tmp = (u64) tv_mode->refresh * mode_ptr->vtotal;
> + tmp = mul_u32_u32(tv_mode->refresh, mode_ptr->vtotal);
> tmp *= mode_ptr->htotal;
> tmp = div_u64(tmp, 1000000);
> mode_ptr->clock = (int) tmp;
> --
> 2.14.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915/selftests: Use mul_u32_u32() for 32b x 32b -> 64b result
2017-09-13 10:51 ` [PATCH 2/2] drm/i915/selftests: " Chris Wilson
@ 2017-09-13 11:53 ` Ville Syrjälä
0 siblings, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2017-09-13 11:53 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Wed, Sep 13, 2017 at 11:51:54AM +0100, Chris Wilson wrote:
> As realised by commit 9e3d6223d209 ("math64, timers: Fix 32bit
> mul_u64_u32_shr() and friends"), GCC does not always generate ideal code
> for performing a 32b x 32b multiply returning a 64b result (i.e. where
> we idiomatically use u64 result = (u64)x * (u32)x).
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/selftests/i915_gem_timeline.c | 2 +-
> drivers/gpu/drm/i915/selftests/i915_random.c | 5 -----
> drivers/gpu/drm/i915/selftests/i915_random.h | 5 +++++
> 3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c b/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
> index 7a44dab631b8..4795877abe56 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
> @@ -121,7 +121,7 @@ static int igt_sync(void *arg)
>
> static unsigned int random_engine(struct rnd_state *rnd)
> {
> - return ((u64)prandom_u32_state(rnd) * I915_NUM_ENGINES) >> 32;
> + return i915_prandom_u32_max_state(I915_NUM_ENGINES, rnd);
> }
>
> static int bench_sync(void *arg)
> diff --git a/drivers/gpu/drm/i915/selftests/i915_random.c b/drivers/gpu/drm/i915/selftests/i915_random.c
> index d044bf9a6feb..ea0f5dbc0eb7 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_random.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_random.c
> @@ -41,11 +41,6 @@ u64 i915_prandom_u64_state(struct rnd_state *rnd)
> return x;
> }
>
> -static inline u32 i915_prandom_u32_max_state(u32 ep_ro, struct rnd_state *state)
> -{
> - return upper_32_bits((u64)prandom_u32_state(state) * ep_ro);
> -}
> -
> void i915_random_reorder(unsigned int *order, unsigned int count,
> struct rnd_state *state)
> {
> diff --git a/drivers/gpu/drm/i915/selftests/i915_random.h b/drivers/gpu/drm/i915/selftests/i915_random.h
> index 6c9379871384..7dffedc501ca 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_random.h
> +++ b/drivers/gpu/drm/i915/selftests/i915_random.h
> @@ -43,6 +43,11 @@
>
> u64 i915_prandom_u64_state(struct rnd_state *rnd);
>
> +static inline u32 i915_prandom_u32_max_state(u32 ep_ro, struct rnd_state *state)
> +{
> + return upper_32_bits(mul_u32_u32(prandom_u32_state(state), ep_ro));
> +}
> +
> unsigned int *i915_random_order(unsigned int count,
> struct rnd_state *state);
> void i915_random_reorder(unsigned int *order,
> --
> 2.14.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
2017-09-13 11:22 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: " Patchwork
@ 2017-09-13 13:54 ` Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2017-09-13 13:54 UTC (permalink / raw)
To: Patchwork; +Cc: intel-gfx
Quoting Patchwork (2017-09-13 12:22:43)
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
> URL : https://patchwork.freedesktop.org/series/30279/
> State : failure
>
> == Summary ==
>
> Series 30279v1 series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
> https://patchwork.freedesktop.org/api/1.0/series/30279/revisions/1/mbox/
>
> Test gem_mmap_gtt:
> Subgroup basic-wc:
> pass -> INCOMPLETE (fi-cfl-s)
The hard drive controller exploded, I take no credit.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result
@ 2017-07-20 11:15 Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2017-07-20 11:15 UTC (permalink / raw)
To: intel-gfx
As realised by commit 9e3d6223d209 ("math64, timers: Fix 32bit
mul_u64_u32_shr() and friends"), GCC does not always generate ideal code
for performing a 32b x 32b multiply returning a 64b result (i.e. where
we idiomatically use u64 result = (u64)x * (u32)x). This catches a
couple of instances in the display code using (u64)x * (u32)y.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_tv.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8bd8ed362e1a..c66749e8f75e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10022,7 +10022,7 @@ int intel_dotclock_calculate(int link_freq,
if (!m_n->link_n)
return 0;
- return div_u64((u64)m_n->link_m * link_freq, m_n->link_n);
+ return div_u64(mul_u32_u32(m_n->link_m, link_freq), m_n->link_n);
}
static void ironlake_pch_clock_get(struct intel_crtc *crtc,
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 784df024e230..38087d0a4465 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1385,7 +1385,7 @@ intel_tv_get_modes(struct drm_connector *connector)
mode_ptr->vsync_end = mode_ptr->vsync_start + 1;
mode_ptr->vtotal = vactive_s + 33;
- tmp = (u64) tv_mode->refresh * mode_ptr->vtotal;
+ tmp = mul_u32_u32(tv_mode->refresh, mode_ptr->vtotal);
tmp *= mode_ptr->htotal;
tmp = div_u64(tmp, 1000000);
mode_ptr->clock = (int) tmp;
--
2.13.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-09-13 13:54 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-09-13 10:51 [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result Chris Wilson
2017-09-13 10:51 ` [PATCH 2/2] drm/i915/selftests: " Chris Wilson
2017-09-13 11:53 ` Ville Syrjälä
2017-09-13 11:22 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: " Patchwork
2017-09-13 13:54 ` Chris Wilson
2017-09-13 11:51 ` [PATCH 1/2] " Ville Syrjälä
-- strict thread matches above, loose matches on Subject: below --
2017-07-20 11:15 Chris Wilson
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.