* [PATCH v7 1/2] drm/i915: Introduce INTEL_GEN_MASK
@ 2017-09-13 11:52 Joonas Lahtinen
2017-09-13 11:52 ` [PATCH v7 2/2] drm/i915: Simplify i915_reg_read_ioctl Joonas Lahtinen
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Joonas Lahtinen @ 2017-09-13 11:52 UTC (permalink / raw)
To: Intel graphics driver community testing & development
Cc: Jani Nikula, Rodrigo Vivi
Split INTEL_GEN_MASK out of IS_GEN macro, and make it usable
within static declarations (unlike compound statements).
v2:
- s/combound/compound/ (Tvrtko)
- Fix whitespace (yes, we need automatic checkpatch.pl)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 22 ++++++++++------------
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1cc31a5b049f..19c7ea5d0e22 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2880,23 +2880,21 @@ intel_info(const struct drm_i915_private *dev_priv)
#define INTEL_REVID(dev_priv) ((dev_priv)->drm.pdev->revision)
#define GEN_FOREVER (0)
+
+#define INTEL_GEN_MASK(s, e) ( \
+ BUILD_BUG_ON_ZERO(!__builtin_constant_p(s)) + \
+ BUILD_BUG_ON_ZERO(!__builtin_constant_p(e)) + \
+ GENMASK((e) != GEN_FOREVER ? (e) - 1 : BITS_PER_LONG - 1, \
+ (s) != GEN_FOREVER ? (s) - 1 : 0) \
+)
+
/*
* Returns true if Gen is in inclusive range [Start, End].
*
* Use GEN_FOREVER for unbound start and or end.
*/
-#define IS_GEN(dev_priv, s, e) ({ \
- unsigned int __s = (s), __e = (e); \
- BUILD_BUG_ON(!__builtin_constant_p(s)); \
- BUILD_BUG_ON(!__builtin_constant_p(e)); \
- if ((__s) != GEN_FOREVER) \
- __s = (s) - 1; \
- if ((__e) == GEN_FOREVER) \
- __e = BITS_PER_LONG - 1; \
- else \
- __e = (e) - 1; \
- !!((dev_priv)->info.gen_mask & GENMASK((__e), (__s))); \
-})
+#define IS_GEN(dev_priv, s, e) \
+ (!!((dev_priv)->info.gen_mask & INTEL_GEN_MASK((s), (e))))
/*
* Return true if revision is in range [since,until] inclusive.
--
2.13.5
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v7 2/2] drm/i915: Simplify i915_reg_read_ioctl 2017-09-13 11:52 [PATCH v7 1/2] drm/i915: Introduce INTEL_GEN_MASK Joonas Lahtinen @ 2017-09-13 11:52 ` Joonas Lahtinen 2017-09-13 12:14 ` ✓ Fi.CI.BAT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK Patchwork 2017-09-13 18:35 ` ✓ Fi.CI.IGT: " Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Joonas Lahtinen @ 2017-09-13 11:52 UTC (permalink / raw) To: Intel graphics driver community testing & development Cc: Jani Nikula, Rodrigo Vivi Convert to use the freshly available made INTEL_GEN_MASK for easier grepping and improve function readability and clarify the UABI documentation. No functional changes. v2: - Lift GEM_BUG_ONs and use is_power_of_2 (Chris) - Retain -EINVAL on bad flags behavior (Chris) v3: - Extract flags with 'entry->size - 1' (Chris) v4: - Add GEM_BUG_ON on for flags vs entry offset (Chris) v5: - Use 'u16' to match 'dev_priv' (Ville) v6: - Fix checkpatch.pl errors Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/intel_uncore.c | 95 +++++++++++++++++-------------------- include/uapi/drm/i915_drm.h | 6 ++- 2 files changed, 48 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 1b38eb94d461..97525de2cee4 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1292,72 +1292,65 @@ void intel_uncore_fini(struct drm_i915_private *dev_priv) intel_uncore_forcewake_reset(dev_priv, false); } -#define GEN_RANGE(l, h) GENMASK((h) - 1, (l) - 1) - -static const struct register_whitelist { - i915_reg_t offset_ldw, offset_udw; - uint32_t size; - /* supported gens, 0x10 for 4, 0x30 for 4 and 5, etc. */ - uint32_t gen_bitmask; -} whitelist[] = { - { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), - .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), - .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, -}; +static const struct reg_whitelist { + i915_reg_t offset_ldw; + i915_reg_t offset_udw; + u16 gen_mask; + u8 size; +} reg_read_whitelist[] = { { + .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), + .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), + .gen_mask = INTEL_GEN_MASK(4, 10), + .size = 8 +} }; int i915_reg_read_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_reg_read *reg = data; - struct register_whitelist const *entry = whitelist; - unsigned size; - i915_reg_t offset_ldw, offset_udw; - int i, ret = 0; - - for (i = 0; i < ARRAY_SIZE(whitelist); i++, entry++) { - if (i915_mmio_reg_offset(entry->offset_ldw) == (reg->offset & -entry->size) && - (INTEL_INFO(dev_priv)->gen_mask & entry->gen_bitmask)) + struct reg_whitelist const *entry; + unsigned int flags; + int remain; + int ret = 0; + + entry = reg_read_whitelist; + remain = ARRAY_SIZE(reg_read_whitelist); + while (remain) { + u32 entry_offset = i915_mmio_reg_offset(entry->offset_ldw); + + GEM_BUG_ON(!is_power_of_2(entry->size)); + GEM_BUG_ON(entry->size > 8); + GEM_BUG_ON(entry_offset & (entry->size - 1)); + + if (INTEL_INFO(dev_priv)->gen_mask & entry->gen_mask && + entry_offset == (reg->offset & -entry->size)) break; + entry++; + remain--; } - if (i == ARRAY_SIZE(whitelist)) + if (!remain) return -EINVAL; - /* We use the low bits to encode extra flags as the register should - * be naturally aligned (and those that are not so aligned merely - * limit the available flags for that register). - */ - offset_ldw = entry->offset_ldw; - offset_udw = entry->offset_udw; - size = entry->size; - size |= reg->offset ^ i915_mmio_reg_offset(offset_ldw); + flags = reg->offset & (entry->size - 1); intel_runtime_pm_get(dev_priv); - - switch (size) { - case 8 | 1: - reg->val = I915_READ64_2x32(offset_ldw, offset_udw); - break; - case 8: - reg->val = I915_READ64(offset_ldw); - break; - case 4: - reg->val = I915_READ(offset_ldw); - break; - case 2: - reg->val = I915_READ16(offset_ldw); - break; - case 1: - reg->val = I915_READ8(offset_ldw); - break; - default: + if (entry->size == 8 && flags == I915_REG_READ_8B_WA) + reg->val = I915_READ64_2x32(entry->offset_ldw, + entry->offset_udw); + else if (entry->size == 8 && flags == 0) + reg->val = I915_READ64(entry->offset_ldw); + else if (entry->size == 4 && flags == 0) + reg->val = I915_READ(entry->offset_ldw); + else if (entry->size == 2 && flags == 0) + reg->val = I915_READ16(entry->offset_ldw); + else if (entry->size == 1 && flags == 0) + reg->val = I915_READ8(entry->offset_ldw); + else ret = -EINVAL; - goto out; - } - -out: intel_runtime_pm_put(dev_priv); + return ret; } diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index d8d10d932759..b4505d55990d 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1308,14 +1308,16 @@ struct drm_i915_reg_read { * be specified */ __u64 offset; +#define I915_REG_READ_8B_WA BIT(0) + __u64 val; /* Return value */ }; /* Known registers: * * Render engine timestamp - 0x2358 + 64bit - gen7+ * - Note this register returns an invalid value if using the default - * single instruction 8byte read, in order to workaround that use - * offset (0x2538 | 1) instead. + * single instruction 8byte read, in order to workaround that pass + * flag I915_REG_READ_8B_WA in offset field. * */ -- 2.13.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK 2017-09-13 11:52 [PATCH v7 1/2] drm/i915: Introduce INTEL_GEN_MASK Joonas Lahtinen 2017-09-13 11:52 ` [PATCH v7 2/2] drm/i915: Simplify i915_reg_read_ioctl Joonas Lahtinen @ 2017-09-13 12:14 ` Patchwork 2017-09-13 18:35 ` ✓ Fi.CI.IGT: " Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2017-09-13 12:14 UTC (permalink / raw) To: Joonas Lahtinen; +Cc: intel-gfx == Series Details == Series: series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK URL : https://patchwork.freedesktop.org/series/30291/ State : success == Summary == Series 30291v1 series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK https://patchwork.freedesktop.org/api/1.0/series/30291/revisions/1/mbox/ Test kms_flip: Subgroup basic-flip-vs-wf_vblank: fail -> PASS (fi-ivb-3520m) fdo#102699 fdo#102699 https://bugs.freedesktop.org/show_bug.cgi?id=102699 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:442s fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:453s fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:379s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:522s fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:268s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:504s fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:501s fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:492s fi-cfl-s total:289 pass:223 dwarn:34 dfail:0 fail:0 skip:32 time:555s fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:455s fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:596s fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:430s fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:410s fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:440s fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:482s fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:459s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:487s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:576s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:586s fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:552s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:459s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:528s fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:498s fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:457s fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:576s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:1 skip:39 time:420s fi-skl-x1585l failed to connect after reboot 29603d09af9af9882a230162fd50674ff94aa05c drm-tip: 2017y-09m-13d-09h-38m-49s UTC integration manifest 0210863e96f4 drm/i915: Simplify i915_reg_read_ioctl 1efb3073e0a0 drm/i915: Introduce INTEL_GEN_MASK == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5682/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK 2017-09-13 11:52 [PATCH v7 1/2] drm/i915: Introduce INTEL_GEN_MASK Joonas Lahtinen 2017-09-13 11:52 ` [PATCH v7 2/2] drm/i915: Simplify i915_reg_read_ioctl Joonas Lahtinen 2017-09-13 12:14 ` ✓ Fi.CI.BAT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK Patchwork @ 2017-09-13 18:35 ` Patchwork 2017-09-14 8:24 ` Joonas Lahtinen 2 siblings, 1 reply; 5+ messages in thread From: Patchwork @ 2017-09-13 18:35 UTC (permalink / raw) To: Joonas Lahtinen; +Cc: intel-gfx == Series Details == Series: series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK URL : https://patchwork.freedesktop.org/series/30291/ State : success == Summary == Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-C-planes: skip -> PASS (shard-hsw) Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 +1 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 shard-hsw total:2419 pass:1324 dwarn:2 dfail:0 fail:12 skip:1081 time:9710s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5682/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: ✓ Fi.CI.IGT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK 2017-09-13 18:35 ` ✓ Fi.CI.IGT: " Patchwork @ 2017-09-14 8:24 ` Joonas Lahtinen 0 siblings, 0 replies; 5+ messages in thread From: Joonas Lahtinen @ 2017-09-14 8:24 UTC (permalink / raw) To: intel-gfx On Wed, 2017-09-13 at 18:35 +0000, Patchwork wrote: > == Series Details == > > Series: series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK > URL : https://patchwork.freedesktop.org/series/30291/ > State : success Pushed the series, thanks for review. Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-09-14 8:25 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-09-13 11:52 [PATCH v7 1/2] drm/i915: Introduce INTEL_GEN_MASK Joonas Lahtinen 2017-09-13 11:52 ` [PATCH v7 2/2] drm/i915: Simplify i915_reg_read_ioctl Joonas Lahtinen 2017-09-13 12:14 ` ✓ Fi.CI.BAT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK Patchwork 2017-09-13 18:35 ` ✓ Fi.CI.IGT: " Patchwork 2017-09-14 8:24 ` Joonas Lahtinen
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