[PATCH 1/4] goarch.bbclass: fixups for Go mips32 support

* [PATCH 1/4] goarch.bbclass: fixups for Go mips32 support
@ 2017-09-23  0:58 Khem Raj
  2017-09-23  0:58 ` [PATCH 2/4] go: disable PIE flags for cgo Khem Raj
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Khem Raj @ 2017-09-23  0:58 UTC (permalink / raw)
  To: openembedded-core

From: Matt Madison <matt@madison.systems>

* Fix the regular expression in the mips test

* Flag as incompatible any mips32 tunes for n32 ABI
  or soft-float, as go does not support them.

* Replace mips32r2 tune with mips32r1. Go only supports
  mips32r1, which is a strict subset of r2.  Adjusting
  this tune is not ideal, but is hopefully a temporary
  measure until more complete mips32 ISA coverage
  arrives upstream.

[YOCTO #12108]

Signed-off-by: Matt Madison <matt@madison.systems>
Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 meta/classes/goarch.bbclass | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/meta/classes/goarch.bbclass b/meta/classes/goarch.bbclass
index 8b95c5fe94..9ed562d5ab 100644
--- a/meta/classes/goarch.bbclass
+++ b/meta/classes/goarch.bbclass
@@ -43,10 +43,14 @@ def go_map_arch(a, d):
         return 'mips64le'
     elif re.match('mips64*', a):
         return 'mips64'
-    elif re.match('mipsel*', a):
-        return 'mipsle'
-    elif re.match('mips*', a):
-        return 'mips'
+    elif re.match('mips.*', a):
+        tf = d.getVar('TUNE_FEATURES').split()
+        if 'fpu-hard' in tf and 'n32' not in tf:
+            if 'mips32r2' in tf:
+                newtf = [t for t in tf if t != 'mips32r2']
+                newtf.append('mips32')
+                d.setVar('TUNE_FEATURES', ' '.join(newtf))
+            return 'mips' if 'bigendian' in tf else 'mipsle'
     elif re.match('p(pc|owerpc)(64)', a):
         return 'ppc64'
     elif re.match('p(pc|owerpc)(64el)', a):
-- 
2.14.1



^ permalink raw reply related	[flat|nested] 5+ messages in thread