[PATCH] drm/i915/cnl: allow HDMI 2.0 clock rates

* [PATCH] drm/i915/cnl: allow HDMI 2.0 clock rates
@ 2017-09-26 22:13 Rodrigo Vivi
  2017-09-26 22:37 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Rodrigo Vivi @ 2017-09-26 22:13 UTC (permalink / raw)
  To: intel-gfx; +Cc: Rodrigo Vivi, Paulo Zanoni

From: Shashank Sharma <shashank.sharma@intel.com>

From GLK onwards, Intel platforms contain native HDMI 2.0
controller, which is capable of driving clocks upto 600Mhz.
This patch updates the max tmds clock limit for the same.

V2: check for gen 10 and above (Ville)
    align the gen10 condition with upper line (Ander)
V3: rebase on top of patch-2-v3
v4: (by Rodrigo): Besides rebasing it s/gen9_lp/glk+ on this
    commit message.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_hdmi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index e6f8f30ce7bd..f70591a024f0 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1222,6 +1222,8 @@ static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
 {
 	if (IS_G4X(dev_priv))
 		return 165000;
+	else if (INTEL_INFO(dev_priv)->gen >= 10)
+		return 600000;
 	else if (IS_GEMINILAKE(dev_priv))
 		return 594000;
 	else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
-- 
2.13.5

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