[PATCH 1/2] drm/amdgpu/pp: constify some powerplay tables

[PATCH 1/2] drm/amdgpu/pp: constify some powerplay tables

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
index 9186b07..6f0b2e5 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
@@ -312,37 +312,37 @@ static int rv_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
 }
 
 /* temporary hardcoded clock voltage breakdown tables */
-DpmClock_t VddDcfClk[]= {
+static const DpmClock_t VddDcfClk[]= {
 	{ 300, 2600},
 	{ 600, 3200},
 	{ 600, 3600},
 };
 
-DpmClock_t VddSocClk[]= {
+static const DpmClock_t VddSocClk[]= {
 	{ 478, 2600},
 	{ 722, 3200},
 	{ 722, 3600},
 };
 
-DpmClock_t VddFClk[]= {
+static const DpmClock_t VddFClk[]= {
 	{ 400, 2600},
 	{1200, 3200},
 	{1200, 3600},
 };
 
-DpmClock_t VddDispClk[]= {
+static const DpmClock_t VddDispClk[]= {
 	{ 435, 2600},
 	{ 661, 3200},
 	{1086, 3600},
 };
 
-DpmClock_t VddDppClk[]= {
+static const DpmClock_t VddDppClk[]= {
 	{ 435, 2600},
 	{ 661, 3200},
 	{ 661, 3600},
 };
 
-DpmClock_t VddPhyClk[]= {
+static const DpmClock_t VddPhyClk[]= {
 	{ 540, 2600},
 	{ 810, 3200},
 	{ 810, 3600},
@@ -350,7 +350,7 @@ DpmClock_t VddPhyClk[]= {
 
 static int rv_get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr,
 			struct rv_voltage_dependency_table **pptable,
-			uint32_t num_entry, DpmClock_t *pclk_dependency_table)
+			uint32_t num_entry, const DpmClock_t *pclk_dependency_table)
 {
 	uint32_t table_size, i;
 	struct rv_voltage_dependency_table *ptable;
-- 
2.9.4

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[PATCH 2/2] drm/amdgpu/vega10: static constify channel_number

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index a59d282..80e41be 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -56,7 +56,7 @@
 
 #define HBM_MEMORY_CHANNEL_WIDTH    128
 
-uint32_t channel_number[] = {1, 2, 0, 4, 0, 8, 0, 16, 2};
+static const uint32_t channel_number[] = {1, 2, 0, 4, 0, 8, 0, 16, 2};
 
 #define MEM_FREQ_LOW_LATENCY        25000
 #define MEM_FREQ_HIGH_LATENCY       80000
-- 
2.9.4

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Re: [PATCH 1/2] drm/amdgpu/pp: constify some powerplay tables

[Alex Deucher]

On Wed, Sep 27, 2017 at 6:48 PM, Dave Airlie <airlied@gmail.com> wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> Signed-off-by: Dave Airlie <airlied@redhat.com>

Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
> index 9186b07..6f0b2e5 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
> @@ -312,37 +312,37 @@ static int rv_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
>  }
>
>  /* temporary hardcoded clock voltage breakdown tables */
> -DpmClock_t VddDcfClk[]= {
> +static const DpmClock_t VddDcfClk[]= {
>         { 300, 2600},
>         { 600, 3200},
>         { 600, 3600},
>  };
>
> -DpmClock_t VddSocClk[]= {
> +static const DpmClock_t VddSocClk[]= {
>         { 478, 2600},
>         { 722, 3200},
>         { 722, 3600},
>  };
>
> -DpmClock_t VddFClk[]= {
> +static const DpmClock_t VddFClk[]= {
>         { 400, 2600},
>         {1200, 3200},
>         {1200, 3600},
>  };
>
> -DpmClock_t VddDispClk[]= {
> +static const DpmClock_t VddDispClk[]= {
>         { 435, 2600},
>         { 661, 3200},
>         {1086, 3600},
>  };
>
> -DpmClock_t VddDppClk[]= {
> +static const DpmClock_t VddDppClk[]= {
>         { 435, 2600},
>         { 661, 3200},
>         { 661, 3600},
>  };
>
> -DpmClock_t VddPhyClk[]= {
> +static const DpmClock_t VddPhyClk[]= {
>         { 540, 2600},
>         { 810, 3200},
>         { 810, 3600},
> @@ -350,7 +350,7 @@ DpmClock_t VddPhyClk[]= {
>
>  static int rv_get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr,
>                         struct rv_voltage_dependency_table **pptable,
> -                       uint32_t num_entry, DpmClock_t *pclk_dependency_table)
> +                       uint32_t num_entry, const DpmClock_t *pclk_dependency_table)
>  {
>         uint32_t table_size, i;
>         struct rv_voltage_dependency_table *ptable;
> --
> 2.9.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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