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From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: Ingo Molnar <mingo@kernel.org>, Minchan Kim <minchan@kernel.org>,
	Nitin Gupta <ngupta@vflare.org>,
	Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Ingo Molnar <mingo@redhat.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Andy Lutomirski <luto@amacapital.net>,
	Cyrill Gorcunov <gorcunov@openvz.org>,
	Borislav Petkov <bp@suse.de>,
	linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv7 02/19] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS
Date: Thu, 28 Sep 2017 12:19:54 +0300	[thread overview]
Message-ID: <20170928091954.t74i542dlnejbzty@node.shutemov.name> (raw)
In-Reply-To: <20170928081034.g3k3sz7pue7jnzvi@gmail.com>

On Thu, Sep 28, 2017 at 10:10:34AM +0200, Ingo Molnar wrote:
> 
> * Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> 
> > With boot-time switching between paging mode we will have variable
> > MAX_PHYSMEM_BITS.
> > 
> > Let's use the maximum variable possible for CONFIG_X86_5LEVEL=y
> > configuration to define zsmalloc data structures.
> > 
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > Cc: Minchan Kim <minchan@kernel.org>
> > Cc: Nitin Gupta <ngupta@vflare.org>
> > Cc: Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com>
> > ---
> >  mm/zsmalloc.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
> > index 7c38e850a8fc..fe22661f2fe5 100644
> > --- a/mm/zsmalloc.c
> > +++ b/mm/zsmalloc.c
> > @@ -93,7 +93,13 @@
> >  #define MAX_PHYSMEM_BITS BITS_PER_LONG
> >  #endif
> >  #endif
> > +
> > +#ifdef CONFIG_X86_5LEVEL
> > +/* MAX_PHYSMEM_BITS is variable, use maximum value here */
> > +#define _PFN_BITS		(52 - PAGE_SHIFT)
> > +#else
> >  #define _PFN_BITS		(MAX_PHYSMEM_BITS - PAGE_SHIFT)
> > +#endif
> 
> This is a totally ugly hack, polluting generic MM code with an x86-ism and an 
> arbitrary hard-coded constant that would silently lose validity when x86 paging 
> gets extended again ...

Well, yes it's ugly. And I would be glad to find better solution. But I
don't see one.

And it won't break silently on x86 paging expanding as it won't use
CONFIG_X86_5LEVEL, so we would fallback to MAX_PHYSMEM_BITS - PAGE_SHIFT.

I worth noting that the code already has x86 hack. See PAE special case
for MAX_PHYSMEM_BITS.

-- 
 Kirill A. Shutemov

WARNING: multiple messages have this Message-ID (diff)
From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: Ingo Molnar <mingo@kernel.org>, Minchan Kim <minchan@kernel.org>,
	Nitin Gupta <ngupta@vflare.org>,
	Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Ingo Molnar <mingo@redhat.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Andy Lutomirski <luto@amacapital.net>,
	Cyrill Gorcunov <gorcunov@openvz.org>,
	Borislav Petkov <bp@suse.de>,
	linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv7 02/19] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS
Date: Thu, 28 Sep 2017 12:19:54 +0300	[thread overview]
Message-ID: <20170928091954.t74i542dlnejbzty@node.shutemov.name> (raw)
In-Reply-To: <20170928081034.g3k3sz7pue7jnzvi@gmail.com>

On Thu, Sep 28, 2017 at 10:10:34AM +0200, Ingo Molnar wrote:
> 
> * Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> 
> > With boot-time switching between paging mode we will have variable
> > MAX_PHYSMEM_BITS.
> > 
> > Let's use the maximum variable possible for CONFIG_X86_5LEVEL=y
> > configuration to define zsmalloc data structures.
> > 
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > Cc: Minchan Kim <minchan@kernel.org>
> > Cc: Nitin Gupta <ngupta@vflare.org>
> > Cc: Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com>
> > ---
> >  mm/zsmalloc.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
> > index 7c38e850a8fc..fe22661f2fe5 100644
> > --- a/mm/zsmalloc.c
> > +++ b/mm/zsmalloc.c
> > @@ -93,7 +93,13 @@
> >  #define MAX_PHYSMEM_BITS BITS_PER_LONG
> >  #endif
> >  #endif
> > +
> > +#ifdef CONFIG_X86_5LEVEL
> > +/* MAX_PHYSMEM_BITS is variable, use maximum value here */
> > +#define _PFN_BITS		(52 - PAGE_SHIFT)
> > +#else
> >  #define _PFN_BITS		(MAX_PHYSMEM_BITS - PAGE_SHIFT)
> > +#endif
> 
> This is a totally ugly hack, polluting generic MM code with an x86-ism and an 
> arbitrary hard-coded constant that would silently lose validity when x86 paging 
> gets extended again ...

Well, yes it's ugly. And I would be glad to find better solution. But I
don't see one.

And it won't break silently on x86 paging expanding as it won't use
CONFIG_X86_5LEVEL, so we would fallback to MAX_PHYSMEM_BITS - PAGE_SHIFT.

I worth noting that the code already has x86 hack. See PAE special case
for MAX_PHYSMEM_BITS.

-- 
 Kirill A. Shutemov

--
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  reply	other threads:[~2017-09-28  9:19 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-18 10:55 [PATCHv7 00/19] Boot-time switching between 4- and 5-level paging for 4.15 Kirill A. Shutemov
2017-09-18 10:55 ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 01/19] mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:07   ` Ingo Molnar
2017-09-28  8:07     ` Ingo Molnar
2017-09-28  9:08     ` Kirill A. Shutemov
2017-09-28  9:08       ` Kirill A. Shutemov
2017-09-28  9:39       ` Ingo Molnar
2017-09-28  9:39         ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 02/19] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:10   ` Ingo Molnar
2017-09-28  8:10     ` Ingo Molnar
2017-09-28  9:19     ` Kirill A. Shutemov [this message]
2017-09-28  9:19       ` Kirill A. Shutemov
2017-09-28  9:44       ` Ingo Molnar
2017-09-28  9:44         ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 03/19] x86/kasan: Use the same shadow offset for 4- and 5-level paging Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:15   ` Ingo Molnar
2017-09-28  8:15     ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 04/19] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 05/19] x86/xen: Drop 5-level paging support code from XEN_PV code Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 06/19] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:18   ` Ingo Molnar
2017-09-28  8:18     ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 07/19] x86/mm: Make virtual memory layout movable for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:19   ` Ingo Molnar
2017-09-28  8:19     ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 08/19] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-19 14:03   ` Kirill A. Shutemov
2017-09-19 14:03     ` Kirill A. Shutemov
2017-09-28  8:21   ` Ingo Molnar
2017-09-28  8:21     ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 09/19] x86/mm: Make MAX_PHYSADDR_BITS and MAX_PHYSMEM_BITS dynamic Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:25   ` Ingo Molnar
2017-09-28  8:25     ` Ingo Molnar
2017-09-28 10:17     ` Kirill A. Shutemov
2017-09-28 10:17       ` Kirill A. Shutemov
2017-09-28 10:40       ` Ingo Molnar
2017-09-28 10:40         ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 10/19] x86/mm: Make __PHYSICAL_MASK_SHIFT and __VIRTUAL_MASK_SHIFT dynamic Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:28   ` Ingo Molnar
2017-09-28  8:28     ` Ingo Molnar
2017-09-28 10:22     ` Kirill A. Shutemov
2017-09-28 10:22       ` Kirill A. Shutemov
2017-09-28 10:42       ` Ingo Molnar
2017-09-28 10:42         ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 11/19] x86/mm: Make STACK_TOP_MAX dynamic Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:29   ` Ingo Molnar
2017-09-28  8:29     ` Ingo Molnar
2017-09-28 13:19     ` Kirill A. Shutemov
2017-09-28 13:19       ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 12/19] x86/mm: Adjust virtual address space layout in early boot Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:31   ` Ingo Molnar
2017-09-28  8:31     ` Ingo Molnar
2017-09-28 13:26     ` Kirill A. Shutemov
2017-09-28 13:26       ` Kirill A. Shutemov
2017-09-28 13:38       ` Ingo Molnar
2017-09-28 13:38         ` Ingo Molnar
2017-09-28 14:28         ` Kirill A. Shutemov
2017-09-28 14:28           ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 13/19] x86/mm: Make early boot code support boot-time switching of paging modes Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:33   ` Ingo Molnar
2017-09-28  8:33     ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 14/19] x86/mm: Fold p4d page table layer at runtime Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 15/19] x86/mm: Replace compile-time checks for 5-level with runtime-time Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-28  8:35   ` Ingo Molnar
2017-09-28  8:35     ` Ingo Molnar
2017-09-18 10:55 ` [PATCHv7 16/19] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 17/19] x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 18/19] x86/mm: Redefine some of page table helpers as macros Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-18 10:55 ` [PATCHv7 19/19] x86/mm: Offset boot-time paging mode switching cost Kirill A. Shutemov
2017-09-18 10:55   ` Kirill A. Shutemov
2017-09-25 13:16 ` [PATCHv7 00/19] Boot-time switching between 4- and 5-level paging for 4.15 Kirill A. Shutemov
2017-09-25 13:16   ` Kirill A. Shutemov
2017-09-28  8:36 ` Ingo Molnar
2017-09-28  8:36   ` Ingo Molnar

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