[PATCH 0/5] Reduce enable_guc_submission param based checks

[PATCH 0/5] Reduce enable_guc_submission param based checks

[Sagar Arun Kamble]

This series changes the way driver handles disabling of GuC related
operations and cleanup of objects. Patches 1 and 4 remove checks
based on enable_guc_submission. Patch 2 and 3 prepare GuC log related
functions to remove param based checks. Patch 5 updates check based on
enable_guc_loading.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>

Sagar Arun Kamble (5):
  drm/i915/guc: Remove enable_guc_submission dependency to invoke
    i915_guc_submission_fini/disable
  drm/i915/guc: Sanitize module parameter guc_log_level
  drm/i915/guc: Add status checks to enable/disable_guc_interrupts
  drm/i915/guc: Remove enable_guc_submission dependency for invoking GuC
    log functions
  drm/i915/guc: Update enable_guc_loading check in intel_uc_fini_hw

 drivers/gpu/drm/i915/i915_guc_submission.c |  6 ++++++
 drivers/gpu/drm/i915/i915_irq.c            | 16 ++++++++++------
 drivers/gpu/drm/i915/intel_guc_log.c       |  9 ++-------
 drivers/gpu/drm/i915/intel_uc.c            | 25 +++++++++++--------------
 4 files changed, 29 insertions(+), 27 deletions(-)

-- 
1.9.1

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[PATCH 1/5] drm/i915/guc: Remove enable_guc_submission dependency to invoke i915_guc_submission_fini/disable

[Sagar Arun Kamble]

While enabling GuC submission, state is setup by driver for different
GuC needs like stage_ids, ads vma, stage_desc_pool vma, log vma and
log runtime, execbuf client that can be looked at while disabling
submission or destroying these objects. So remove the check for
i915.enable_guc_submission parameter while calling these functions.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_guc_submission.c |  6 ++++++
 drivers/gpu/drm/i915/intel_uc.c            | 11 ++++-------
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 04f1281..f5c1934 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -1060,6 +1060,9 @@ void i915_guc_submission_fini(struct drm_i915_private *dev_priv)
 {
 	struct intel_guc *guc = &dev_priv->guc;
 
+	if (!guc->stage_desc_pool)
+		return;
+
 	ida_destroy(&guc->stage_ids);
 	guc_ads_destroy(guc);
 	intel_guc_log_destroy(guc);
@@ -1204,6 +1207,9 @@ void i915_guc_submission_disable(struct drm_i915_private *dev_priv)
 {
 	struct intel_guc *guc = &dev_priv->guc;
 
+	if (!guc->execbuf_client)
+		return;
+
 	guc_interrupts_release(dev_priv);
 
 	/* Revert back to manual ELSP submission */
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 2774778..d4f679b 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -438,8 +438,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
 err_log_capture:
 	guc_capture_load_err_log(guc);
 err_submission:
-	if (i915_modparams.enable_guc_submission)
-		i915_guc_submission_fini(dev_priv);
+	i915_guc_submission_fini(dev_priv);
 err_guc:
 	i915_ggtt_disable_guc(dev_priv);
 
@@ -468,15 +467,13 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
 	if (!i915_modparams.enable_guc_loading)
 		return;
 
-	if (i915_modparams.enable_guc_submission)
-		i915_guc_submission_disable(dev_priv);
+	i915_guc_submission_disable(dev_priv);
 
 	guc_disable_communication(&dev_priv->guc);
 
-	if (i915_modparams.enable_guc_submission) {
+	if (i915_modparams.enable_guc_submission)
 		gen9_disable_guc_interrupts(dev_priv);
-		i915_guc_submission_fini(dev_priv);
-	}
+	i915_guc_submission_fini(dev_priv);
 
 	i915_ggtt_disable_guc(dev_priv);
 }
-- 
1.9.1

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[PATCH 2/5] drm/i915/guc: Sanitize module parameter guc_log_level

[Sagar Arun Kamble]

Parameter guc_log_level needs to be sanitized based on GuC support and
enable_guc_loading parameter since it depends on them like
enable_guc_submission. This will make GuC logging paths independent of
enable_guc_submission parameter.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_uc.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index d4f679b..c8a130e 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -69,6 +69,7 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
 
 		i915_modparams.enable_guc_loading = 0;
 		i915_modparams.enable_guc_submission = 0;
+		i915_modparams.guc_log_level = -1;
 		return;
 	}
 
@@ -85,9 +86,11 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
 			i915_modparams.enable_guc_loading = 0;
 	}
 
-	/* Can't enable guc submission without guc loaded */
-	if (!i915_modparams.enable_guc_loading)
+	/* Can't enable guc submission and logging without guc loaded */
+	if (!i915_modparams.enable_guc_loading) {
 		i915_modparams.enable_guc_submission = 0;
+		i915_modparams.guc_log_level = -1;
+	}
 
 	/* A negative value means "use platform default" */
 	if (i915_modparams.enable_guc_submission < 0)
-- 
1.9.1

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[PATCH 3/5] drm/i915/guc: Add status checks to enable/disable_guc_interrupts

[Sagar Arun Kamble]

GuC interrupts are currently enabled by Logging and disabled in different
scenarios. Make disabling check whether interrupts were already disabled
and similar for enable path. This will remove the state tracking for the
callers of these functions.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 0b756213..de8a105 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -455,18 +455,22 @@ void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv)
 
 void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv)
 {
+	if (READ_ONCE(dev_priv->guc.interrupts_enabled))
+		return;
+
 	spin_lock_irq(&dev_priv->irq_lock);
-	if (!dev_priv->guc.interrupts_enabled) {
-		WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
-				       dev_priv->pm_guc_events);
-		dev_priv->guc.interrupts_enabled = true;
-		gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events);
-	}
+	WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
+			       dev_priv->pm_guc_events);
+	dev_priv->guc.interrupts_enabled = true;
+	gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events);
 	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
 void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv)
 {
+	if (!READ_ONCE(dev_priv->guc.interrupts_enabled))
+		return;
+
 	spin_lock_irq(&dev_priv->irq_lock);
 	dev_priv->guc.interrupts_enabled = false;
 
-- 
1.9.1

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[PATCH 4/5] drm/i915/guc: Remove enable_guc_submission dependency for invoking GuC log functions

[Sagar Arun Kamble]

With guc_log_level parameter sanitized and GuC interrupts control
functions made self sufficient w.r.t interrupts state, we can remove
the enable_guc_submission checks from flush_guc_logs and
i915_guc_log_register/unregister and intel_uc_fini_hw.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_guc_log.c | 9 ++-------
 drivers/gpu/drm/i915/intel_uc.c      | 3 +--
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c
index 6571d96..5a1d3b4 100644
--- a/drivers/gpu/drm/i915/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/intel_guc_log.c
@@ -502,8 +502,7 @@ static void guc_flush_logs(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
-	if (!i915_modparams.enable_guc_submission ||
-	    (i915_modparams.guc_log_level < 0))
+	if (i915_modparams.guc_log_level < 0)
 		return;
 
 	/* First disable the interrupts, will be renabled afterwards */
@@ -642,8 +641,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
 
 void i915_guc_log_register(struct drm_i915_private *dev_priv)
 {
-	if (!i915_modparams.enable_guc_submission ||
-	    (i915_modparams.guc_log_level < 0))
+	if (i915_modparams.guc_log_level < 0)
 		return;
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
@@ -653,9 +651,6 @@ void i915_guc_log_register(struct drm_i915_private *dev_priv)
 
 void i915_guc_log_unregister(struct drm_i915_private *dev_priv)
 {
-	if (!i915_modparams.enable_guc_submission)
-		return;
-
 	mutex_lock(&dev_priv->drm.struct_mutex);
 	/* GuC logging is currently the only user of Guc2Host interrupts */
 	gen9_disable_guc_interrupts(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index c8a130e..8509517 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -474,8 +474,7 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
 
 	guc_disable_communication(&dev_priv->guc);
 
-	if (i915_modparams.enable_guc_submission)
-		gen9_disable_guc_interrupts(dev_priv);
+	gen9_disable_guc_interrupts(dev_priv);
 	i915_guc_submission_fini(dev_priv);
 
 	i915_ggtt_disable_guc(dev_priv);
-- 
1.9.1

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[PATCH 5/5] drm/i915/guc: Update enable_guc_loading check in intel_uc_fini_hw

[Sagar Arun Kamble]

With most of the GuC disabling now separated from GuC parameters,
only function that needs GuC parameter enable_guc_loading check is
i915_disable_guc_ggtt as that is enabled based it. So call only
i915_disable_guc_ggtt when enable_guc_loading is set during fini.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_uc.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 8509517..a3eaf26 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -467,9 +467,6 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
 {
 	guc_free_load_err_log(&dev_priv->guc);
 
-	if (!i915_modparams.enable_guc_loading)
-		return;
-
 	i915_guc_submission_disable(dev_priv);
 
 	guc_disable_communication(&dev_priv->guc);
@@ -477,7 +474,8 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
 	gen9_disable_guc_interrupts(dev_priv);
 	i915_guc_submission_fini(dev_priv);
 
-	i915_ggtt_disable_guc(dev_priv);
+	if (i915_modparams.enable_guc_loading)
+		i915_ggtt_disable_guc(dev_priv);
 }
 
 int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len)
-- 
1.9.1

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✗ Fi.CI.BAT: warning for Reduce enable_guc_submission param based checks

[Patchwork]

== Series Details ==

Series: Reduce enable_guc_submission param based checks
URL   : https://patchwork.freedesktop.org/series/31140/
State : warning

== Summary ==

Series 31140v1 Reduce enable_guc_submission param based checks
https://patchwork.freedesktop.org/api/1.0/series/31140/revisions/1/mbox/

Test drv_module_reload:
        Subgroup basic-reload-inject:
                pass       -> DMESG-WARN (fi-skl-6770hq)

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:441s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:478s
fi-blb-e6850     total:289  pass:224  dwarn:1   dfail:0   fail:0   skip:64  time:420s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:516s
fi-bwr-2160      total:289  pass:184  dwarn:0   dfail:0   fail:0   skip:105 time:277s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:492s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:511s
fi-byt-j1900     total:289  pass:254  dwarn:1   dfail:0   fail:0   skip:34  time:494s
fi-byt-n2820     total:289  pass:250  dwarn:1   dfail:0   fail:0   skip:38  time:486s
fi-cfl-s         total:289  pass:256  dwarn:1   dfail:0   fail:0   skip:32  time:554s
fi-cnl-y         total:289  pass:261  dwarn:1   dfail:0   fail:0   skip:27  time:630s
fi-elk-e7500     total:289  pass:230  dwarn:0   dfail:0   fail:0   skip:59  time:420s
fi-glk-1         total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:566s
fi-hsw-4770      total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:427s
fi-hsw-4770r     total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:402s
fi-ilk-650       total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:432s
fi-ivb-3520m     total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:487s
fi-ivb-3770      total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:464s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:476s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:576s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:587s
fi-pnv-d510      total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:541s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:451s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:756s
fi-skl-6770hq    total:289  pass:268  dwarn:1   dfail:0   fail:0   skip:20  time:488s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:482s
fi-snb-2520m     total:289  pass:251  dwarn:0   dfail:0   fail:0   skip:38  time:571s
fi-snb-2600      total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:414s

2131a7ba0b2b67aa2458f0607f26eab1b5aff119 drm-tip: 2017y-09m-29d-08h-01m-09s UTC integration manifest
122414aae466 drm/i915/guc: Update enable_guc_loading check in intel_uc_fini_hw
d1130b4e2dd0 drm/i915/guc: Remove enable_guc_submission dependency for invoking GuC log functions
aa8ee5269488 drm/i915/guc: Add status checks to enable/disable_guc_interrupts
76f89d3fff91 drm/i915/guc: Sanitize module parameter guc_log_level
7ad4d0869bb8 drm/i915/guc: Remove enable_guc_submission dependency to invoke i915_guc_submission_fini/disable

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5857/
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