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From: Christoffer Dall <christoffer.dall@linaro.org>
To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	Christoffer Dall <cdall@linaro.org>,
	Shih-Wei Li <shihwei@cs.columbia.edu>,
	kvm@vger.kernel.org
Subject: [PATCH v4 16/20] KVM: arm/arm64: Use kvm_arm_timer_set/get_reg for guest register traps
Date: Fri, 20 Oct 2017 13:49:35 +0200	[thread overview]
Message-ID: <20171020114939.12554-17-christoffer.dall@linaro.org> (raw)
In-Reply-To: <20171020114939.12554-1-christoffer.dall@linaro.org>

From: Christoffer Dall <cdall@linaro.org>

When trapping on a guest access to one of the timer registers, we were
messing with the internals of the timer state from the sysregs handling
code, and that logic was about to receive more added complexity when
optimizing the timer handling code.

Therefore, since we already have timer register access functions (to
access registers from userspace), reuse those for the timer register
traps from a VM and let the timer code maintain its own consistency.

Signed-off-by: Christoffer Dall <cdall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/kvm/sys_regs.c | 41 ++++++++++++++---------------------------
 1 file changed, 14 insertions(+), 27 deletions(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 2e070d3baf9f..bb0e41b3154e 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -841,13 +841,16 @@ static bool access_cntp_tval(struct kvm_vcpu *vcpu,
 		struct sys_reg_params *p,
 		const struct sys_reg_desc *r)
 {
-	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
 	u64 now = kvm_phys_timer_read();
+	u64 cval;
 
-	if (p->is_write)
-		ptimer->cnt_cval = p->regval + now;
-	else
-		p->regval = ptimer->cnt_cval - now;
+	if (p->is_write) {
+		kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL,
+				      p->regval + now);
+	} else {
+		cval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL);
+		p->regval = cval - now;
+	}
 
 	return true;
 }
@@ -856,24 +859,10 @@ static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
 		struct sys_reg_params *p,
 		const struct sys_reg_desc *r)
 {
-	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
-
-	if (p->is_write) {
-		/* ISTATUS bit is read-only */
-		ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
-	} else {
-		u64 now = kvm_phys_timer_read();
-
-		p->regval = ptimer->cnt_ctl;
-		/*
-		 * Set ISTATUS bit if it's expired.
-		 * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
-		 * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
-		 * regardless of ENABLE bit for our implementation convenience.
-		 */
-		if (ptimer->cnt_cval <= now)
-			p->regval |= ARCH_TIMER_CTRL_IT_STAT;
-	}
+	if (p->is_write)
+		kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CTL, p->regval);
+	else
+		p->regval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CTL);
 
 	return true;
 }
@@ -882,12 +871,10 @@ static bool access_cntp_cval(struct kvm_vcpu *vcpu,
 		struct sys_reg_params *p,
 		const struct sys_reg_desc *r)
 {
-	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
-
 	if (p->is_write)
-		ptimer->cnt_cval = p->regval;
+		kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL, p->regval);
 	else
-		p->regval = ptimer->cnt_cval;
+		p->regval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL);
 
 	return true;
 }
-- 
2.14.2

WARNING: multiple messages have this Message-ID (diff)
From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 16/20] KVM: arm/arm64: Use kvm_arm_timer_set/get_reg for guest register traps
Date: Fri, 20 Oct 2017 13:49:35 +0200	[thread overview]
Message-ID: <20171020114939.12554-17-christoffer.dall@linaro.org> (raw)
In-Reply-To: <20171020114939.12554-1-christoffer.dall@linaro.org>

From: Christoffer Dall <cdall@linaro.org>

When trapping on a guest access to one of the timer registers, we were
messing with the internals of the timer state from the sysregs handling
code, and that logic was about to receive more added complexity when
optimizing the timer handling code.

Therefore, since we already have timer register access functions (to
access registers from userspace), reuse those for the timer register
traps from a VM and let the timer code maintain its own consistency.

Signed-off-by: Christoffer Dall <cdall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/kvm/sys_regs.c | 41 ++++++++++++++---------------------------
 1 file changed, 14 insertions(+), 27 deletions(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 2e070d3baf9f..bb0e41b3154e 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -841,13 +841,16 @@ static bool access_cntp_tval(struct kvm_vcpu *vcpu,
 		struct sys_reg_params *p,
 		const struct sys_reg_desc *r)
 {
-	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
 	u64 now = kvm_phys_timer_read();
+	u64 cval;
 
-	if (p->is_write)
-		ptimer->cnt_cval = p->regval + now;
-	else
-		p->regval = ptimer->cnt_cval - now;
+	if (p->is_write) {
+		kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL,
+				      p->regval + now);
+	} else {
+		cval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL);
+		p->regval = cval - now;
+	}
 
 	return true;
 }
@@ -856,24 +859,10 @@ static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
 		struct sys_reg_params *p,
 		const struct sys_reg_desc *r)
 {
-	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
-
-	if (p->is_write) {
-		/* ISTATUS bit is read-only */
-		ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
-	} else {
-		u64 now = kvm_phys_timer_read();
-
-		p->regval = ptimer->cnt_ctl;
-		/*
-		 * Set ISTATUS bit if it's expired.
-		 * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
-		 * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
-		 * regardless of ENABLE bit for our implementation convenience.
-		 */
-		if (ptimer->cnt_cval <= now)
-			p->regval |= ARCH_TIMER_CTRL_IT_STAT;
-	}
+	if (p->is_write)
+		kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CTL, p->regval);
+	else
+		p->regval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CTL);
 
 	return true;
 }
@@ -882,12 +871,10 @@ static bool access_cntp_cval(struct kvm_vcpu *vcpu,
 		struct sys_reg_params *p,
 		const struct sys_reg_desc *r)
 {
-	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
-
 	if (p->is_write)
-		ptimer->cnt_cval = p->regval;
+		kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL, p->regval);
 	else
-		p->regval = ptimer->cnt_cval;
+		p->regval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL);
 
 	return true;
 }
-- 
2.14.2

  parent reply	other threads:[~2017-10-20 11:49 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-20 11:49 [PATCH v4 00/20] KVM: arm/arm64: Optimize arch timer register handling Christoffer Dall
2017-10-20 11:49 ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 01/20] irqchip/gic: Deal with broken firmware exposing only 4kB of GICv2 CPU interface Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 02/20] arm64: Implement arch_counter_get_cntpct to read the physical counter Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 13:41   ` Marc Zyngier
2017-10-25 13:41     ` Marc Zyngier
2017-10-20 11:49 ` [PATCH v4 03/20] arm64: Use physical counter for in-kernel reads when booted in EL2 Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 13:43   ` Marc Zyngier
2017-10-25 13:43     ` Marc Zyngier
2017-10-20 11:49 ` [PATCH v4 04/20] KVM: arm/arm64: Guard kvm_vgic_map_is_active against !vgic_initialized Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 05/20] KVM: arm/arm64: Support calling vgic_update_irq_pending from irq context Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 13:45   ` Marc Zyngier
2017-10-25 13:45     ` Marc Zyngier
2017-10-20 11:49 ` [PATCH v4 06/20] KVM: arm/arm64: Check that system supports split eoi/deactivate Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 13:47   ` Marc Zyngier
2017-10-25 13:47     ` Marc Zyngier
2017-10-20 11:49 ` [PATCH v4 07/20] KVM: arm/arm64: Make timer_arm and timer_disarm helpers more generic Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 13:49   ` Marc Zyngier
2017-10-25 13:49     ` Marc Zyngier
2017-10-20 11:49 ` [PATCH v4 08/20] KVM: arm/arm64: Rename soft timer to bg_timer Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 09/20] KVM: arm/arm64: Move timer/vgic flush/sync under disabled irq Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 10/20] KVM: arm/arm64: Use separate timer for phys timer emulation Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 13:59   ` Marc Zyngier
2017-10-25 13:59     ` Marc Zyngier
2017-10-20 11:49 ` [PATCH v4 11/20] KVM: arm/arm64: Move timer save/restore out of the hyp code Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 12/20] genirq: Document vcpu_info usage for percpu_devid interrupts Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:56   ` Thomas Gleixner
2017-10-20 11:56     ` Thomas Gleixner
2017-10-21 14:29     ` Christoffer Dall
2017-10-21 14:29       ` Christoffer Dall
2017-10-21 14:55       ` Thomas Gleixner
2017-10-21 14:55         ` Thomas Gleixner
2017-10-21 15:30         ` Christoffer Dall
2017-10-21 15:30           ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 13/20] KVM: arm/arm64: Set VCPU affinity for virt timer irq Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 14/20] KVM: arm/arm64: Avoid timer save/restore in vcpu entry/exit Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 14:36   ` Marc Zyngier
2017-10-25 14:36     ` Marc Zyngier
2017-11-16 20:30   ` Jintack Lim
2017-11-16 20:30     ` Jintack Lim
2017-11-16 20:32     ` Jintack Lim
2017-11-16 20:32       ` Jintack Lim
2017-11-20 11:15     ` Christoffer Dall
2017-11-20 11:15       ` Christoffer Dall
2017-11-20 16:32       ` Jintack Lim
2017-11-20 16:32         ` Jintack Lim
2017-10-20 11:49 ` [PATCH v4 15/20] KVM: arm/arm64: Support EL1 phys timer register access in set/get reg Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-25 14:38   ` Marc Zyngier
2017-10-25 14:38     ` Marc Zyngier
2017-10-20 11:49 ` Christoffer Dall [this message]
2017-10-20 11:49   ` [PATCH v4 16/20] KVM: arm/arm64: Use kvm_arm_timer_set/get_reg for guest register traps Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 17/20] KVM: arm/arm64: Move phys_timer_emulate function Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 18/20] KVM: arm/arm64: Avoid phys timer emulation in vcpu entry/exit Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 19/20] KVM: arm/arm64: Get rid of kvm_timer_flush_hwstate Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall
2017-10-20 11:49 ` [PATCH v4 20/20] KVM: arm/arm64: Rework kvm_timer_should_fire Christoffer Dall
2017-10-20 11:49   ` Christoffer Dall

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