[gpio:pin2mask-removal 12/33] drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:630:27: error: 'struct gpio_chip' has no member named 'irq_base'; did you mean 'base'?

[gpio:pin2mask-removal 12/33] drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:630:27: error: 'struct gpio_chip' has no member named 'irq_base'; did you mean 'base'?

[kbuild test robot]

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tree:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git pin2mask-removal
head:   13880743ca15f7d687f3c5d7963f9d9ec8879507
commit: f628ba9e22e0fa32ac6270a0d696fe1509889540 [12/33] gpiolib: drop irq_base field from gpio_chip struct
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout f628ba9e22e0fa32ac6270a0d696fe1509889540
        # save the attached .config to linux build tree
        make.cross ARCH=arm64 

Note: the gpio/pin2mask-removal HEAD 13880743ca15f7d687f3c5d7963f9d9ec8879507 builds fine.
      It only hurts bisectibility.

All errors (new ones prefixed by >>):

   drivers/pinctrl/mvebu/pinctrl-armada-37xx.c: In function 'armada_37xx_irq_startup':
>> drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:630:27: error: 'struct gpio_chip' has no member named 'irq_base'; did you mean 'base'?
     int irq = d->hwirq - chip->irq_base;
                              ^~

vim +630 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

2f2276053 Gregory CLEMENT 2017-04-28  626  
a9a1a4833 Gregory CLEMENT 2017-09-07  627  static unsigned int armada_37xx_irq_startup(struct irq_data *d)
a9a1a4833 Gregory CLEMENT 2017-09-07  628  {
a9a1a4833 Gregory CLEMENT 2017-09-07  629  	struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
a9a1a4833 Gregory CLEMENT 2017-09-07 @630  	int irq = d->hwirq - chip->irq_base;
a9a1a4833 Gregory CLEMENT 2017-09-07  631  	/*
a9a1a4833 Gregory CLEMENT 2017-09-07  632  	 * The mask field is a "precomputed bitmask for accessing the
a9a1a4833 Gregory CLEMENT 2017-09-07  633  	 * chip registers" which was introduced for the generic
a9a1a4833 Gregory CLEMENT 2017-09-07  634  	 * irqchip framework. As we don't use this framework, we can
a9a1a4833 Gregory CLEMENT 2017-09-07  635  	 * reuse this field for our own usage.
a9a1a4833 Gregory CLEMENT 2017-09-07  636  	 */
a9a1a4833 Gregory CLEMENT 2017-09-07  637  	d->mask = BIT(irq % GPIO_PER_REG);
a9a1a4833 Gregory CLEMENT 2017-09-07  638  
a9a1a4833 Gregory CLEMENT 2017-09-07  639  	armada_37xx_irq_unmask(d);
a9a1a4833 Gregory CLEMENT 2017-09-07  640  
a9a1a4833 Gregory CLEMENT 2017-09-07  641  	return 0;
a9a1a4833 Gregory CLEMENT 2017-09-07  642  }
a9a1a4833 Gregory CLEMENT 2017-09-07  643  

:::::: The code at line 630 was first introduced by commit
:::::: a9a1a4833613b8a2e8dd79f860ea1871f17da02c pinctrl: armada-37xx: Fix gpio interrupt setup

:::::: TO: Gregory CLEMENT <gregory.clement@free-electrons.com>
:::::: CC: Linus Walleij <linus.walleij@linaro.org>

---
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