From: Rob Herring <robh@kernel.org> To: Li Wei <liwei213@huawei.com> Cc: mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, vinholikatti@gmail.com, jejb@linux.vnet.ibm.com, martin.petersen@oracle.com, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-scsi@vger.kernel.org, guodong.xu@linaro.org, fengbaopeng@hisilicon.com, lihuan41@hisilicon.com, wangyupeng4@hisilicon.com Subject: Re: [PATCH v4 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs Date: Thu, 26 Oct 2017 20:08:46 -0500 [thread overview] Message-ID: <20171027010846.iiybapc24qpotyyv@rob-hp-laptop> (raw) In-Reply-To: <20171020085045.7737-3-liwei213@huawei.com> On Fri, Oct 20, 2017 at 04:50:42PM +0800, Li Wei wrote: > add ufs node document for Hisilicon. > > Signed-off-by: Li Wei <liwei213@huawei.com> > --- > Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 47 ++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > create mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt > > diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt > new file mode 100644 > index 000000000000..ee114a65143d > --- /dev/null > +++ b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt > @@ -0,0 +1,47 @@ > +* Hisilicon Universal Flash Storage (UFS) Host Controller > + > +UFS nodes are defined to describe on-chip UFS hardware macro. > +Each UFS Host Controller should have its own node. > + > +Required properties: > +- compatible : compatible list, contains one of the following - > + "hisilicon,hi3660-ufs" for hisi ufs host controller > + present on Hi3660 chipset. > +- reg : should contain UFS register address space & UFS SYS CTRL register address, > +- interrupt-parent : interrupt device > +- interrupts : interrupt number > +- clocks : List of phandle and clock specifier pairs > +- clock-names : List of clock input name strings sorted in the same > + order as the clocks property. "clk_ref", "clk_phy" is optional > +- resets : reset node register, one reset the clk and the other reset the controller > +- reset-names : describe reset node register > + > +Optional properties for board device: > +- reset-gpio : specifies to reset devices reset-gpios is the preferred form. > + > +Example: > + > + ufs: ufs@ff3b0000 { > + compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1"; > + /* 0: HCI standard */ > + /* 1: UFS SYS CTRL */ > + reg = <0x0 0xff3b0000 0x0 0x1000>, > + <0x0 0xff3b1000 0x0 0x1000>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, > + <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; > + clock-names = "clk_ref", "clk_phy"; > + freq-table-hz = <0 0>, <0 0>; Not documented. > + /* offset: 0x84; bit: 12 */ > + /* offset: 0x84; bit: 7 */ > + resets = <&crg_rst 0x84 12>, > + <&crg_rst 0x84 7>; > + reset-names = "rst", "assert"; > + }; > + > + &ufs { Don't show the SoC/Board split in examples. That's just convention, not part of the binding. > + reset-gpio = <&gpio18 1 0>; > + status = "okay"; Plus it's wrong because the default is okay. > + }; > + > -- > 2.11.0 >
WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs Date: Thu, 26 Oct 2017 20:08:46 -0500 [thread overview] Message-ID: <20171027010846.iiybapc24qpotyyv@rob-hp-laptop> (raw) In-Reply-To: <20171020085045.7737-3-liwei213@huawei.com> On Fri, Oct 20, 2017 at 04:50:42PM +0800, Li Wei wrote: > add ufs node document for Hisilicon. > > Signed-off-by: Li Wei <liwei213@huawei.com> > --- > Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 47 ++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > create mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt > > diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt > new file mode 100644 > index 000000000000..ee114a65143d > --- /dev/null > +++ b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt > @@ -0,0 +1,47 @@ > +* Hisilicon Universal Flash Storage (UFS) Host Controller > + > +UFS nodes are defined to describe on-chip UFS hardware macro. > +Each UFS Host Controller should have its own node. > + > +Required properties: > +- compatible : compatible list, contains one of the following - > + "hisilicon,hi3660-ufs" for hisi ufs host controller > + present on Hi3660 chipset. > +- reg : should contain UFS register address space & UFS SYS CTRL register address, > +- interrupt-parent : interrupt device > +- interrupts : interrupt number > +- clocks : List of phandle and clock specifier pairs > +- clock-names : List of clock input name strings sorted in the same > + order as the clocks property. "clk_ref", "clk_phy" is optional > +- resets : reset node register, one reset the clk and the other reset the controller > +- reset-names : describe reset node register > + > +Optional properties for board device: > +- reset-gpio : specifies to reset devices reset-gpios is the preferred form. > + > +Example: > + > + ufs: ufs at ff3b0000 { > + compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1"; > + /* 0: HCI standard */ > + /* 1: UFS SYS CTRL */ > + reg = <0x0 0xff3b0000 0x0 0x1000>, > + <0x0 0xff3b1000 0x0 0x1000>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, > + <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; > + clock-names = "clk_ref", "clk_phy"; > + freq-table-hz = <0 0>, <0 0>; Not documented. > + /* offset: 0x84; bit: 12 */ > + /* offset: 0x84; bit: 7 */ > + resets = <&crg_rst 0x84 12>, > + <&crg_rst 0x84 7>; > + reset-names = "rst", "assert"; > + }; > + > + &ufs { Don't show the SoC/Board split in examples. That's just convention, not part of the binding. > + reset-gpio = <&gpio18 1 0>; > + status = "okay"; Plus it's wrong because the default is okay. > + }; > + > -- > 2.11.0 >
next prev parent reply other threads:[~2017-10-27 1:08 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-10-20 8:50 [PATCH v4 0/5] scsi: ufs: add ufs driver code for Hisilicon Hi3660 SoC Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` [PATCH v4 1/5] scsi: ufs: add Hisilicon ufs driver code Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` [PATCH v4 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-27 1:08 ` Rob Herring [this message] 2017-10-27 1:08 ` Rob Herring 2017-10-20 8:50 ` [PATCH v4 3/5] arm64: dts: add ufs dts node Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` [PATCH v4 4/5] arm64: defconfig: enable configs for Hisilicon ufs Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` [PATCH v4 5/5] arm64: defconfig: enable f2fs and squashfs Li Wei 2017-10-20 8:50 ` Li Wei 2017-10-20 8:50 ` Li Wei -- strict thread matches above, loose matches on Subject: below -- 2017-10-13 7:49 [PATCH v4 0/5] scsi: ufs: add ufs driver code for Hisilicon Hi3660 SoC Li Wei 2017-10-13 7:49 ` [PATCH v4 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs Li Wei 2017-10-13 7:49 ` Li Wei 2017-10-13 7:49 ` Li Wei 2017-10-17 21:17 ` Rob Herring 2017-10-17 21:17 ` Rob Herring 2017-10-17 21:17 ` Rob Herring
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