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From: Niklas Cassel <niklas.cassel@axis.com>
To: Jingoo Han <jingoohan1@gmail.com>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: Niklas Cassel <niklass@axis.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 01/17] PCI: dwc: Use DMA-API for allocating MSI data
Date: Mon, 30 Oct 2017 13:42:04 +0100	[thread overview]
Message-ID: <20171030124221.20690-2-niklas.cassel@axis.com> (raw)
In-Reply-To: <20171030124221.20690-1-niklas.cassel@axis.com>

Since it is a PCIe endpoint device, rather than the CPU, that is supposed
to write to this location, the proper way to get the address to this this
location is really to use the DMA API, rather than virt_to_phys.

Using virt_to_phys might work on some systems, but by using the DMA API,
we know that it will work on all systems.

This is essentially the same thing as allocating a buffer in a driver,
to which the endpoint will write to. To do this, we use the DMA API.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
V2:
* Sort headers.
* MSI with captial letters in error print.
* Don't change to lower_32_bits/upper_32_bits, since that should in that
  case be its own patch.

drivers/pci/dwc/pcie-designware-host.c | 15 ++++++++++++---
 drivers/pci/dwc/pcie-designware.h      |  3 ++-
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 81e2157a7cfb..33b52fe98a01 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -83,10 +83,19 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
 
 void dw_pcie_msi_init(struct pcie_port *pp)
 {
+	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+	struct device *dev = pci->dev;
+	struct page *page;
 	u64 msi_target;
 
-	pp->msi_data = __get_free_pages(GFP_KERNEL, 0);
-	msi_target = virt_to_phys((void *)pp->msi_data);
+	page = alloc_page(GFP_KERNEL | GFP_DMA32);
+	pp->msi_data = dma_map_page(dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
+	if (dma_mapping_error(dev, pp->msi_data)) {
+		dev_err(dev, "failed to map MSI data\n");
+		__free_page(page);
+		return;
+	}
+	msi_target = (u64)pp->msi_data;
 
 	/* program the msi_data */
 	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
@@ -187,7 +196,7 @@ static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos)
 	if (pp->ops->get_msi_addr)
 		msi_target = pp->ops->get_msi_addr(pp);
 	else
-		msi_target = virt_to_phys((void *)pp->msi_data);
+		msi_target = (u64)pp->msi_data;
 
 	msg.address_lo = (u32)(msi_target & 0xffffffff);
 	msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff);
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
index e5d9d77b778e..ecdede68522a 100644
--- a/drivers/pci/dwc/pcie-designware.h
+++ b/drivers/pci/dwc/pcie-designware.h
@@ -14,6 +14,7 @@
 #ifndef _PCIE_DESIGNWARE_H
 #define _PCIE_DESIGNWARE_H
 
+#include <linux/dma-mapping.h>
 #include <linux/irq.h>
 #include <linux/msi.h>
 #include <linux/pci.h>
@@ -168,7 +169,7 @@ struct pcie_port {
 	const struct dw_pcie_host_ops *ops;
 	int			msi_irq;
 	struct irq_domain	*irq_domain;
-	unsigned long		msi_data;
+	dma_addr_t		msi_data;
 	DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
 };
 
-- 
2.14.2

  reply	other threads:[~2017-10-30 12:42 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-30 12:42 [PATCH v2 00/17] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-10-30 12:42 ` Niklas Cassel
2017-10-30 12:42 ` Niklas Cassel [this message]
2017-10-30 12:42 ` [PATCH v2 02/17] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 03/17] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 04/17] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-10-31  6:01   ` Kishon Vijay Abraham I
2017-10-31 20:57     ` Niklas Cassel
2017-11-16 17:16     ` Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 05/17] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar() Niklas Cassel
2017-10-31  5:09   ` Kishon Vijay Abraham I
2017-10-31  5:09     ` Kishon Vijay Abraham I
2017-10-30 12:42 ` [PATCH v2 06/17] PCI: designware-ep: Add generic function for raising MSI irq Niklas Cassel
2017-10-31  6:22   ` Kishon Vijay Abraham I
2017-10-31 21:06     ` Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 07/17] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode Niklas Cassel
2017-10-31  6:23   ` Kishon Vijay Abraham I
2017-10-30 12:42 ` [PATCH v2 08/17] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe Niklas Cassel
2017-10-31  8:14   ` Kishon Vijay Abraham I
2017-10-31  8:14     ` Kishon Vijay Abraham I
2017-10-30 12:42 ` [PATCH v2 09/17] PCI: dwc: dra7xx: Add ifdefs for host/ep specific code Niklas Cassel
2017-10-31  8:29   ` Kishon Vijay Abraham I
2017-10-31  8:29     ` Kishon Vijay Abraham I
2017-10-31 21:27     ` Niklas Cassel
2017-10-31 21:27       ` Niklas Cassel
2017-10-31 21:38       ` Niklas Cassel
2017-10-31 21:38         ` Niklas Cassel
2017-10-31 22:51         ` Niklas Cassel
2017-10-31 22:51           ` Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 10/17] PCI: dwc: artpec6: Remove unused defines Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 11/17] PCI: dwc: artpec6: Use BIT and GENMASK macros Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 12/17] PCI: dwc: artpec6: Split artpec6_pcie_establish_link to smaller functions Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 13/17] bindings: PCI: artpec: Add support for endpoint mode Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 14/17] PCI: dwc: artpec6: " Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 15/17] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 16/17] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC Niklas Cassel
2017-10-30 12:42 ` [PATCH v2 17/17] PCI: dwc: artpec6: " Niklas Cassel

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