[PATCH 1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()

[PATCH 1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the crtc state related 12bpc checks into hdmi_12bpc_possible()
since that one already examines other parts of the crtc state.

Note that we can drop the !force_dvi check since
crtc_state->has_hdmi_sink already accounts for that.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_hdmi.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 5132dc814788..aa486b8925cf 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1336,6 +1336,12 @@ static bool hdmi_12bpc_possible(const struct intel_crtc_state *crtc_state)
 	if (HAS_GMCH_DISPLAY(dev_priv))
 		return false;
 
+	if (crtc_state->pipe_bpp <= 8*3)
+		return false;
+
+	if (!crtc_state->has_hdmi_sink)
+		return false;
+
 	/*
 	 * HDMI 12bpc affects the clocks, so it's only possible
 	 * when not cloning with other encoder types.
@@ -1461,9 +1467,8 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
 	 * outputs. We also need to check that the higher clock still fits
 	 * within limits.
 	 */
-	if (pipe_config->pipe_bpp > 8*3 && pipe_config->has_hdmi_sink && !force_dvi &&
-	    hdmi_port_clock_valid(intel_hdmi, clock_12bpc, true, force_dvi) == MODE_OK &&
-	    hdmi_12bpc_possible(pipe_config)) {
+	if (hdmi_12bpc_possible(pipe_config) &&
+	    hdmi_port_clock_valid(intel_hdmi, clock_12bpc, true, force_dvi) == MODE_OK) {
 		DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n");
 		desired_bpp = 12*3;
 
-- 
2.13.6

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[PATCH 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Starting from version 204 VBT can specify the max TMDS clock we are
allowed to use with HDMI ports. Parse that information and take it
into account when filtering modes and computing a crtc state.

Also take the opportunity to sort the platform check if ladder
from new to old.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   |  2 ++
 drivers/gpu/drm/i915/intel_bios.c | 20 ++++++++++++++++++++
 drivers/gpu/drm/i915/intel_hdmi.c | 30 ++++++++++++++++++++----------
 3 files changed, 42 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 366ba74b0ad2..45d32a95ce4a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1698,6 +1698,8 @@ enum modeset_restore {
 #define DDC_PIN_D  0x06
 
 struct ddi_vbt_port_info {
+	int max_tmds_clock;
+
 	/*
 	 * This is an index in the HDMI/DVI DDI buffer translation table.
 	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index fd23023df7c1..a0df8e3fefbe 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1234,6 +1234,26 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 		info->hdmi_level_shift = hdmi_level_shift;
 	}
 
+	if (bdb_version >= 204) {
+		int max_tmds_clock;
+
+		switch (child->hdmi_max_data_rate) {
+		case 1:
+			max_tmds_clock = 297000;
+			break;
+		case 2:
+			max_tmds_clock = 165000;
+			break;
+		default:
+			max_tmds_clock = 0;
+			break;
+		}
+
+		DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
+			      port_name(port), max_tmds_clock);
+		info->max_tmds_clock = max_tmds_clock;
+	}
+
 	/* Parse the I_boost config for SKL and above */
 	if (bdb_version >= 196 && child->iboost) {
 		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index aa486b8925cf..38fe24565b4d 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1224,24 +1224,34 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder,
 	intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
 }
 
-static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
+static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
 {
-	if (IS_G4X(dev_priv))
-		return 165000;
-	else if (IS_GEMINILAKE(dev_priv))
-		return 594000;
-	else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
-		return 300000;
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	const struct ddi_vbt_port_info *info =
+		&dev_priv->vbt.ddi_port_info[encoder->port];
+	int max_tmds_clock;
+
+	if (IS_GEMINILAKE(dev_priv))
+		max_tmds_clock = 594000;
+	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
+		max_tmds_clock = 300000;
+	else if (INTEL_GEN(dev_priv) >= 5)
+		max_tmds_clock = 225000;
 	else
-		return 225000;
+		max_tmds_clock = 165000;
+
+	if (info->max_tmds_clock)
+		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
+
+	return max_tmds_clock;
 }
 
 static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
 				 bool respect_downstream_limits,
 				 bool force_dvi)
 {
-	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
-	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
+	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
+	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
 
 	if (respect_downstream_limits) {
 		struct intel_connector *connector = hdmi->attached_connector;
-- 
2.13.6

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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()
URL   : https://patchwork.freedesktop.org/series/32698/
State : success

== Summary ==

Series 32698v1 series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()
https://patchwork.freedesktop.org/api/1.0/series/32698/revisions/1/mbox/

Test gem_sync:
        Subgroup basic-store-all:
                pass       -> FAIL       (fi-ivb-3520m) fdo#100007
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-b-frame-sequence:
                skip       -> PASS       (fi-hsw-4770r) fdo#102332
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-j1900) fdo#101705

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#102332 https://bugs.freedesktop.org/show_bug.cgi?id=102332
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:441s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:451s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:371s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:520s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:264s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:494s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:497s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:488s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:491s
fi-cfl-s         total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  time:557s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:601s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:415s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:250s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:576s
fi-glk-dsi       total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  time:495s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:431s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:426s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:435s
fi-ivb-3520m     total:289  pass:259  dwarn:0   dfail:0   fail:1   skip:29  time:494s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:456s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:491s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:573s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:475s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:583s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:549s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:443s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:590s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:645s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:520s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:502s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:454s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:556s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:417s

df3033b174059a59aa0c890f81de8af037abd11f drm-tip: 2017y-10m-26d-11h-03m-59s UTC integration manifest
f78e927a1c83 drm/i915: Parse max HDMI TMDS clock from VBT
9e16e74909dc drm/i915: Clean up the mess around hdmi_12bpc_possible()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6209/
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Re: [PATCH 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Chris Wilson]

Quoting Ville Syrjala (2017-10-26 16:14:05)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Starting from version 204 VBT can specify the max TMDS clock we are
> allowed to use with HDMI ports. Parse that information and take it
> into account when filtering modes and computing a crtc state.
>  
> +       if (bdb_version >= 204) {
> +               int max_tmds_clock;
> +
> +               switch (child->hdmi_max_data_rate) {
> +               case 1:
> +                       max_tmds_clock = 297000;
> +                       break;
> +               case 2:
> +                       max_tmds_clock = 165000;
> +                       break;
> +               default:
> +                       max_tmds_clock = 0;

Is zero a valid value, as this will prevent us from using the output
at all?
-Chris
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Re: [PATCH 1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()

[Chris Wilson]

Quoting Ville Syrjala (2017-10-26 16:14:04)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Move the crtc state related 12bpc checks into hdmi_12bpc_possible()
> since that one already examines other parts of the crtc state.
> 
> Note that we can drop the !force_dvi check since
> crtc_state->has_hdmi_sink already accounts for that.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 5132dc814788..aa486b8925cf 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1336,6 +1336,12 @@ static bool hdmi_12bpc_possible(const struct intel_crtc_state *crtc_state)
>         if (HAS_GMCH_DISPLAY(dev_priv))
>                 return false;
>  
> +       if (crtc_state->pipe_bpp <= 8*3)
> +               return false;

Ok.

> +
> +       if (!crtc_state->has_hdmi_sink)
> +               return false;

Ok.

Now just for force_dvi...

intel_hdmi_compute_config():
        bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI;

	pipe_config->has_hdmi_sink = !force_dvi && intel_hdmi->has_hdmi_sink;

and we follow on from that has_hdmi_sink, so ok.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Ville Syrjälä]

On Thu, Oct 26, 2017 at 04:44:39PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2017-10-26 16:14:05)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Starting from version 204 VBT can specify the max TMDS clock we are
> > allowed to use with HDMI ports. Parse that information and take it
> > into account when filtering modes and computing a crtc state.
> >  
> > +       if (bdb_version >= 204) {
> > +               int max_tmds_clock;
> > +
> > +               switch (child->hdmi_max_data_rate) {
> > +               case 1:
> > +                       max_tmds_clock = 297000;
> > +                       break;
> > +               case 2:
> > +                       max_tmds_clock = 165000;
> > +                       break;
> > +               default:
> > +                       max_tmds_clock = 0;
> 
> Is zero a valid value, as this will prevent us from using the output
> at all?

Zero means "unlimited" or "use the platform default maximum". The code
using this will check to make sure it's non-zero before doing the min().

We use similar logic in hdmi_port_clock_limit() to handle the sink and
dongle limits.

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Chris Wilson]

Quoting Ville Syrjälä (2017-10-26 16:51:23)
> On Thu, Oct 26, 2017 at 04:44:39PM +0100, Chris Wilson wrote:
> > Quoting Ville Syrjala (2017-10-26 16:14:05)
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Starting from version 204 VBT can specify the max TMDS clock we are
> > > allowed to use with HDMI ports. Parse that information and take it
> > > into account when filtering modes and computing a crtc state.
> > >  
> > > +       if (bdb_version >= 204) {
> > > +               int max_tmds_clock;
> > > +
> > > +               switch (child->hdmi_max_data_rate) {
> > > +               case 1:
> > > +                       max_tmds_clock = 297000;
> > > +                       break;
> > > +               case 2:
> > > +                       max_tmds_clock = 165000;
> > > +                       break;
> > > +               default:
> > > +                       max_tmds_clock = 0;
> > 
> > Is zero a valid value, as this will prevent us from using the output
> > at all?
> 
> Zero means "unlimited" or "use the platform default maximum". The code
> using this will check to make sure it's non-zero before doing the min().

Indeed, I didn't look at the guard closely enough, just expected it to
be a if (use_vbt_flag) and not if (max_tmds_clock).
-Chris
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✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()
URL   : https://patchwork.freedesktop.org/series/32698/
State : success

== Summary ==

Test kms_busy:
        Subgroup extended-modeset-hang-newfb-with-reset-render-C:
                pass       -> DMESG-WARN (shard-hsw) fdo#102249 +1
Test kms_plane:
        Subgroup plane-panning-bottom-right-suspend-pipe-A-planes:
                skip       -> PASS       (shard-hsw)
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912

fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hsw        total:2539 pass:1432 dwarn:1   dfail:0   fail:9   skip:1097 time:9525s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6209/shards.html
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Re: [PATCH 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Jani Nikula]

On Thu, 26 Oct 2017, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Starting from version 204 VBT can specify the max TMDS clock we are
> allowed to use with HDMI ports. Parse that information and take it
> into account when filtering modes and computing a crtc state.
>
> Also take the opportunity to sort the platform check if ladder
> from new to old.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h   |  2 ++
>  drivers/gpu/drm/i915/intel_bios.c | 20 ++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_hdmi.c | 30 ++++++++++++++++++++----------
>  3 files changed, 42 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 366ba74b0ad2..45d32a95ce4a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1698,6 +1698,8 @@ enum modeset_restore {
>  #define DDC_PIN_D  0x06
>  
>  struct ddi_vbt_port_info {
> +	int max_tmds_clock;
> +
>  	/*
>  	 * This is an index in the HDMI/DVI DDI buffer translation table.
>  	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index fd23023df7c1..a0df8e3fefbe 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1234,6 +1234,26 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  		info->hdmi_level_shift = hdmi_level_shift;
>  	}
>  
> +	if (bdb_version >= 204) {
> +		int max_tmds_clock;
> +
> +		switch (child->hdmi_max_data_rate) {
> +		case 1:
> +			max_tmds_clock = 297000;
> +			break;
> +		case 2:
> +			max_tmds_clock = 165000;
> +			break;
> +		default:
> +			max_tmds_clock = 0;

Please add the case values to intel_vbt_defs.h for documentation and
reuse in intel_vbt_decode. Please add debug message about values other
than 0, 1, or 2, i.e. a separate default case with fallback to 0.

With that fixed this is

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

but read on for some comments.

> +			break;
> +		}
> +
> +		DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
> +			      port_name(port), max_tmds_clock);

0 will be most common leading to a funny message...

> +		info->max_tmds_clock = max_tmds_clock;
> +	}
> +
>  	/* Parse the I_boost config for SKL and above */
>  	if (bdb_version >= 196 && child->iboost) {
>  		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index aa486b8925cf..38fe24565b4d 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1224,24 +1224,34 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder,
>  	intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
>  }
>  
> -static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
> +static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
>  {
> -	if (IS_G4X(dev_priv))
> -		return 165000;
> -	else if (IS_GEMINILAKE(dev_priv))
> -		return 594000;
> -	else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
> -		return 300000;
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	const struct ddi_vbt_port_info *info =
> +		&dev_priv->vbt.ddi_port_info[encoder->port];
> +	int max_tmds_clock;
> +
> +	if (IS_GEMINILAKE(dev_priv))
> +		max_tmds_clock = 594000;

Hmm, are we missing Cannonlake here? If we are, that's a separate patch
anyway.

> +	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
> +		max_tmds_clock = 300000;
> +	else if (INTEL_GEN(dev_priv) >= 5)
> +		max_tmds_clock = 225000;
>  	else
> -		return 225000;
> +		max_tmds_clock = 165000;
> +
> +	if (info->max_tmds_clock)
> +		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
> +
> +	return max_tmds_clock;
>  }
>  
>  static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
>  				 bool respect_downstream_limits,
>  				 bool force_dvi)
>  {
> -	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
> -	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
> +	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
> +	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
>  
>  	if (respect_downstream_limits) {
>  		struct intel_connector *connector = hdmi->attached_connector;

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Jani Nikula]

On Fri, 27 Oct 2017, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Thu, 26 Oct 2017, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Starting from version 204 VBT can specify the max TMDS clock we are
>> allowed to use with HDMI ports. Parse that information and take it
>> into account when filtering modes and computing a crtc state.
>>
>> Also take the opportunity to sort the platform check if ladder
>> from new to old.
>>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h   |  2 ++
>>  drivers/gpu/drm/i915/intel_bios.c | 20 ++++++++++++++++++++
>>  drivers/gpu/drm/i915/intel_hdmi.c | 30 ++++++++++++++++++++----------
>>  3 files changed, 42 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 366ba74b0ad2..45d32a95ce4a 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1698,6 +1698,8 @@ enum modeset_restore {
>>  #define DDC_PIN_D  0x06
>>  
>>  struct ddi_vbt_port_info {
>> +	int max_tmds_clock;
>> +
>>  	/*
>>  	 * This is an index in the HDMI/DVI DDI buffer translation table.
>>  	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
>> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
>> index fd23023df7c1..a0df8e3fefbe 100644
>> --- a/drivers/gpu/drm/i915/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/intel_bios.c
>> @@ -1234,6 +1234,26 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>>  		info->hdmi_level_shift = hdmi_level_shift;
>>  	}
>>  
>> +	if (bdb_version >= 204) {
>> +		int max_tmds_clock;
>> +
>> +		switch (child->hdmi_max_data_rate) {
>> +		case 1:
>> +			max_tmds_clock = 297000;
>> +			break;
>> +		case 2:
>> +			max_tmds_clock = 165000;
>> +			break;
>> +		default:
>> +			max_tmds_clock = 0;
>
> Please add the case values to intel_vbt_defs.h for documentation and
> reuse in intel_vbt_decode. Please add debug message about values other
> than 0, 1, or 2, i.e. a separate default case with fallback to 0.
>
> With that fixed this is
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Hold your horses with that!

We have bogus field widths for level shift and max data rate in the
child device config! Data rate is supposed to be 3 bits 7:5 and level
shift 5 bits 4:0. Please fix that first! I don't think this should have
an impact, because the defined values should fit in 4 bits. But this
would have a worse and more surprising impact on the max data rate.

The wrong mask was originally introduced in 6acab15a7b0d ("drm/i915: use
the HDMI DDI buffer translations from VBT") and we started using the
info in 96fb9f9b154a ("drm/i915/bxt: VSwing programming sequence").

I'm a bit suprised I missed this when I reworked the structures.


BR,
Jani.

>
> but read on for some comments.
>
>> +			break;
>> +		}
>> +
>> +		DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
>> +			      port_name(port), max_tmds_clock);
>
> 0 will be most common leading to a funny message...
>
>> +		info->max_tmds_clock = max_tmds_clock;
>> +	}
>> +
>>  	/* Parse the I_boost config for SKL and above */
>>  	if (bdb_version >= 196 && child->iboost) {
>>  		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
>> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
>> index aa486b8925cf..38fe24565b4d 100644
>> --- a/drivers/gpu/drm/i915/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
>> @@ -1224,24 +1224,34 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder,
>>  	intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
>>  }
>>  
>> -static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
>> +static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
>>  {
>> -	if (IS_G4X(dev_priv))
>> -		return 165000;
>> -	else if (IS_GEMINILAKE(dev_priv))
>> -		return 594000;
>> -	else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
>> -		return 300000;
>> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> +	const struct ddi_vbt_port_info *info =
>> +		&dev_priv->vbt.ddi_port_info[encoder->port];
>> +	int max_tmds_clock;
>> +
>> +	if (IS_GEMINILAKE(dev_priv))
>> +		max_tmds_clock = 594000;
>
> Hmm, are we missing Cannonlake here? If we are, that's a separate patch
> anyway.
>
>> +	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
>> +		max_tmds_clock = 300000;
>> +	else if (INTEL_GEN(dev_priv) >= 5)
>> +		max_tmds_clock = 225000;
>>  	else
>> -		return 225000;
>> +		max_tmds_clock = 165000;
>> +
>> +	if (info->max_tmds_clock)
>> +		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
>> +
>> +	return max_tmds_clock;
>>  }
>>  
>>  static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
>>  				 bool respect_downstream_limits,
>>  				 bool force_dvi)
>>  {
>> -	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
>> -	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
>> +	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
>> +	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
>>  
>>  	if (respect_downstream_limits) {
>>  		struct intel_connector *connector = hdmi->attached_connector;

-- 
Jani Nikula, Intel Open Source Technology Center
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✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()
URL   : https://patchwork.freedesktop.org/series/32698/
State : warning

== Summary ==

Series 32698v1 series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()
https://patchwork.freedesktop.org/api/1.0/series/32698/revisions/1/mbox/

Test gem_mmap_gtt:
        Subgroup basic-read-write-distinct:
                pass       -> DMESG-WARN (fi-bsw-n3050)

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:441s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:450s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:371s
fi-bsw-n3050     total:289  pass:242  dwarn:1   dfail:0   fail:0   skip:46  time:528s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:264s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:494s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:490s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:493s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:475s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:588s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:422s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:249s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:580s
fi-glk-dsi       total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  time:487s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:424s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:425s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:420s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:489s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:458s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:490s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:572s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:474s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:581s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:547s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:457s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:590s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:649s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:519s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:495s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:454s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:566s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:413s

4efa630855362c267af94785e50948bb60615bfe drm-tip: 2017y-10m-27d-15h-25m-04s UTC integration manifest
b6fceb259370 drm/i915: Parse max HDMI TMDS clock from VBT
490ca3ff6f76 drm/i915: Clean up the mess around hdmi_12bpc_possible()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6247/
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[PATCH v2 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Starting from version 204 VBT can specify the max TMDS clock we are
allowed to use with HDMI ports. Parse that information and take it
into account when filtering modes and computing a crtc state.

Also take the opportunity to sort the platform check if ladder
from new to old.

v2: Add defines for the values into intel_vbt_defs.h (Jani)
    Don't fall back to 0 silently for unknown values (Jani)
    Skip the debug print for the 0 case (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  2 ++
 drivers/gpu/drm/i915/intel_bios.c     | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_hdmi.c     | 30 ++++++++++++++++++++----------
 drivers/gpu/drm/i915/intel_vbt_defs.h |  4 ++++
 4 files changed, 50 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c0a716e596ba..4a7325c4189c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1698,6 +1698,8 @@ enum modeset_restore {
 #define DDC_PIN_D  0x06
 
 struct ddi_vbt_port_info {
+	int max_tmds_clock;
+
 	/*
 	 * This is an index in the HDMI/DVI DDI buffer translation table.
 	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index fd23023df7c1..51108ffc28d1 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1234,6 +1234,30 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 		info->hdmi_level_shift = hdmi_level_shift;
 	}
 
+	if (bdb_version >= 204) {
+		int max_tmds_clock;
+
+		switch (child->hdmi_max_data_rate) {
+		default:
+			MISSING_CASE(child->hdmi_max_data_rate);
+			/* fall through */
+		case HDMI_MAX_DATA_RATE_PLATFORM:
+			max_tmds_clock = 0;
+			break;
+		case HDMI_MAX_DATA_RATE_297:
+			max_tmds_clock = 297000;
+			break;
+		case HDMI_MAX_DATA_RATE_165:
+			max_tmds_clock = 165000;
+			break;
+		}
+
+		if (max_tmds_clock)
+			DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
+				      port_name(port), max_tmds_clock);
+		info->max_tmds_clock = max_tmds_clock;
+	}
+
 	/* Parse the I_boost config for SKL and above */
 	if (bdb_version >= 196 && child->iboost) {
 		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index aa486b8925cf..38fe24565b4d 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1224,24 +1224,34 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder,
 	intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
 }
 
-static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
+static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
 {
-	if (IS_G4X(dev_priv))
-		return 165000;
-	else if (IS_GEMINILAKE(dev_priv))
-		return 594000;
-	else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
-		return 300000;
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	const struct ddi_vbt_port_info *info =
+		&dev_priv->vbt.ddi_port_info[encoder->port];
+	int max_tmds_clock;
+
+	if (IS_GEMINILAKE(dev_priv))
+		max_tmds_clock = 594000;
+	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
+		max_tmds_clock = 300000;
+	else if (INTEL_GEN(dev_priv) >= 5)
+		max_tmds_clock = 225000;
 	else
-		return 225000;
+		max_tmds_clock = 165000;
+
+	if (info->max_tmds_clock)
+		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
+
+	return max_tmds_clock;
 }
 
 static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
 				 bool respect_downstream_limits,
 				 bool force_dvi)
 {
-	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
-	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
+	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
+	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
 
 	if (respect_downstream_limits) {
 		struct intel_connector *connector = hdmi->attached_connector;
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 3c3c421e2e43..e3d7745a9151 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -304,6 +304,10 @@ struct bdb_general_features {
 #define DVO_PORT_MIPIC		23				/* 171 */
 #define DVO_PORT_MIPID		24				/* 171 */
 
+#define HDMI_MAX_DATA_RATE_PLATFORM	0			/* 204 */
+#define HDMI_MAX_DATA_RATE_297		1			/* 204 */
+#define HDMI_MAX_DATA_RATE_165		2			/* 204 */
+
 #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
 
 /* DDC Bus DDI Type 155+ */
-- 
2.13.6

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Re: [PATCH v2 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Jani Nikula]

On Mon, 30 Oct 2017, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Starting from version 204 VBT can specify the max TMDS clock we are
> allowed to use with HDMI ports. Parse that information and take it
> into account when filtering modes and computing a crtc state.
>
> Also take the opportunity to sort the platform check if ladder
> from new to old.
>
> v2: Add defines for the values into intel_vbt_defs.h (Jani)
>     Don't fall back to 0 silently for unknown values (Jani)
>     Skip the debug print for the 0 case (Jani)
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Yup

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h       |  2 ++
>  drivers/gpu/drm/i915/intel_bios.c     | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_hdmi.c     | 30 ++++++++++++++++++++----------
>  drivers/gpu/drm/i915/intel_vbt_defs.h |  4 ++++
>  4 files changed, 50 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c0a716e596ba..4a7325c4189c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1698,6 +1698,8 @@ enum modeset_restore {
>  #define DDC_PIN_D  0x06
>  
>  struct ddi_vbt_port_info {
> +	int max_tmds_clock;
> +
>  	/*
>  	 * This is an index in the HDMI/DVI DDI buffer translation table.
>  	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index fd23023df7c1..51108ffc28d1 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1234,6 +1234,30 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  		info->hdmi_level_shift = hdmi_level_shift;
>  	}
>  
> +	if (bdb_version >= 204) {
> +		int max_tmds_clock;
> +
> +		switch (child->hdmi_max_data_rate) {
> +		default:
> +			MISSING_CASE(child->hdmi_max_data_rate);
> +			/* fall through */
> +		case HDMI_MAX_DATA_RATE_PLATFORM:
> +			max_tmds_clock = 0;
> +			break;
> +		case HDMI_MAX_DATA_RATE_297:
> +			max_tmds_clock = 297000;
> +			break;
> +		case HDMI_MAX_DATA_RATE_165:
> +			max_tmds_clock = 165000;
> +			break;
> +		}
> +
> +		if (max_tmds_clock)
> +			DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
> +				      port_name(port), max_tmds_clock);
> +		info->max_tmds_clock = max_tmds_clock;
> +	}
> +
>  	/* Parse the I_boost config for SKL and above */
>  	if (bdb_version >= 196 && child->iboost) {
>  		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index aa486b8925cf..38fe24565b4d 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1224,24 +1224,34 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder,
>  	intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
>  }
>  
> -static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
> +static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
>  {
> -	if (IS_G4X(dev_priv))
> -		return 165000;
> -	else if (IS_GEMINILAKE(dev_priv))
> -		return 594000;
> -	else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
> -		return 300000;
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	const struct ddi_vbt_port_info *info =
> +		&dev_priv->vbt.ddi_port_info[encoder->port];
> +	int max_tmds_clock;
> +
> +	if (IS_GEMINILAKE(dev_priv))
> +		max_tmds_clock = 594000;
> +	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
> +		max_tmds_clock = 300000;
> +	else if (INTEL_GEN(dev_priv) >= 5)
> +		max_tmds_clock = 225000;
>  	else
> -		return 225000;
> +		max_tmds_clock = 165000;
> +
> +	if (info->max_tmds_clock)
> +		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
> +
> +	return max_tmds_clock;
>  }
>  
>  static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
>  				 bool respect_downstream_limits,
>  				 bool force_dvi)
>  {
> -	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
> -	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
> +	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
> +	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
>  
>  	if (respect_downstream_limits) {
>  		struct intel_connector *connector = hdmi->attached_connector;
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index 3c3c421e2e43..e3d7745a9151 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -304,6 +304,10 @@ struct bdb_general_features {
>  #define DVO_PORT_MIPIC		23				/* 171 */
>  #define DVO_PORT_MIPID		24				/* 171 */
>  
> +#define HDMI_MAX_DATA_RATE_PLATFORM	0			/* 204 */
> +#define HDMI_MAX_DATA_RATE_297		1			/* 204 */
> +#define HDMI_MAX_DATA_RATE_165		2			/* 204 */
> +
>  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
>  
>  /* DDC Bus DDI Type 155+ */

-- 
Jani Nikula, Intel Open Source Technology Center
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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible() (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible() (rev2)
URL   : https://patchwork.freedesktop.org/series/32698/
State : success

== Summary ==

Series 32698v2 series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible()
https://patchwork.freedesktop.org/api/1.0/series/32698/revisions/2/mbox/

Test debugfs_test:
        Subgroup read_all_entries:
                dmesg-warn -> PASS       (fi-cfl-s)
Test drv_getparams_basic:
        Subgroup basic-eu-total:
                dmesg-warn -> PASS       (fi-cfl-s)
        Subgroup basic-subslice-total:
                dmesg-warn -> PASS       (fi-cfl-s)
Test drv_hangman:
        Subgroup error-state-basic:
                dmesg-warn -> PASS       (fi-cfl-s)
Test gem_exec_reloc:
        Subgroup basic-cpu-gtt-active:
                pass       -> FAIL       (fi-gdg-551) fdo#102582 +2
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:449s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:452s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:380s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:532s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:264s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:498s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:499s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:489s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:475s
fi-cfl-s         total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  time:555s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:600s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:420s
fi-gdg-551       total:289  pass:175  dwarn:1   dfail:0   fail:4   skip:109 time:248s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:574s
fi-glk-dsi       total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  time:489s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:429s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:428s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:418s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:498s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:459s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:490s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:573s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:480s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:590s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:548s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:451s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:587s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:638s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:522s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:501s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:454s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:566s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:418s

2dd14a4ad87f449830d9fbb7b4a33f5d369dcde2 drm-tip: 2017y-10m-30d-13h-40m-22s UTC integration manifest
3f60cf4f7a0a drm/i915: Parse max HDMI TMDS clock from VBT

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6262/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible() (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Clean up the mess around hdmi_12bpc_possible() (rev2)
URL   : https://patchwork.freedesktop.org/series/32698/
State : success

== Summary ==

Test kms_flip:
        Subgroup wf_vblank-vs-dpms:
                dmesg-warn -> PASS       (shard-hsw) fdo#102614
        Subgroup plain-flip-fb-recreate-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#100368
Test gem_tiled_swapping:
        Subgroup non-threaded:
                incomplete -> PASS       (shard-hsw)
Test kms_busy:
        Subgroup extended-modeset-hang-newfb-with-reset-render-C:
                pass       -> DMESG-WARN (shard-hsw) fdo#102249

fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249

shard-hsw        total:2539 pass:1432 dwarn:1   dfail:0   fail:9   skip:1097 time:9221s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6262/shards.html
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Re: [PATCH v2 2/2] drm/i915: Parse max HDMI TMDS clock from VBT

[Ville Syrjälä]

On Mon, Oct 30, 2017 at 05:05:09PM +0200, Jani Nikula wrote:
> On Mon, 30 Oct 2017, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Starting from version 204 VBT can specify the max TMDS clock we are
> > allowed to use with HDMI ports. Parse that information and take it
> > into account when filtering modes and computing a crtc state.
> >
> > Also take the opportunity to sort the platform check if ladder
> > from new to old.
> >
> > v2: Add defines for the values into intel_vbt_defs.h (Jani)
> >     Don't fall back to 0 silently for unknown values (Jani)
> >     Skip the debug print for the 0 case (Jani)
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> Yup

Thanks. Pushed to dinq.

> 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h       |  2 ++
> >  drivers/gpu/drm/i915/intel_bios.c     | 24 ++++++++++++++++++++++++
> >  drivers/gpu/drm/i915/intel_hdmi.c     | 30 ++++++++++++++++++++----------
> >  drivers/gpu/drm/i915/intel_vbt_defs.h |  4 ++++
> >  4 files changed, 50 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index c0a716e596ba..4a7325c4189c 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1698,6 +1698,8 @@ enum modeset_restore {
> >  #define DDC_PIN_D  0x06
> >  
> >  struct ddi_vbt_port_info {
> > +	int max_tmds_clock;
> > +
> >  	/*
> >  	 * This is an index in the HDMI/DVI DDI buffer translation table.
> >  	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> > index fd23023df7c1..51108ffc28d1 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -1234,6 +1234,30 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> >  		info->hdmi_level_shift = hdmi_level_shift;
> >  	}
> >  
> > +	if (bdb_version >= 204) {
> > +		int max_tmds_clock;
> > +
> > +		switch (child->hdmi_max_data_rate) {
> > +		default:
> > +			MISSING_CASE(child->hdmi_max_data_rate);
> > +			/* fall through */
> > +		case HDMI_MAX_DATA_RATE_PLATFORM:
> > +			max_tmds_clock = 0;
> > +			break;
> > +		case HDMI_MAX_DATA_RATE_297:
> > +			max_tmds_clock = 297000;
> > +			break;
> > +		case HDMI_MAX_DATA_RATE_165:
> > +			max_tmds_clock = 165000;
> > +			break;
> > +		}
> > +
> > +		if (max_tmds_clock)
> > +			DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
> > +				      port_name(port), max_tmds_clock);
> > +		info->max_tmds_clock = max_tmds_clock;
> > +	}
> > +
> >  	/* Parse the I_boost config for SKL and above */
> >  	if (bdb_version >= 196 && child->iboost) {
> >  		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
> > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> > index aa486b8925cf..38fe24565b4d 100644
> > --- a/drivers/gpu/drm/i915/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> > @@ -1224,24 +1224,34 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder,
> >  	intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
> >  }
> >  
> > -static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
> > +static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
> >  {
> > -	if (IS_G4X(dev_priv))
> > -		return 165000;
> > -	else if (IS_GEMINILAKE(dev_priv))
> > -		return 594000;
> > -	else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
> > -		return 300000;
> > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	const struct ddi_vbt_port_info *info =
> > +		&dev_priv->vbt.ddi_port_info[encoder->port];
> > +	int max_tmds_clock;
> > +
> > +	if (IS_GEMINILAKE(dev_priv))
> > +		max_tmds_clock = 594000;
> > +	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
> > +		max_tmds_clock = 300000;
> > +	else if (INTEL_GEN(dev_priv) >= 5)
> > +		max_tmds_clock = 225000;
> >  	else
> > -		return 225000;
> > +		max_tmds_clock = 165000;
> > +
> > +	if (info->max_tmds_clock)
> > +		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
> > +
> > +	return max_tmds_clock;
> >  }
> >  
> >  static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
> >  				 bool respect_downstream_limits,
> >  				 bool force_dvi)
> >  {
> > -	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
> > -	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
> > +	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
> > +	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
> >  
> >  	if (respect_downstream_limits) {
> >  		struct intel_connector *connector = hdmi->attached_connector;
> > diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > index 3c3c421e2e43..e3d7745a9151 100644
> > --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > @@ -304,6 +304,10 @@ struct bdb_general_features {
> >  #define DVO_PORT_MIPIC		23				/* 171 */
> >  #define DVO_PORT_MIPID		24				/* 171 */
> >  
> > +#define HDMI_MAX_DATA_RATE_PLATFORM	0			/* 204 */
> > +#define HDMI_MAX_DATA_RATE_297		1			/* 204 */
> > +#define HDMI_MAX_DATA_RATE_165		2			/* 204 */
> > +
> >  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
> >  
> >  /* DDC Bus DDI Type 155+ */
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center

-- 
Ville Syrjälä
Intel OTC
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