From: Paul Burton <paul.burton@mips.com> To: Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <marc.zyngier@arm.com>, Thomas Gleixner <tglx@linutronix.de> Cc: <linux-mips@linux-mips.org>, <linux-kernel@vger.kernel.org>, Paul Burton <paul.burton@mips.com> Subject: [PATCH v2 1/8] irqchip: mips-gic: Inline gic_local_irq_domain_map() Date: Tue, 31 Oct 2017 09:41:44 -0700 [thread overview] Message-ID: <20171031164151.6357-2-paul.burton@mips.com> (raw) In-Reply-To: <20171031164151.6357-1-paul.burton@mips.com> The gic_local_irq_domain_map() function has only one callsite in gic_irq_domain_map(), and the split between the two functions makes it unclear that they duplicate calculations & checks. Inline gic_local_irq_domain_map() into gic_irq_domain_map() in order to clean this up. Doing this makes the following small issues obvious, and the patch tidies them up: - Both functions used GIC_HWIRQ_TO_LOCAL() to convert a hwirq number to a local IRQ number. We now only do this once. Although the compiler ought to have optimised this away before anyway, the change leaves us with less duplicate code. - gic_local_irq_domain_map() had a check for invalid local interrupt numbers (intr > GIC_LOCAL_INT_FDC). This condition can never occur because any hwirq higher than those used for local interrupts is a shared interrupt, which gic_irq_domain_map() already handles separately. We therefore remove this check. - The decision of whether to map the interrupt to gic_cpu_pin or timer_cpu_pin can be handled within the existing switch statement in gic_irq_domain_map(), shortening the code a little. The change additionally prepares us nicely for the following patch of the series which would otherwise need to duplicate the check for whether a local interrupt should be percpu_devid or just percpu (ie. the switch statement from gic_irq_domain_map()) in gic_local_irq_domain_map(). Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org --- Changes in v2: None drivers/irqchip/irq-mips-gic.c | 58 ++++++++++++++++-------------------------- 1 file changed, 22 insertions(+), 36 deletions(-) diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index c90976d7e53c..6fdcc1552fab 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -382,39 +382,6 @@ static void gic_irq_dispatch(struct irq_desc *desc) gic_handle_shared_int(true); } -static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq, - irq_hw_number_t hw) -{ - int intr = GIC_HWIRQ_TO_LOCAL(hw); - int i; - unsigned long flags; - u32 val; - - if (!gic_local_irq_is_routable(intr)) - return -EPERM; - - if (intr > GIC_LOCAL_INT_FDC) { - pr_err("Invalid local IRQ %d\n", intr); - return -EINVAL; - } - - if (intr == GIC_LOCAL_INT_TIMER) { - /* CONFIG_MIPS_CMP workaround (see __gic_init) */ - val = GIC_MAP_PIN_MAP_TO_PIN | timer_cpu_pin; - } else { - val = GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin; - } - - spin_lock_irqsave(&gic_lock, flags); - for (i = 0; i < gic_vpes; i++) { - write_gic_vl_other(mips_cm_vp_id(i)); - write_gic_vo_map(intr, val); - } - spin_unlock_irqrestore(&gic_lock, flags); - - return 0; -} - static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw, unsigned int cpu) { @@ -457,7 +424,10 @@ static int gic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) { - int err; + unsigned long flags; + unsigned int intr; + int err, i; + u32 map; if (hwirq >= GIC_SHARED_HWIRQ_BASE) { /* verify that shared irqs don't conflict with an IPI irq */ @@ -474,8 +444,14 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, return gic_shared_irq_domain_map(d, virq, hwirq, 0); } - switch (GIC_HWIRQ_TO_LOCAL(hwirq)) { + intr = GIC_HWIRQ_TO_LOCAL(hwirq); + map = GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin; + + switch (intr) { case GIC_LOCAL_INT_TIMER: + /* CONFIG_MIPS_CMP workaround (see __gic_init) */ + map = GIC_MAP_PIN_MAP_TO_PIN | timer_cpu_pin; + /* fall-through */ case GIC_LOCAL_INT_PERFCTR: case GIC_LOCAL_INT_FDC: /* @@ -504,7 +480,17 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, break; } - return gic_local_irq_domain_map(d, virq, hwirq); + if (!gic_local_irq_is_routable(intr)) + return -EPERM; + + spin_lock_irqsave(&gic_lock, flags); + for (i = 0; i < gic_vpes; i++) { + write_gic_vl_other(mips_cm_vp_id(i)); + write_gic_vo_map(intr, map); + } + spin_unlock_irqrestore(&gic_lock, flags); + + return 0; } static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq, -- 2.14.3
WARNING: multiple messages have this Message-ID (diff)
From: Paul Burton <paul.burton@mips.com> To: Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <marc.zyngier@arm.com>, Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Paul Burton <paul.burton@mips.com> Subject: [PATCH v2 1/8] irqchip: mips-gic: Inline gic_local_irq_domain_map() Date: Tue, 31 Oct 2017 09:41:44 -0700 [thread overview] Message-ID: <20171031164151.6357-2-paul.burton@mips.com> (raw) Message-ID: <20171031164144.8tIEktkOLkrK3dgByeHtX11kmwMa5Pz5SUES4l04U-U@z> (raw) In-Reply-To: <20171031164151.6357-1-paul.burton@mips.com> The gic_local_irq_domain_map() function has only one callsite in gic_irq_domain_map(), and the split between the two functions makes it unclear that they duplicate calculations & checks. Inline gic_local_irq_domain_map() into gic_irq_domain_map() in order to clean this up. Doing this makes the following small issues obvious, and the patch tidies them up: - Both functions used GIC_HWIRQ_TO_LOCAL() to convert a hwirq number to a local IRQ number. We now only do this once. Although the compiler ought to have optimised this away before anyway, the change leaves us with less duplicate code. - gic_local_irq_domain_map() had a check for invalid local interrupt numbers (intr > GIC_LOCAL_INT_FDC). This condition can never occur because any hwirq higher than those used for local interrupts is a shared interrupt, which gic_irq_domain_map() already handles separately. We therefore remove this check. - The decision of whether to map the interrupt to gic_cpu_pin or timer_cpu_pin can be handled within the existing switch statement in gic_irq_domain_map(), shortening the code a little. The change additionally prepares us nicely for the following patch of the series which would otherwise need to duplicate the check for whether a local interrupt should be percpu_devid or just percpu (ie. the switch statement from gic_irq_domain_map()) in gic_local_irq_domain_map(). Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org --- Changes in v2: None drivers/irqchip/irq-mips-gic.c | 58 ++++++++++++++++-------------------------- 1 file changed, 22 insertions(+), 36 deletions(-) diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index c90976d7e53c..6fdcc1552fab 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -382,39 +382,6 @@ static void gic_irq_dispatch(struct irq_desc *desc) gic_handle_shared_int(true); } -static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq, - irq_hw_number_t hw) -{ - int intr = GIC_HWIRQ_TO_LOCAL(hw); - int i; - unsigned long flags; - u32 val; - - if (!gic_local_irq_is_routable(intr)) - return -EPERM; - - if (intr > GIC_LOCAL_INT_FDC) { - pr_err("Invalid local IRQ %d\n", intr); - return -EINVAL; - } - - if (intr == GIC_LOCAL_INT_TIMER) { - /* CONFIG_MIPS_CMP workaround (see __gic_init) */ - val = GIC_MAP_PIN_MAP_TO_PIN | timer_cpu_pin; - } else { - val = GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin; - } - - spin_lock_irqsave(&gic_lock, flags); - for (i = 0; i < gic_vpes; i++) { - write_gic_vl_other(mips_cm_vp_id(i)); - write_gic_vo_map(intr, val); - } - spin_unlock_irqrestore(&gic_lock, flags); - - return 0; -} - static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw, unsigned int cpu) { @@ -457,7 +424,10 @@ static int gic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) { - int err; + unsigned long flags; + unsigned int intr; + int err, i; + u32 map; if (hwirq >= GIC_SHARED_HWIRQ_BASE) { /* verify that shared irqs don't conflict with an IPI irq */ @@ -474,8 +444,14 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, return gic_shared_irq_domain_map(d, virq, hwirq, 0); } - switch (GIC_HWIRQ_TO_LOCAL(hwirq)) { + intr = GIC_HWIRQ_TO_LOCAL(hwirq); + map = GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin; + + switch (intr) { case GIC_LOCAL_INT_TIMER: + /* CONFIG_MIPS_CMP workaround (see __gic_init) */ + map = GIC_MAP_PIN_MAP_TO_PIN | timer_cpu_pin; + /* fall-through */ case GIC_LOCAL_INT_PERFCTR: case GIC_LOCAL_INT_FDC: /* @@ -504,7 +480,17 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, break; } - return gic_local_irq_domain_map(d, virq, hwirq); + if (!gic_local_irq_is_routable(intr)) + return -EPERM; + + spin_lock_irqsave(&gic_lock, flags); + for (i = 0; i < gic_vpes; i++) { + write_gic_vl_other(mips_cm_vp_id(i)); + write_gic_vo_map(intr, map); + } + spin_unlock_irqrestore(&gic_lock, flags); + + return 0; } static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq, -- 2.14.3
next prev parent reply other threads:[~2017-10-31 16:42 UTC|newest] Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-10-25 23:37 [PATCH 0/8] irqchip: mips-gic: Cleanups, fixes, prep for multi-cluster Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-25 23:37 ` [PATCH 1/8] irqchip: mips-gic: Inline gic_local_irq_domain_map() Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-25 23:37 ` [PATCH 2/8] irqchip: mips-gic: Use irq_cpu_online to (un)mask all-VP(E) IRQs Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-30 8:00 ` Marc Zyngier 2017-10-30 8:00 ` Marc Zyngier 2017-10-30 16:36 ` Paul Burton 2017-10-30 16:36 ` Paul Burton 2017-10-31 1:35 ` Marc Zyngier 2017-10-31 1:35 ` Marc Zyngier 2017-10-31 16:41 ` [PATCH v2 0/8] irqchip: mips-gic: Cleanups, fixes, prep for multi-cluster Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-10-31 16:41 ` Paul Burton [this message] 2017-10-31 16:41 ` [PATCH v2 1/8] irqchip: mips-gic: Inline gic_local_irq_domain_map() Paul Burton 2017-10-31 16:41 ` [PATCH v2 2/8] irqchip: mips-gic: Use irq_cpu_online to (un)mask all-VP(E) IRQs Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-10-31 16:41 ` [PATCH v2 3/8] irqchip: mips-gic: Mask local interrupts when CPUs come online Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-10-31 16:41 ` [PATCH v2 4/8] irqchip: mips-gic: Configure EIC " Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-10-31 16:41 ` [PATCH v2 5/8] irqchip: mips-gic: Use num_possible_cpus() to reserve IPIs Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-10-31 16:41 ` [PATCH v2 6/8] irqchip: mips-gic: Remove gic_vpes variable Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-10-31 16:41 ` [PATCH v2 7/8] irqchip: mips-gic: Share register writes in gic_set_type() Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-10-31 16:41 ` [PATCH v2 8/8] irqchip: mips-gic: Make IPI bitmaps static Paul Burton 2017-10-31 16:41 ` Paul Burton 2017-11-01 0:13 ` [PATCH v2 0/8] irqchip: mips-gic: Cleanups, fixes, prep for multi-cluster Marc Zyngier 2017-11-01 0:13 ` Marc Zyngier 2017-11-01 16:40 ` Paul Burton 2017-11-01 16:40 ` Paul Burton 2017-11-01 16:59 ` Thomas Gleixner 2017-11-02 10:44 ` Marc Zyngier 2017-11-02 10:44 ` Marc Zyngier 2017-10-25 23:37 ` [PATCH 3/8] irqchip: mips-gic: Mask local interrupts when CPUs come online Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-25 23:37 ` [PATCH 4/8] irqchip: mips-gic: Configure EIC " Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-25 23:37 ` [PATCH 5/8] irqchip: mips-gic: Use num_possible_cpus() to reserve IPIs Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-25 23:37 ` [PATCH 6/8] irqchip: mips-gic: Remove gic_vpes variable Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-25 23:37 ` [PATCH 7/8] irqchip: mips-gic: Share register writes in gic_set_type() Paul Burton 2017-10-25 23:37 ` Paul Burton 2017-10-25 23:37 ` [PATCH 8/8] irqchip: mips-gic: Make IPI bitmaps static Paul Burton 2017-10-25 23:37 ` Paul Burton
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20171031164151.6357-2-paul.burton@mips.com \ --to=paul.burton@mips.com \ --cc=jason@lakedaemon.net \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mips@linux-mips.org \ --cc=marc.zyngier@arm.com \ --cc=tglx@linutronix.de \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.