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From: Francisco Iglesias <frasse.iglesias@gmail.com>
To: qemu-devel@nongnu.org
Cc: edgari@xilinx.com, alistai@xilinx.com,
	francisco.iglesias@feimtech.se, mar.krzeminski@gmail.com
Subject: [Qemu-devel] [PATCH v6 06/13] xilinx_spips: Update striping to be big-endian bit order
Date: Wed,  1 Nov 2017 08:16:45 +0100	[thread overview]
Message-ID: <20171101071652.19375-7-frasse.iglesias@gmail.com> (raw)
In-Reply-To: <20171101071652.19375-1-frasse.iglesias@gmail.com>

Update striping functionality to be big-endian bit order (as according to
the Zynq-7000 Technical Reference Manual). Output thereafter the even bits
into the flash memory connected to the lower QSPI bus and the odd bits into
the flash memory connected to the upper QSPI bus.

Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com>
---
 hw/ssi/xilinx_spips.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 559fa79..7accf5d 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -208,14 +208,14 @@ static void xilinx_spips_reset(DeviceState *d)
     xilinx_spips_update_cs_lines(s);
 }
 
-/* N way (num) in place bit striper. Lay out row wise bits (LSB to MSB)
+/* N way (num) in place bit striper. Lay out row wise bits (MSB to LSB)
  * column wise (from element 0 to N-1). num is the length of x, and dir
  * reverses the direction of the transform. Best illustrated by example:
  * Each digit in the below array is a single bit (num == 3):
  *
- * {{ 76543210, }  ----- stripe (dir == false) -----> {{ FCheb630, }
- *  { hgfedcba, }                                      { GDAfc741, }
- *  { HGFEDCBA, }} <---- upstripe (dir == true) -----  { HEBgda52, }}
+ * {{ 76543210, }  ----- stripe (dir == false) -----> {{ 741gdaFC, }
+ *  { hgfedcba, }                                      { 630fcHEB, }
+ *  { HGFEDCBA, }} <---- upstripe (dir == true) -----  { 52hebGDA, }}
  */
 
 static inline void stripe8(uint8_t *x, int num, bool dir)
@@ -223,15 +223,15 @@ static inline void stripe8(uint8_t *x, int num, bool dir)
     uint8_t r[num];
     memset(r, 0, sizeof(uint8_t) * num);
     int idx[2] = {0, 0};
-    int bit[2] = {0, 0};
+    int bit[2] = {0, 7};
     int d = dir;
 
     for (idx[0] = 0; idx[0] < num; ++idx[0]) {
-        for (bit[0] = 0; bit[0] < 8; ++bit[0]) {
-            r[idx[d]] |= x[idx[!d]] & 1 << bit[!d] ? 1 << bit[d] : 0;
+        for (bit[0] = 7; bit[0] != -1; bit[0] += -1) {
+            r[idx[!d]] |= x[idx[d]] & 1 << bit[d] ? 1 << bit[!d] : 0;
             idx[1] = (idx[1] + 1) % num;
             if (!idx[1]) {
-                bit[1]++;
+                bit[1] += -1;
             }
         }
     }
@@ -266,8 +266,9 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s)
         }
 
         for (i = 0; i < num_effective_busses(s); ++i) {
+            int bus = num_effective_busses(s) - 1 - i;
             DB_PRINT_L(debug_level, "tx = %02x\n", tx_rx[i]);
-            tx_rx[i] = ssi_transfer(s->spi[i], (uint32_t)tx_rx[i]);
+            tx_rx[i] = ssi_transfer(s->spi[bus], (uint32_t)tx_rx[i]);
             DB_PRINT_L(debug_level, "rx = %02x\n", tx_rx[i]);
         }
 
-- 
2.9.3

  parent reply	other threads:[~2017-11-01  7:17 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-01  7:16 [Qemu-devel] [PATCH v6 00/13] Add support for the ZynqMP Generic QSPI Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 01/13] m25p80: Add support for continuous read out of RDSR and READ_FSR Francisco Iglesias
2017-11-01 19:20   ` mar.krzeminski
2017-11-01 20:42     ` francisco iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 02/13] m25p80: Add support for SST READ ID 0x90/0xAB commands Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 03/13] m25p80: Add support for BRRD/BRWR and BULK_ERASE (0x60) Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 04/13] m25p80: Add support for n25q512a11 and n25q512a13 Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 05/13] xilinx_spips: Move FlashCMD, XilinxQSPIPS and XilinxSPIPSClass Francisco Iglesias
2017-11-01  7:16 ` Francisco Iglesias [this message]
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 07/13] xilinx_spips: Add support for RX discard and RX drain Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 08/13] xilinx_spips: Make tx/rx_data_bytes more generic and reusable Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 09/13] xilinx_spips: Add support for zero pumping Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 10/13] xilinx_spips: Add support for 4 byte addresses in the LQSPI Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 11/13] xilinx_spips: Don't set TX FIFO UNDERFLOW at cmd done Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 12/13] xilinx_spips: Add support for the ZynqMP Generic QSPI Francisco Iglesias
2017-11-01  7:16 ` [Qemu-devel] [PATCH v6 13/13] xlnx-zcu102: Add support for the ZynqMP QSPI Francisco Iglesias

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