[PATCH] drm/i915: Read ilk FDI PLL frequency once during initialisation

[PATCH] drm/i915: Read ilk FDI PLL frequency once during initialisation

[Chris Wilson]

During intel_atomic_check(), we do not take the intel_runtime_pm_get()
wakeref and so should do the atomic modeset precalculations without
referring to the HW. However, on Ironlake we see

<7>[   23.487557] [drm:intel_atomic_check [i915]] [CONNECTOR:47:VGA-1] checking for sink bpp constrains
<7>[   23.487615] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
<4>[   23.487621] RPM wakelock ref not held during HW access
<4>[   23.487652] ------------[ cut here ]------------
<4>[   23.487697] WARNING: CPU: 0 PID: 1343 at drivers/gpu/drm/i915/intel_drv.h:1813 gen5_read32+0x183/0x200 [i915]
<4>[   23.487701] Modules linked in: snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic i915 intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me ptp mei pps_core prime_numbers
<4>[   23.487784] CPU: 0 PID: 1343 Comm: debugfs_test Tainted: G        W       4.14.0-rc7-CI-Trybot_1378+ #1
<4>[   23.487788] Hardware name: Hewlett-Packard HP Compaq 8100 Elite SFF PC/304Ah, BIOS 786H1 v01.13 07/14/2011
<4>[   23.487793] task: ffff8801f90aa6c0 task.stack: ffffc900013ec000
<4>[   23.487838] RIP: 0010:gen5_read32+0x183/0x200 [i915]
<4>[   23.487842] RSP: 0018:ffffc900013efb58 EFLAGS: 00010292
<4>[   23.487849] RAX: 000000000000002a RBX: ffff880205c00000 RCX: 0000000000000006
<4>[   23.487854] RDX: 000000000000140a RSI: ffffffff81d0eb14 RDI: ffffffff81cc26f6
<4>[   23.487857] RBP: ffffc900013efb80 R08: ffff8801f90aaff8 R09: 0000000000000000
<4>[   23.487861] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001
<4>[   23.487865] R13: 0000000000046000 R14: ffff88020ffaba78 R15: ffff88020b109bf8
<4>[   23.487870] FS:  00007f53b5e40a40(0000) GS:ffff88021bc00000(0000) knlGS:0000000000000000
<4>[   23.487874] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4>[   23.487878] CR2: 000055e41900c0e8 CR3: 00000001fa0d6005 CR4: 00000000000206f0
<4>[   23.487882] Call Trace:
<4>[   23.487931]  intel_atomic_check+0x745/0x1290 [i915]
<4>[   23.487948]  drm_atomic_check_only+0x459/0x560
<4>[   23.487956]  ? drm_atomic_set_crtc_for_connector+0xc9/0x100
<4>[   23.488025]  drm_atomic_commit+0x18/0x50
<4>[   23.488035]  restore_fbdev_mode_atomic+0x190/0x1f0
<4>[   23.488059]  restore_fbdev_mode+0x32/0x120
<4>[   23.488072]  drm_fb_helper_restore_fbdev_mode_unlocked+0x50/0xa0
<4>[   23.488139]  intel_fbdev_restore_mode+0x34/0x90 [i915]
<4>[   23.488194]  i915_driver_lastclose+0xe/0x10 [i915]
<4>[   23.488208]  drm_lastclose+0x39/0xf0
<4>[   23.488219]  drm_release+0x30c/0x3c0
<4>[   23.488236]  __fput+0xb9/0x200
<4>[   23.488252]  ____fput+0xe/0x10
<4>[   23.488264]  task_work_run+0x89/0xc0
<4>[   23.488278]  exit_to_usermode_loop+0x83/0x90
<4>[   23.488290]  syscall_return_slowpath+0xd0/0x110
<4>[   23.488304]  entry_SYSCALL_64_fastpath+0xaf/0xb1
<4>[   23.488312] RIP: 0033:0x7f53b4317560
<4>[   23.488320] RSP: 002b:00007ffca7e70748 EFLAGS: 00000246 ORIG_RAX: 0000000000000003
<4>[   23.488333] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 00007f53b4317560
<4>[   23.488340] RDX: 0000000000000005 RSI: 00007ffca7e70640 RDI: 0000000000000004
<4>[   23.488347] RBP: 000055e417783900 R08: 000055e418f9e290 R09: 0000000000000000
<4>[   23.488356] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000001
<4>[   23.488363] R13: 00007f53b4302c40 R14: 0000000000000000 R15: 0000000000000000
<4>[   23.488384] Code: b5 f2 f2 e0 0f ff e9 c5 fe ff ff 80 3d 0e 4b 10 00 00 0f 85 c6 fe ff ff 48 c7 c7 30 73 29 a0 c6 05 fa 4a 10 00 01 e8 8e f2 f2 e0 <0f> ff e9 ac fe ff ff e8 51 9d f3 e0 85 c0 0f 85 01 ff ff ff 48
<4>[   23.488780] ---[ end trace 6bc72ce7f1596190 ]---
<7>[   23.488844] [drm:intel_atomic_check [i915]] checking fdi config on pipe A, lanes 1
<7>[   23.488911] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0

due to intel_fdi_link_freq() poking at FDI_PLL_BIOS_0. Avoid this by
recording the fdi pll frequency during device initiailisation.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      | 1 +
 drivers/gpu/drm/i915/intel_display.c | 7 ++++++-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 72bb5b51035a..ed58eaf7b082 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2344,6 +2344,7 @@ struct drm_i915_private {
 	unsigned int max_dotclk_freq;
 	unsigned int rawclk_freq;
 	unsigned int hpll_freq;
+	unsigned int fdi_pll_freq;
 	unsigned int czclk_freq;
 
 	struct {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 737de251d0f8..768a4e75e535 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -220,7 +220,7 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
 	if (HAS_DDI(dev_priv))
 		return pipe_config->port_clock; /* SPLL */
 	else if (IS_GEN5(dev_priv))
-		return ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
+		return dev_priv->fdi_pll_freq;
 	else
 		return 270000;
 }
@@ -14542,6 +14542,11 @@ int intel_modeset_init(struct drm_device *dev)
 
 	intel_shared_dpll_init(dev);
 
+	if (IS_GEN5(dev_priv)) {
+		dev_priv->fdi_pll_freq = ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
+		DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
+	}
+
 	intel_update_czclk(dev_priv);
 	intel_modeset_init_hw(dev);
 
-- 
2.15.0

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✓ Fi.CI.BAT: success for drm/i915: Read ilk FDI PLL frequency once during initialisation

[Patchwork]

== Series Details ==

Series: drm/i915: Read ilk FDI PLL frequency once during initialisation
URL   : https://patchwork.freedesktop.org/series/33210/
State : success

== Summary ==

Series 33210v1 drm/i915: Read ilk FDI PLL frequency once during initialisation
https://patchwork.freedesktop.org/api/1.0/series/33210/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-c:
                dmesg-warn -> PASS       (fi-bsw-n3050)

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:445s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:459s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:381s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:544s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:279s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:500s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:509s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:504s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:491s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:607s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:421s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:268s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:587s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:428s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:429s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:425s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:486s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:463s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:574s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:479s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:589s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:576s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:455s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:595s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:647s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:527s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:506s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:465s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:570s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:417s

8b0ae6b50a229dc661a02f4034252ee854cc9b83 drm-tip: 2017y-11m-03d-17h-15m-57s UTC integration manifest
3e84e6a710a9 drm/i915: Read ilk FDI PLL frequency once during initialisation

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6967/
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✓ Fi.CI.IGT: success for drm/i915: Read ilk FDI PLL frequency once during initialisation

[Patchwork]

== Series Details ==

Series: drm/i915: Read ilk FDI PLL frequency once during initialisation
URL   : https://patchwork.freedesktop.org/series/33210/
State : success

== Summary ==

Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912

fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hsw        total:2539 pass:1433 dwarn:0   dfail:0   fail:9   skip:1097 time:9228s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6967/shards.html
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Re: [PATCH] drm/i915: Read ilk FDI PLL frequency once during initialisation

[Ville Syrjälä]

On Sun, Nov 05, 2017 at 01:49:05PM +0000, Chris Wilson wrote:
> During intel_atomic_check(), we do not take the intel_runtime_pm_get()
> wakeref and so should do the atomic modeset precalculations without
> referring to the HW. However, on Ironlake we see
> 
> <7>[   23.487557] [drm:intel_atomic_check [i915]] [CONNECTOR:47:VGA-1] checking for sink bpp constrains
> <7>[   23.487615] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
> <4>[   23.487621] RPM wakelock ref not held during HW access
> <4>[   23.487652] ------------[ cut here ]------------
> <4>[   23.487697] WARNING: CPU: 0 PID: 1343 at drivers/gpu/drm/i915/intel_drv.h:1813 gen5_read32+0x183/0x200 [i915]
> <4>[   23.487701] Modules linked in: snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic i915 intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me ptp mei pps_core prime_numbers
> <4>[   23.487784] CPU: 0 PID: 1343 Comm: debugfs_test Tainted: G        W       4.14.0-rc7-CI-Trybot_1378+ #1
> <4>[   23.487788] Hardware name: Hewlett-Packard HP Compaq 8100 Elite SFF PC/304Ah, BIOS 786H1 v01.13 07/14/2011
> <4>[   23.487793] task: ffff8801f90aa6c0 task.stack: ffffc900013ec000
> <4>[   23.487838] RIP: 0010:gen5_read32+0x183/0x200 [i915]
> <4>[   23.487842] RSP: 0018:ffffc900013efb58 EFLAGS: 00010292
> <4>[   23.487849] RAX: 000000000000002a RBX: ffff880205c00000 RCX: 0000000000000006
> <4>[   23.487854] RDX: 000000000000140a RSI: ffffffff81d0eb14 RDI: ffffffff81cc26f6
> <4>[   23.487857] RBP: ffffc900013efb80 R08: ffff8801f90aaff8 R09: 0000000000000000
> <4>[   23.487861] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001
> <4>[   23.487865] R13: 0000000000046000 R14: ffff88020ffaba78 R15: ffff88020b109bf8
> <4>[   23.487870] FS:  00007f53b5e40a40(0000) GS:ffff88021bc00000(0000) knlGS:0000000000000000
> <4>[   23.487874] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> <4>[   23.487878] CR2: 000055e41900c0e8 CR3: 00000001fa0d6005 CR4: 00000000000206f0
> <4>[   23.487882] Call Trace:
> <4>[   23.487931]  intel_atomic_check+0x745/0x1290 [i915]
> <4>[   23.487948]  drm_atomic_check_only+0x459/0x560
> <4>[   23.487956]  ? drm_atomic_set_crtc_for_connector+0xc9/0x100
> <4>[   23.488025]  drm_atomic_commit+0x18/0x50
> <4>[   23.488035]  restore_fbdev_mode_atomic+0x190/0x1f0
> <4>[   23.488059]  restore_fbdev_mode+0x32/0x120
> <4>[   23.488072]  drm_fb_helper_restore_fbdev_mode_unlocked+0x50/0xa0
> <4>[   23.488139]  intel_fbdev_restore_mode+0x34/0x90 [i915]
> <4>[   23.488194]  i915_driver_lastclose+0xe/0x10 [i915]
> <4>[   23.488208]  drm_lastclose+0x39/0xf0
> <4>[   23.488219]  drm_release+0x30c/0x3c0
> <4>[   23.488236]  __fput+0xb9/0x200
> <4>[   23.488252]  ____fput+0xe/0x10
> <4>[   23.488264]  task_work_run+0x89/0xc0
> <4>[   23.488278]  exit_to_usermode_loop+0x83/0x90
> <4>[   23.488290]  syscall_return_slowpath+0xd0/0x110
> <4>[   23.488304]  entry_SYSCALL_64_fastpath+0xaf/0xb1
> <4>[   23.488312] RIP: 0033:0x7f53b4317560
> <4>[   23.488320] RSP: 002b:00007ffca7e70748 EFLAGS: 00000246 ORIG_RAX: 0000000000000003
> <4>[   23.488333] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 00007f53b4317560
> <4>[   23.488340] RDX: 0000000000000005 RSI: 00007ffca7e70640 RDI: 0000000000000004
> <4>[   23.488347] RBP: 000055e417783900 R08: 000055e418f9e290 R09: 0000000000000000
> <4>[   23.488356] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000001
> <4>[   23.488363] R13: 00007f53b4302c40 R14: 0000000000000000 R15: 0000000000000000
> <4>[   23.488384] Code: b5 f2 f2 e0 0f ff e9 c5 fe ff ff 80 3d 0e 4b 10 00 00 0f 85 c6 fe ff ff 48 c7 c7 30 73 29 a0 c6 05 fa 4a 10 00 01 e8 8e f2 f2 e0 <0f> ff e9 ac fe ff ff e8 51 9d f3 e0 85 c0 0f 85 01 ff ff ff 48
> <4>[   23.488780] ---[ end trace 6bc72ce7f1596190 ]---
> <7>[   23.488844] [drm:intel_atomic_check [i915]] checking fdi config on pipe A, lanes 1
> <7>[   23.488911] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
> 
> due to intel_fdi_link_freq() poking at FDI_PLL_BIOS_0. Avoid this by
> recording the fdi pll frequency during device initiailisation.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      | 1 +
>  drivers/gpu/drm/i915/intel_display.c | 7 ++++++-
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 72bb5b51035a..ed58eaf7b082 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2344,6 +2344,7 @@ struct drm_i915_private {
>  	unsigned int max_dotclk_freq;
>  	unsigned int rawclk_freq;
>  	unsigned int hpll_freq;
> +	unsigned int fdi_pll_freq;
>  	unsigned int czclk_freq;
>  
>  	struct {
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 737de251d0f8..768a4e75e535 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -220,7 +220,7 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
>  	if (HAS_DDI(dev_priv))
>  		return pipe_config->port_clock; /* SPLL */
>  	else if (IS_GEN5(dev_priv))
> -		return ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
> +		return dev_priv->fdi_pll_freq;
>  	else
>  		return 270000;
>  }
> @@ -14542,6 +14542,11 @@ int intel_modeset_init(struct drm_device *dev)
>  
>  	intel_shared_dpll_init(dev);
>  
> +	if (IS_GEN5(dev_priv)) {
> +		dev_priv->fdi_pll_freq = ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
> +		DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
> +	}

else if (SNB || IVB)
	->fdi_pll_freq = 270000; ?

and maybe extract the whole mess into intel_update_fdi_pll_freq() or some such
thing?

> +
>  	intel_update_czclk(dev_priv);
>  	intel_modeset_init_hw(dev);
>  
> -- 
> 2.15.0

-- 
Ville Syrjälä
Intel OTC
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[PATCH v2] drm/i915: Read ilk FDI PLL frequency once during initialisation

[Chris Wilson]

During intel_atomic_check(), we do not take the intel_runtime_pm_get()
wakeref and so should do the atomic modeset precalculations without
referring to the HW. However, on Ironlake we see

<7>[   23.487557] [drm:intel_atomic_check [i915]] [CONNECTOR:47:VGA-1] checking for sink bpp constrains
<7>[   23.487615] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
<4>[   23.487621] RPM wakelock ref not held during HW access
<4>[   23.487652] ------------[ cut here ]------------
<4>[   23.487697] WARNING: CPU: 0 PID: 1343 at drivers/gpu/drm/i915/intel_drv.h:1813 gen5_read32+0x183/0x200 [i915]
<4>[   23.487701] Modules linked in: snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic i915 intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me ptp mei pps_core prime_numbers
<4>[   23.487784] CPU: 0 PID: 1343 Comm: debugfs_test Tainted: G        W       4.14.0-rc7-CI-Trybot_1378+ #1
<4>[   23.487788] Hardware name: Hewlett-Packard HP Compaq 8100 Elite SFF PC/304Ah, BIOS 786H1 v01.13 07/14/2011
<4>[   23.487793] task: ffff8801f90aa6c0 task.stack: ffffc900013ec000
<4>[   23.487838] RIP: 0010:gen5_read32+0x183/0x200 [i915]
<4>[   23.487842] RSP: 0018:ffffc900013efb58 EFLAGS: 00010292
<4>[   23.487849] RAX: 000000000000002a RBX: ffff880205c00000 RCX: 0000000000000006
<4>[   23.487854] RDX: 000000000000140a RSI: ffffffff81d0eb14 RDI: ffffffff81cc26f6
<4>[   23.487857] RBP: ffffc900013efb80 R08: ffff8801f90aaff8 R09: 0000000000000000
<4>[   23.487861] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001
<4>[   23.487865] R13: 0000000000046000 R14: ffff88020ffaba78 R15: ffff88020b109bf8
<4>[   23.487870] FS:  00007f53b5e40a40(0000) GS:ffff88021bc00000(0000) knlGS:0000000000000000
<4>[   23.487874] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4>[   23.487878] CR2: 000055e41900c0e8 CR3: 00000001fa0d6005 CR4: 00000000000206f0
<4>[   23.487882] Call Trace:
<4>[   23.487931]  intel_atomic_check+0x745/0x1290 [i915]
<4>[   23.487948]  drm_atomic_check_only+0x459/0x560
<4>[   23.487956]  ? drm_atomic_set_crtc_for_connector+0xc9/0x100
<4>[   23.488025]  drm_atomic_commit+0x18/0x50
<4>[   23.488035]  restore_fbdev_mode_atomic+0x190/0x1f0
<4>[   23.488059]  restore_fbdev_mode+0x32/0x120
<4>[   23.488072]  drm_fb_helper_restore_fbdev_mode_unlocked+0x50/0xa0
<4>[   23.488139]  intel_fbdev_restore_mode+0x34/0x90 [i915]
<4>[   23.488194]  i915_driver_lastclose+0xe/0x10 [i915]
<4>[   23.488208]  drm_lastclose+0x39/0xf0
<4>[   23.488219]  drm_release+0x30c/0x3c0
<4>[   23.488236]  __fput+0xb9/0x200
<4>[   23.488252]  ____fput+0xe/0x10
<4>[   23.488264]  task_work_run+0x89/0xc0
<4>[   23.488278]  exit_to_usermode_loop+0x83/0x90
<4>[   23.488290]  syscall_return_slowpath+0xd0/0x110
<4>[   23.488304]  entry_SYSCALL_64_fastpath+0xaf/0xb1
<4>[   23.488312] RIP: 0033:0x7f53b4317560
<4>[   23.488320] RSP: 002b:00007ffca7e70748 EFLAGS: 00000246 ORIG_RAX: 0000000000000003
<4>[   23.488333] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 00007f53b4317560
<4>[   23.488340] RDX: 0000000000000005 RSI: 00007ffca7e70640 RDI: 0000000000000004
<4>[   23.488347] RBP: 000055e417783900 R08: 000055e418f9e290 R09: 0000000000000000
<4>[   23.488356] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000001
<4>[   23.488363] R13: 00007f53b4302c40 R14: 0000000000000000 R15: 0000000000000000
<4>[   23.488384] Code: b5 f2 f2 e0 0f ff e9 c5 fe ff ff 80 3d 0e 4b 10 00 00 0f 85 c6 fe ff ff 48 c7 c7 30 73 29 a0 c6 05 fa 4a 10 00 01 e8 8e f2 f2 e0 <0f> ff e9 ac fe ff ff e8 51 9d f3 e0 85 c0 0f 85 01 ff ff ff 48
<4>[   23.488780] ---[ end trace 6bc72ce7f1596190 ]---
<7>[   23.488844] [drm:intel_atomic_check [i915]] checking fdi config on pipe A, lanes 1
<7>[   23.488911] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0

due to intel_fdi_link_freq() poking at FDI_PLL_BIOS_0. Avoid this by
recording the fdi pll frequency during device initiailisation.

v2: Also extract the static FDI PLL frequencies for Sandybridge and
Ivybridge.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++++---
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fe93115c4caa..5e6938d0a903 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2349,6 +2349,7 @@ struct drm_i915_private {
 	unsigned int max_dotclk_freq;
 	unsigned int rawclk_freq;
 	unsigned int hpll_freq;
+	unsigned int fdi_pll_freq;
 	unsigned int czclk_freq;
 
 	struct {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 737de251d0f8..9331c62dcc7d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -219,10 +219,8 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
 {
 	if (HAS_DDI(dev_priv))
 		return pipe_config->port_clock; /* SPLL */
-	else if (IS_GEN5(dev_priv))
-		return ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
 	else
-		return 270000;
+		return dev_priv->fdi_pll_freq;
 }
 
 static const struct intel_limit intel_limits_i8xx_dac = {
@@ -14454,6 +14452,22 @@ static void sanitize_watermarks(struct drm_device *dev)
 	drm_modeset_acquire_fini(&ctx);
 }
 
+static void intel_update_fdi_ppl_freq(struct drm_i915_private *dev_priv)
+{
+	if (IS_GEN5(dev_priv)) {
+		u32 fdi_pll_clk =
+			I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
+
+		dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
+	} else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
+		dev_priv->fdi_pll_freq = 270000;
+	} else {
+		return;
+	}
+
+	DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
+}
+
 int intel_modeset_init(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
@@ -14541,6 +14555,7 @@ int intel_modeset_init(struct drm_device *dev)
 	}
 
 	intel_shared_dpll_init(dev);
+	intel_update_fdi_ppl_freq(dev_priv);
 
 	intel_update_czclk(dev_priv);
 	intel_modeset_init_hw(dev);
-- 
2.15.0

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Re: [PATCH v2] drm/i915: Read ilk FDI PLL frequency once during initialisation

[Maarten Lankhorst]

Op 07-11-17 om 22:47 schreef Chris Wilson:
> During intel_atomic_check(), we do not take the intel_runtime_pm_get()
> wakeref and so should do the atomic modeset precalculations without
> referring to the HW. However, on Ironlake we see
>
> <7>[   23.487557] [drm:intel_atomic_check [i915]] [CONNECTOR:47:VGA-1] checking for sink bpp constrains
> <7>[   23.487615] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
> <4>[   23.487621] RPM wakelock ref not held during HW access
> <4>[   23.487652] ------------[ cut here ]------------
> <4>[   23.487697] WARNING: CPU: 0 PID: 1343 at drivers/gpu/drm/i915/intel_drv.h:1813 gen5_read32+0x183/0x200 [i915]
> <4>[   23.487701] Modules linked in: snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic i915 intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me ptp mei pps_core prime_numbers
> <4>[   23.487784] CPU: 0 PID: 1343 Comm: debugfs_test Tainted: G        W       4.14.0-rc7-CI-Trybot_1378+ #1
> <4>[   23.487788] Hardware name: Hewlett-Packard HP Compaq 8100 Elite SFF PC/304Ah, BIOS 786H1 v01.13 07/14/2011
> <4>[   23.487793] task: ffff8801f90aa6c0 task.stack: ffffc900013ec000
> <4>[   23.487838] RIP: 0010:gen5_read32+0x183/0x200 [i915]
> <4>[   23.487842] RSP: 0018:ffffc900013efb58 EFLAGS: 00010292
> <4>[   23.487849] RAX: 000000000000002a RBX: ffff880205c00000 RCX: 0000000000000006
> <4>[   23.487854] RDX: 000000000000140a RSI: ffffffff81d0eb14 RDI: ffffffff81cc26f6
> <4>[   23.487857] RBP: ffffc900013efb80 R08: ffff8801f90aaff8 R09: 0000000000000000
> <4>[   23.487861] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001
> <4>[   23.487865] R13: 0000000000046000 R14: ffff88020ffaba78 R15: ffff88020b109bf8
> <4>[   23.487870] FS:  00007f53b5e40a40(0000) GS:ffff88021bc00000(0000) knlGS:0000000000000000
> <4>[   23.487874] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> <4>[   23.487878] CR2: 000055e41900c0e8 CR3: 00000001fa0d6005 CR4: 00000000000206f0
> <4>[   23.487882] Call Trace:
> <4>[   23.487931]  intel_atomic_check+0x745/0x1290 [i915]
> <4>[   23.487948]  drm_atomic_check_only+0x459/0x560
> <4>[   23.487956]  ? drm_atomic_set_crtc_for_connector+0xc9/0x100
> <4>[   23.488025]  drm_atomic_commit+0x18/0x50
> <4>[   23.488035]  restore_fbdev_mode_atomic+0x190/0x1f0
> <4>[   23.488059]  restore_fbdev_mode+0x32/0x120
> <4>[   23.488072]  drm_fb_helper_restore_fbdev_mode_unlocked+0x50/0xa0
> <4>[   23.488139]  intel_fbdev_restore_mode+0x34/0x90 [i915]
> <4>[   23.488194]  i915_driver_lastclose+0xe/0x10 [i915]
> <4>[   23.488208]  drm_lastclose+0x39/0xf0
> <4>[   23.488219]  drm_release+0x30c/0x3c0
> <4>[   23.488236]  __fput+0xb9/0x200
> <4>[   23.488252]  ____fput+0xe/0x10
> <4>[   23.488264]  task_work_run+0x89/0xc0
> <4>[   23.488278]  exit_to_usermode_loop+0x83/0x90
> <4>[   23.488290]  syscall_return_slowpath+0xd0/0x110
> <4>[   23.488304]  entry_SYSCALL_64_fastpath+0xaf/0xb1
> <4>[   23.488312] RIP: 0033:0x7f53b4317560
> <4>[   23.488320] RSP: 002b:00007ffca7e70748 EFLAGS: 00000246 ORIG_RAX: 0000000000000003
> <4>[   23.488333] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 00007f53b4317560
> <4>[   23.488340] RDX: 0000000000000005 RSI: 00007ffca7e70640 RDI: 0000000000000004
> <4>[   23.488347] RBP: 000055e417783900 R08: 000055e418f9e290 R09: 0000000000000000
> <4>[   23.488356] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000001
> <4>[   23.488363] R13: 00007f53b4302c40 R14: 0000000000000000 R15: 0000000000000000
> <4>[   23.488384] Code: b5 f2 f2 e0 0f ff e9 c5 fe ff ff 80 3d 0e 4b 10 00 00 0f 85 c6 fe ff ff 48 c7 c7 30 73 29 a0 c6 05 fa 4a 10 00 01 e8 8e f2 f2 e0 <0f> ff e9 ac fe ff ff e8 51 9d f3 e0 85 c0 0f 85 01 ff ff ff 48
> <4>[   23.488780] ---[ end trace 6bc72ce7f1596190 ]---
> <7>[   23.488844] [drm:intel_atomic_check [i915]] checking fdi config on pipe A, lanes 1
> <7>[   23.488911] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>
> due to intel_fdi_link_freq() poking at FDI_PLL_BIOS_0. Avoid this by
> recording the fdi pll frequency during device initiailisation.
>
> v2: Also extract the static FDI PLL frequencies for Sandybridge and
> Ivybridge.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      |  1 +
>  drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++++---
>  2 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index fe93115c4caa..5e6938d0a903 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2349,6 +2349,7 @@ struct drm_i915_private {
>  	unsigned int max_dotclk_freq;
>  	unsigned int rawclk_freq;
>  	unsigned int hpll_freq;
> +	unsigned int fdi_pll_freq;
>  	unsigned int czclk_freq;
>  
>  	struct {
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 737de251d0f8..9331c62dcc7d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -219,10 +219,8 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
>  {
>  	if (HAS_DDI(dev_priv))
>  		return pipe_config->port_clock; /* SPLL */
> -	else if (IS_GEN5(dev_priv))
> -		return ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
>  	else
> -		return 270000;
> +		return dev_priv->fdi_pll_freq;
>  }
>  
>  static const struct intel_limit intel_limits_i8xx_dac = {
> @@ -14454,6 +14452,22 @@ static void sanitize_watermarks(struct drm_device *dev)
>  	drm_modeset_acquire_fini(&ctx);
>  }
>  
> +static void intel_update_fdi_ppl_freq(struct drm_i915_private *dev_priv)
> +{
> +	if (IS_GEN5(dev_priv)) {
> +		u32 fdi_pll_clk =
> +			I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
> +
> +		dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
> +	} else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
> +		dev_priv->fdi_pll_freq = 270000;
> +	} else {
> +		return;
> +	}
> +
> +	DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
> +}
> +
>  int intel_modeset_init(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -14541,6 +14555,7 @@ int intel_modeset_init(struct drm_device *dev)
>  	}
>  
>  	intel_shared_dpll_init(dev);
> +	intel_update_fdi_ppl_freq(dev_priv);
>  
>  	intel_update_czclk(dev_priv);
>  	intel_modeset_init_hw(dev);

Is there any testcase that hits this? Would be nice to prevent future occurences, since there are so many potential places we hit this. But yeah atomic_check needs to be careful about mmio access during atomic_check().

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

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Re: [PATCH v2] drm/i915: Read ilk FDI PLL frequency once during initialisation

[Chris Wilson]

Quoting Maarten Lankhorst (2017-11-08 07:47:32)
> Op 07-11-17 om 22:47 schreef Chris Wilson:
> > During intel_atomic_check(), we do not take the intel_runtime_pm_get()
> > wakeref and so should do the atomic modeset precalculations without
> > referring to the HW. However, on Ironlake we see
> >
> > <7>[   23.487557] [drm:intel_atomic_check [i915]] [CONNECTOR:47:VGA-1] checking for sink bpp constrains
> > <7>[   23.487615] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
> > <4>[   23.487621] RPM wakelock ref not held during HW access
> > <4>[   23.487652] ------------[ cut here ]------------
> > <4>[   23.487697] WARNING: CPU: 0 PID: 1343 at drivers/gpu/drm/i915/intel_drv.h:1813 gen5_read32+0x183/0x200 [i915]
> > <4>[   23.487701] Modules linked in: snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic i915 intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me ptp mei pps_core prime_numbers
> > <4>[   23.487784] CPU: 0 PID: 1343 Comm: debugfs_test Tainted: G        W       4.14.0-rc7-CI-Trybot_1378+ #1
> > <4>[   23.487788] Hardware name: Hewlett-Packard HP Compaq 8100 Elite SFF PC/304Ah, BIOS 786H1 v01.13 07/14/2011
> > <4>[   23.487793] task: ffff8801f90aa6c0 task.stack: ffffc900013ec000
> > <4>[   23.487838] RIP: 0010:gen5_read32+0x183/0x200 [i915]
> > <4>[   23.487842] RSP: 0018:ffffc900013efb58 EFLAGS: 00010292
> > <4>[   23.487849] RAX: 000000000000002a RBX: ffff880205c00000 RCX: 0000000000000006
> > <4>[   23.487854] RDX: 000000000000140a RSI: ffffffff81d0eb14 RDI: ffffffff81cc26f6
> > <4>[   23.487857] RBP: ffffc900013efb80 R08: ffff8801f90aaff8 R09: 0000000000000000
> > <4>[   23.487861] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001
> > <4>[   23.487865] R13: 0000000000046000 R14: ffff88020ffaba78 R15: ffff88020b109bf8
> > <4>[   23.487870] FS:  00007f53b5e40a40(0000) GS:ffff88021bc00000(0000) knlGS:0000000000000000
> > <4>[   23.487874] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> > <4>[   23.487878] CR2: 000055e41900c0e8 CR3: 00000001fa0d6005 CR4: 00000000000206f0
> > <4>[   23.487882] Call Trace:
> > <4>[   23.487931]  intel_atomic_check+0x745/0x1290 [i915]
> > <4>[   23.487948]  drm_atomic_check_only+0x459/0x560
> > <4>[   23.487956]  ? drm_atomic_set_crtc_for_connector+0xc9/0x100
> > <4>[   23.488025]  drm_atomic_commit+0x18/0x50
> > <4>[   23.488035]  restore_fbdev_mode_atomic+0x190/0x1f0
> > <4>[   23.488059]  restore_fbdev_mode+0x32/0x120
> > <4>[   23.488072]  drm_fb_helper_restore_fbdev_mode_unlocked+0x50/0xa0
> > <4>[   23.488139]  intel_fbdev_restore_mode+0x34/0x90 [i915]
> > <4>[   23.488194]  i915_driver_lastclose+0xe/0x10 [i915]
> > <4>[   23.488208]  drm_lastclose+0x39/0xf0
> > <4>[   23.488219]  drm_release+0x30c/0x3c0
> > <4>[   23.488236]  __fput+0xb9/0x200
> > <4>[   23.488252]  ____fput+0xe/0x10
> > <4>[   23.488264]  task_work_run+0x89/0xc0
> > <4>[   23.488278]  exit_to_usermode_loop+0x83/0x90
> > <4>[   23.488290]  syscall_return_slowpath+0xd0/0x110
> > <4>[   23.488304]  entry_SYSCALL_64_fastpath+0xaf/0xb1
> > <4>[   23.488312] RIP: 0033:0x7f53b4317560
> > <4>[   23.488320] RSP: 002b:00007ffca7e70748 EFLAGS: 00000246 ORIG_RAX: 0000000000000003
> > <4>[   23.488333] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 00007f53b4317560
> > <4>[   23.488340] RDX: 0000000000000005 RSI: 00007ffca7e70640 RDI: 0000000000000004
> > <4>[   23.488347] RBP: 000055e417783900 R08: 000055e418f9e290 R09: 0000000000000000
> > <4>[   23.488356] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000001
> > <4>[   23.488363] R13: 00007f53b4302c40 R14: 0000000000000000 R15: 0000000000000000
> > <4>[   23.488384] Code: b5 f2 f2 e0 0f ff e9 c5 fe ff ff 80 3d 0e 4b 10 00 00 0f 85 c6 fe ff ff 48 c7 c7 30 73 29 a0 c6 05 fa 4a 10 00 01 e8 8e f2 f2 e0 <0f> ff e9 ac fe ff ff e8 51 9d f3 e0 85 c0 0f 85 01 ff ff ff 48
> > <4>[   23.488780] ---[ end trace 6bc72ce7f1596190 ]---
> > <7>[   23.488844] [drm:intel_atomic_check [i915]] checking fdi config on pipe A, lanes 1
> > <7>[   23.488911] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
> >
> > due to intel_fdi_link_freq() poking at FDI_PLL_BIOS_0. Avoid this by
> > recording the fdi pll frequency during device initiailisation.
> >
> > v2: Also extract the static FDI PLL frequencies for Sandybridge and
> > Ivybridge.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h      |  1 +
> >  drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++++---
> >  2 files changed, 19 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index fe93115c4caa..5e6938d0a903 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2349,6 +2349,7 @@ struct drm_i915_private {
> >       unsigned int max_dotclk_freq;
> >       unsigned int rawclk_freq;
> >       unsigned int hpll_freq;
> > +     unsigned int fdi_pll_freq;
> >       unsigned int czclk_freq;
> >  
> >       struct {
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 737de251d0f8..9331c62dcc7d 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -219,10 +219,8 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
> >  {
> >       if (HAS_DDI(dev_priv))
> >               return pipe_config->port_clock; /* SPLL */
> > -     else if (IS_GEN5(dev_priv))
> > -             return ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
> >       else
> > -             return 270000;
> > +             return dev_priv->fdi_pll_freq;
> >  }
> >  
> >  static const struct intel_limit intel_limits_i8xx_dac = {
> > @@ -14454,6 +14452,22 @@ static void sanitize_watermarks(struct drm_device *dev)
> >       drm_modeset_acquire_fini(&ctx);
> >  }
> >  
> > +static void intel_update_fdi_ppl_freq(struct drm_i915_private *dev_priv)
> > +{
> > +     if (IS_GEN5(dev_priv)) {
> > +             u32 fdi_pll_clk =
> > +                     I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
> > +
> > +             dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
> > +     } else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
> > +             dev_priv->fdi_pll_freq = 270000;
> > +     } else {
> > +             return;
> > +     }
> > +
> > +     DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
> > +}
> > +
> >  int intel_modeset_init(struct drm_device *dev)
> >  {
> >       struct drm_i915_private *dev_priv = to_i915(dev);
> > @@ -14541,6 +14555,7 @@ int intel_modeset_init(struct drm_device *dev)
> >       }
> >  
> >       intel_shared_dpll_init(dev);
> > +     intel_update_fdi_ppl_freq(dev_priv);
> >  
> >       intel_update_czclk(dev_priv);
> >       intel_modeset_init_hw(dev);
> 
> Is there any testcase that hits this? Would be nice to prevent future occurences, since there are so many potential places we hit this. But yeah atomic_check needs to be careful about mmio access during atomic_check().

CI caught it in debugfs_test/read_all (or whatever that first is called).
All it takes is for us to remove the early multi-second rpm wakeref we hold
to expose it. After that I'm not sure why we don't see it more often
during igt; my guess is that the 100ms wakeref from gem_quiescent_gpu()
is hiding a lot.
-Chris
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✓ Fi.CI.BAT: success for drm/i915: Read ilk FDI PLL frequency once during initialisation (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Read ilk FDI PLL frequency once during initialisation (rev2)
URL   : https://patchwork.freedesktop.org/series/33210/
State : success

== Summary ==

Series 33210v2 drm/i915: Read ilk FDI PLL frequency once during initialisation
https://patchwork.freedesktop.org/api/1.0/series/33210/revisions/2/mbox/

Test kms_flip:
        Subgroup basic-plain-flip:
                incomplete -> PASS       (fi-cnl-y) fdo#103339

fdo#103339 https://bugs.freedesktop.org/show_bug.cgi?id=103339

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:444s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:453s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:378s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:536s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:275s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:503s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:501s
fi-byt-j1900     total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  time:493s
fi-byt-n2820     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:484s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:554s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:429s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:263s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:539s
fi-glk-dsi       total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  time:490s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:430s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:430s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:425s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:473s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:461s
fi-kbl-7500u     total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  time:483s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:473s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:534s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:566s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:461s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:543s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:563s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:513s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:497s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:459s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:556s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:427s

748f2c6b4046b23a623b4af3799563ef3110bb0d drm-tip: 2017y-11m-08d-07h-50m-13s UTC integration manifest
0289a19e1da1 drm/i915: Read ilk FDI PLL frequency once during initialisation

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7003/
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✓ Fi.CI.IGT: success for drm/i915: Read ilk FDI PLL frequency once during initialisation (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Read ilk FDI PLL frequency once during initialisation (rev2)
URL   : https://patchwork.freedesktop.org/series/33210/
State : success

== Summary ==

shard-hsw        total:2540 pass:1432 dwarn:1   dfail:0   fail:10  skip:1097 time:9230s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7003/shards.html
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Re: [PATCH v2] drm/i915: Read ilk FDI PLL frequency once during initialisation

[Ville Syrjälä]

On Tue, Nov 07, 2017 at 09:47:13PM +0000, Chris Wilson wrote:
> During intel_atomic_check(), we do not take the intel_runtime_pm_get()
> wakeref and so should do the atomic modeset precalculations without
> referring to the HW. However, on Ironlake we see
> 
> <7>[   23.487557] [drm:intel_atomic_check [i915]] [CONNECTOR:47:VGA-1] checking for sink bpp constrains
> <7>[   23.487615] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
> <4>[   23.487621] RPM wakelock ref not held during HW access
> <4>[   23.487652] ------------[ cut here ]------------
> <4>[   23.487697] WARNING: CPU: 0 PID: 1343 at drivers/gpu/drm/i915/intel_drv.h:1813 gen5_read32+0x183/0x200 [i915]
> <4>[   23.487701] Modules linked in: snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic i915 intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me ptp mei pps_core prime_numbers
> <4>[   23.487784] CPU: 0 PID: 1343 Comm: debugfs_test Tainted: G        W       4.14.0-rc7-CI-Trybot_1378+ #1
> <4>[   23.487788] Hardware name: Hewlett-Packard HP Compaq 8100 Elite SFF PC/304Ah, BIOS 786H1 v01.13 07/14/2011
> <4>[   23.487793] task: ffff8801f90aa6c0 task.stack: ffffc900013ec000
> <4>[   23.487838] RIP: 0010:gen5_read32+0x183/0x200 [i915]
> <4>[   23.487842] RSP: 0018:ffffc900013efb58 EFLAGS: 00010292
> <4>[   23.487849] RAX: 000000000000002a RBX: ffff880205c00000 RCX: 0000000000000006
> <4>[   23.487854] RDX: 000000000000140a RSI: ffffffff81d0eb14 RDI: ffffffff81cc26f6
> <4>[   23.487857] RBP: ffffc900013efb80 R08: ffff8801f90aaff8 R09: 0000000000000000
> <4>[   23.487861] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001
> <4>[   23.487865] R13: 0000000000046000 R14: ffff88020ffaba78 R15: ffff88020b109bf8
> <4>[   23.487870] FS:  00007f53b5e40a40(0000) GS:ffff88021bc00000(0000) knlGS:0000000000000000
> <4>[   23.487874] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> <4>[   23.487878] CR2: 000055e41900c0e8 CR3: 00000001fa0d6005 CR4: 00000000000206f0
> <4>[   23.487882] Call Trace:
> <4>[   23.487931]  intel_atomic_check+0x745/0x1290 [i915]
> <4>[   23.487948]  drm_atomic_check_only+0x459/0x560
> <4>[   23.487956]  ? drm_atomic_set_crtc_for_connector+0xc9/0x100
> <4>[   23.488025]  drm_atomic_commit+0x18/0x50
> <4>[   23.488035]  restore_fbdev_mode_atomic+0x190/0x1f0
> <4>[   23.488059]  restore_fbdev_mode+0x32/0x120
> <4>[   23.488072]  drm_fb_helper_restore_fbdev_mode_unlocked+0x50/0xa0
> <4>[   23.488139]  intel_fbdev_restore_mode+0x34/0x90 [i915]
> <4>[   23.488194]  i915_driver_lastclose+0xe/0x10 [i915]
> <4>[   23.488208]  drm_lastclose+0x39/0xf0
> <4>[   23.488219]  drm_release+0x30c/0x3c0
> <4>[   23.488236]  __fput+0xb9/0x200
> <4>[   23.488252]  ____fput+0xe/0x10
> <4>[   23.488264]  task_work_run+0x89/0xc0
> <4>[   23.488278]  exit_to_usermode_loop+0x83/0x90
> <4>[   23.488290]  syscall_return_slowpath+0xd0/0x110
> <4>[   23.488304]  entry_SYSCALL_64_fastpath+0xaf/0xb1
> <4>[   23.488312] RIP: 0033:0x7f53b4317560
> <4>[   23.488320] RSP: 002b:00007ffca7e70748 EFLAGS: 00000246 ORIG_RAX: 0000000000000003
> <4>[   23.488333] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 00007f53b4317560
> <4>[   23.488340] RDX: 0000000000000005 RSI: 00007ffca7e70640 RDI: 0000000000000004
> <4>[   23.488347] RBP: 000055e417783900 R08: 000055e418f9e290 R09: 0000000000000000
> <4>[   23.488356] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000001
> <4>[   23.488363] R13: 00007f53b4302c40 R14: 0000000000000000 R15: 0000000000000000
> <4>[   23.488384] Code: b5 f2 f2 e0 0f ff e9 c5 fe ff ff 80 3d 0e 4b 10 00 00 0f 85 c6 fe ff ff 48 c7 c7 30 73 29 a0 c6 05 fa 4a 10 00 01 e8 8e f2 f2 e0 <0f> ff e9 ac fe ff ff e8 51 9d f3 e0 85 c0 0f 85 01 ff ff ff 48
> <4>[   23.488780] ---[ end trace 6bc72ce7f1596190 ]---
> <7>[   23.488844] [drm:intel_atomic_check [i915]] checking fdi config on pipe A, lanes 1
> <7>[   23.488911] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
> 
> due to intel_fdi_link_freq() poking at FDI_PLL_BIOS_0. Avoid this by
> recording the fdi pll frequency during device initiailisation.
> 
> v2: Also extract the static FDI PLL frequencies for Sandybridge and
> Ivybridge.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      |  1 +
>  drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++++---
>  2 files changed, 19 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index fe93115c4caa..5e6938d0a903 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2349,6 +2349,7 @@ struct drm_i915_private {
>  	unsigned int max_dotclk_freq;
>  	unsigned int rawclk_freq;
>  	unsigned int hpll_freq;
> +	unsigned int fdi_pll_freq;
>  	unsigned int czclk_freq;
>  
>  	struct {
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 737de251d0f8..9331c62dcc7d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -219,10 +219,8 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
>  {
>  	if (HAS_DDI(dev_priv))
>  		return pipe_config->port_clock; /* SPLL */
> -	else if (IS_GEN5(dev_priv))
> -		return ((I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK) + 2) * 10000;
>  	else
> -		return 270000;
> +		return dev_priv->fdi_pll_freq;
>  }
>  
>  static const struct intel_limit intel_limits_i8xx_dac = {
> @@ -14454,6 +14452,22 @@ static void sanitize_watermarks(struct drm_device *dev)
>  	drm_modeset_acquire_fini(&ctx);
>  }
>  
> +static void intel_update_fdi_ppl_freq(struct drm_i915_private *dev_priv)
                                ^^^
s/ppl/pll/

With that
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +{
> +	if (IS_GEN5(dev_priv)) {
> +		u32 fdi_pll_clk =
> +			I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
> +
> +		dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
> +	} else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
> +		dev_priv->fdi_pll_freq = 270000;
> +	} else {
> +		return;
> +	}
> +
> +	DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
> +}
> +
>  int intel_modeset_init(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -14541,6 +14555,7 @@ int intel_modeset_init(struct drm_device *dev)
>  	}
>  
>  	intel_shared_dpll_init(dev);
> +	intel_update_fdi_ppl_freq(dev_priv);
>  
>  	intel_update_czclk(dev_priv);
>  	intel_modeset_init_hw(dev);
> -- 
> 2.15.0

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH v2] drm/i915: Read ilk FDI PLL frequency once during initialisation

[Chris Wilson]

Quoting Ville Syrjälä (2017-11-08 11:22:47)
> On Tue, Nov 07, 2017 at 09:47:13PM +0000, Chris Wilson wrote:
> > During intel_atomic_check(), we do not take the intel_runtime_pm_get()
> > wakeref and so should do the atomic modeset precalculations without
> > referring to the HW. However, on Ironlake we see
...
> > +static void intel_update_fdi_ppl_freq(struct drm_i915_private *dev_priv)
>                                 ^^^
> s/ppl/pll/
> 
> With that
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Fixed up and applied, ta.
-Chris
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