All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Andrew F. Davis" <afd@ti.com>
To: "Liam Girdwood" <lgirdwood@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Benoît Cousson" <bcousson@baylibre.com>,
	"Tony Lindgren" <tony@atomide.com>
Cc: <alsa-devel@alsa-project.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, "Andrew F . Davis" <afd@ti.com>
Subject: [PATCH 03/17] ASoC: tlv320aic31xx: Fix GPIO1 register definition
Date: Wed, 8 Nov 2017 18:27:27 -0600	[thread overview]
Message-ID: <20171109002741.10897-4-afd@ti.com> (raw)
In-Reply-To: <20171109002741.10897-1-afd@ti.com>

GPIO1 control register is number 51, fix this here.

Fixes: bafcbfe429eb ("ASoC: tlv320aic31xx: Make the register values human readable")
Signed-off-by: Andrew F. Davis <afd@ti.com>
---
 sound/soc/codecs/tlv320aic31xx.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/tlv320aic31xx.h b/sound/soc/codecs/tlv320aic31xx.h
index db95eeae966b..4f126cd82add 100644
--- a/sound/soc/codecs/tlv320aic31xx.h
+++ b/sound/soc/codecs/tlv320aic31xx.h
@@ -82,7 +82,7 @@ struct aic31xx_pdata {
 #define AIC31XX_INTRADCFLAG2	AIC31XX_REG(0, 47) /* ADC Interrupt flags 2 */
 #define AIC31XX_INT1CTRL	AIC31XX_REG(0, 48) /* INT1 interrupt control */
 #define AIC31XX_INT2CTRL	AIC31XX_REG(0, 49) /* INT2 interrupt control */
-#define AIC31XX_GPIO1		AIC31XX_REG(0, 50) /* GPIO1 control */
+#define AIC31XX_GPIO1		AIC31XX_REG(0, 51) /* GPIO1 control */
 #define AIC31XX_DACPRB		AIC31XX_REG(0, 60)
 #define AIC31XX_ADCPRB		AIC31XX_REG(0, 61) /* ADC Instruction Set Register */
 #define AIC31XX_DACSETUP	AIC31XX_REG(0, 63) /* DAC channel setup register */
-- 
2.15.0

WARNING: multiple messages have this Message-ID (diff)
From: "Andrew F. Davis" <afd@ti.com>
To: "Liam Girdwood" <lgirdwood@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Benoît Cousson" <bcousson@baylibre.com>,
	"Tony Lindgren" <tony@atomide.com>
Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
	linux-kernel@vger.kernel.org, "Andrew F . Davis" <afd@ti.com>
Subject: [PATCH 03/17] ASoC: tlv320aic31xx: Fix GPIO1 register definition
Date: Wed, 8 Nov 2017 18:27:27 -0600	[thread overview]
Message-ID: <20171109002741.10897-4-afd@ti.com> (raw)
In-Reply-To: <20171109002741.10897-1-afd@ti.com>

GPIO1 control register is number 51, fix this here.

Fixes: bafcbfe429eb ("ASoC: tlv320aic31xx: Make the register values human readable")
Signed-off-by: Andrew F. Davis <afd@ti.com>
---
 sound/soc/codecs/tlv320aic31xx.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/tlv320aic31xx.h b/sound/soc/codecs/tlv320aic31xx.h
index db95eeae966b..4f126cd82add 100644
--- a/sound/soc/codecs/tlv320aic31xx.h
+++ b/sound/soc/codecs/tlv320aic31xx.h
@@ -82,7 +82,7 @@ struct aic31xx_pdata {
 #define AIC31XX_INTRADCFLAG2	AIC31XX_REG(0, 47) /* ADC Interrupt flags 2 */
 #define AIC31XX_INT1CTRL	AIC31XX_REG(0, 48) /* INT1 interrupt control */
 #define AIC31XX_INT2CTRL	AIC31XX_REG(0, 49) /* INT2 interrupt control */
-#define AIC31XX_GPIO1		AIC31XX_REG(0, 50) /* GPIO1 control */
+#define AIC31XX_GPIO1		AIC31XX_REG(0, 51) /* GPIO1 control */
 #define AIC31XX_DACPRB		AIC31XX_REG(0, 60)
 #define AIC31XX_ADCPRB		AIC31XX_REG(0, 61) /* ADC Instruction Set Register */
 #define AIC31XX_DACSETUP	AIC31XX_REG(0, 63) /* DAC channel setup register */
-- 
2.15.0

  parent reply	other threads:[~2017-11-09  0:27 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-09  0:27 [PATCH 00/17] Add Headphone Detection to TLV320AIC31xx Driver Andrew F. Davis
2017-11-09  0:27 ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 01/17] ASoC: tlv320aic31xx: General source formatting cleanup Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09 12:41   ` Mark Brown
2017-11-09 12:41     ` Mark Brown
2017-11-09 14:13     ` Andrew F. Davis
2017-11-09 14:13       ` Andrew F. Davis
2017-11-09 16:15       ` Mark Brown
2017-11-09 16:15         ` Mark Brown
2017-11-09  0:27 ` [PATCH 02/17] ASoC: tlv320aic31xx: Reformat header file using GENMASK and BIT macros Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` Andrew F. Davis [this message]
2017-11-09  0:27   ` [PATCH 03/17] ASoC: tlv320aic31xx: Fix GPIO1 register definition Andrew F. Davis
2017-11-09 12:45   ` Mark Brown
2017-11-09 12:45     ` Mark Brown
2017-11-09 14:32     ` Andrew F. Davis
2017-11-09 14:32       ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 04/17] ASoC: tlv320aic31xx: Merge init function into probe Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-12-01 13:43   ` Applied "ASoC: tlv320aic31xx: Merge init function into probe" to the asoc tree Mark Brown
2017-11-09  0:27 ` [PATCH 05/17] ASoC: tlv320aic31xx: Switch GPIO handling to use gpiod_* API Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-12-01 13:43   ` Applied "ASoC: tlv320aic31xx: Switch GPIO handling to use gpiod_* API" to the asoc tree Mark Brown
2017-11-09  0:27 ` [PATCH 06/17] ASoC: tlv320aic31xx: Remove platform data Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 07/17] ASoC: tlv320aic31xx: Add MICBIAS off setting Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-15 15:30   ` Rob Herring
2017-11-15 15:30     ` Rob Herring
2017-11-09  0:27 ` [PATCH 08/17] ASoC: tlv320aic31xx: Check clock and divider before division Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-12-01 13:43   ` Applied "ASoC: tlv320aic31xx: Check clock and divider before division" to the asoc tree Mark Brown
2017-11-09  0:27 ` [PATCH 09/17] ASoC: tlv320aic31xx: Add CODEC clock slave support Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 10/17] ASoC: tlv320aic31xx: Fix inverted BCLK handling Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 11/17] ASoC: tlv320aic31xx: Reset registers during probe Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 12/17] ASoC: tlv320aic31xx: Add short circuit detection support Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 13/17] ASoC: tlv320aic31xx: Add overflow " Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 14/17] ASoC: tlv320aic31xx: Add headphone/headset detection Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 15/17] ASoC: tlv320aic31xx: Add button press detection Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 16/17] NOT FOR MERGING: Add TLV320DAC3101 to BBB for testing Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis
2017-11-09  0:27 ` [PATCH 17/17] NOT FOR MERGING: Add demo jack detection policy " Andrew F. Davis
2017-11-09  0:27   ` Andrew F. Davis

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171109002741.10897-4-afd@ti.com \
    --to=afd@ti.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=bcousson@baylibre.com \
    --cc=broonie@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=lgirdwood@gmail.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=robh+dt@kernel.org \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.