* [CI 1/3] drm/i915/guc: Tidy ELSP port assignment
@ 2017-11-24 13:00 Chris Wilson
2017-11-24 13:00 ` [CI 2/3] drm/i915: Use exponential backoff for wait_for() Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Chris Wilson @ 2017-11-24 13:00 UTC (permalink / raw)
To: intel-gfx
Since we know that the port is empty, we do not need to extract the
count from the old request it and copy it over to the new request, or
attempt to unref the NULL old request pointer.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
---
drivers/gpu/drm/i915/intel_guc_submission.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index cbf5a96f5806..b619e591f8f1 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -718,12 +718,9 @@ static void guc_submit(struct intel_engine_cs *engine)
static void port_assign(struct execlist_port *port,
struct drm_i915_gem_request *rq)
{
- GEM_BUG_ON(rq == port_request(port));
+ GEM_BUG_ON(port_isset(port));
- if (port_isset(port))
- i915_gem_request_put(port_request(port));
-
- port_set(port, port_pack(i915_gem_request_get(rq), port_count(port)));
+ port_set(port, i915_gem_request_get(rq));
}
static void guc_dequeue(struct intel_engine_cs *engine)
--
2.15.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [CI 2/3] drm/i915: Use exponential backoff for wait_for() 2017-11-24 13:00 [CI 1/3] drm/i915/guc: Tidy ELSP port assignment Chris Wilson @ 2017-11-24 13:00 ` Chris Wilson 2017-11-24 13:00 ` [CI 3/3] HAX Enable GuC Submission for CI Chris Wilson ` (2 subsequent siblings) 3 siblings, 0 replies; 5+ messages in thread From: Chris Wilson @ 2017-11-24 13:00 UTC (permalink / raw) To: intel-gfx Instead of sleeping for a fixed 1ms (roughly, depending on timer slack), start with a small sleep and exponentially increase the sleep on each cycle. A good example of a beneficiary is the guc mmio communication channel. Typically we expect (and so spin) for 10us for a quick response, but this doesn't cover everything and so sometimes we fallback to the millisecond+ sleep. This incurs a significant delay in time-critical operations like preemption (igt/gem_exec_latency), which can be improved significantly by using a small sleep after the spin fails. We've made this suggestion many times, but had little experimental data to support adding the complexity. v2: Bump the minimum usleep to 10us on advice of Documentation/timers/timers-howto.txt (Tvrko) v3: Specify min, max range for usleep intervals -- some code may crucially depend upon and so want to specify the sleep pattern. References: 1758b90e38f5 ("drm/i915: Use a hybrid scheme for fast register waits") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: John Harrison <John.C.Harrison@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Reviewed-by: Michał Winiarski <michal.winiarski@intel.com> --- drivers/gpu/drm/i915/intel_drv.h | 11 +++++++---- drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 635a96fcd788..c00441a3d649 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -48,8 +48,9 @@ * having timed out, since the timeout could be due to preemption or similar and * we've never had a chance to check the condition before the timeout. */ -#define _wait_for(COND, US, W) ({ \ +#define _wait_for(COND, US, Wmin, Wmax) ({ \ unsigned long timeout__ = jiffies + usecs_to_jiffies(US) + 1; \ + long wait__ = (Wmin); /* recommended min for usleep is 10 us */ \ int ret__; \ might_sleep(); \ for (;;) { \ @@ -62,12 +63,14 @@ ret__ = -ETIMEDOUT; \ break; \ } \ - usleep_range((W), (W) * 2); \ + usleep_range(wait__, wait__ * 2); \ + if (wait__ < (Wmax)) \ + wait__ <<= 1; \ } \ ret__; \ }) -#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 1000) +#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) /* If CONFIG_PREEMPT_COUNT is disabled, in_atomic() always reports false. */ #if defined(CONFIG_DRM_I915_DEBUG) && defined(CONFIG_PREEMPT_COUNT) @@ -116,7 +119,7 @@ int ret__; \ BUILD_BUG_ON(!__builtin_constant_p(US)); \ if ((US) > 10) \ - ret__ = _wait_for((COND), (US), 10); \ + ret__ = _wait_for((COND), (US), 10, 10); \ else \ ret__ = _wait_for_atomic((COND), (US), 0); \ ret__; \ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 03d67d8ab647..a80c322c5b43 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -9294,7 +9294,7 @@ int skl_pcode_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request, ret = 0; goto out; } - ret = _wait_for(COND, timeout_base_ms * 1000, 10); + ret = _wait_for(COND, timeout_base_ms * 1000, 10, 10); if (!ret) goto out; -- 2.15.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [CI 3/3] HAX Enable GuC Submission for CI 2017-11-24 13:00 [CI 1/3] drm/i915/guc: Tidy ELSP port assignment Chris Wilson 2017-11-24 13:00 ` [CI 2/3] drm/i915: Use exponential backoff for wait_for() Chris Wilson @ 2017-11-24 13:00 ` Chris Wilson 2017-11-24 13:34 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment Patchwork 2017-11-24 16:16 ` ✗ Fi.CI.IGT: warning " Patchwork 3 siblings, 0 replies; 5+ messages in thread From: Chris Wilson @ 2017-11-24 13:00 UTC (permalink / raw) To: intel-gfx From: Michał Winiarski <michal.winiarski@intel.com> Also: Revert "drm/i915/guc: Assert that we switch between known ggtt->invalidate functions" This reverts commit 04f7b24eccdfae680a36e9825fe0d61dcd5ed528. --- drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++------ drivers/gpu/drm/i915/i915_params.h | 4 ++-- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 41a203e0c160..5e8614fd390b 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -3590,17 +3590,13 @@ int i915_ggtt_enable_hw(struct drm_i915_private *dev_priv) void i915_ggtt_enable_guc(struct drm_i915_private *i915) { - GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate); - i915->ggtt.invalidate = guc_ggtt_invalidate; } void i915_ggtt_disable_guc(struct drm_i915_private *i915) { - /* We should only be called after i915_ggtt_enable_guc() */ - GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate); - - i915->ggtt.invalidate = gen6_ggtt_invalidate; + if (i915->ggtt.invalidate == guc_ggtt_invalidate) + i915->ggtt.invalidate = gen6_ggtt_invalidate; } void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 8321bd86cba5..69ee2484c6bb 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -42,8 +42,8 @@ param(int, disable_power_well, -1) \ param(int, enable_ips, 1) \ param(int, invert_brightness, 0) \ - param(int, enable_guc_loading, 0) \ - param(int, enable_guc_submission, 0) \ + param(int, enable_guc_loading, 1) \ + param(int, enable_guc_submission, 1) \ param(int, guc_log_level, -1) \ param(char *, guc_firmware_path, NULL) \ param(char *, huc_firmware_path, NULL) \ -- 2.15.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment 2017-11-24 13:00 [CI 1/3] drm/i915/guc: Tidy ELSP port assignment Chris Wilson 2017-11-24 13:00 ` [CI 2/3] drm/i915: Use exponential backoff for wait_for() Chris Wilson 2017-11-24 13:00 ` [CI 3/3] HAX Enable GuC Submission for CI Chris Wilson @ 2017-11-24 13:34 ` Patchwork 2017-11-24 16:16 ` ✗ Fi.CI.IGT: warning " Patchwork 3 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2017-11-24 13:34 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment URL : https://patchwork.freedesktop.org/series/34360/ State : success == Summary == Series 34360v1 series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment https://patchwork.freedesktop.org/api/1.0/series/34360/revisions/1/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:443s fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:450s fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:381s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:531s fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:276s fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:507s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:512s fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:487s fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:484s fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:421s fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:267s fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:427s fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:432s fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:427s fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:482s fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:457s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:476s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:527s fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:464s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:535s fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:568s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:459s fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:536s fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:560s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:507s fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:499s fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:456s fi-snb-2520m total:246 pass:212 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:415s Blacklisted hosts: fi-cfl-s2 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:618s fi-glk-dsi total:218 pass:118 dwarn:0 dfail:1 fail:1 skip:97 79ca54cbfbc7aae4090d6ded6af6348f8654322d drm-tip: 2017y-11m-24d-12h-19m-52s UTC integration manifest e4c0cc4304f5 HAX Enable GuC Submission for CI 78cd90672985 drm/i915: Use exponential backoff for wait_for() d5b388e94d4f drm/i915/guc: Tidy ELSP port assignment == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7280/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.IGT: warning for series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment 2017-11-24 13:00 [CI 1/3] drm/i915/guc: Tidy ELSP port assignment Chris Wilson ` (2 preceding siblings ...) 2017-11-24 13:34 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment Patchwork @ 2017-11-24 16:16 ` Patchwork 3 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2017-11-24 16:16 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment URL : https://patchwork.freedesktop.org/series/34360/ State : warning == Summary == Test gem_busy: Subgroup close-race: pass -> FAIL (shard-snb) fdo#103829 Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render: pass -> FAIL (shard-snb) fdo#101623 +1 Test kms_flip: Subgroup modeset-vs-vblank-race-interruptible: fail -> PASS (shard-hsw) fdo#103060 Test kms_pipe_crc_basic: Subgroup hang-read-crc-pipe-a: pass -> SKIP (shard-hsw) Test drv_module_reload: Subgroup basic-reload: dmesg-warn -> PASS (shard-snb) fdo#102848 fdo#103829 https://bugs.freedesktop.org/show_bug.cgi?id=103829 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#102848 https://bugs.freedesktop.org/show_bug.cgi?id=102848 shard-hsw total:2667 pass:1534 dwarn:1 dfail:0 fail:10 skip:1122 time:9547s shard-snb total:2667 pass:1310 dwarn:1 dfail:0 fail:14 skip:1342 time:8121s Blacklisted hosts: shard-apl total:2667 pass:1661 dwarn:6 dfail:3 fail:42 skip:955 time:12403s shard-kbl total:2549 pass:1633 dwarn:16 dfail:12 fail:37 skip:849 time:10037s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7280/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-11-24 16:16 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-11-24 13:00 [CI 1/3] drm/i915/guc: Tidy ELSP port assignment Chris Wilson 2017-11-24 13:00 ` [CI 2/3] drm/i915: Use exponential backoff for wait_for() Chris Wilson 2017-11-24 13:00 ` [CI 3/3] HAX Enable GuC Submission for CI Chris Wilson 2017-11-24 13:34 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/guc: Tidy ELSP port assignment Patchwork 2017-11-24 16:16 ` ✗ Fi.CI.IGT: warning " Patchwork
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