* [PATCH v2 0/5] Add support for Amlogic GXL Based SBCs
@ 2017-11-22 13:25 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: linus-amlogic
This patchset aimed to add minimal support for the following Amlogic GXL SoC
based board:
- LibreTech-CC
- Khadas VIM
The initial support is composed of :
- Minimal boot support with serial, MMC, Ethernet and SDCard
- Updated DTS from Linux 4.13.8
Commands to generate a valid binary are provided in the board README.
A common Ethernet init function is introduced to avoid duplicating
the same hardware init code.
The P212 and Odroid-C2 board are also converted to this common function
by this patchset.
The following work will be pushed later on :
- Support for dynamic reading of DDR memory size from registers
- USB DWC3 Host Support with PHY support
Changes since v1:
- Add common ethernet init function
- Switch P212 and Odroid-C2 to use this ethernet init function
- Fix typos in READMEs
- Drop #define CONFIG_CONS_INDEX
Neil Armstrong (5):
ARM: arch-meson: add ethernet common init function
board: odroid-c2: use common ethernet init function
board: p212: use common ethernet init function
arm: Add LibreTech CC support based on Meson GXL family
arm: Add Khadas VIM support based on Meson GXL family
arch/arm/dts/Makefile | 4 +-
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137 +++++++++++++++++++++
arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
arch/arm/include/asm/arch-meson/eth.h | 15 +++
arch/arm/mach-meson/Kconfig | 18 +++
arch/arm/mach-meson/Makefile | 2 +-
arch/arm/mach-meson/eth.c | 53 ++++++++
board/amlogic/khadas-vim/Kconfig | 12 ++
board/amlogic/khadas-vim/MAINTAINERS | 6 +
board/amlogic/khadas-vim/Makefile | 8 ++
board/amlogic/khadas-vim/README | 96 +++++++++++++++
board/amlogic/khadas-vim/khadas-vim.c | 48 ++++++++
board/amlogic/libretech-cc/Kconfig | 12 ++
board/amlogic/libretech-cc/MAINTAINERS | 6 +
board/amlogic/libretech-cc/Makefile | 8 ++
board/amlogic/libretech-cc/README | 96 +++++++++++++++
board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
board/amlogic/odroid-c2/odroid-c2.c | 11 +-
board/amlogic/p212/p212.c | 14 +--
configs/khadas-vim_defconfig | 35 ++++++
configs/libretech-cc_defconfig | 35 ++++++
include/configs/khadas-vim.h | 21 ++++
include/configs/libretech-cc.h | 21 ++++
23 files changed, 858 insertions(+), 23 deletions(-)
create mode 100644 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
create mode 100644 arch/arm/include/asm/arch-meson/eth.h
create mode 100644 arch/arm/mach-meson/eth.c
create mode 100644 board/amlogic/khadas-vim/Kconfig
create mode 100644 board/amlogic/khadas-vim/MAINTAINERS
create mode 100644 board/amlogic/khadas-vim/Makefile
create mode 100644 board/amlogic/khadas-vim/README
create mode 100644 board/amlogic/khadas-vim/khadas-vim.c
create mode 100644 board/amlogic/libretech-cc/Kconfig
create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
create mode 100644 board/amlogic/libretech-cc/Makefile
create mode 100644 board/amlogic/libretech-cc/README
create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
create mode 100644 configs/khadas-vim_defconfig
create mode 100644 configs/libretech-cc_defconfig
create mode 100644 include/configs/khadas-vim.h
create mode 100644 include/configs/libretech-cc.h
--
2.7.4
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-22 13:25 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: u-boot
Introduce a generic common Ethernet Hardware init function
common to all Amlogic GX SoCs with support for the
Internal PHY enable for GXL SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
arch/arm/mach-meson/Makefile | 2 +-
arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
3 files changed, 69 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/include/asm/arch-meson/eth.h
create mode 100644 arch/arm/mach-meson/eth.c
diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
new file mode 100644
index 0000000..8ea8e10
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/eth.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MESON_ETH_H__
+#define __MESON_ETH_H__
+
+#include <phy.h>
+
+void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
+
+#endif /* __MESON_ETH_H__ */
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index bf49b8b..b4e8dde 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += board.o sm.o
+obj-y += board.o sm.o eth.o
diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
new file mode 100644
index 0000000..46ecb5e
--- /dev/null
+++ b/arch/arm/mach-meson/eth.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/eth.h>
+#include <phy.h>
+
+void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
+{
+ switch (mode) {
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ /* Set RGMII mode */
+ setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
+ GXBB_ETH_REG_0_TX_PHASE(1) |
+ GXBB_ETH_REG_0_TX_RATIO(4) |
+ GXBB_ETH_REG_0_PHY_CLK_EN |
+ GXBB_ETH_REG_0_CLK_EN);
+ break;
+
+ case PHY_INTERFACE_MODE_RMII:
+ /* Set RMII mode */
+ out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
+ GXBB_ETH_REG_0_CLK_EN);
+
+#ifdef CONFIG_MESON_GXL
+ if (use_internal_phy) {
+ /* Use Internal PHY */
+ out_le32(GXBB_ETH_REG_2, 0x10110181);
+ out_le32(GXBB_ETH_REG_3, 0xe40908ff);
+ }
+#endif
+
+ break;
+
+ default:
+ printf("Invalid Ethernet interface mode\n");
+ return;
+ }
+
+ /* Enable power and clock gate */
+ setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+ clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
@ 2017-11-22 13:25 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: linus-amlogic
Introduce a generic common Ethernet Hardware init function
common to all Amlogic GX SoCs with support for the
Internal PHY enable for GXL SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
arch/arm/mach-meson/Makefile | 2 +-
arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
3 files changed, 69 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/include/asm/arch-meson/eth.h
create mode 100644 arch/arm/mach-meson/eth.c
diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
new file mode 100644
index 0000000..8ea8e10
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/eth.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MESON_ETH_H__
+#define __MESON_ETH_H__
+
+#include <phy.h>
+
+void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
+
+#endif /* __MESON_ETH_H__ */
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index bf49b8b..b4e8dde 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += board.o sm.o
+obj-y += board.o sm.o eth.o
diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
new file mode 100644
index 0000000..46ecb5e
--- /dev/null
+++ b/arch/arm/mach-meson/eth.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/eth.h>
+#include <phy.h>
+
+void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
+{
+ switch (mode) {
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ /* Set RGMII mode */
+ setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
+ GXBB_ETH_REG_0_TX_PHASE(1) |
+ GXBB_ETH_REG_0_TX_RATIO(4) |
+ GXBB_ETH_REG_0_PHY_CLK_EN |
+ GXBB_ETH_REG_0_CLK_EN);
+ break;
+
+ case PHY_INTERFACE_MODE_RMII:
+ /* Set RMII mode */
+ out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
+ GXBB_ETH_REG_0_CLK_EN);
+
+#ifdef CONFIG_MESON_GXL
+ if (use_internal_phy) {
+ /* Use Internal PHY */
+ out_le32(GXBB_ETH_REG_2, 0x10110181);
+ out_le32(GXBB_ETH_REG_3, 0xe40908ff);
+ }
+#endif
+
+ break;
+
+ default:
+ printf("Invalid Ethernet interface mode\n");
+ return;
+ }
+
+ /* Enable power and clock gate */
+ setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+ clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-24 22:35 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: u-boot
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Introduce a generic common Ethernet Hardware init function
> common to all Amlogic GX SoCs with support for the
> Internal PHY enable for GXL SoCs.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
> arch/arm/mach-meson/Makefile | 2 +-
> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
> 3 files changed, 69 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
> create mode 100644 arch/arm/mach-meson/eth.c
>
> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
> new file mode 100644
> index 0000000..8ea8e10
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-meson/eth.h
> @@ -0,0 +1,15 @@
> +/*
> + * Copyright (C) 2016 BayLibre, SAS
> + * Author: Neil Armstrong <narmstrong@baylibre.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __MESON_ETH_H__
> +#define __MESON_ETH_H__
> +
> +#include <phy.h>
> +
> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
> +
> +#endif /* __MESON_ETH_H__ */
> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
> index bf49b8b..b4e8dde 100644
> --- a/arch/arm/mach-meson/Makefile
> +++ b/arch/arm/mach-meson/Makefile
> @@ -4,4 +4,4 @@
> # SPDX-License-Identifier: GPL-2.0+
> #
>
> -obj-y += board.o sm.o
> +obj-y += board.o sm.o eth.o
> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
> new file mode 100644
> index 0000000..46ecb5e
> --- /dev/null
> +++ b/arch/arm/mach-meson/eth.c
> @@ -0,0 +1,53 @@
> +/*
> + * Copyright (C) 2016 BayLibre, SAS
> + * Author: Neil Armstrong <narmstrong@baylibre.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <asm/io.h>
> +#include <asm/arch/gxbb.h>
> +#include <asm/arch/eth.h>
> +#include <phy.h>
> +
> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
Can you add a header file addition for this somewhere, with comments?
> +{
> + switch (mode) {
> + case PHY_INTERFACE_MODE_RGMII:
> + case PHY_INTERFACE_MODE_RGMII_ID:
> + case PHY_INTERFACE_MODE_RGMII_RXID:
> + case PHY_INTERFACE_MODE_RGMII_TXID:
> + /* Set RGMII mode */
> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
> + GXBB_ETH_REG_0_TX_PHASE(1) |
> + GXBB_ETH_REG_0_TX_RATIO(4) |
> + GXBB_ETH_REG_0_PHY_CLK_EN |
> + GXBB_ETH_REG_0_CLK_EN);
> + break;
> +
> + case PHY_INTERFACE_MODE_RMII:
> + /* Set RMII mode */
> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
> + GXBB_ETH_REG_0_CLK_EN);
How come this is using out_le32() instead of (for example) writel()?
> +
> +#ifdef CONFIG_MESON_GXL
This doesn't seem fully generic if it has this #ifdef in it. Can this
be a parameter? At worst can we use if() instead of #ifdef ?
> + if (use_internal_phy) {
> + /* Use Internal PHY */
> + out_le32(GXBB_ETH_REG_2, 0x10110181);
> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
> + }
> +#endif
> +
> + break;
> +
> + default:
> + printf("Invalid Ethernet interface mode\n");
> + return;
> + }
> +
> + /* Enable power and clock gate */
> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
Seems like this should be in a clock driver.
> +}
> --
> 2.7.4
>
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread* [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
@ 2017-11-24 22:35 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: linus-amlogic
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Introduce a generic common Ethernet Hardware init function
> common to all Amlogic GX SoCs with support for the
> Internal PHY enable for GXL SoCs.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
> arch/arm/mach-meson/Makefile | 2 +-
> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
> 3 files changed, 69 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
> create mode 100644 arch/arm/mach-meson/eth.c
>
> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
> new file mode 100644
> index 0000000..8ea8e10
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-meson/eth.h
> @@ -0,0 +1,15 @@
> +/*
> + * Copyright (C) 2016 BayLibre, SAS
> + * Author: Neil Armstrong <narmstrong@baylibre.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __MESON_ETH_H__
> +#define __MESON_ETH_H__
> +
> +#include <phy.h>
> +
> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
> +
> +#endif /* __MESON_ETH_H__ */
> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
> index bf49b8b..b4e8dde 100644
> --- a/arch/arm/mach-meson/Makefile
> +++ b/arch/arm/mach-meson/Makefile
> @@ -4,4 +4,4 @@
> # SPDX-License-Identifier: GPL-2.0+
> #
>
> -obj-y += board.o sm.o
> +obj-y += board.o sm.o eth.o
> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
> new file mode 100644
> index 0000000..46ecb5e
> --- /dev/null
> +++ b/arch/arm/mach-meson/eth.c
> @@ -0,0 +1,53 @@
> +/*
> + * Copyright (C) 2016 BayLibre, SAS
> + * Author: Neil Armstrong <narmstrong@baylibre.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <asm/io.h>
> +#include <asm/arch/gxbb.h>
> +#include <asm/arch/eth.h>
> +#include <phy.h>
> +
> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
Can you add a header file addition for this somewhere, with comments?
> +{
> + switch (mode) {
> + case PHY_INTERFACE_MODE_RGMII:
> + case PHY_INTERFACE_MODE_RGMII_ID:
> + case PHY_INTERFACE_MODE_RGMII_RXID:
> + case PHY_INTERFACE_MODE_RGMII_TXID:
> + /* Set RGMII mode */
> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
> + GXBB_ETH_REG_0_TX_PHASE(1) |
> + GXBB_ETH_REG_0_TX_RATIO(4) |
> + GXBB_ETH_REG_0_PHY_CLK_EN |
> + GXBB_ETH_REG_0_CLK_EN);
> + break;
> +
> + case PHY_INTERFACE_MODE_RMII:
> + /* Set RMII mode */
> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
> + GXBB_ETH_REG_0_CLK_EN);
How come this is using out_le32() instead of (for example) writel()?
> +
> +#ifdef CONFIG_MESON_GXL
This doesn't seem fully generic if it has this #ifdef in it. Can this
be a parameter? At worst can we use if() instead of #ifdef ?
> + if (use_internal_phy) {
> + /* Use Internal PHY */
> + out_le32(GXBB_ETH_REG_2, 0x10110181);
> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
> + }
> +#endif
> +
> + break;
> +
> + default:
> + printf("Invalid Ethernet interface mode\n");
> + return;
> + }
> +
> + /* Enable power and clock gate */
> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
Seems like this should be in a clock driver.
> +}
> --
> 2.7.4
>
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
2017-11-24 22:35 ` Simon Glass
@ 2017-11-25 9:45 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-25 9:45 UTC (permalink / raw)
To: u-boot
Hi Simon,
Le 24/11/2017 23:35, Simon Glass a écrit :
> Hi Neil,
>
> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> Introduce a generic common Ethernet Hardware init function
>> common to all Amlogic GX SoCs with support for the
>> Internal PHY enable for GXL SoCs.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>> arch/arm/mach-meson/Makefile | 2 +-
>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>> 3 files changed, 69 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>> create mode 100644 arch/arm/mach-meson/eth.c
>>
>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>> new file mode 100644
>> index 0000000..8ea8e10
>> --- /dev/null
>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>> @@ -0,0 +1,15 @@
>> +/*
>> + * Copyright (C) 2016 BayLibre, SAS
>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef __MESON_ETH_H__
>> +#define __MESON_ETH_H__
>> +
>> +#include <phy.h>
>> +
>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>> +
>> +#endif /* __MESON_ETH_H__ */
>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>> index bf49b8b..b4e8dde 100644
>> --- a/arch/arm/mach-meson/Makefile
>> +++ b/arch/arm/mach-meson/Makefile
>> @@ -4,4 +4,4 @@
>> # SPDX-License-Identifier: GPL-2.0+
>> #
>>
>> -obj-y += board.o sm.o
>> +obj-y += board.o sm.o eth.o
>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>> new file mode 100644
>> index 0000000..46ecb5e
>> --- /dev/null
>> +++ b/arch/arm/mach-meson/eth.c
>> @@ -0,0 +1,53 @@
>> +/*
>> + * Copyright (C) 2016 BayLibre, SAS
>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <dm.h>
>> +#include <asm/io.h>
>> +#include <asm/arch/gxbb.h>
>> +#include <asm/arch/eth.h>
>> +#include <phy.h>
>> +
>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>
> Can you add a header file addition for this somewhere, with comments?
Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
same patchset ?
>
>> +{
>> + switch (mode) {
>> + case PHY_INTERFACE_MODE_RGMII:
>> + case PHY_INTERFACE_MODE_RGMII_ID:
>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>> + /* Set RGMII mode */
>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>> + GXBB_ETH_REG_0_CLK_EN);
>> + break;
>> +
>> + case PHY_INTERFACE_MODE_RMII:
>> + /* Set RMII mode */
>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>> + GXBB_ETH_REG_0_CLK_EN);
>
> How come this is using out_le32() instead of (for example) writel()?
It should be writel(), but since the register size is 32bit, it can be out_le32
>
>> +
>> +#ifdef CONFIG_MESON_GXL
>
> This doesn't seem fully generic if it has this #ifdef in it. Can this
> be a parameter? At worst can we use if() instead of #ifdef ?
Yeah, I didn't really figured out how to specify the internal PHY.
GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
I hesitated to add a different meson_gx_eth_init() signature
for these different SoCs, what do you think about that ?
The new AXG SoC does not have internal PHY, so it will use the same
code as GXBB.
>
>> + if (use_internal_phy) {
>> + /* Use Internal PHY */
>> + out_le32(GXBB_ETH_REG_2, 0x10110181);
>> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
>> + }
>> +#endif
>> +
>> + break;
>> +
>> + default:
>> + printf("Invalid Ethernet interface mode\n");
>> + return;
>> + }
>> +
>> + /* Enable power and clock gate */
>> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
>> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
>
> Seems like this should be in a clock driver.
It should, in next release ? Beniamino's I2C driver also used this,
but yes a proper clock driver becomes necessary here.
>
>> +}
>> --
>> 2.7.4
>>
>
> Regards,
> Simon
>
Thanks,
Neil
^ permalink raw reply [flat|nested] 40+ messages in thread* [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
@ 2017-11-25 9:45 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-25 9:45 UTC (permalink / raw)
To: linus-amlogic
Hi Simon,
Le 24/11/2017 23:35, Simon Glass a ?crit :
> Hi Neil,
>
> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> Introduce a generic common Ethernet Hardware init function
>> common to all Amlogic GX SoCs with support for the
>> Internal PHY enable for GXL SoCs.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>> arch/arm/mach-meson/Makefile | 2 +-
>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>> 3 files changed, 69 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>> create mode 100644 arch/arm/mach-meson/eth.c
>>
>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>> new file mode 100644
>> index 0000000..8ea8e10
>> --- /dev/null
>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>> @@ -0,0 +1,15 @@
>> +/*
>> + * Copyright (C) 2016 BayLibre, SAS
>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef __MESON_ETH_H__
>> +#define __MESON_ETH_H__
>> +
>> +#include <phy.h>
>> +
>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>> +
>> +#endif /* __MESON_ETH_H__ */
>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>> index bf49b8b..b4e8dde 100644
>> --- a/arch/arm/mach-meson/Makefile
>> +++ b/arch/arm/mach-meson/Makefile
>> @@ -4,4 +4,4 @@
>> # SPDX-License-Identifier: GPL-2.0+
>> #
>>
>> -obj-y += board.o sm.o
>> +obj-y += board.o sm.o eth.o
>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>> new file mode 100644
>> index 0000000..46ecb5e
>> --- /dev/null
>> +++ b/arch/arm/mach-meson/eth.c
>> @@ -0,0 +1,53 @@
>> +/*
>> + * Copyright (C) 2016 BayLibre, SAS
>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <dm.h>
>> +#include <asm/io.h>
>> +#include <asm/arch/gxbb.h>
>> +#include <asm/arch/eth.h>
>> +#include <phy.h>
>> +
>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>
> Can you add a header file addition for this somewhere, with comments?
Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
same patchset ?
>
>> +{
>> + switch (mode) {
>> + case PHY_INTERFACE_MODE_RGMII:
>> + case PHY_INTERFACE_MODE_RGMII_ID:
>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>> + /* Set RGMII mode */
>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>> + GXBB_ETH_REG_0_CLK_EN);
>> + break;
>> +
>> + case PHY_INTERFACE_MODE_RMII:
>> + /* Set RMII mode */
>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>> + GXBB_ETH_REG_0_CLK_EN);
>
> How come this is using out_le32() instead of (for example) writel()?
It should be writel(), but since the register size is 32bit, it can be out_le32
>
>> +
>> +#ifdef CONFIG_MESON_GXL
>
> This doesn't seem fully generic if it has this #ifdef in it. Can this
> be a parameter? At worst can we use if() instead of #ifdef ?
Yeah, I didn't really figured out how to specify the internal PHY.
GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
I hesitated to add a different meson_gx_eth_init() signature
for these different SoCs, what do you think about that ?
The new AXG SoC does not have internal PHY, so it will use the same
code as GXBB.
>
>> + if (use_internal_phy) {
>> + /* Use Internal PHY */
>> + out_le32(GXBB_ETH_REG_2, 0x10110181);
>> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
>> + }
>> +#endif
>> +
>> + break;
>> +
>> + default:
>> + printf("Invalid Ethernet interface mode\n");
>> + return;
>> + }
>> +
>> + /* Enable power and clock gate */
>> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
>> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
>
> Seems like this should be in a clock driver.
It should, in next release ? Beniamino's I2C driver also used this,
but yes a proper clock driver becomes necessary here.
>
>> +}
>> --
>> 2.7.4
>>
>
> Regards,
> Simon
>
Thanks,
Neil
^ permalink raw reply [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
2017-11-25 9:45 ` Neil Armstrong
@ 2017-11-26 10:14 ` Beniamino Galvani
-1 siblings, 0 replies; 40+ messages in thread
From: Beniamino Galvani @ 2017-11-26 10:14 UTC (permalink / raw)
To: u-boot
On Sat, Nov 25, 2017 at 10:45:30AM +0100, Neil Armstrong wrote:
> >
> >> + if (use_internal_phy) {
> >> + /* Use Internal PHY */
> >> + out_le32(GXBB_ETH_REG_2, 0x10110181);
> >> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
> >> + }
> >> +#endif
> >> +
> >> + break;
> >> +
> >> + default:
> >> + printf("Invalid Ethernet interface mode\n");
> >> + return;
> >> + }
> >> +
> >> + /* Enable power and clock gate */
> >> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
> >> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
> >
> > Seems like this should be in a clock driver.
>
> It should, in next release ? Beniamino's I2C driver also used this,
> but yes a proper clock driver becomes necessary here.
I have written a basic clock driver that allows to enable/disable
gates and get their frequency. Do you think this is enough? I will
submit it soon (hopefully later today).
Beniamino
^ permalink raw reply [flat|nested] 40+ messages in thread* [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
@ 2017-11-26 10:14 ` Beniamino Galvani
0 siblings, 0 replies; 40+ messages in thread
From: Beniamino Galvani @ 2017-11-26 10:14 UTC (permalink / raw)
To: linus-amlogic
On Sat, Nov 25, 2017 at 10:45:30AM +0100, Neil Armstrong wrote:
> >
> >> + if (use_internal_phy) {
> >> + /* Use Internal PHY */
> >> + out_le32(GXBB_ETH_REG_2, 0x10110181);
> >> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
> >> + }
> >> +#endif
> >> +
> >> + break;
> >> +
> >> + default:
> >> + printf("Invalid Ethernet interface mode\n");
> >> + return;
> >> + }
> >> +
> >> + /* Enable power and clock gate */
> >> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
> >> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
> >
> > Seems like this should be in a clock driver.
>
> It should, in next release ? Beniamino's I2C driver also used this,
> but yes a proper clock driver becomes necessary here.
I have written a basic clock driver that allows to enable/disable
gates and get their frequency. Do you think this is enough? I will
submit it soon (hopefully later today).
Beniamino
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
2017-11-25 9:45 ` Neil Armstrong
@ 2017-11-26 11:39 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-26 11:39 UTC (permalink / raw)
To: u-boot
Hi Neil,
On 25 November 2017 at 02:45, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Hi Simon,
>
> Le 24/11/2017 23:35, Simon Glass a écrit :
>> Hi Neil,
>>
>> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>> Introduce a generic common Ethernet Hardware init function
>>> common to all Amlogic GX SoCs with support for the
>>> Internal PHY enable for GXL SoCs.
>>>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> ---
>>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>>> arch/arm/mach-meson/Makefile | 2 +-
>>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>>> 3 files changed, 69 insertions(+), 1 deletion(-)
>>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>>> create mode 100644 arch/arm/mach-meson/eth.c
>>>
>>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>>> new file mode 100644
>>> index 0000000..8ea8e10
>>> --- /dev/null
>>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>>> @@ -0,0 +1,15 @@
>>> +/*
>>> + * Copyright (C) 2016 BayLibre, SAS
>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0+
>>> + */
>>> +
>>> +#ifndef __MESON_ETH_H__
>>> +#define __MESON_ETH_H__
>>> +
>>> +#include <phy.h>
>>> +
>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>>> +
>>> +#endif /* __MESON_ETH_H__ */
>>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>>> index bf49b8b..b4e8dde 100644
>>> --- a/arch/arm/mach-meson/Makefile
>>> +++ b/arch/arm/mach-meson/Makefile
>>> @@ -4,4 +4,4 @@
>>> # SPDX-License-Identifier: GPL-2.0+
>>> #
>>>
>>> -obj-y += board.o sm.o
>>> +obj-y += board.o sm.o eth.o
>>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>>> new file mode 100644
>>> index 0000000..46ecb5e
>>> --- /dev/null
>>> +++ b/arch/arm/mach-meson/eth.c
>>> @@ -0,0 +1,53 @@
>>> +/*
>>> + * Copyright (C) 2016 BayLibre, SAS
>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0+
>>> + */
>>> +
>>> +#include <common.h>
>>> +#include <dm.h>
>>> +#include <asm/io.h>
>>> +#include <asm/arch/gxbb.h>
>>> +#include <asm/arch/eth.h>
>>> +#include <phy.h>
>>> +
>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>>
>> Can you add a header file addition for this somewhere, with comments?
>
> Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
> same patchset ?
Yes that's what I meant.
>
>>
>>> +{
>>> + switch (mode) {
>>> + case PHY_INTERFACE_MODE_RGMII:
>>> + case PHY_INTERFACE_MODE_RGMII_ID:
>>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>>> + /* Set RGMII mode */
>>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>>> + GXBB_ETH_REG_0_CLK_EN);
>>> + break;
>>> +
>>> + case PHY_INTERFACE_MODE_RMII:
>>> + /* Set RMII mode */
>>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>>> + GXBB_ETH_REG_0_CLK_EN);
>>
>> How come this is using out_le32() instead of (for example) writel()?
>
> It should be writel(), but since the register size is 32bit, it can be out_le32
So why do we have out_le32()? What is the difference?
>
>>
>>> +
>>> +#ifdef CONFIG_MESON_GXL
>>
>> This doesn't seem fully generic if it has this #ifdef in it. Can this
>> be a parameter? At worst can we use if() instead of #ifdef ?
>
> Yeah, I didn't really figured out how to specify the internal PHY.
>
> GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
> I hesitated to add a different meson_gx_eth_init() signature
> for these different SoCs, what do you think about that ?
>
> The new AXG SoC does not have internal PHY, so it will use the same
> code as GXBB.
I think this function needs to be told which SoC type it is dealing
with, as a separate enum parameters.
>
>>
>>> + if (use_internal_phy) {
>>> + /* Use Internal PHY */
>>> + out_le32(GXBB_ETH_REG_2, 0x10110181);
>>> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
>>> + }
>>> +#endif
>>> +
>>> + break;
>>> +
>>> + default:
>>> + printf("Invalid Ethernet interface mode\n");
>>> + return;
>>> + }
>>> +
>>> + /* Enable power and clock gate */
>>> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
>>> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
>>
>> Seems like this should be in a clock driver.
>
> It should, in next release ? Beniamino's I2C driver also used this,
> but yes a proper clock driver becomes necessary here.
OK.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread* [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
@ 2017-11-26 11:39 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-26 11:39 UTC (permalink / raw)
To: linus-amlogic
Hi Neil,
On 25 November 2017 at 02:45, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Hi Simon,
>
> Le 24/11/2017 23:35, Simon Glass a ?crit :
>> Hi Neil,
>>
>> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>> Introduce a generic common Ethernet Hardware init function
>>> common to all Amlogic GX SoCs with support for the
>>> Internal PHY enable for GXL SoCs.
>>>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> ---
>>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>>> arch/arm/mach-meson/Makefile | 2 +-
>>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>>> 3 files changed, 69 insertions(+), 1 deletion(-)
>>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>>> create mode 100644 arch/arm/mach-meson/eth.c
>>>
>>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>>> new file mode 100644
>>> index 0000000..8ea8e10
>>> --- /dev/null
>>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>>> @@ -0,0 +1,15 @@
>>> +/*
>>> + * Copyright (C) 2016 BayLibre, SAS
>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0+
>>> + */
>>> +
>>> +#ifndef __MESON_ETH_H__
>>> +#define __MESON_ETH_H__
>>> +
>>> +#include <phy.h>
>>> +
>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>>> +
>>> +#endif /* __MESON_ETH_H__ */
>>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>>> index bf49b8b..b4e8dde 100644
>>> --- a/arch/arm/mach-meson/Makefile
>>> +++ b/arch/arm/mach-meson/Makefile
>>> @@ -4,4 +4,4 @@
>>> # SPDX-License-Identifier: GPL-2.0+
>>> #
>>>
>>> -obj-y += board.o sm.o
>>> +obj-y += board.o sm.o eth.o
>>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>>> new file mode 100644
>>> index 0000000..46ecb5e
>>> --- /dev/null
>>> +++ b/arch/arm/mach-meson/eth.c
>>> @@ -0,0 +1,53 @@
>>> +/*
>>> + * Copyright (C) 2016 BayLibre, SAS
>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0+
>>> + */
>>> +
>>> +#include <common.h>
>>> +#include <dm.h>
>>> +#include <asm/io.h>
>>> +#include <asm/arch/gxbb.h>
>>> +#include <asm/arch/eth.h>
>>> +#include <phy.h>
>>> +
>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>>
>> Can you add a header file addition for this somewhere, with comments?
>
> Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
> same patchset ?
Yes that's what I meant.
>
>>
>>> +{
>>> + switch (mode) {
>>> + case PHY_INTERFACE_MODE_RGMII:
>>> + case PHY_INTERFACE_MODE_RGMII_ID:
>>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>>> + /* Set RGMII mode */
>>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>>> + GXBB_ETH_REG_0_CLK_EN);
>>> + break;
>>> +
>>> + case PHY_INTERFACE_MODE_RMII:
>>> + /* Set RMII mode */
>>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>>> + GXBB_ETH_REG_0_CLK_EN);
>>
>> How come this is using out_le32() instead of (for example) writel()?
>
> It should be writel(), but since the register size is 32bit, it can be out_le32
So why do we have out_le32()? What is the difference?
>
>>
>>> +
>>> +#ifdef CONFIG_MESON_GXL
>>
>> This doesn't seem fully generic if it has this #ifdef in it. Can this
>> be a parameter? At worst can we use if() instead of #ifdef ?
>
> Yeah, I didn't really figured out how to specify the internal PHY.
>
> GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
> I hesitated to add a different meson_gx_eth_init() signature
> for these different SoCs, what do you think about that ?
>
> The new AXG SoC does not have internal PHY, so it will use the same
> code as GXBB.
I think this function needs to be told which SoC type it is dealing
with, as a separate enum parameters.
>
>>
>>> + if (use_internal_phy) {
>>> + /* Use Internal PHY */
>>> + out_le32(GXBB_ETH_REG_2, 0x10110181);
>>> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
>>> + }
>>> +#endif
>>> +
>>> + break;
>>> +
>>> + default:
>>> + printf("Invalid Ethernet interface mode\n");
>>> + return;
>>> + }
>>> +
>>> + /* Enable power and clock gate */
>>> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
>>> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
>>
>> Seems like this should be in a clock driver.
>
> It should, in next release ? Beniamino's I2C driver also used this,
> but yes a proper clock driver becomes necessary here.
OK.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
2017-11-26 11:39 ` Simon Glass
@ 2017-11-27 8:48 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-27 8:48 UTC (permalink / raw)
To: u-boot
On 26/11/2017 12:39, Simon Glass wrote:
> Hi Neil,
>
> On 25 November 2017 at 02:45, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> Hi Simon,
>>
>> Le 24/11/2017 23:35, Simon Glass a écrit :
>>> Hi Neil,
>>>
>>> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>>> Introduce a generic common Ethernet Hardware init function
>>>> common to all Amlogic GX SoCs with support for the
>>>> Internal PHY enable for GXL SoCs.
>>>>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> ---
>>>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>>>> arch/arm/mach-meson/Makefile | 2 +-
>>>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>>>> 3 files changed, 69 insertions(+), 1 deletion(-)
>>>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>>>> create mode 100644 arch/arm/mach-meson/eth.c
>>>>
>>>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>>>> new file mode 100644
>>>> index 0000000..8ea8e10
>>>> --- /dev/null
>>>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>>>> @@ -0,0 +1,15 @@
>>>> +/*
>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>> + */
>>>> +
>>>> +#ifndef __MESON_ETH_H__
>>>> +#define __MESON_ETH_H__
>>>> +
>>>> +#include <phy.h>
>>>> +
>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>>>> +
>>>> +#endif /* __MESON_ETH_H__ */
>>>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>>>> index bf49b8b..b4e8dde 100644
>>>> --- a/arch/arm/mach-meson/Makefile
>>>> +++ b/arch/arm/mach-meson/Makefile
>>>> @@ -4,4 +4,4 @@
>>>> # SPDX-License-Identifier: GPL-2.0+
>>>> #
>>>>
>>>> -obj-y += board.o sm.o
>>>> +obj-y += board.o sm.o eth.o
>>>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>>>> new file mode 100644
>>>> index 0000000..46ecb5e
>>>> --- /dev/null
>>>> +++ b/arch/arm/mach-meson/eth.c
>>>> @@ -0,0 +1,53 @@
>>>> +/*
>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>> + */
>>>> +
>>>> +#include <common.h>
>>>> +#include <dm.h>
>>>> +#include <asm/io.h>
>>>> +#include <asm/arch/gxbb.h>
>>>> +#include <asm/arch/eth.h>
>>>> +#include <phy.h>
>>>> +
>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>>>
>>> Can you add a header file addition for this somewhere, with comments?
>>
>> Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
>> same patchset ?
>
> Yes that's what I meant.
>
>>
>>>
>>>> +{
>>>> + switch (mode) {
>>>> + case PHY_INTERFACE_MODE_RGMII:
>>>> + case PHY_INTERFACE_MODE_RGMII_ID:
>>>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>>>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>>>> + /* Set RGMII mode */
>>>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>>>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>>>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>>>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>> + break;
>>>> +
>>>> + case PHY_INTERFACE_MODE_RMII:
>>>> + /* Set RMII mode */
>>>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>
>>> How come this is using out_le32() instead of (for example) writel()?
>>
>> It should be writel(), but since the register size is 32bit, it can be out_le32
>
> So why do we have out_le32()? What is the difference?
>
>>
>>>
>>>> +
>>>> +#ifdef CONFIG_MESON_GXL
>>>
>>> This doesn't seem fully generic if it has this #ifdef in it. Can this
>>> be a parameter? At worst can we use if() instead of #ifdef ?
>>
>> Yeah, I didn't really figured out how to specify the internal PHY.
>>
>> GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
>> I hesitated to add a different meson_gx_eth_init() signature
>> for these different SoCs, what do you think about that ?
>>
>> The new AXG SoC does not have internal PHY, so it will use the same
>> code as GXBB.
>
> I think this function needs to be told which SoC type it is dealing
> with, as a separate enum parameters.
It's more complex since the S905D from the same GXL family can also use an
external RGMII interface *and* the internal PHY depending on the board.
Could a generic flags parameter be better, and add a GXL specific
MESON_GXL_USE_INTERNAL_RMII_PHY to be passed only on GXL platforms ?
>
>>
>>>
>>>> + if (use_internal_phy) {
>>>> + /* Use Internal PHY */
>>>> + out_le32(GXBB_ETH_REG_2, 0x10110181);
>>>> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
>>>> + }
>>>> +#endif
>>>> +
>>>> + break;
>>>> +
>>>> + default:
>>>> + printf("Invalid Ethernet interface mode\n");
>>>> + return;
>>>> + }
>>>> +
>>>> + /* Enable power and clock gate */
>>>> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
>>>> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
>>>
>>> Seems like this should be in a clock driver.
>>
>> It should, in next release ? Beniamino's I2C driver also used this,
>> but yes a proper clock driver becomes necessary here.
>
> OK.
> Regards,
>
> Simon
>
^ permalink raw reply [flat|nested] 40+ messages in thread* [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
@ 2017-11-27 8:48 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-27 8:48 UTC (permalink / raw)
To: linus-amlogic
On 26/11/2017 12:39, Simon Glass wrote:
> Hi Neil,
>
> On 25 November 2017 at 02:45, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> Hi Simon,
>>
>> Le 24/11/2017 23:35, Simon Glass a ?crit :
>>> Hi Neil,
>>>
>>> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>>> Introduce a generic common Ethernet Hardware init function
>>>> common to all Amlogic GX SoCs with support for the
>>>> Internal PHY enable for GXL SoCs.
>>>>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> ---
>>>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>>>> arch/arm/mach-meson/Makefile | 2 +-
>>>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>>>> 3 files changed, 69 insertions(+), 1 deletion(-)
>>>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>>>> create mode 100644 arch/arm/mach-meson/eth.c
>>>>
>>>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>>>> new file mode 100644
>>>> index 0000000..8ea8e10
>>>> --- /dev/null
>>>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>>>> @@ -0,0 +1,15 @@
>>>> +/*
>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>> + */
>>>> +
>>>> +#ifndef __MESON_ETH_H__
>>>> +#define __MESON_ETH_H__
>>>> +
>>>> +#include <phy.h>
>>>> +
>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>>>> +
>>>> +#endif /* __MESON_ETH_H__ */
>>>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>>>> index bf49b8b..b4e8dde 100644
>>>> --- a/arch/arm/mach-meson/Makefile
>>>> +++ b/arch/arm/mach-meson/Makefile
>>>> @@ -4,4 +4,4 @@
>>>> # SPDX-License-Identifier: GPL-2.0+
>>>> #
>>>>
>>>> -obj-y += board.o sm.o
>>>> +obj-y += board.o sm.o eth.o
>>>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>>>> new file mode 100644
>>>> index 0000000..46ecb5e
>>>> --- /dev/null
>>>> +++ b/arch/arm/mach-meson/eth.c
>>>> @@ -0,0 +1,53 @@
>>>> +/*
>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>> + */
>>>> +
>>>> +#include <common.h>
>>>> +#include <dm.h>
>>>> +#include <asm/io.h>
>>>> +#include <asm/arch/gxbb.h>
>>>> +#include <asm/arch/eth.h>
>>>> +#include <phy.h>
>>>> +
>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>>>
>>> Can you add a header file addition for this somewhere, with comments?
>>
>> Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
>> same patchset ?
>
> Yes that's what I meant.
>
>>
>>>
>>>> +{
>>>> + switch (mode) {
>>>> + case PHY_INTERFACE_MODE_RGMII:
>>>> + case PHY_INTERFACE_MODE_RGMII_ID:
>>>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>>>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>>>> + /* Set RGMII mode */
>>>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>>>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>>>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>>>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>> + break;
>>>> +
>>>> + case PHY_INTERFACE_MODE_RMII:
>>>> + /* Set RMII mode */
>>>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>
>>> How come this is using out_le32() instead of (for example) writel()?
>>
>> It should be writel(), but since the register size is 32bit, it can be out_le32
>
> So why do we have out_le32()? What is the difference?
>
>>
>>>
>>>> +
>>>> +#ifdef CONFIG_MESON_GXL
>>>
>>> This doesn't seem fully generic if it has this #ifdef in it. Can this
>>> be a parameter? At worst can we use if() instead of #ifdef ?
>>
>> Yeah, I didn't really figured out how to specify the internal PHY.
>>
>> GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
>> I hesitated to add a different meson_gx_eth_init() signature
>> for these different SoCs, what do you think about that ?
>>
>> The new AXG SoC does not have internal PHY, so it will use the same
>> code as GXBB.
>
> I think this function needs to be told which SoC type it is dealing
> with, as a separate enum parameters.
It's more complex since the S905D from the same GXL family can also use an
external RGMII interface *and* the internal PHY depending on the board.
Could a generic flags parameter be better, and add a GXL specific
MESON_GXL_USE_INTERNAL_RMII_PHY to be passed only on GXL platforms ?
>
>>
>>>
>>>> + if (use_internal_phy) {
>>>> + /* Use Internal PHY */
>>>> + out_le32(GXBB_ETH_REG_2, 0x10110181);
>>>> + out_le32(GXBB_ETH_REG_3, 0xe40908ff);
>>>> + }
>>>> +#endif
>>>> +
>>>> + break;
>>>> +
>>>> + default:
>>>> + printf("Invalid Ethernet interface mode\n");
>>>> + return;
>>>> + }
>>>> +
>>>> + /* Enable power and clock gate */
>>>> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
>>>> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
>>>
>>> Seems like this should be in a clock driver.
>>
>> It should, in next release ? Beniamino's I2C driver also used this,
>> but yes a proper clock driver becomes necessary here.
>
> OK.
> Regards,
>
> Simon
>
^ permalink raw reply [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
2017-11-27 8:48 ` Neil Armstrong
@ 2017-11-27 17:12 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-27 17:12 UTC (permalink / raw)
To: u-boot
Hi Neil,
On 27 November 2017 at 01:48, Neil Armstrong <narmstrong@baylibre.com> wrote:
> On 26/11/2017 12:39, Simon Glass wrote:
>> Hi Neil,
>>
>> On 25 November 2017 at 02:45, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>> Hi Simon,
>>>
>>> Le 24/11/2017 23:35, Simon Glass a écrit :
>>>> Hi Neil,
>>>>
>>>> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>>>> Introduce a generic common Ethernet Hardware init function
>>>>> common to all Amlogic GX SoCs with support for the
>>>>> Internal PHY enable for GXL SoCs.
>>>>>
>>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>>> ---
>>>>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>>>>> arch/arm/mach-meson/Makefile | 2 +-
>>>>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>>>>> 3 files changed, 69 insertions(+), 1 deletion(-)
>>>>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>>>>> create mode 100644 arch/arm/mach-meson/eth.c
>>>>>
>>>>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>>>>> new file mode 100644
>>>>> index 0000000..8ea8e10
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>>>>> @@ -0,0 +1,15 @@
>>>>> +/*
>>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>>> + *
>>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>>> + */
>>>>> +
>>>>> +#ifndef __MESON_ETH_H__
>>>>> +#define __MESON_ETH_H__
>>>>> +
>>>>> +#include <phy.h>
>>>>> +
>>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>>>>> +
>>>>> +#endif /* __MESON_ETH_H__ */
>>>>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>>>>> index bf49b8b..b4e8dde 100644
>>>>> --- a/arch/arm/mach-meson/Makefile
>>>>> +++ b/arch/arm/mach-meson/Makefile
>>>>> @@ -4,4 +4,4 @@
>>>>> # SPDX-License-Identifier: GPL-2.0+
>>>>> #
>>>>>
>>>>> -obj-y += board.o sm.o
>>>>> +obj-y += board.o sm.o eth.o
>>>>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>>>>> new file mode 100644
>>>>> index 0000000..46ecb5e
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/mach-meson/eth.c
>>>>> @@ -0,0 +1,53 @@
>>>>> +/*
>>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>>> + *
>>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>>> + */
>>>>> +
>>>>> +#include <common.h>
>>>>> +#include <dm.h>
>>>>> +#include <asm/io.h>
>>>>> +#include <asm/arch/gxbb.h>
>>>>> +#include <asm/arch/eth.h>
>>>>> +#include <phy.h>
>>>>> +
>>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>>>>
>>>> Can you add a header file addition for this somewhere, with comments?
>>>
>>> Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
>>> same patchset ?
>>
>> Yes that's what I meant.
>>
>>>
>>>>
>>>>> +{
>>>>> + switch (mode) {
>>>>> + case PHY_INTERFACE_MODE_RGMII:
>>>>> + case PHY_INTERFACE_MODE_RGMII_ID:
>>>>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>>>>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>>>>> + /* Set RGMII mode */
>>>>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>>>>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>>>>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>>>>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>>> + break;
>>>>> +
>>>>> + case PHY_INTERFACE_MODE_RMII:
>>>>> + /* Set RMII mode */
>>>>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>>
>>>> How come this is using out_le32() instead of (for example) writel()?
>>>
>>> It should be writel(), but since the register size is 32bit, it can be out_le32
>>
>> So why do we have out_le32()? What is the difference?
Still unsure about this one.
>>
>>>
>>>>
>>>>> +
>>>>> +#ifdef CONFIG_MESON_GXL
>>>>
>>>> This doesn't seem fully generic if it has this #ifdef in it. Can this
>>>> be a parameter? At worst can we use if() instead of #ifdef ?
>>>
>>> Yeah, I didn't really figured out how to specify the internal PHY.
>>>
>>> GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
>>> I hesitated to add a different meson_gx_eth_init() signature
>>> for these different SoCs, what do you think about that ?
>>>
>>> The new AXG SoC does not have internal PHY, so it will use the same
>>> code as GXBB.
>>
>> I think this function needs to be told which SoC type it is dealing
>> with, as a separate enum parameters.
>
> It's more complex since the S905D from the same GXL family can also use an
> external RGMII interface *and* the internal PHY depending on the board.
>
> Could a generic flags parameter be better, and add a GXL specific
> MESON_GXL_USE_INTERNAL_RMII_PHY to be passed only on GXL platforms ?
Yes that sounds good and will get rid of the CONFIG check.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread* [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function
@ 2017-11-27 17:12 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-27 17:12 UTC (permalink / raw)
To: linus-amlogic
Hi Neil,
On 27 November 2017 at 01:48, Neil Armstrong <narmstrong@baylibre.com> wrote:
> On 26/11/2017 12:39, Simon Glass wrote:
>> Hi Neil,
>>
>> On 25 November 2017 at 02:45, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>> Hi Simon,
>>>
>>> Le 24/11/2017 23:35, Simon Glass a ?crit :
>>>> Hi Neil,
>>>>
>>>> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>>>> Introduce a generic common Ethernet Hardware init function
>>>>> common to all Amlogic GX SoCs with support for the
>>>>> Internal PHY enable for GXL SoCs.
>>>>>
>>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>>> ---
>>>>> arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++
>>>>> arch/arm/mach-meson/Makefile | 2 +-
>>>>> arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++
>>>>> 3 files changed, 69 insertions(+), 1 deletion(-)
>>>>> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
>>>>> create mode 100644 arch/arm/mach-meson/eth.c
>>>>>
>>>>> diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
>>>>> new file mode 100644
>>>>> index 0000000..8ea8e10
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/include/asm/arch-meson/eth.h
>>>>> @@ -0,0 +1,15 @@
>>>>> +/*
>>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>>> + *
>>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>>> + */
>>>>> +
>>>>> +#ifndef __MESON_ETH_H__
>>>>> +#define __MESON_ETH_H__
>>>>> +
>>>>> +#include <phy.h>
>>>>> +
>>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy);
>>>>> +
>>>>> +#endif /* __MESON_ETH_H__ */
>>>>> diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
>>>>> index bf49b8b..b4e8dde 100644
>>>>> --- a/arch/arm/mach-meson/Makefile
>>>>> +++ b/arch/arm/mach-meson/Makefile
>>>>> @@ -4,4 +4,4 @@
>>>>> # SPDX-License-Identifier: GPL-2.0+
>>>>> #
>>>>>
>>>>> -obj-y += board.o sm.o
>>>>> +obj-y += board.o sm.o eth.o
>>>>> diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
>>>>> new file mode 100644
>>>>> index 0000000..46ecb5e
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/mach-meson/eth.c
>>>>> @@ -0,0 +1,53 @@
>>>>> +/*
>>>>> + * Copyright (C) 2016 BayLibre, SAS
>>>>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>>>>> + *
>>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>>> + */
>>>>> +
>>>>> +#include <common.h>
>>>>> +#include <dm.h>
>>>>> +#include <asm/io.h>
>>>>> +#include <asm/arch/gxbb.h>
>>>>> +#include <asm/arch/eth.h>
>>>>> +#include <phy.h>
>>>>> +
>>>>> +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy)
>>>>
>>>> Can you add a header file addition for this somewhere, with comments?
>>>
>>> Do you mean comments in the added arch/arm/include/asm/arch-meson/eth.h in this
>>> same patchset ?
>>
>> Yes that's what I meant.
>>
>>>
>>>>
>>>>> +{
>>>>> + switch (mode) {
>>>>> + case PHY_INTERFACE_MODE_RGMII:
>>>>> + case PHY_INTERFACE_MODE_RGMII_ID:
>>>>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>>>>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>>>>> + /* Set RGMII mode */
>>>>> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
>>>>> + GXBB_ETH_REG_0_TX_PHASE(1) |
>>>>> + GXBB_ETH_REG_0_TX_RATIO(4) |
>>>>> + GXBB_ETH_REG_0_PHY_CLK_EN |
>>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>>> + break;
>>>>> +
>>>>> + case PHY_INTERFACE_MODE_RMII:
>>>>> + /* Set RMII mode */
>>>>> + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
>>>>> + GXBB_ETH_REG_0_CLK_EN);
>>>>
>>>> How come this is using out_le32() instead of (for example) writel()?
>>>
>>> It should be writel(), but since the register size is 32bit, it can be out_le32
>>
>> So why do we have out_le32()? What is the difference?
Still unsure about this one.
>>
>>>
>>>>
>>>>> +
>>>>> +#ifdef CONFIG_MESON_GXL
>>>>
>>>> This doesn't seem fully generic if it has this #ifdef in it. Can this
>>>> be a parameter? At worst can we use if() instead of #ifdef ?
>>>
>>> Yeah, I didn't really figured out how to specify the internal PHY.
>>>
>>> GXL and GXM SoCs have an internal PHY, but yeah GXBB does't.
>>> I hesitated to add a different meson_gx_eth_init() signature
>>> for these different SoCs, what do you think about that ?
>>>
>>> The new AXG SoC does not have internal PHY, so it will use the same
>>> code as GXBB.
>>
>> I think this function needs to be told which SoC type it is dealing
>> with, as a separate enum parameters.
>
> It's more complex since the S905D from the same GXL family can also use an
> external RGMII interface *and* the internal PHY depending on the board.
>
> Could a generic flags parameter be better, and add a GXL specific
> MESON_GXL_USE_INTERNAL_RMII_PHY to be passed only on GXL platforms ?
Yes that sounds good and will get rid of the CONFIG check.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 2/5] board: odroid-c2: use common ethernet init function
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-22 13:25 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: u-boot
Switch Odroid-C2 Ethernet init to the common Ethernet init function.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
board/amlogic/odroid-c2/odroid-c2.c | 11 ++---------
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c
index a5ea8dc..62a2180 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -9,7 +9,7 @@
#include <asm/io.h>
#include <asm/arch/gxbb.h>
#include <asm/arch/sm.h>
-#include <phy.h>
+#include <asm/arch/eth.h>
#define EFUSE_SN_OFFSET 20
#define EFUSE_SN_SIZE 16
@@ -27,17 +27,10 @@ int misc_init_r(void)
char serial[EFUSE_SN_SIZE];
ssize_t len;
- /* Set RGMII mode */
- setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
- GXBB_ETH_REG_0_TX_PHASE(1) |
- GXBB_ETH_REG_0_TX_RATIO(4) |
- GXBB_ETH_REG_0_PHY_CLK_EN |
- GXBB_ETH_REG_0_CLK_EN);
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, false);
/* Enable power and clock gate */
setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
- setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
- clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
/* Reset PHY on GPIOZ_14 */
clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH v2 2/5] board: odroid-c2: use common ethernet init function
@ 2017-11-22 13:25 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: linus-amlogic
Switch Odroid-C2 Ethernet init to the common Ethernet init function.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
board/amlogic/odroid-c2/odroid-c2.c | 11 ++---------
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c
index a5ea8dc..62a2180 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -9,7 +9,7 @@
#include <asm/io.h>
#include <asm/arch/gxbb.h>
#include <asm/arch/sm.h>
-#include <phy.h>
+#include <asm/arch/eth.h>
#define EFUSE_SN_OFFSET 20
#define EFUSE_SN_SIZE 16
@@ -27,17 +27,10 @@ int misc_init_r(void)
char serial[EFUSE_SN_SIZE];
ssize_t len;
- /* Set RGMII mode */
- setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
- GXBB_ETH_REG_0_TX_PHASE(1) |
- GXBB_ETH_REG_0_TX_RATIO(4) |
- GXBB_ETH_REG_0_PHY_CLK_EN |
- GXBB_ETH_REG_0_CLK_EN);
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, false);
/* Enable power and clock gate */
setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
- setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
- clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
/* Reset PHY on GPIOZ_14 */
clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 2/5] board: odroid-c2: use common ethernet init function
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-24 22:35 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: u-boot
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Switch Odroid-C2 Ethernet init to the common Ethernet init function.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> board/amlogic/odroid-c2/odroid-c2.c | 11 ++---------
> 1 file changed, 2 insertions(+), 9 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH v2 2/5] board: odroid-c2: use common ethernet init function
@ 2017-11-24 22:35 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: linus-amlogic
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Switch Odroid-C2 Ethernet init to the common Ethernet init function.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> board/amlogic/odroid-c2/odroid-c2.c | 11 ++---------
> 1 file changed, 2 insertions(+), 9 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 3/5] board: p212: use common ethernet init function
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-22 13:25 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: u-boot
Switch P212 Ethernet init to the common Ethernet init function.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
board/amlogic/p212/p212.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index ece8096..a120ab0 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -10,7 +10,7 @@
#include <asm/io.h>
#include <asm/arch/gxbb.h>
#include <asm/arch/sm.h>
-#include <phy.h>
+#include <asm/arch/eth.h>
#define EFUSE_SN_OFFSET 20
#define EFUSE_SN_SIZE 16
@@ -28,17 +28,7 @@ int misc_init_r(void)
char serial[EFUSE_SN_SIZE];
ssize_t len;
- /* Set RMII mode */
- out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
- GXBB_ETH_REG_0_CLK_EN);
-
- /* Use Internal PHY */
- out_le32(GXBB_ETH_REG_2, 0x10110181);
- out_le32(GXBB_ETH_REG_3, 0xe40908ff);
-
- /* Enable power and clock gate */
- setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
- clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, true);
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH v2 3/5] board: p212: use common ethernet init function
@ 2017-11-22 13:25 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: linus-amlogic
Switch P212 Ethernet init to the common Ethernet init function.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
board/amlogic/p212/p212.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index ece8096..a120ab0 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -10,7 +10,7 @@
#include <asm/io.h>
#include <asm/arch/gxbb.h>
#include <asm/arch/sm.h>
-#include <phy.h>
+#include <asm/arch/eth.h>
#define EFUSE_SN_OFFSET 20
#define EFUSE_SN_SIZE 16
@@ -28,17 +28,7 @@ int misc_init_r(void)
char serial[EFUSE_SN_SIZE];
ssize_t len;
- /* Set RMII mode */
- out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
- GXBB_ETH_REG_0_CLK_EN);
-
- /* Use Internal PHY */
- out_le32(GXBB_ETH_REG_2, 0x10110181);
- out_le32(GXBB_ETH_REG_3, 0xe40908ff);
-
- /* Enable power and clock gate */
- setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
- clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, true);
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 3/5] board: p212: use common ethernet init function
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-24 22:35 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: u-boot
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Switch P212 Ethernet init to the common Ethernet init function.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> board/amlogic/p212/p212.c | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH v2 3/5] board: p212: use common ethernet init function
@ 2017-11-24 22:35 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: linus-amlogic
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Switch P212 Ethernet init to the common Ethernet init function.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> board/amlogic/p212/p212.c | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 4/5] arm: Add LibreTech CC support based on Meson GXL family
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-22 13:25 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: u-boot
This adds platform code for the Libre Computer CC "Le Potato" board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.
The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
arch/arm/mach-meson/Kconfig | 9 ++
board/amlogic/libretech-cc/Kconfig | 12 ++
board/amlogic/libretech-cc/MAINTAINERS | 6 +
board/amlogic/libretech-cc/Makefile | 8 ++
board/amlogic/libretech-cc/README | 96 +++++++++++++++
board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
configs/libretech-cc_defconfig | 35 ++++++
include/configs/libretech-cc.h | 21 ++++
10 files changed, 412 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
create mode 100644 board/amlogic/libretech-cc/Kconfig
create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
create mode 100644 board/amlogic/libretech-cc/Makefile
create mode 100644 board/amlogic/libretech-cc/README
create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
create mode 100644 configs/libretech-cc_defconfig
create mode 100644 include/configs/libretech-cc.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cd540e9..1845552 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -55,7 +55,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1108-evb.dtb
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-odroidc2.dtb \
- meson-gxl-s905x-p212.dtb
+ meson-gxl-s905x-p212.dtb \
+ meson-gxl-s905x-libretech-cc.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
new file mode 100644
index 0000000..266fbcf
--- /dev/null
+++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2017 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+#include "meson-gxl-s905x.dtsi"
+
+/ {
+ compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl";
+ model = "Libre Technology CC";
+
+ aliases {
+ serial0 = &uart_AO;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cvbs-connector {
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ system {
+ label = "librecomputer:system-status";
+ gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ panic-indicator;
+ };
+
+ blue {
+ label = "librecomputer:blue";
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc_card: regulator-vcc-card {
+ compatible = "regulator-gpio";
+
+ regulator-name = "VCC_CARD";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+
+ states = <3300000 0>,
+ <1800000 1>;
+ };
+
+ vddio_boot: regulator-vddio_boot {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_BOOT";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+ðmac {
+ status = "okay";
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_card>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <50000000>;
+ non-removable;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index d4bd230..ca08dc3 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -38,6 +38,13 @@ config TARGET_P212
with 2 GiB of RAM, Ethernet, HDMI, 2 USB, micro-SD slot,
eMMC, IR receiver, CVBS+Audio jack and a SDIO WiFi module.
+config TARGET_LIBRETECH_CC
+ bool "LIBRETECH-CC"
+ help
+ LibreTech CC is a single board computer based on Meson GXL
+ with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
+ eMMC, IR receiver and a 40-pin GPIO header.
+
endif
config SYS_SOC
@@ -50,4 +57,6 @@ source "board/amlogic/odroid-c2/Kconfig"
source "board/amlogic/p212/Kconfig"
+source "board/amlogic/libretech-cc/Kconfig"
+
endif
diff --git a/board/amlogic/libretech-cc/Kconfig b/board/amlogic/libretech-cc/Kconfig
new file mode 100644
index 0000000..7a6f916
--- /dev/null
+++ b/board/amlogic/libretech-cc/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_LIBRETECH_CC
+
+config SYS_BOARD
+ default "libretech-cc"
+
+config SYS_VENDOR
+ default "amlogic"
+
+config SYS_CONFIG_NAME
+ default "libretech-cc"
+
+endif
diff --git a/board/amlogic/libretech-cc/MAINTAINERS b/board/amlogic/libretech-cc/MAINTAINERS
new file mode 100644
index 0000000..398ce57
--- /dev/null
+++ b/board/amlogic/libretech-cc/MAINTAINERS
@@ -0,0 +1,6 @@
+LIBRETECH-CC
+M: Neil Armstrong <narmstrong@baylibre.com>
+S: Maintained
+F: board/amlogic/libretech-cc/
+F: include/configs/libretech-cc.h
+F: configs/libretech-cc_defconfig
diff --git a/board/amlogic/libretech-cc/Makefile b/board/amlogic/libretech-cc/Makefile
new file mode 100644
index 0000000..d0e3bbb
--- /dev/null
+++ b/board/amlogic/libretech-cc/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2016 BayLibre, SAS
+# Author: Neil Armstrong <narmstrong@baylibre.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := libretech-cc.o
diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/libretech-cc/README
new file mode 100644
index 0000000..8b38fff
--- /dev/null
+++ b/board/amlogic/libretech-cc/README
@@ -0,0 +1,96 @@
+U-Boot for LibreTech CC
+=======================
+
+LibreTech CC is a single board computer manufactured by Libre Technology
+with the following specifications:
+
+ - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 2.0 Host, 1 x USB OTG
+ - eMMC, microSD
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+Currently the U-Boot port supports the following devices:
+ - serial
+ - eMMC, microSD
+ - Ethernet
+
+u-boot compilation
+==================
+
+ > export ARCH=arm
+ > export CROSS_COMPILE=aarch64-none-elf-
+ > make libretech-cc_defconfig
+ > make
+
+Image creation
+==============
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+ > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
+ > cd amlogic-u-boot
+ > make libretech_cc_defconfig
+ > make
+ > export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+ > mkdir fip
+
+ > cp $FIPDIR/gxl/bl2.bin fip/
+ > cp $FIPDIR/gxl/acs.bin fip/
+ > cp $FIPDIR/gxl/bl21.bin fip/
+ > cp $FIPDIR/gxl/bl30.bin fip/
+ > cp $FIPDIR/gxl/bl301.bin fip/
+ > cp $FIPDIR/gxl/bl31.img fip/
+ > cp u-boot.bin fip/bl33.bin
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl30.bin \
+ fip/zero_tmp \
+ fip/bl30_zero.bin \
+ fip/bl301.bin \
+ fip/bl301_zero.bin \
+ fip/bl30_new.bin \
+ bl30
+
+ > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl2_acs.bin \
+ fip/zero_tmp \
+ fip/bl2_zero.bin \
+ fip/bl21.bin \
+ fip/bl21_zero.bin \
+ fip/bl2_new.bin \
+ bl2
+
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+ > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc
+
+and then write the image to SD with:
+
+ > DEV=/dev/your_sd_device
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
diff --git a/board/amlogic/libretech-cc/libretech-cc.c b/board/amlogic/libretech-cc/libretech-cc.c
new file mode 100644
index 0000000..4125f0f
--- /dev/null
+++ b/board/amlogic/libretech-cc/libretech-cc.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
+#include <asm/arch/eth.h>
+
+#define EFUSE_SN_OFFSET 20
+#define EFUSE_SN_SIZE 16
+#define EFUSE_MAC_OFFSET 52
+#define EFUSE_MAC_SIZE 6
+
+int board_init(void)
+{
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ u8 mac_addr[EFUSE_MAC_SIZE];
+ char serial[EFUSE_SN_SIZE];
+ ssize_t len;
+
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, true);
+
+ /* Enable power and clock gate */
+ setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+ clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+ eth_env_set_enetaddr("ethaddr", mac_addr);
+ }
+
+ if (!env_get("serial#")) {
+ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+ EFUSE_SN_SIZE);
+ if (len == EFUSE_SN_SIZE)
+ env_set("serial#", serial);
+ }
+
+ return 0;
+}
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
new file mode 100644
index 0000000..a63e940
--- /dev/null
+++ b/configs/libretech-cc_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_MESON_GXL=y
+CONFIG_TARGET_LIBRETECH_CC=y
+CONFIG_IDENT_STRING=" libretech-cc"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_MESON_GXL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXL=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/libretech-cc.h b/include/configs/libretech-cc.h
new file mode 100644
index 0000000..c06e40a
--- /dev/null
+++ b/include/configs/libretech-cc.h
@@ -0,0 +1,21 @@
+/*
+ * Configuration for LibreTech CC
+ *
+ * Copyright (C) 2017 Baylibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_PHY_ADDR 8
+
+#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
+
+#include <configs/meson-gxbb-common.h>
+
+#endif /* __CONFIG_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH v2 4/5] arm: Add LibreTech CC support based on Meson GXL family
@ 2017-11-22 13:25 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: linus-amlogic
This adds platform code for the Libre Computer CC "Le Potato" board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.
The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
arch/arm/mach-meson/Kconfig | 9 ++
board/amlogic/libretech-cc/Kconfig | 12 ++
board/amlogic/libretech-cc/MAINTAINERS | 6 +
board/amlogic/libretech-cc/Makefile | 8 ++
board/amlogic/libretech-cc/README | 96 +++++++++++++++
board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
configs/libretech-cc_defconfig | 35 ++++++
include/configs/libretech-cc.h | 21 ++++
10 files changed, 412 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
create mode 100644 board/amlogic/libretech-cc/Kconfig
create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
create mode 100644 board/amlogic/libretech-cc/Makefile
create mode 100644 board/amlogic/libretech-cc/README
create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
create mode 100644 configs/libretech-cc_defconfig
create mode 100644 include/configs/libretech-cc.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cd540e9..1845552 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -55,7 +55,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1108-evb.dtb
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-odroidc2.dtb \
- meson-gxl-s905x-p212.dtb
+ meson-gxl-s905x-p212.dtb \
+ meson-gxl-s905x-libretech-cc.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
new file mode 100644
index 0000000..266fbcf
--- /dev/null
+++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2017 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+#include "meson-gxl-s905x.dtsi"
+
+/ {
+ compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl";
+ model = "Libre Technology CC";
+
+ aliases {
+ serial0 = &uart_AO;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cvbs-connector {
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ system {
+ label = "librecomputer:system-status";
+ gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ panic-indicator;
+ };
+
+ blue {
+ label = "librecomputer:blue";
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc_card: regulator-vcc-card {
+ compatible = "regulator-gpio";
+
+ regulator-name = "VCC_CARD";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+
+ states = <3300000 0>,
+ <1800000 1>;
+ };
+
+ vddio_boot: regulator-vddio_boot {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_BOOT";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+ðmac {
+ status = "okay";
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_card>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <50000000>;
+ non-removable;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index d4bd230..ca08dc3 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -38,6 +38,13 @@ config TARGET_P212
with 2 GiB of RAM, Ethernet, HDMI, 2 USB, micro-SD slot,
eMMC, IR receiver, CVBS+Audio jack and a SDIO WiFi module.
+config TARGET_LIBRETECH_CC
+ bool "LIBRETECH-CC"
+ help
+ LibreTech CC is a single board computer based on Meson GXL
+ with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
+ eMMC, IR receiver and a 40-pin GPIO header.
+
endif
config SYS_SOC
@@ -50,4 +57,6 @@ source "board/amlogic/odroid-c2/Kconfig"
source "board/amlogic/p212/Kconfig"
+source "board/amlogic/libretech-cc/Kconfig"
+
endif
diff --git a/board/amlogic/libretech-cc/Kconfig b/board/amlogic/libretech-cc/Kconfig
new file mode 100644
index 0000000..7a6f916
--- /dev/null
+++ b/board/amlogic/libretech-cc/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_LIBRETECH_CC
+
+config SYS_BOARD
+ default "libretech-cc"
+
+config SYS_VENDOR
+ default "amlogic"
+
+config SYS_CONFIG_NAME
+ default "libretech-cc"
+
+endif
diff --git a/board/amlogic/libretech-cc/MAINTAINERS b/board/amlogic/libretech-cc/MAINTAINERS
new file mode 100644
index 0000000..398ce57
--- /dev/null
+++ b/board/amlogic/libretech-cc/MAINTAINERS
@@ -0,0 +1,6 @@
+LIBRETECH-CC
+M: Neil Armstrong <narmstrong@baylibre.com>
+S: Maintained
+F: board/amlogic/libretech-cc/
+F: include/configs/libretech-cc.h
+F: configs/libretech-cc_defconfig
diff --git a/board/amlogic/libretech-cc/Makefile b/board/amlogic/libretech-cc/Makefile
new file mode 100644
index 0000000..d0e3bbb
--- /dev/null
+++ b/board/amlogic/libretech-cc/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2016 BayLibre, SAS
+# Author: Neil Armstrong <narmstrong@baylibre.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := libretech-cc.o
diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/libretech-cc/README
new file mode 100644
index 0000000..8b38fff
--- /dev/null
+++ b/board/amlogic/libretech-cc/README
@@ -0,0 +1,96 @@
+U-Boot for LibreTech CC
+=======================
+
+LibreTech CC is a single board computer manufactured by Libre Technology
+with the following specifications:
+
+ - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 2.0 Host, 1 x USB OTG
+ - eMMC, microSD
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+Currently the U-Boot port supports the following devices:
+ - serial
+ - eMMC, microSD
+ - Ethernet
+
+u-boot compilation
+==================
+
+ > export ARCH=arm
+ > export CROSS_COMPILE=aarch64-none-elf-
+ > make libretech-cc_defconfig
+ > make
+
+Image creation
+==============
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+ > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
+ > cd amlogic-u-boot
+ > make libretech_cc_defconfig
+ > make
+ > export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+ > mkdir fip
+
+ > cp $FIPDIR/gxl/bl2.bin fip/
+ > cp $FIPDIR/gxl/acs.bin fip/
+ > cp $FIPDIR/gxl/bl21.bin fip/
+ > cp $FIPDIR/gxl/bl30.bin fip/
+ > cp $FIPDIR/gxl/bl301.bin fip/
+ > cp $FIPDIR/gxl/bl31.img fip/
+ > cp u-boot.bin fip/bl33.bin
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl30.bin \
+ fip/zero_tmp \
+ fip/bl30_zero.bin \
+ fip/bl301.bin \
+ fip/bl301_zero.bin \
+ fip/bl30_new.bin \
+ bl30
+
+ > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl2_acs.bin \
+ fip/zero_tmp \
+ fip/bl2_zero.bin \
+ fip/bl21.bin \
+ fip/bl21_zero.bin \
+ fip/bl2_new.bin \
+ bl2
+
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+ > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc
+
+and then write the image to SD with:
+
+ > DEV=/dev/your_sd_device
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
diff --git a/board/amlogic/libretech-cc/libretech-cc.c b/board/amlogic/libretech-cc/libretech-cc.c
new file mode 100644
index 0000000..4125f0f
--- /dev/null
+++ b/board/amlogic/libretech-cc/libretech-cc.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
+#include <asm/arch/eth.h>
+
+#define EFUSE_SN_OFFSET 20
+#define EFUSE_SN_SIZE 16
+#define EFUSE_MAC_OFFSET 52
+#define EFUSE_MAC_SIZE 6
+
+int board_init(void)
+{
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ u8 mac_addr[EFUSE_MAC_SIZE];
+ char serial[EFUSE_SN_SIZE];
+ ssize_t len;
+
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, true);
+
+ /* Enable power and clock gate */
+ setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+ clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+ eth_env_set_enetaddr("ethaddr", mac_addr);
+ }
+
+ if (!env_get("serial#")) {
+ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+ EFUSE_SN_SIZE);
+ if (len == EFUSE_SN_SIZE)
+ env_set("serial#", serial);
+ }
+
+ return 0;
+}
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
new file mode 100644
index 0000000..a63e940
--- /dev/null
+++ b/configs/libretech-cc_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_MESON_GXL=y
+CONFIG_TARGET_LIBRETECH_CC=y
+CONFIG_IDENT_STRING=" libretech-cc"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_MESON_GXL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXL=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/libretech-cc.h b/include/configs/libretech-cc.h
new file mode 100644
index 0000000..c06e40a
--- /dev/null
+++ b/include/configs/libretech-cc.h
@@ -0,0 +1,21 @@
+/*
+ * Configuration for LibreTech CC
+ *
+ * Copyright (C) 2017 Baylibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_PHY_ADDR 8
+
+#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
+
+#include <configs/meson-gxbb-common.h>
+
+#endif /* __CONFIG_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 4/5] arm: Add LibreTech CC support based on Meson GXL family
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-24 22:35 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: u-boot
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> This adds platform code for the Libre Computer CC "Le Potato" board based on a
> Meson GXL (S905X) SoC with the Meson GXL configuration.
>
> This initial submission supports UART, MMC/SDCard and Ethernet with the
> Internal RMII PHY.
>
> The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
> stable tree as of 4.13.8.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
> arch/arm/mach-meson/Kconfig | 9 ++
> board/amlogic/libretech-cc/Kconfig | 12 ++
> board/amlogic/libretech-cc/MAINTAINERS | 6 +
> board/amlogic/libretech-cc/Makefile | 8 ++
> board/amlogic/libretech-cc/README | 96 +++++++++++++++
> board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
> configs/libretech-cc_defconfig | 35 ++++++
> include/configs/libretech-cc.h | 21 ++++
> 10 files changed, 412 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
> create mode 100644 board/amlogic/libretech-cc/Kconfig
> create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
> create mode 100644 board/amlogic/libretech-cc/Makefile
> create mode 100644 board/amlogic/libretech-cc/README
> create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
> create mode 100644 configs/libretech-cc_defconfig
> create mode 100644 include/configs/libretech-cc.h
>
Reviewed-by: Simon Glass <sjg@chromium.org>
[..]
> new file mode 100644
> index 0000000..d0e3bbb
> --- /dev/null
> +++ b/board/amlogic/libretech-cc/Makefile
> @@ -0,0 +1,8 @@
> +#
> +# (C) Copyright 2016 BayLibre, SAS
> +# Author: Neil Armstrong <narmstrong@baylibre.com>
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y := libretech-cc.o
> diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/libretech-cc/README
> new file mode 100644
> index 0000000..8b38fff
> --- /dev/null
> +++ b/board/amlogic/libretech-cc/README
> @@ -0,0 +1,96 @@
> +U-Boot for LibreTech CC
> +=======================
> +
> +LibreTech CC is a single board computer manufactured by Libre Technology
> +with the following specifications:
> +
> + - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz
> + - ARM Mali 450 GPU
> + - 2GB DDR3 SDRAM
> + - Gigabit Ethernet
> + - HDMI 2.0 4K/60Hz display
> + - 40-pin GPIO header
> + - 4 x USB 2.0 Host, 1 x USB OTG
> + - eMMC, microSD
> + - Infrared receiver
> +
> +Schematics are available on the manufacturer website.
> +
> +Currently the U-Boot port supports the following devices:
> + - serial
> + - eMMC, microSD
> + - Ethernet
> +
> +u-boot compilation
U-Boot
> +==================
> +
> + > export ARCH=arm
> + > export CROSS_COMPILE=aarch64-none-elf-
> + > make libretech-cc_defconfig
> + > make
> +
> +Image creation
> +==============
> +
> +Amlogic doesn't provide sources for the firmware and for tools needed
> +to create the bootloader image, so it is necessary to obtain them from
> +the git tree published by the board vendor:
> +
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> + > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
> + > cd amlogic-u-boot
> + > make libretech_cc_defconfig
> + > make
> + > export FIPDIR=$PWD/fip
> +
> +Go back to mainline U-Boot source tree then :
> + > mkdir fip
> +
> + > cp $FIPDIR/gxl/bl2.bin fip/
> + > cp $FIPDIR/gxl/acs.bin fip/
> + > cp $FIPDIR/gxl/bl21.bin fip/
> + > cp $FIPDIR/gxl/bl30.bin fip/
> + > cp $FIPDIR/gxl/bl301.bin fip/
> + > cp $FIPDIR/gxl/bl31.img fip/
> + > cp u-boot.bin fip/bl33.bin
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl30.bin \
> + fip/zero_tmp \
> + fip/bl30_zero.bin \
> + fip/bl301.bin \
> + fip/bl301_zero.bin \
> + fip/bl30_new.bin \
> + bl30
> +
> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl2_acs.bin \
> + fip/zero_tmp \
> + fip/bl2_zero.bin \
> + fip/bl21.bin \
> + fip/bl21_zero.bin \
> + fip/bl2_new.bin \
> + bl2
> +
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
> + --output fip/u-boot.bin \
> + --bl2 fip/bl2.n.bin.sig \
> + --bl30 fip/bl30_new.bin.enc \
> + --bl31 fip/bl31.img.enc \
> + --bl33 fip/bl33.bin.enc
> +
> +and then write the image to SD with:
> +
> + > DEV=/dev/your_sd_device
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
I wonder if the above could be done with binman? It is designed for
putting images together.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH v2 4/5] arm: Add LibreTech CC support based on Meson GXL family
@ 2017-11-24 22:35 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: linus-amlogic
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> This adds platform code for the Libre Computer CC "Le Potato" board based on a
> Meson GXL (S905X) SoC with the Meson GXL configuration.
>
> This initial submission supports UART, MMC/SDCard and Ethernet with the
> Internal RMII PHY.
>
> The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
> stable tree as of 4.13.8.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
> arch/arm/mach-meson/Kconfig | 9 ++
> board/amlogic/libretech-cc/Kconfig | 12 ++
> board/amlogic/libretech-cc/MAINTAINERS | 6 +
> board/amlogic/libretech-cc/Makefile | 8 ++
> board/amlogic/libretech-cc/README | 96 +++++++++++++++
> board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
> configs/libretech-cc_defconfig | 35 ++++++
> include/configs/libretech-cc.h | 21 ++++
> 10 files changed, 412 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
> create mode 100644 board/amlogic/libretech-cc/Kconfig
> create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
> create mode 100644 board/amlogic/libretech-cc/Makefile
> create mode 100644 board/amlogic/libretech-cc/README
> create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
> create mode 100644 configs/libretech-cc_defconfig
> create mode 100644 include/configs/libretech-cc.h
>
Reviewed-by: Simon Glass <sjg@chromium.org>
[..]
> new file mode 100644
> index 0000000..d0e3bbb
> --- /dev/null
> +++ b/board/amlogic/libretech-cc/Makefile
> @@ -0,0 +1,8 @@
> +#
> +# (C) Copyright 2016 BayLibre, SAS
> +# Author: Neil Armstrong <narmstrong@baylibre.com>
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y := libretech-cc.o
> diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/libretech-cc/README
> new file mode 100644
> index 0000000..8b38fff
> --- /dev/null
> +++ b/board/amlogic/libretech-cc/README
> @@ -0,0 +1,96 @@
> +U-Boot for LibreTech CC
> +=======================
> +
> +LibreTech CC is a single board computer manufactured by Libre Technology
> +with the following specifications:
> +
> + - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz
> + - ARM Mali 450 GPU
> + - 2GB DDR3 SDRAM
> + - Gigabit Ethernet
> + - HDMI 2.0 4K/60Hz display
> + - 40-pin GPIO header
> + - 4 x USB 2.0 Host, 1 x USB OTG
> + - eMMC, microSD
> + - Infrared receiver
> +
> +Schematics are available on the manufacturer website.
> +
> +Currently the U-Boot port supports the following devices:
> + - serial
> + - eMMC, microSD
> + - Ethernet
> +
> +u-boot compilation
U-Boot
> +==================
> +
> + > export ARCH=arm
> + > export CROSS_COMPILE=aarch64-none-elf-
> + > make libretech-cc_defconfig
> + > make
> +
> +Image creation
> +==============
> +
> +Amlogic doesn't provide sources for the firmware and for tools needed
> +to create the bootloader image, so it is necessary to obtain them from
> +the git tree published by the board vendor:
> +
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> + > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
> + > cd amlogic-u-boot
> + > make libretech_cc_defconfig
> + > make
> + > export FIPDIR=$PWD/fip
> +
> +Go back to mainline U-Boot source tree then :
> + > mkdir fip
> +
> + > cp $FIPDIR/gxl/bl2.bin fip/
> + > cp $FIPDIR/gxl/acs.bin fip/
> + > cp $FIPDIR/gxl/bl21.bin fip/
> + > cp $FIPDIR/gxl/bl30.bin fip/
> + > cp $FIPDIR/gxl/bl301.bin fip/
> + > cp $FIPDIR/gxl/bl31.img fip/
> + > cp u-boot.bin fip/bl33.bin
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl30.bin \
> + fip/zero_tmp \
> + fip/bl30_zero.bin \
> + fip/bl301.bin \
> + fip/bl301_zero.bin \
> + fip/bl30_new.bin \
> + bl30
> +
> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl2_acs.bin \
> + fip/zero_tmp \
> + fip/bl2_zero.bin \
> + fip/bl21.bin \
> + fip/bl21_zero.bin \
> + fip/bl2_new.bin \
> + bl2
> +
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
> + --output fip/u-boot.bin \
> + --bl2 fip/bl2.n.bin.sig \
> + --bl30 fip/bl30_new.bin.enc \
> + --bl31 fip/bl31.img.enc \
> + --bl33 fip/bl33.bin.enc
> +
> +and then write the image to SD with:
> +
> + > DEV=/dev/your_sd_device
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
I wonder if the above could be done with binman? It is designed for
putting images together.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 4/5] arm: Add LibreTech CC support based on Meson GXL family
2017-11-24 22:35 ` Simon Glass
@ 2017-11-25 9:46 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-25 9:46 UTC (permalink / raw)
To: u-boot
Le 24/11/2017 23:35, Simon Glass a écrit :
> Hi Neil,
>
> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> This adds platform code for the Libre Computer CC "Le Potato" board based on a
>> Meson GXL (S905X) SoC with the Meson GXL configuration.
>>
>> This initial submission supports UART, MMC/SDCard and Ethernet with the
>> Internal RMII PHY.
>>
>> The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
>> stable tree as of 4.13.8.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> arch/arm/dts/Makefile | 3 +-
>> arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
>> arch/arm/mach-meson/Kconfig | 9 ++
>> board/amlogic/libretech-cc/Kconfig | 12 ++
>> board/amlogic/libretech-cc/MAINTAINERS | 6 +
>> board/amlogic/libretech-cc/Makefile | 8 ++
>> board/amlogic/libretech-cc/README | 96 +++++++++++++++
>> board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
>> configs/libretech-cc_defconfig | 35 ++++++
>> include/configs/libretech-cc.h | 21 ++++
>> 10 files changed, 412 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
>> create mode 100644 board/amlogic/libretech-cc/Kconfig
>> create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
>> create mode 100644 board/amlogic/libretech-cc/Makefile
>> create mode 100644 board/amlogic/libretech-cc/README
>> create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
>> create mode 100644 configs/libretech-cc_defconfig
>> create mode 100644 include/configs/libretech-cc.h
>>
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
>
> [..]
>
>> new file mode 100644
>> index 0000000..d0e3bbb
>> --- /dev/null
>> +++ b/board/amlogic/libretech-cc/Makefile
>> @@ -0,0 +1,8 @@
>> +#
>> +# (C) Copyright 2016 BayLibre, SAS
>> +# Author: Neil Armstrong <narmstrong@baylibre.com>
>> +#
>> +# SPDX-License-Identifier: GPL-2.0+
>> +#
>> +
>> +obj-y := libretech-cc.o
>> diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/libretech-cc/README
>> new file mode 100644
>> index 0000000..8b38fff
>> --- /dev/null
>> +++ b/board/amlogic/libretech-cc/README
>> @@ -0,0 +1,96 @@
>> +U-Boot for LibreTech CC
>> +=======================
>> +
>> +LibreTech CC is a single board computer manufactured by Libre Technology
>> +with the following specifications:
>> +
>> + - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz
>> + - ARM Mali 450 GPU
>> + - 2GB DDR3 SDRAM
>> + - Gigabit Ethernet
>> + - HDMI 2.0 4K/60Hz display
>> + - 40-pin GPIO header
>> + - 4 x USB 2.0 Host, 1 x USB OTG
>> + - eMMC, microSD
>> + - Infrared receiver
>> +
>> +Schematics are available on the manufacturer website.
>> +
>> +Currently the U-Boot port supports the following devices:
>> + - serial
>> + - eMMC, microSD
>> + - Ethernet
>> +
>> +u-boot compilation
>
> U-Boot
>
>> +==================
>> +
>> + > export ARCH=arm
>> + > export CROSS_COMPILE=aarch64-none-elf-
>> + > make libretech-cc_defconfig
>> + > make
>> +
>> +Image creation
>> +==============
>> +
>> +Amlogic doesn't provide sources for the firmware and for tools needed
>> +to create the bootloader image, so it is necessary to obtain them from
>> +the git tree published by the board vendor:
>> +
>> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
>> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
>> + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
>> + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
>> + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
>> + > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
>> + > cd amlogic-u-boot
>> + > make libretech_cc_defconfig
>> + > make
>> + > export FIPDIR=$PWD/fip
>> +
>> +Go back to mainline U-Boot source tree then :
>> + > mkdir fip
>> +
>> + > cp $FIPDIR/gxl/bl2.bin fip/
>> + > cp $FIPDIR/gxl/acs.bin fip/
>> + > cp $FIPDIR/gxl/bl21.bin fip/
>> + > cp $FIPDIR/gxl/bl30.bin fip/
>> + > cp $FIPDIR/gxl/bl301.bin fip/
>> + > cp $FIPDIR/gxl/bl31.img fip/
>> + > cp u-boot.bin fip/bl33.bin
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl30.bin \
>> + fip/zero_tmp \
>> + fip/bl30_zero.bin \
>> + fip/bl301.bin \
>> + fip/bl301_zero.bin \
>> + fip/bl30_new.bin \
>> + bl30
>> +
>> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl2_acs.bin \
>> + fip/zero_tmp \
>> + fip/bl2_zero.bin \
>> + fip/bl21.bin \
>> + fip/bl21_zero.bin \
>> + fip/bl2_new.bin \
>> + bl2
>> +
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
>> + --output fip/u-boot.bin \
>> + --bl2 fip/bl2.n.bin.sig \
>> + --bl30 fip/bl30_new.bin.enc \
>> + --bl31 fip/bl31.img.enc \
>> + --bl33 fip/bl33.bin.enc
>> +
>> +and then write the image to SD with:
>> +
>> + > DEV=/dev/your_sd_device
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
>
> I wonder if the above could be done with binman? It is designed for
> putting images together.
Thanks for the tip, I'll have a look !
Neil
>
> Regards,
> Simon
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH v2 4/5] arm: Add LibreTech CC support based on Meson GXL family
@ 2017-11-25 9:46 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-25 9:46 UTC (permalink / raw)
To: linus-amlogic
Le 24/11/2017 23:35, Simon Glass a ?crit :
> Hi Neil,
>
> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> This adds platform code for the Libre Computer CC "Le Potato" board based on a
>> Meson GXL (S905X) SoC with the Meson GXL configuration.
>>
>> This initial submission supports UART, MMC/SDCard and Ethernet with the
>> Internal RMII PHY.
>>
>> The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
>> stable tree as of 4.13.8.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> arch/arm/dts/Makefile | 3 +-
>> arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
>> arch/arm/mach-meson/Kconfig | 9 ++
>> board/amlogic/libretech-cc/Kconfig | 12 ++
>> board/amlogic/libretech-cc/MAINTAINERS | 6 +
>> board/amlogic/libretech-cc/Makefile | 8 ++
>> board/amlogic/libretech-cc/README | 96 +++++++++++++++
>> board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
>> configs/libretech-cc_defconfig | 35 ++++++
>> include/configs/libretech-cc.h | 21 ++++
>> 10 files changed, 412 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
>> create mode 100644 board/amlogic/libretech-cc/Kconfig
>> create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
>> create mode 100644 board/amlogic/libretech-cc/Makefile
>> create mode 100644 board/amlogic/libretech-cc/README
>> create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
>> create mode 100644 configs/libretech-cc_defconfig
>> create mode 100644 include/configs/libretech-cc.h
>>
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
>
> [..]
>
>> new file mode 100644
>> index 0000000..d0e3bbb
>> --- /dev/null
>> +++ b/board/amlogic/libretech-cc/Makefile
>> @@ -0,0 +1,8 @@
>> +#
>> +# (C) Copyright 2016 BayLibre, SAS
>> +# Author: Neil Armstrong <narmstrong@baylibre.com>
>> +#
>> +# SPDX-License-Identifier: GPL-2.0+
>> +#
>> +
>> +obj-y := libretech-cc.o
>> diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/libretech-cc/README
>> new file mode 100644
>> index 0000000..8b38fff
>> --- /dev/null
>> +++ b/board/amlogic/libretech-cc/README
>> @@ -0,0 +1,96 @@
>> +U-Boot for LibreTech CC
>> +=======================
>> +
>> +LibreTech CC is a single board computer manufactured by Libre Technology
>> +with the following specifications:
>> +
>> + - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz
>> + - ARM Mali 450 GPU
>> + - 2GB DDR3 SDRAM
>> + - Gigabit Ethernet
>> + - HDMI 2.0 4K/60Hz display
>> + - 40-pin GPIO header
>> + - 4 x USB 2.0 Host, 1 x USB OTG
>> + - eMMC, microSD
>> + - Infrared receiver
>> +
>> +Schematics are available on the manufacturer website.
>> +
>> +Currently the U-Boot port supports the following devices:
>> + - serial
>> + - eMMC, microSD
>> + - Ethernet
>> +
>> +u-boot compilation
>
> U-Boot
>
>> +==================
>> +
>> + > export ARCH=arm
>> + > export CROSS_COMPILE=aarch64-none-elf-
>> + > make libretech-cc_defconfig
>> + > make
>> +
>> +Image creation
>> +==============
>> +
>> +Amlogic doesn't provide sources for the firmware and for tools needed
>> +to create the bootloader image, so it is necessary to obtain them from
>> +the git tree published by the board vendor:
>> +
>> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
>> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
>> + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
>> + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
>> + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
>> + > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
>> + > cd amlogic-u-boot
>> + > make libretech_cc_defconfig
>> + > make
>> + > export FIPDIR=$PWD/fip
>> +
>> +Go back to mainline U-Boot source tree then :
>> + > mkdir fip
>> +
>> + > cp $FIPDIR/gxl/bl2.bin fip/
>> + > cp $FIPDIR/gxl/acs.bin fip/
>> + > cp $FIPDIR/gxl/bl21.bin fip/
>> + > cp $FIPDIR/gxl/bl30.bin fip/
>> + > cp $FIPDIR/gxl/bl301.bin fip/
>> + > cp $FIPDIR/gxl/bl31.img fip/
>> + > cp u-boot.bin fip/bl33.bin
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl30.bin \
>> + fip/zero_tmp \
>> + fip/bl30_zero.bin \
>> + fip/bl301.bin \
>> + fip/bl301_zero.bin \
>> + fip/bl30_new.bin \
>> + bl30
>> +
>> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl2_acs.bin \
>> + fip/zero_tmp \
>> + fip/bl2_zero.bin \
>> + fip/bl21.bin \
>> + fip/bl21_zero.bin \
>> + fip/bl2_new.bin \
>> + bl2
>> +
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
>> + --output fip/u-boot.bin \
>> + --bl2 fip/bl2.n.bin.sig \
>> + --bl30 fip/bl30_new.bin.enc \
>> + --bl31 fip/bl31.img.enc \
>> + --bl33 fip/bl33.bin.enc
>> +
>> +and then write the image to SD with:
>> +
>> + > DEV=/dev/your_sd_device
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
>
> I wonder if the above could be done with binman? It is designed for
> putting images together.
Thanks for the tip, I'll have a look !
Neil
>
> Regards,
> Simon
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 5/5] arm: Add Khadas VIM support based on Meson GXL family
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-22 13:25 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: u-boot
This adds platform code for the Khadas VIM board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.
The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137 ++++++++++++++++++++++++++++
arch/arm/mach-meson/Kconfig | 9 ++
board/amlogic/khadas-vim/Kconfig | 12 +++
board/amlogic/khadas-vim/MAINTAINERS | 6 ++
board/amlogic/khadas-vim/Makefile | 8 ++
board/amlogic/khadas-vim/README | 96 +++++++++++++++++++
board/amlogic/khadas-vim/khadas-vim.c | 48 ++++++++++
configs/khadas-vim_defconfig | 35 +++++++
include/configs/khadas-vim.h | 21 +++++
10 files changed, 374 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
create mode 100644 board/amlogic/khadas-vim/Kconfig
create mode 100644 board/amlogic/khadas-vim/MAINTAINERS
create mode 100644 board/amlogic/khadas-vim/Makefile
create mode 100644 board/amlogic/khadas-vim/README
create mode 100644 board/amlogic/khadas-vim/khadas-vim.c
create mode 100644 configs/khadas-vim_defconfig
create mode 100644 include/configs/khadas-vim.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1845552..b44a915 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -56,7 +56,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-odroidc2.dtb \
meson-gxl-s905x-p212.dtb \
- meson-gxl-s905x-libretech-cc.dtb
+ meson-gxl-s905x-libretech-cc.dtb \
+ meson-gxl-s905x-khadas-vim.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
new file mode 100644
index 0000000..94567eb
--- /dev/null
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+#include "meson-gxl-s905x-p212.dtsi"
+
+/ {
+ compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
+ model = "Khadas VIM";
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1710000>;
+
+ button-function {
+ label = "Function";
+ linux,code = <KEY_FN>;
+ press-threshold-microvolt = <10000>;
+ };
+ };
+
+ aliases {
+ serial2 = &uart_AO_B;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button at 0 {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ pwmleds {
+ compatible = "pwm-leds";
+
+ power {
+ label = "vim:red:power";
+ pwms = <&pwm_AO_ab 1 7812500 0>;
+ max-brightness = <255>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&i2c_A {
+ status = "okay";
+ pinctrl-0 = <&i2c_a_pins>;
+ pinctrl-names = "default";
+};
+
+&i2c_B {
+ status = "okay";
+ pinctrl-0 = <&i2c_b_pins>;
+ pinctrl-names = "default";
+
+ rtc: rtc at 51 {
+ /* has to be enabled manually when a battery is connected: */
+ status = "disabled";
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ };
+};
+
+&ir {
+ linux,rc-map-name = "rc-geekbox";
+};
+
+&pwm_AO_ab {
+ status = "okay";
+ pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal> , <&xtal>;
+ clock-names = "clkin0", "clkin1" ;
+};
+
+&pwm_ef {
+ pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
+};
+
+&sd_emmc_a {
+ brcmf: wifi at 1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
+&uart_AO {
+ status = "okay";
+};
+
+/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
+&uart_AO_B {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_b_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index ca08dc3..0350787 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -45,6 +45,13 @@ config TARGET_LIBRETECH_CC
with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
eMMC, IR receiver and a 40-pin GPIO header.
+config TARGET_KHADAS_VIM
+ bool "KHADAS-VIM"
+ help
+ Khadas VIM is a single board computer based on Meson GXL
+ with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
+ eMMC, IR receiver and a 40-pin GPIO header.
+
endif
config SYS_SOC
@@ -59,4 +66,6 @@ source "board/amlogic/p212/Kconfig"
source "board/amlogic/libretech-cc/Kconfig"
+source "board/amlogic/khadas-vim/Kconfig"
+
endif
diff --git a/board/amlogic/khadas-vim/Kconfig b/board/amlogic/khadas-vim/Kconfig
new file mode 100644
index 0000000..0fa8db9
--- /dev/null
+++ b/board/amlogic/khadas-vim/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_KHADAS_VIM
+
+config SYS_BOARD
+ default "khadas-vim"
+
+config SYS_VENDOR
+ default "amlogic"
+
+config SYS_CONFIG_NAME
+ default "khadas-vim"
+
+endif
diff --git a/board/amlogic/khadas-vim/MAINTAINERS b/board/amlogic/khadas-vim/MAINTAINERS
new file mode 100644
index 0000000..024220a
--- /dev/null
+++ b/board/amlogic/khadas-vim/MAINTAINERS
@@ -0,0 +1,6 @@
+KHADAS-VIM
+M: Neil Armstrong <narmstrong@baylibre.com>
+S: Maintained
+F: board/amlogic/khadas-vim/
+F: include/configs/khadas-vim.h
+F: configs/khadas-vim_defconfig
diff --git a/board/amlogic/khadas-vim/Makefile b/board/amlogic/khadas-vim/Makefile
new file mode 100644
index 0000000..eedc1bf
--- /dev/null
+++ b/board/amlogic/khadas-vim/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2016 BayLibre, SAS
+# Author: Neil Armstrong <narmstrong@baylibre.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := khadas-vim.o
diff --git a/board/amlogic/khadas-vim/README b/board/amlogic/khadas-vim/README
new file mode 100644
index 0000000..add6a29
--- /dev/null
+++ b/board/amlogic/khadas-vim/README
@@ -0,0 +1,96 @@
+U-Boot for Khadas VIM
+=======================
+
+Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Tomato
+Technology Co., Ltd with the following specifications:
+
+ - Amlogic S905x ARM Cortex-A53 quad-core SoC @ 2GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 10/100 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
+ - 8GB/16GBeMMC
+ - microSD
+ - SDIO Wifi Module, Bluetooth
+ - Two channels IR receiver
+
+Currently the u-boot port supports the following devices:
+ - serial
+ - eMMC, microSD
+ - Ethernet
+
+u-boot compilation
+==================
+
+ > export ARCH=arm
+ > export CROSS_COMPILE=aarch64-none-elf-
+ > make khadas-vim_defconfig
+ > make
+
+Image creation
+==============
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+ > git clone https://github.com/khadas/u-boot -b Vim vim-u-boot
+ > cd vim-u-boot
+ > make kvim_defconfig
+ > make
+ > export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+ > mkdir fip
+
+ > cp $FIPDIR/gxl/bl2.bin fip/
+ > cp $FIPDIR/gxl/acs.bin fip/
+ > cp $FIPDIR/gxl/bl21.bin fip/
+ > cp $FIPDIR/gxl/bl30.bin fip/
+ > cp $FIPDIR/gxl/bl301.bin fip/
+ > cp $FIPDIR/gxl/bl31.img fip/
+ > cp u-boot.bin fip/bl33.bin
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl30.bin \
+ fip/zero_tmp \
+ fip/bl30_zero.bin \
+ fip/bl301.bin \
+ fip/bl301_zero.bin \
+ fip/bl30_new.bin \
+ bl30
+
+ > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl2_acs.bin \
+ fip/zero_tmp \
+ fip/bl2_zero.bin \
+ fip/bl21.bin \
+ fip/bl21_zero.bin \
+ fip/bl2_new.bin \
+ bl2
+
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+ > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc
+
+and then write the image to SD with:
+
+ > DEV=/dev/your_sd_device
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
diff --git a/board/amlogic/khadas-vim/khadas-vim.c b/board/amlogic/khadas-vim/khadas-vim.c
new file mode 100644
index 0000000..a120ab0
--- /dev/null
+++ b/board/amlogic/khadas-vim/khadas-vim.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
+#include <asm/arch/eth.h>
+
+#define EFUSE_SN_OFFSET 20
+#define EFUSE_SN_SIZE 16
+#define EFUSE_MAC_OFFSET 52
+#define EFUSE_MAC_SIZE 6
+
+int board_init(void)
+{
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ u8 mac_addr[EFUSE_MAC_SIZE];
+ char serial[EFUSE_SN_SIZE];
+ ssize_t len;
+
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, true);
+
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+ eth_env_set_enetaddr("ethaddr", mac_addr);
+ }
+
+ if (!env_get("serial#")) {
+ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+ EFUSE_SN_SIZE);
+ if (len == EFUSE_SN_SIZE)
+ env_set("serial#", serial);
+ }
+
+ return 0;
+}
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
new file mode 100644
index 0000000..dcccc69
--- /dev/null
+++ b/configs/khadas-vim_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_MESON_GXL=y
+CONFIG_TARGET_KHADAS_VIM=y
+CONFIG_IDENT_STRING=" khadas-vim"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_MESON_GXL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXL=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/khadas-vim.h b/include/configs/khadas-vim.h
new file mode 100644
index 0000000..40e2df0
--- /dev/null
+++ b/include/configs/khadas-vim.h
@@ -0,0 +1,21 @@
+/*
+ * Configuration for Khadas VIM
+ *
+ * Copyright (C) 2017 Baylibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_PHY_ADDR 8
+
+#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
+
+#include <configs/meson-gxbb-common.h>
+
+#endif /* __CONFIG_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH v2 5/5] arm: Add Khadas VIM support based on Meson GXL family
@ 2017-11-22 13:25 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-22 13:25 UTC (permalink / raw)
To: linus-amlogic
This adds platform code for the Khadas VIM board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.
The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137 ++++++++++++++++++++++++++++
arch/arm/mach-meson/Kconfig | 9 ++
board/amlogic/khadas-vim/Kconfig | 12 +++
board/amlogic/khadas-vim/MAINTAINERS | 6 ++
board/amlogic/khadas-vim/Makefile | 8 ++
board/amlogic/khadas-vim/README | 96 +++++++++++++++++++
board/amlogic/khadas-vim/khadas-vim.c | 48 ++++++++++
configs/khadas-vim_defconfig | 35 +++++++
include/configs/khadas-vim.h | 21 +++++
10 files changed, 374 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
create mode 100644 board/amlogic/khadas-vim/Kconfig
create mode 100644 board/amlogic/khadas-vim/MAINTAINERS
create mode 100644 board/amlogic/khadas-vim/Makefile
create mode 100644 board/amlogic/khadas-vim/README
create mode 100644 board/amlogic/khadas-vim/khadas-vim.c
create mode 100644 configs/khadas-vim_defconfig
create mode 100644 include/configs/khadas-vim.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1845552..b44a915 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -56,7 +56,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-odroidc2.dtb \
meson-gxl-s905x-p212.dtb \
- meson-gxl-s905x-libretech-cc.dtb
+ meson-gxl-s905x-libretech-cc.dtb \
+ meson-gxl-s905x-khadas-vim.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
new file mode 100644
index 0000000..94567eb
--- /dev/null
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+#include "meson-gxl-s905x-p212.dtsi"
+
+/ {
+ compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
+ model = "Khadas VIM";
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1710000>;
+
+ button-function {
+ label = "Function";
+ linux,code = <KEY_FN>;
+ press-threshold-microvolt = <10000>;
+ };
+ };
+
+ aliases {
+ serial2 = &uart_AO_B;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button at 0 {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ pwmleds {
+ compatible = "pwm-leds";
+
+ power {
+ label = "vim:red:power";
+ pwms = <&pwm_AO_ab 1 7812500 0>;
+ max-brightness = <255>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&i2c_A {
+ status = "okay";
+ pinctrl-0 = <&i2c_a_pins>;
+ pinctrl-names = "default";
+};
+
+&i2c_B {
+ status = "okay";
+ pinctrl-0 = <&i2c_b_pins>;
+ pinctrl-names = "default";
+
+ rtc: rtc at 51 {
+ /* has to be enabled manually when a battery is connected: */
+ status = "disabled";
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ };
+};
+
+&ir {
+ linux,rc-map-name = "rc-geekbox";
+};
+
+&pwm_AO_ab {
+ status = "okay";
+ pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal> , <&xtal>;
+ clock-names = "clkin0", "clkin1" ;
+};
+
+&pwm_ef {
+ pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
+};
+
+&sd_emmc_a {
+ brcmf: wifi at 1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
+&uart_AO {
+ status = "okay";
+};
+
+/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
+&uart_AO_B {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_b_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index ca08dc3..0350787 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -45,6 +45,13 @@ config TARGET_LIBRETECH_CC
with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
eMMC, IR receiver and a 40-pin GPIO header.
+config TARGET_KHADAS_VIM
+ bool "KHADAS-VIM"
+ help
+ Khadas VIM is a single board computer based on Meson GXL
+ with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
+ eMMC, IR receiver and a 40-pin GPIO header.
+
endif
config SYS_SOC
@@ -59,4 +66,6 @@ source "board/amlogic/p212/Kconfig"
source "board/amlogic/libretech-cc/Kconfig"
+source "board/amlogic/khadas-vim/Kconfig"
+
endif
diff --git a/board/amlogic/khadas-vim/Kconfig b/board/amlogic/khadas-vim/Kconfig
new file mode 100644
index 0000000..0fa8db9
--- /dev/null
+++ b/board/amlogic/khadas-vim/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_KHADAS_VIM
+
+config SYS_BOARD
+ default "khadas-vim"
+
+config SYS_VENDOR
+ default "amlogic"
+
+config SYS_CONFIG_NAME
+ default "khadas-vim"
+
+endif
diff --git a/board/amlogic/khadas-vim/MAINTAINERS b/board/amlogic/khadas-vim/MAINTAINERS
new file mode 100644
index 0000000..024220a
--- /dev/null
+++ b/board/amlogic/khadas-vim/MAINTAINERS
@@ -0,0 +1,6 @@
+KHADAS-VIM
+M: Neil Armstrong <narmstrong@baylibre.com>
+S: Maintained
+F: board/amlogic/khadas-vim/
+F: include/configs/khadas-vim.h
+F: configs/khadas-vim_defconfig
diff --git a/board/amlogic/khadas-vim/Makefile b/board/amlogic/khadas-vim/Makefile
new file mode 100644
index 0000000..eedc1bf
--- /dev/null
+++ b/board/amlogic/khadas-vim/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2016 BayLibre, SAS
+# Author: Neil Armstrong <narmstrong@baylibre.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := khadas-vim.o
diff --git a/board/amlogic/khadas-vim/README b/board/amlogic/khadas-vim/README
new file mode 100644
index 0000000..add6a29
--- /dev/null
+++ b/board/amlogic/khadas-vim/README
@@ -0,0 +1,96 @@
+U-Boot for Khadas VIM
+=======================
+
+Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Tomato
+Technology Co., Ltd with the following specifications:
+
+ - Amlogic S905x ARM Cortex-A53 quad-core SoC @ 2GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 10/100 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
+ - 8GB/16GBeMMC
+ - microSD
+ - SDIO Wifi Module, Bluetooth
+ - Two channels IR receiver
+
+Currently the u-boot port supports the following devices:
+ - serial
+ - eMMC, microSD
+ - Ethernet
+
+u-boot compilation
+==================
+
+ > export ARCH=arm
+ > export CROSS_COMPILE=aarch64-none-elf-
+ > make khadas-vim_defconfig
+ > make
+
+Image creation
+==============
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+ > git clone https://github.com/khadas/u-boot -b Vim vim-u-boot
+ > cd vim-u-boot
+ > make kvim_defconfig
+ > make
+ > export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+ > mkdir fip
+
+ > cp $FIPDIR/gxl/bl2.bin fip/
+ > cp $FIPDIR/gxl/acs.bin fip/
+ > cp $FIPDIR/gxl/bl21.bin fip/
+ > cp $FIPDIR/gxl/bl30.bin fip/
+ > cp $FIPDIR/gxl/bl301.bin fip/
+ > cp $FIPDIR/gxl/bl31.img fip/
+ > cp u-boot.bin fip/bl33.bin
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl30.bin \
+ fip/zero_tmp \
+ fip/bl30_zero.bin \
+ fip/bl301.bin \
+ fip/bl301_zero.bin \
+ fip/bl30_new.bin \
+ bl30
+
+ > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ > $FIPDIR/blx_fix.sh \
+ fip/bl2_acs.bin \
+ fip/zero_tmp \
+ fip/bl2_zero.bin \
+ fip/bl21.bin \
+ fip/bl21_zero.bin \
+ fip/bl2_new.bin \
+ bl2
+
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+ > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+ > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc
+
+and then write the image to SD with:
+
+ > DEV=/dev/your_sd_device
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
diff --git a/board/amlogic/khadas-vim/khadas-vim.c b/board/amlogic/khadas-vim/khadas-vim.c
new file mode 100644
index 0000000..a120ab0
--- /dev/null
+++ b/board/amlogic/khadas-vim/khadas-vim.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
+#include <asm/arch/eth.h>
+
+#define EFUSE_SN_OFFSET 20
+#define EFUSE_SN_SIZE 16
+#define EFUSE_MAC_OFFSET 52
+#define EFUSE_MAC_SIZE 6
+
+int board_init(void)
+{
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ u8 mac_addr[EFUSE_MAC_SIZE];
+ char serial[EFUSE_SN_SIZE];
+ ssize_t len;
+
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, true);
+
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+ eth_env_set_enetaddr("ethaddr", mac_addr);
+ }
+
+ if (!env_get("serial#")) {
+ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+ EFUSE_SN_SIZE);
+ if (len == EFUSE_SN_SIZE)
+ env_set("serial#", serial);
+ }
+
+ return 0;
+}
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
new file mode 100644
index 0000000..dcccc69
--- /dev/null
+++ b/configs/khadas-vim_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_MESON_GXL=y
+CONFIG_TARGET_KHADAS_VIM=y
+CONFIG_IDENT_STRING=" khadas-vim"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_MESON_GXL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXL=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/khadas-vim.h b/include/configs/khadas-vim.h
new file mode 100644
index 0000000..40e2df0
--- /dev/null
+++ b/include/configs/khadas-vim.h
@@ -0,0 +1,21 @@
+/*
+ * Configuration for Khadas VIM
+ *
+ * Copyright (C) 2017 Baylibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_PHY_ADDR 8
+
+#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
+
+#include <configs/meson-gxbb-common.h>
+
+#endif /* __CONFIG_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH v2 5/5] arm: Add Khadas VIM support based on Meson GXL family
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-24 22:35 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: u-boot
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> This adds platform code for the Khadas VIM board based on a
> Meson GXL (S905X) SoC with the Meson GXL configuration.
>
> This initial submission supports UART, MMC/SDCard and Ethernet with the
> Internal RMII PHY.
>
> The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13
> stable tree as of 4.13.8.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137 ++++++++++++++++++++++++++++
> arch/arm/mach-meson/Kconfig | 9 ++
> board/amlogic/khadas-vim/Kconfig | 12 +++
> board/amlogic/khadas-vim/MAINTAINERS | 6 ++
> board/amlogic/khadas-vim/Makefile | 8 ++
> board/amlogic/khadas-vim/README | 96 +++++++++++++++++++
> board/amlogic/khadas-vim/khadas-vim.c | 48 ++++++++++
> configs/khadas-vim_defconfig | 35 +++++++
> include/configs/khadas-vim.h | 21 +++++
> 10 files changed, 374 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
> create mode 100644 board/amlogic/khadas-vim/Kconfig
> create mode 100644 board/amlogic/khadas-vim/MAINTAINERS
> create mode 100644 board/amlogic/khadas-vim/Makefile
> create mode 100644 board/amlogic/khadas-vim/README
> create mode 100644 board/amlogic/khadas-vim/khadas-vim.c
> create mode 100644 configs/khadas-vim_defconfig
> create mode 100644 include/configs/khadas-vim.h
Reviewed-by: Simon Glass <sjg@chromium.org>
Please see below.
> diff --git a/board/amlogic/khadas-vim/README b/board/amlogic/khadas-vim/README
> new file mode 100644
> index 0000000..add6a29
> --- /dev/null
> +++ b/board/amlogic/khadas-vim/README
> @@ -0,0 +1,96 @@
> +U-Boot for Khadas VIM
> +=======================
> +
> +Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Tomato
> +Technology Co., Ltd with the following specifications:
> +
> + - Amlogic S905x ARM Cortex-A53 quad-core SoC @ 2GHz
> + - ARM Mali 450 GPU
> + - 2GB DDR3 SDRAM
> + - 10/100 Ethernet
> + - HDMI 2.0 4K/60Hz display
> + - 40-pin GPIO header
> + - 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
> + - 8GB/16GBeMMC
> + - microSD
> + - SDIO Wifi Module, Bluetooth
> + - Two channels IR receiver
> +
> +Currently the u-boot port supports the following devices:
> + - serial
> + - eMMC, microSD
> + - Ethernet
> +
> +u-boot compilation
U-Boot
> +==================
> +
> + > export ARCH=arm
> + > export CROSS_COMPILE=aarch64-none-elf-
> + > make khadas-vim_defconfig
> + > make
> +
> +Image creation
> +==============
> +
> +Amlogic doesn't provide sources for the firmware and for tools needed
> +to create the bootloader image, so it is necessary to obtain them from
> +the git tree published by the board vendor:
> +
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> + > git clone https://github.com/khadas/u-boot -b Vim vim-u-boot
> + > cd vim-u-boot
> + > make kvim_defconfig
> + > make
> + > export FIPDIR=$PWD/fip
> +
> +Go back to mainline U-Boot source tree then :
> + > mkdir fip
> +
> + > cp $FIPDIR/gxl/bl2.bin fip/
> + > cp $FIPDIR/gxl/acs.bin fip/
> + > cp $FIPDIR/gxl/bl21.bin fip/
> + > cp $FIPDIR/gxl/bl30.bin fip/
> + > cp $FIPDIR/gxl/bl301.bin fip/
> + > cp $FIPDIR/gxl/bl31.img fip/
> + > cp u-boot.bin fip/bl33.bin
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl30.bin \
> + fip/zero_tmp \
> + fip/bl30_zero.bin \
> + fip/bl301.bin \
> + fip/bl301_zero.bin \
> + fip/bl30_new.bin \
> + bl30
> +
> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl2_acs.bin \
> + fip/zero_tmp \
> + fip/bl2_zero.bin \
> + fip/bl21.bin \
> + fip/bl21_zero.bin \
> + fip/bl2_new.bin \
> + bl2
> +
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
> + --output fip/u-boot.bin \
> + --bl2 fip/bl2.n.bin.sig \
> + --bl30 fip/bl30_new.bin.enc \
> + --bl31 fip/bl31.img.enc \
> + --bl33 fip/bl33.bin.enc
> +
> +and then write the image to SD with:
> +
> + > DEV=/dev/your_sd_device
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
This bit (from 'got back to U-Boot sources') seems like a job for
binman, as I just mentioned in the other patch.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH v2 5/5] arm: Add Khadas VIM support based on Meson GXL family
@ 2017-11-24 22:35 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-24 22:35 UTC (permalink / raw)
To: linus-amlogic
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
> This adds platform code for the Khadas VIM board based on a
> Meson GXL (S905X) SoC with the Meson GXL configuration.
>
> This initial submission supports UART, MMC/SDCard and Ethernet with the
> Internal RMII PHY.
>
> The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13
> stable tree as of 4.13.8.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137 ++++++++++++++++++++++++++++
> arch/arm/mach-meson/Kconfig | 9 ++
> board/amlogic/khadas-vim/Kconfig | 12 +++
> board/amlogic/khadas-vim/MAINTAINERS | 6 ++
> board/amlogic/khadas-vim/Makefile | 8 ++
> board/amlogic/khadas-vim/README | 96 +++++++++++++++++++
> board/amlogic/khadas-vim/khadas-vim.c | 48 ++++++++++
> configs/khadas-vim_defconfig | 35 +++++++
> include/configs/khadas-vim.h | 21 +++++
> 10 files changed, 374 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
> create mode 100644 board/amlogic/khadas-vim/Kconfig
> create mode 100644 board/amlogic/khadas-vim/MAINTAINERS
> create mode 100644 board/amlogic/khadas-vim/Makefile
> create mode 100644 board/amlogic/khadas-vim/README
> create mode 100644 board/amlogic/khadas-vim/khadas-vim.c
> create mode 100644 configs/khadas-vim_defconfig
> create mode 100644 include/configs/khadas-vim.h
Reviewed-by: Simon Glass <sjg@chromium.org>
Please see below.
> diff --git a/board/amlogic/khadas-vim/README b/board/amlogic/khadas-vim/README
> new file mode 100644
> index 0000000..add6a29
> --- /dev/null
> +++ b/board/amlogic/khadas-vim/README
> @@ -0,0 +1,96 @@
> +U-Boot for Khadas VIM
> +=======================
> +
> +Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Tomato
> +Technology Co., Ltd with the following specifications:
> +
> + - Amlogic S905x ARM Cortex-A53 quad-core SoC @ 2GHz
> + - ARM Mali 450 GPU
> + - 2GB DDR3 SDRAM
> + - 10/100 Ethernet
> + - HDMI 2.0 4K/60Hz display
> + - 40-pin GPIO header
> + - 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
> + - 8GB/16GBeMMC
> + - microSD
> + - SDIO Wifi Module, Bluetooth
> + - Two channels IR receiver
> +
> +Currently the u-boot port supports the following devices:
> + - serial
> + - eMMC, microSD
> + - Ethernet
> +
> +u-boot compilation
U-Boot
> +==================
> +
> + > export ARCH=arm
> + > export CROSS_COMPILE=aarch64-none-elf-
> + > make khadas-vim_defconfig
> + > make
> +
> +Image creation
> +==============
> +
> +Amlogic doesn't provide sources for the firmware and for tools needed
> +to create the bootloader image, so it is necessary to obtain them from
> +the git tree published by the board vendor:
> +
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> + > git clone https://github.com/khadas/u-boot -b Vim vim-u-boot
> + > cd vim-u-boot
> + > make kvim_defconfig
> + > make
> + > export FIPDIR=$PWD/fip
> +
> +Go back to mainline U-Boot source tree then :
> + > mkdir fip
> +
> + > cp $FIPDIR/gxl/bl2.bin fip/
> + > cp $FIPDIR/gxl/acs.bin fip/
> + > cp $FIPDIR/gxl/bl21.bin fip/
> + > cp $FIPDIR/gxl/bl30.bin fip/
> + > cp $FIPDIR/gxl/bl301.bin fip/
> + > cp $FIPDIR/gxl/bl31.img fip/
> + > cp u-boot.bin fip/bl33.bin
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl30.bin \
> + fip/zero_tmp \
> + fip/bl30_zero.bin \
> + fip/bl301.bin \
> + fip/bl301_zero.bin \
> + fip/bl30_new.bin \
> + bl30
> +
> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> +
> + > $FIPDIR/blx_fix.sh \
> + fip/bl2_acs.bin \
> + fip/zero_tmp \
> + fip/bl2_zero.bin \
> + fip/bl21.bin \
> + fip/bl21_zero.bin \
> + fip/bl2_new.bin \
> + bl2
> +
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
> + --output fip/u-boot.bin \
> + --bl2 fip/bl2.n.bin.sig \
> + --bl30 fip/bl30_new.bin.enc \
> + --bl31 fip/bl31.img.enc \
> + --bl33 fip/bl33.bin.enc
> +
> +and then write the image to SD with:
> +
> + > DEV=/dev/your_sd_device
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
This bit (from 'got back to U-Boot sources') seems like a job for
binman, as I just mentioned in the other patch.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 5/5] arm: Add Khadas VIM support based on Meson GXL family
2017-11-24 22:35 ` Simon Glass
@ 2017-11-26 13:48 ` Andreas Färber
-1 siblings, 0 replies; 40+ messages in thread
From: Andreas Färber @ 2017-11-26 13:48 UTC (permalink / raw)
To: u-boot
Hi Simon,
Am 24.11.2017 um 23:35 schrieb Simon Glass:
> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> +Go back to mainline U-Boot source tree then :
>> + > mkdir fip
>> +
>> + > cp $FIPDIR/gxl/bl2.bin fip/
>> + > cp $FIPDIR/gxl/acs.bin fip/
>> + > cp $FIPDIR/gxl/bl21.bin fip/
>> + > cp $FIPDIR/gxl/bl30.bin fip/
>> + > cp $FIPDIR/gxl/bl301.bin fip/
>> + > cp $FIPDIR/gxl/bl31.img fip/
>> + > cp u-boot.bin fip/bl33.bin
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl30.bin \
>> + fip/zero_tmp \
>> + fip/bl30_zero.bin \
>> + fip/bl301.bin \
>> + fip/bl301_zero.bin \
>> + fip/bl30_new.bin \
>> + bl30
>> +
>> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl2_acs.bin \
>> + fip/zero_tmp \
>> + fip/bl2_zero.bin \
>> + fip/bl21.bin \
>> + fip/bl21_zero.bin \
>> + fip/bl2_new.bin \
>> + bl2
>> +
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
>> + --output fip/u-boot.bin \
>> + --bl2 fip/bl2.n.bin.sig \
>> + --bl30 fip/bl30_new.bin.enc \
>> + --bl31 fip/bl31.img.enc \
>> + --bl33 fip/bl33.bin.enc
>> +
>> +and then write the image to SD with:
>> +
>> + > DEV=/dev/your_sd_device
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
>
> This bit (from 'got back to U-Boot sources') seems like a job for
> binman, as I just mentioned in the other patch.
I'm not familiar with binman either but would like to point out that
I've authored Open Source meson-tools for GXBB that could/should/will be
adapted to GXL at some point, too.
https://github.com/afaerber/meson-tools
So I'll be strictly opposed to hiding the above instructions from users
or to hardcoding the use of non-free x86_64-only tools inside U-Boot!
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 5/5] arm: Add Khadas VIM support based on Meson GXL family
@ 2017-11-26 13:48 ` Andreas Färber
0 siblings, 0 replies; 40+ messages in thread
From: Andreas Färber @ 2017-11-26 13:48 UTC (permalink / raw)
To: linus-amlogic
Hi Simon,
Am 24.11.2017 um 23:35 schrieb Simon Glass:
> On 22 November 2017 at 06:25, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> +Go back to mainline U-Boot source tree then :
>> + > mkdir fip
>> +
>> + > cp $FIPDIR/gxl/bl2.bin fip/
>> + > cp $FIPDIR/gxl/acs.bin fip/
>> + > cp $FIPDIR/gxl/bl21.bin fip/
>> + > cp $FIPDIR/gxl/bl30.bin fip/
>> + > cp $FIPDIR/gxl/bl301.bin fip/
>> + > cp $FIPDIR/gxl/bl31.img fip/
>> + > cp u-boot.bin fip/bl33.bin
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl30.bin \
>> + fip/zero_tmp \
>> + fip/bl30_zero.bin \
>> + fip/bl301.bin \
>> + fip/bl301_zero.bin \
>> + fip/bl30_new.bin \
>> + bl30
>> +
>> + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
>> +
>> + > $FIPDIR/blx_fix.sh \
>> + fip/bl2_acs.bin \
>> + fip/zero_tmp \
>> + fip/bl2_zero.bin \
>> + fip/bl21.bin \
>> + fip/bl21_zero.bin \
>> + fip/bl2_new.bin \
>> + bl2
>> +
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
>> + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
>> + --output fip/u-boot.bin \
>> + --bl2 fip/bl2.n.bin.sig \
>> + --bl30 fip/bl30_new.bin.enc \
>> + --bl31 fip/bl31.img.enc \
>> + --bl33 fip/bl33.bin.enc
>> +
>> +and then write the image to SD with:
>> +
>> + > DEV=/dev/your_sd_device
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
>> + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
>
> This bit (from 'got back to U-Boot sources') seems like a job for
> binman, as I just mentioned in the other patch.
I'm not familiar with binman either but would like to point out that
I've authored Open Source meson-tools for GXBB that could/should/will be
adapted to GXL at some point, too.
https://github.com/afaerber/meson-tools
So I'll be strictly opposed to hiding the above instructions from users
or to hardcoding the use of non-free x86_64-only tools inside U-Boot!
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany
GF: Felix Imend?rffer, Jane Smithard, Graham Norton
HRB 21284 (AG N?rnberg)
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 0/5] Add support for Amlogic GXL Based SBCs
2017-11-22 13:25 ` Neil Armstrong
@ 2017-11-25 9:48 ` Neil Armstrong
-1 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-25 9:48 UTC (permalink / raw)
To: u-boot
Hi Tom, Simon,
Le 22/11/2017 14:25, Neil Armstrong a écrit :
> This patchset aimed to add minimal support for the following Amlogic GXL SoC
> based board:
> - LibreTech-CC
> - Khadas VIM
>
> The initial support is composed of :
> - Minimal boot support with serial, MMC, Ethernet and SDCard
> - Updated DTS from Linux 4.13.8
>
> Commands to generate a valid binary are provided in the board README.
>
> A common Ethernet init function is introduced to avoid duplicating
> the same hardware init code.
>
> The P212 and Odroid-C2 board are also converted to this common function
> by this patchset.
>
> The following work will be pushed later on :
> - Support for dynamic reading of DDR memory size from registers
> - USB DWC3 Host Support with PHY support
I'll try to address Simon's comments, but is it still possible
to have this merged for v2018.01 ?
For the next release cycle, I'll try to add a proper clock driver
and have a look to binman for sure.
Neil
>
> Changes since v1:
> - Add common ethernet init function
> - Switch P212 and Odroid-C2 to use this ethernet init function
> - Fix typos in READMEs
> - Drop #define CONFIG_CONS_INDEX
>
> Neil Armstrong (5):
> ARM: arch-meson: add ethernet common init function
> board: odroid-c2: use common ethernet init function
> board: p212: use common ethernet init function
> arm: Add LibreTech CC support based on Meson GXL family
> arm: Add Khadas VIM support based on Meson GXL family
>
> arch/arm/dts/Makefile | 4 +-
> arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137 +++++++++++++++++++++
> arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
> arch/arm/include/asm/arch-meson/eth.h | 15 +++
> arch/arm/mach-meson/Kconfig | 18 +++
> arch/arm/mach-meson/Makefile | 2 +-
> arch/arm/mach-meson/eth.c | 53 ++++++++
> board/amlogic/khadas-vim/Kconfig | 12 ++
> board/amlogic/khadas-vim/MAINTAINERS | 6 +
> board/amlogic/khadas-vim/Makefile | 8 ++
> board/amlogic/khadas-vim/README | 96 +++++++++++++++
> board/amlogic/khadas-vim/khadas-vim.c | 48 ++++++++
> board/amlogic/libretech-cc/Kconfig | 12 ++
> board/amlogic/libretech-cc/MAINTAINERS | 6 +
> board/amlogic/libretech-cc/Makefile | 8 ++
> board/amlogic/libretech-cc/README | 96 +++++++++++++++
> board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
> board/amlogic/odroid-c2/odroid-c2.c | 11 +-
> board/amlogic/p212/p212.c | 14 +--
> configs/khadas-vim_defconfig | 35 ++++++
> configs/libretech-cc_defconfig | 35 ++++++
> include/configs/khadas-vim.h | 21 ++++
> include/configs/libretech-cc.h | 21 ++++
> 23 files changed, 858 insertions(+), 23 deletions(-)
> create mode 100644 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
> create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
> create mode 100644 arch/arm/mach-meson/eth.c
> create mode 100644 board/amlogic/khadas-vim/Kconfig
> create mode 100644 board/amlogic/khadas-vim/MAINTAINERS
> create mode 100644 board/amlogic/khadas-vim/Makefile
> create mode 100644 board/amlogic/khadas-vim/README
> create mode 100644 board/amlogic/khadas-vim/khadas-vim.c
> create mode 100644 board/amlogic/libretech-cc/Kconfig
> create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
> create mode 100644 board/amlogic/libretech-cc/Makefile
> create mode 100644 board/amlogic/libretech-cc/README
> create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
> create mode 100644 configs/khadas-vim_defconfig
> create mode 100644 configs/libretech-cc_defconfig
> create mode 100644 include/configs/khadas-vim.h
> create mode 100644 include/configs/libretech-cc.h
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH v2 0/5] Add support for Amlogic GXL Based SBCs
@ 2017-11-25 9:48 ` Neil Armstrong
0 siblings, 0 replies; 40+ messages in thread
From: Neil Armstrong @ 2017-11-25 9:48 UTC (permalink / raw)
To: linus-amlogic
Hi Tom, Simon,
Le 22/11/2017 14:25, Neil Armstrong a ?crit :
> This patchset aimed to add minimal support for the following Amlogic GXL SoC
> based board:
> - LibreTech-CC
> - Khadas VIM
>
> The initial support is composed of :
> - Minimal boot support with serial, MMC, Ethernet and SDCard
> - Updated DTS from Linux 4.13.8
>
> Commands to generate a valid binary are provided in the board README.
>
> A common Ethernet init function is introduced to avoid duplicating
> the same hardware init code.
>
> The P212 and Odroid-C2 board are also converted to this common function
> by this patchset.
>
> The following work will be pushed later on :
> - Support for dynamic reading of DDR memory size from registers
> - USB DWC3 Host Support with PHY support
I'll try to address Simon's comments, but is it still possible
to have this merged for v2018.01 ?
For the next release cycle, I'll try to add a proper clock driver
and have a look to binman for sure.
Neil
>
> Changes since v1:
> - Add common ethernet init function
> - Switch P212 and Odroid-C2 to use this ethernet init function
> - Fix typos in READMEs
> - Drop #define CONFIG_CONS_INDEX
>
> Neil Armstrong (5):
> ARM: arch-meson: add ethernet common init function
> board: odroid-c2: use common ethernet init function
> board: p212: use common ethernet init function
> arm: Add LibreTech CC support based on Meson GXL family
> arm: Add Khadas VIM support based on Meson GXL family
>
> arch/arm/dts/Makefile | 4 +-
> arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137 +++++++++++++++++++++
> arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++++++++++++++++++++++++++
> arch/arm/include/asm/arch-meson/eth.h | 15 +++
> arch/arm/mach-meson/Kconfig | 18 +++
> arch/arm/mach-meson/Makefile | 2 +-
> arch/arm/mach-meson/eth.c | 53 ++++++++
> board/amlogic/khadas-vim/Kconfig | 12 ++
> board/amlogic/khadas-vim/MAINTAINERS | 6 +
> board/amlogic/khadas-vim/Makefile | 8 ++
> board/amlogic/khadas-vim/README | 96 +++++++++++++++
> board/amlogic/khadas-vim/khadas-vim.c | 48 ++++++++
> board/amlogic/libretech-cc/Kconfig | 12 ++
> board/amlogic/libretech-cc/MAINTAINERS | 6 +
> board/amlogic/libretech-cc/Makefile | 8 ++
> board/amlogic/libretech-cc/README | 96 +++++++++++++++
> board/amlogic/libretech-cc/libretech-cc.c | 52 ++++++++
> board/amlogic/odroid-c2/odroid-c2.c | 11 +-
> board/amlogic/p212/p212.c | 14 +--
> configs/khadas-vim_defconfig | 35 ++++++
> configs/libretech-cc_defconfig | 35 ++++++
> include/configs/khadas-vim.h | 21 ++++
> include/configs/libretech-cc.h | 21 ++++
> 23 files changed, 858 insertions(+), 23 deletions(-)
> create mode 100644 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
> create mode 100644 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
> create mode 100644 arch/arm/include/asm/arch-meson/eth.h
> create mode 100644 arch/arm/mach-meson/eth.c
> create mode 100644 board/amlogic/khadas-vim/Kconfig
> create mode 100644 board/amlogic/khadas-vim/MAINTAINERS
> create mode 100644 board/amlogic/khadas-vim/Makefile
> create mode 100644 board/amlogic/khadas-vim/README
> create mode 100644 board/amlogic/khadas-vim/khadas-vim.c
> create mode 100644 board/amlogic/libretech-cc/Kconfig
> create mode 100644 board/amlogic/libretech-cc/MAINTAINERS
> create mode 100644 board/amlogic/libretech-cc/Makefile
> create mode 100644 board/amlogic/libretech-cc/README
> create mode 100644 board/amlogic/libretech-cc/libretech-cc.c
> create mode 100644 configs/khadas-vim_defconfig
> create mode 100644 configs/libretech-cc_defconfig
> create mode 100644 include/configs/khadas-vim.h
> create mode 100644 include/configs/libretech-cc.h
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v2 0/5] Add support for Amlogic GXL Based SBCs
2017-11-25 9:48 ` Neil Armstrong
@ 2017-11-25 22:34 ` Simon Glass
-1 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-25 22:34 UTC (permalink / raw)
To: u-boot
Hi Neil,
On 25 November 2017 at 02:48, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Hi Tom, Simon,
>
> Le 22/11/2017 14:25, Neil Armstrong a écrit :
>> This patchset aimed to add minimal support for the following Amlogic GXL SoC
>> based board:
>> - LibreTech-CC
>> - Khadas VIM
>>
>> The initial support is composed of :
>> - Minimal boot support with serial, MMC, Ethernet and SDCard
>> - Updated DTS from Linux 4.13.8
>>
>> Commands to generate a valid binary are provided in the board README.
>>
>> A common Ethernet init function is introduced to avoid duplicating
>> the same hardware init code.
>>
>> The P212 and Odroid-C2 board are also converted to this common function
>> by this patchset.
>>
>> The following work will be pushed later on :
>> - Support for dynamic reading of DDR memory size from registers
>> - USB DWC3 Host Support with PHY support
>
>
> I'll try to address Simon's comments, but is it still possible
> to have this merged for v2018.01 ?
>
> For the next release cycle, I'll try to add a proper clock driver
> and have a look to binman for sure.
From my side this seems fine.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH v2 0/5] Add support for Amlogic GXL Based SBCs
@ 2017-11-25 22:34 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2017-11-25 22:34 UTC (permalink / raw)
To: linus-amlogic
Hi Neil,
On 25 November 2017 at 02:48, Neil Armstrong <narmstrong@baylibre.com> wrote:
> Hi Tom, Simon,
>
> Le 22/11/2017 14:25, Neil Armstrong a ?crit :
>> This patchset aimed to add minimal support for the following Amlogic GXL SoC
>> based board:
>> - LibreTech-CC
>> - Khadas VIM
>>
>> The initial support is composed of :
>> - Minimal boot support with serial, MMC, Ethernet and SDCard
>> - Updated DTS from Linux 4.13.8
>>
>> Commands to generate a valid binary are provided in the board README.
>>
>> A common Ethernet init function is introduced to avoid duplicating
>> the same hardware init code.
>>
>> The P212 and Odroid-C2 board are also converted to this common function
>> by this patchset.
>>
>> The following work will be pushed later on :
>> - Support for dynamic reading of DDR memory size from registers
>> - USB DWC3 Host Support with PHY support
>
>
> I'll try to address Simon's comments, but is it still possible
> to have this merged for v2018.01 ?
>
> For the next release cycle, I'll try to add a proper clock driver
> and have a look to binman for sure.
>From my side this seems fine.
Regards,
Simon
^ permalink raw reply [flat|nested] 40+ messages in thread