[PATCH 0/3] Exynos: add CPU performance counters

[PATCH 0/3] Exynos: add CPU performance counters

[Marek Szyprowski]

Hi!

This patchset enables support for ARM PMU (Performance Monitoring Units)
available in all supported Exynos SoCs. ARM PMU nodes were missing in dts
for Exynos 4210, 4412, 5410, 542x, 5433 SoCs.

Tested on Odroid U3, Odroid XU3, Google Snow and TM2 boards.

Best regards
Marek Szyprowski
Samsung R&D Institute Poland


Patch summary:

Marek Szyprowski (2):
  ARM: dts: exynos: Add CPU performance counters to Exynos4 boards
  ARM64: dts: exynos: Add CPU performance counters to Exynos5433 boards

Marian Mihailescu (1):
  ARM: dts: exynos: Add CPU perf counters to Exynos54xx boards

 arch/arm/boot/dts/exynos4210.dtsi          |  6 ++++++
 arch/arm/boot/dts/exynos4412.dtsi          |  6 ++++++
 arch/arm/boot/dts/exynos5410.dtsi          |  5 +++++
 arch/arm/boot/dts/exynos5420-cpus.dtsi     | 10 ++++++++++
 arch/arm/boot/dts/exynos5422-cpus.dtsi     | 10 ++++++++++
 arch/arm/boot/dts/exynos54xx.dtsi          | 20 ++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 18 ++++++++++++++++++
 7 files changed, 75 insertions(+)

-- 
2.14.2

[PATCH 1/3] ARM: dts: exynos: Add CPU performance counters to Exynos4 boards

[Marek Szyprowski]

Enable support for ARM Performance Monitoring Units available in
Cortex-A9 CPU cores for Exynos4 SoCs (4210 and 4412).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 arch/arm/boot/dts/exynos4210.dtsi | 6 ++++++
 arch/arm/boot/dts/exynos4412.dtsi | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 03dd61f64809..522f3a7ed07f 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -64,6 +64,12 @@
 		};
 	};
 
+	arm_pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupt-parent = <&combiner>;
+		interrupts = <2 2>, <3 2>;
+	};
+
 	sysram: sysram@2020000 {
 		compatible = "mmio-sram";
 		reg = <0x02020000 0x20000>;
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index b255ac55b1c1..468c2795481c 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -150,6 +150,12 @@
 		};
 	};
 
+	arm_pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupt-parent = <&combiner>;
+		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
+	};
+
 	sysram@2020000 {
 		compatible = "mmio-sram";
 		reg = <0x02020000 0x40000>;
-- 
2.14.2

[PATCH 2/3] ARM: dts: exynos: Add CPU perf counters to Exynos54xx boards

[Marek Szyprowski]

From: Marian Mihailescu <mihailescu2m@gmail.com>

Enable support for ARM Performance Monitoring Units available in Cortex-A7
and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).

The PMUs interrupts are defined in the common exynos54xx.dtsi device tree,
but the PMUs are enabled and have their interrupt CPU affinity defined
next to each SoC's cpus node.

Tested with perf on Odroid XU4 (Exynos5422):
armv7_cortex_a7 PMU driver: 5 counters available
armv7_cortex_a15 PMU driver: 7 counters available

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
Signed-off-by: Willy Wolff <willy.mh.wolff@gmail.com>
[mszyprow: reordered nodes according to krzk request, fixed typos]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 arch/arm/boot/dts/exynos5410.dtsi      |  5 +++++
 arch/arm/boot/dts/exynos5420-cpus.dtsi | 10 ++++++++++
 arch/arm/boot/dts/exynos5422-cpus.dtsi | 10 ++++++++++
 arch/arm/boot/dts/exynos54xx.dtsi      | 20 ++++++++++++++++++++
 4 files changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 06713ec86f0d..c4dbc689e5cb 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -264,6 +264,11 @@
 	};
 };
 
+&arm_a15_pmu {
+	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	status = "okay";
+};
+
 &i2c_0 {
 	clocks = <&clock CLK_I2C0>;
 	clock-names = "i2c";
diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
index d7d703aa1699..4ee2f9718e8a 100644
--- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
@@ -132,3 +132,13 @@
 		};
 	};
 };
+
+&arm_a7_pmu {
+	interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+	status = "okay";
+};
+
+&arm_a15_pmu {
+	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
index ec01d8020c2d..73fb37d5042d 100644
--- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -131,3 +131,13 @@
 		};
 	};
 };
+
+&arm_a7_pmu {
+	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	status = "okay";
+};
+
+&arm_a15_pmu {
+	interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index a5007f182bc4..02a25efebfcf 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -29,6 +29,26 @@
 	};
 
 	soc: soc {
+		arm_a7_pmu: arm-a7-pmu {
+			compatible = "arm,cortex-a7-pmu";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		arm_a15_pmu: arm-a15-pmu {
+			compatible = "arm,cortex-a15-pmu";
+			interrupt-parent = <&combiner>;
+			interrupts = <1 2>,
+				     <7 0>,
+				     <16 6>,
+				     <19 2>;
+			status = "disabled";
+		};
+
 		sysram@2020000 {
 			compatible = "mmio-sram";
 			reg = <0x02020000 0x54000>;
-- 
2.14.2

[PATCH 3/3] ARM64: dts: exynos: Add CPU performance counters to Exynos5433 boards

[Marek Szyprowski]

Enable support for ARM Performance Monitoring Units available in
Cortex-A53 and Cortex-A57 CPU cores for Exynos5433 SoCs.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 7fe994b750da..9484d2f867dc 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -247,6 +247,24 @@
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x0 0x18000000>;
 
+		arm_a53_pmu {
+			compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+		};
+
+		arm_a57_pmu {
+			compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
+			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+		};
+
 		chipid@10000000 {
 			compatible = "samsung,exynos4210-chipid";
 			reg = <0x10000000 0x100>;
-- 
2.14.2

Re: [PATCH 0/3] Exynos: add CPU performance counters

[Krzysztof Kozlowski]

On Thu, Nov 23, 2017 at 03:34:28PM +0100, Marek Szyprowski wrote:
> Hi!
> 
> This patchset enables support for ARM PMU (Performance Monitoring Units)
> available in all supported Exynos SoCs. ARM PMU nodes were missing in dts
> for Exynos 4210, 4412, 5410, 542x, 5433 SoCs.
> 
> Tested on Odroid U3, Odroid XU3, Google Snow and TM2 boards.
> 
> Best regards
> Marek Szyprowski
> Samsung R&D Institute Poland
> 
> 

Thanks, applied all three.

Best regards,
Krzysztof

Re: [PATCH 1/3] ARM: dts: exynos: Add CPU performance counters to Exynos4 boards

[Markus Reichl]

Hi Marek,

with this patch (linux-next-20171201) I get on odroid-X2

[    0.671862] hw perfevents: no interrupt-affinity property for /pmu, guessing.
[    0.672242] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
[    0.672618] hw perfevents: no interrupt-affinity property for /arm_pmu, guessing.
[    0.672696] genirq: Flags mismatch irq 38. 00010c00 (arm-pmu) vs. 00010c00 (arm-pmu)
[    0.672716] hw perfevents: unable to request IRQ38 for ARM PMU counters
[    0.672733] hw perfevents: /arm_pmu: failed to register PMU devices!
[    0.672761] armv7-pmu: probe of arm_pmu failed with error -16

without it 

[    0.686817] hw perfevents: no interrupt-affinity property for /pmu, guessing.
[    0.687194] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available

Looks like arm_pmu in exynos4412.dtsi doubles pmu from exynos4.dtsi.

Gruß,
-- 
Markus Reichl

Am 23.11.2017 um 15:34 schrieb Marek Szyprowski:
> Enable support for ARM Performance Monitoring Units available in
> Cortex-A9 CPU cores for Exynos4 SoCs (4210 and 4412).
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  arch/arm/boot/dts/exynos4210.dtsi | 6 ++++++
>  arch/arm/boot/dts/exynos4412.dtsi | 6 ++++++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
> index 03dd61f64809..522f3a7ed07f 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -64,6 +64,12 @@
>  		};
>  	};
>  
> +	arm_pmu {
> +		compatible = "arm,cortex-a9-pmu";
> +		interrupt-parent = <&combiner>;
> +		interrupts = <2 2>, <3 2>;
> +	};
> +
>  	sysram: sysram@2020000 {
>  		compatible = "mmio-sram";
>  		reg = <0x02020000 0x20000>;
> diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
> index b255ac55b1c1..468c2795481c 100644
> --- a/arch/arm/boot/dts/exynos4412.dtsi
> +++ b/arch/arm/boot/dts/exynos4412.dtsi
> @@ -150,6 +150,12 @@
>  		};
>  	};
>  
> +	arm_pmu {
> +		compatible = "arm,cortex-a9-pmu";
> +		interrupt-parent = <&combiner>;
> +		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
> +	};
> +
>  	sysram@2020000 {
>  		compatible = "mmio-sram";
>  		reg = <0x02020000 0x40000>;
> 

Re: [PATCH 1/3] ARM: dts: exynos: Add CPU performance counters to Exynos4 boards

[Marek Szyprowski]

Hi Markus,

On 2017-12-01 12:12, Markus Reichl wrote:
> Hi Marek,
>
> with this patch (linux-next-20171201) I get on odroid-X2
>
> [    0.671862] hw perfevents: no interrupt-affinity property for /pmu, guessing.
> [    0.672242] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
> [    0.672618] hw perfevents: no interrupt-affinity property for /arm_pmu, guessing.
> [    0.672696] genirq: Flags mismatch irq 38. 00010c00 (arm-pmu) vs. 00010c00 (arm-pmu)
> [    0.672716] hw perfevents: unable to request IRQ38 for ARM PMU counters
> [    0.672733] hw perfevents: /arm_pmu: failed to register PMU devices!
> [    0.672761] armv7-pmu: probe of arm_pmu failed with error -16
>
> without it
>
> [    0.686817] hw perfevents: no interrupt-affinity property for /pmu, guessing.
> [    0.687194] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
>
> Looks like arm_pmu in exynos4412.dtsi doubles pmu from exynos4.dtsi.

You are right. I swear that I've checked exynos4 dts before preparing my 
patch
and didn't notice existing ARM PMU node there. This means that my patch 
has to
be reverted/dropped then. Sorry for the noise.

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 1/3] ARM: dts: exynos: Add CPU performance counters to Exynos4 boards

[Krzysztof Kozlowski]

On Mon, Dec 4, 2017 at 10:49 AM, Marek Szyprowski
<m.szyprowski@samsung.com> wrote:
> Hi Markus,
>
> On 2017-12-01 12:12, Markus Reichl wrote:
>>
>> Hi Marek,
>>
>> with this patch (linux-next-20171201) I get on odroid-X2
>>
>> [    0.671862] hw perfevents: no interrupt-affinity property for /pmu,
>> guessing.
>> [    0.672242] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7
>> counters available
>> [    0.672618] hw perfevents: no interrupt-affinity property for /arm_pmu,
>> guessing.
>> [    0.672696] genirq: Flags mismatch irq 38. 00010c00 (arm-pmu) vs.
>> 00010c00 (arm-pmu)
>> [    0.672716] hw perfevents: unable to request IRQ38 for ARM PMU counters
>> [    0.672733] hw perfevents: /arm_pmu: failed to register PMU devices!
>> [    0.672761] armv7-pmu: probe of arm_pmu failed with error -16
>>
>> without it
>>
>> [    0.686817] hw perfevents: no interrupt-affinity property for /pmu,
>> guessing.
>> [    0.687194] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7
>> counters available
>>
>> Looks like arm_pmu in exynos4412.dtsi doubles pmu from exynos4.dtsi.
>
>
> You are right. I swear that I've checked exynos4 dts before preparing my
> patch
> and didn't notice existing ARM PMU node there. This means that my patch has
> to
> be reverted/dropped then. Sorry for the noise.

No problem, I'll drop it and rebase my tree.

Best regards,
Krzysztof