* [Qemu-devel] [for-2.12 0/7] PCI cleanups
@ 2017-11-29 8:46 David Gibson
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity David Gibson
` (7 more replies)
0 siblings, 8 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
Here are a bunch of straightforward cleanups for the PCI code in
qemu-2.12. These came up while I was looking at various other things.
David Gibson (7):
pci: Rename root bus initialization functions for clarity
pci: Move bridge data structures from pci_bus.h to pci_bridge.h
pci: Fold pci_bus.h into pci.h
pci: Simplify pci_bus_is_root()
pci: Add pci_dev_bus_num() helper
pci: Eliminate redundant PCIDevice::bus pointer
pci: Eliminate pci_find_primary_bus()
hw/acpi/pcihp.c | 5 +-
hw/acpi/piix4.c | 7 +-
hw/alpha/typhoon.c | 8 +-
hw/i386/acpi-build.c | 1 -
hw/i386/amd_iommu.h | 1 -
hw/i386/intel_iommu.c | 1 -
hw/i386/pc.c | 1 -
hw/i386/pc_piix.c | 8 +-
hw/i386/xen/xen_platform.c | 12 +--
hw/isa/lpc_ich9.c | 11 ++-
hw/mips/gt64xxx_pci.c | 12 +--
hw/net/vmxnet3.c | 2 +-
hw/pci-bridge/dec.c | 1 -
hw/pci-bridge/pci_bridge_dev.c | 1 -
hw/pci-bridge/pci_expander_bridge.c | 28 +++----
hw/pci-bridge/pcie_pci_bridge.c | 1 -
hw/pci-host/apb.c | 11 ++-
hw/pci-host/bonito.c | 8 +-
hw/pci-host/gpex.c | 6 +-
hw/pci-host/grackle.c | 14 ++--
hw/pci-host/piix.c | 14 ++--
hw/pci-host/ppce500.c | 6 +-
hw/pci-host/prep.c | 5 +-
hw/pci-host/q35.c | 7 +-
hw/pci-host/uninorth.c | 24 +++---
hw/pci-host/versatile.c | 9 +--
hw/pci-host/xilinx-pcie.c | 6 +-
hw/pci/pci.c | 152 ++++++++++++++++--------------------
hw/pci/pci_bridge.c | 7 +-
hw/pci/pci_host.c | 1 -
hw/pci/pcie.c | 6 +-
hw/pci/pcie_aer.c | 5 +-
hw/pci/shpc.c | 1 -
hw/ppc/ppc4xx_pci.c | 6 +-
hw/ppc/spapr_pci.c | 11 ++-
hw/s390x/s390-pci-bus.c | 19 +++--
hw/scsi/megasas.c | 2 +-
hw/scsi/mptsas.c | 2 +-
hw/scsi/vmw_pvscsi.c | 2 +-
hw/sh4/sh_pci.c | 12 +--
hw/sparc64/sun4u.c | 1 -
hw/usb/hcd-xhci.c | 2 +-
hw/vfio/pci.c | 10 +--
hw/virtio/virtio-pci.c | 4 +-
hw/xen/xen_pt.c | 10 +--
include/hw/i386/ich9.h | 1 -
include/hw/pci-host/xilinx-pcie.h | 2 +-
include/hw/pci/pci.h | 94 +++++++++++++++++-----
include/hw/pci/pci_bridge.h | 47 +++++++++++
include/hw/pci/pci_bus.h | 94 ----------------------
include/hw/pci/pcie_port.h | 1 -
include/hw/xen/xen_common.h | 8 +-
52 files changed, 336 insertions(+), 374 deletions(-)
delete mode 100644 include/hw/pci/pci_bus.h
--
2.14.3
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
@ 2017-11-29 8:46 ` David Gibson
2017-11-29 9:43 ` Marcel Apfelbaum
2017-11-30 6:17 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h David Gibson
` (6 subsequent siblings)
7 siblings, 2 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus()
are misleadingly named. They're not used for initializing *any* PCI bus,
but only for a root PCI bus.
Non-root buses - i.e. ones under a logical PCI to PCI bridge - are instead
created with a direct qbus_create_inplace() (see pci_bridge_initfn()).
This patch renames the functions to make it clear they're only used for
a root bus.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/alpha/typhoon.c | 8 +++---
hw/mips/gt64xxx_pci.c | 12 ++++-----
hw/pci-bridge/pci_expander_bridge.c | 4 +--
hw/pci-host/apb.c | 10 ++++----
hw/pci-host/bonito.c | 8 +++---
hw/pci-host/gpex.c | 6 ++---
hw/pci-host/grackle.c | 14 +++++------
hw/pci-host/piix.c | 4 +--
hw/pci-host/ppce500.c | 6 ++---
hw/pci-host/prep.c | 4 +--
hw/pci-host/q35.c | 7 +++---
hw/pci-host/uninorth.c | 24 +++++++++---------
hw/pci-host/versatile.c | 6 ++---
hw/pci-host/xilinx-pcie.c | 6 ++---
hw/pci/pci.c | 49 ++++++++++++++++++++-----------------
hw/ppc/ppc4xx_pci.c | 6 ++---
hw/ppc/spapr_pci.c | 8 +++---
hw/s390x/s390-pci-bus.c | 8 +++---
hw/sh4/sh_pci.c | 12 ++++-----
include/hw/pci/pci.h | 25 ++++++++++---------
20 files changed, 116 insertions(+), 111 deletions(-)
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index ae11e012c7..6a40869488 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -881,10 +881,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
memory_region_add_subregion(addr_space, 0x801fc000000ULL,
&s->pchip.reg_io);
- b = pci_register_bus(dev, "pci",
- typhoon_set_irq, sys_map_irq, s,
- &s->pchip.reg_mem, &s->pchip.reg_io,
- 0, 64, TYPE_PCI_BUS);
+ b = pci_register_root_bus(dev, "pci",
+ typhoon_set_irq, sys_map_irq, s,
+ &s->pchip.reg_mem, &s->pchip.reg_io,
+ 0, 64, TYPE_PCI_BUS);
phb->bus = b;
qdev_init_nofail(dev);
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index 5a9dad9aae..a9c222a967 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -1171,12 +1171,12 @@ PCIBus *gt64120_register(qemu_irq *pic)
phb = PCI_HOST_BRIDGE(dev);
memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX);
address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem");
- phb->bus = pci_register_bus(dev, "pci",
- gt64120_pci_set_irq, gt64120_pci_map_irq,
- pic,
- &d->pci0_mem,
- get_system_io(),
- PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
+ phb->bus = pci_register_root_bus(dev, "pci",
+ gt64120_pci_set_irq, gt64120_pci_map_irq,
+ pic,
+ &d->pci0_mem,
+ get_system_io(),
+ PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
qdev_init_nofail(dev);
memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000);
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 8c8ac737ad..b2fa829e29 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -230,9 +230,9 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
ds = qdev_create(NULL, TYPE_PXB_HOST);
if (pcie) {
- bus = pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
+ bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
} else {
- bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
+ bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
bds = qdev_create(BUS(bus), "pci-bridge");
bds->id = dev_name;
qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index 64025cd8cc..1df998443d 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -714,11 +714,11 @@ PCIBus *pci_apb_init(hwaddr special_base,
dev = qdev_create(NULL, TYPE_APB);
d = APB_DEVICE(dev);
phb = PCI_HOST_BRIDGE(dev);
- phb->bus = pci_register_bus(DEVICE(phb), "pci",
- pci_apb_set_irq, pci_apb_map_irq, d,
- &d->pci_mmio,
- &d->pci_ioport,
- 0, 32, TYPE_PCI_BUS);
+ phb->bus = pci_register_root_bus(DEVICE(phb), "pci",
+ pci_apb_set_irq, pci_apb_map_irq, d,
+ &d->pci_mmio,
+ &d->pci_ioport,
+ 0, 32, TYPE_PCI_BUS);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
/* apb_config */
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 9f61e27edc..f08593feab 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -714,10 +714,10 @@ static int bonito_pcihost_initfn(SysBusDevice *dev)
{
PCIHostState *phb = PCI_HOST_BRIDGE(dev);
- phb->bus = pci_register_bus(DEVICE(dev), "pci",
- pci_bonito_set_irq, pci_bonito_map_irq, dev,
- get_system_memory(), get_system_io(),
- 0x28, 32, TYPE_PCI_BUS);
+ phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
+ pci_bonito_set_irq, pci_bonito_map_irq,
+ dev, get_system_memory(), get_system_io(),
+ 0x28, 32, TYPE_PCI_BUS);
return 0;
}
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index edf305b1fd..2583b151a4 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -89,9 +89,9 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
s->irq_num[i] = -1;
}
- pci->bus = pci_register_bus(dev, "pcie.0", gpex_set_irq,
- pci_swizzle_map_irq_fn, s, &s->io_mmio,
- &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
+ pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
+ pci_swizzle_map_irq_fn, s, &s->io_mmio,
+ &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 38cd279b6b..3caf1ccb37 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -82,13 +82,13 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
- phb->bus = pci_register_bus(dev, NULL,
- pci_grackle_set_irq,
- pci_grackle_map_irq,
- pic,
- &d->pci_mmio,
- address_space_io,
- 0, 4, TYPE_PCI_BUS);
+ phb->bus = pci_register_root_bus(dev, NULL,
+ pci_grackle_set_irq,
+ pci_grackle_map_irq,
+ pic,
+ &d->pci_mmio,
+ address_space_io,
+ 0, 4, TYPE_PCI_BUS);
pci_create_simple(phb->bus, 0, "grackle");
qdev_init_nofail(dev);
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index a684a7cca9..cf9070186c 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -361,8 +361,8 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
dev = qdev_create(NULL, host_type);
s = PCI_HOST_BRIDGE(dev);
- b = pci_bus_new(dev, NULL, pci_address_space,
- address_space_io, 0, TYPE_PCI_BUS);
+ b = pci_root_bus_new(dev, NULL, pci_address_space,
+ address_space_io, 0, TYPE_PCI_BUS);
s->bus = b;
object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL);
qdev_init_nofail(dev);
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index 39cd24464d..67edbf744c 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -465,9 +465,9 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
/* PIO lives at the bottom of our bus space */
memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2);
- b = pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
- mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
- PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
+ b = pci_register_root_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
+ mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
+ PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
h->bus = b;
/* Set up PCI view of memory */
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 92eed0f3e1..01f67f9db1 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -269,8 +269,8 @@ static void raven_pcihost_initfn(Object *obj)
memory_region_add_subregion_overlap(address_space_mem, 0x80000000,
&s->pci_io_non_contiguous, 1);
memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory);
- pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
- &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
+ pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
+ &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
/* Bus master address space */
memory_region_init(&s->bm, obj, "bm-raven", UINT32_MAX);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 6cb9a8d121..a36a1195e4 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -51,9 +51,10 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
- pci->bus = pci_bus_new(DEVICE(s), "pcie.0",
- s->mch.pci_address_space, s->mch.address_space_io,
- 0, TYPE_PCIE_BUS);
+ pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0",
+ s->mch.pci_address_space,
+ s->mch.address_space_io,
+ 0, TYPE_PCIE_BUS);
PC_MACHINE(qdev_get_machine())->bus = pci->bus;
qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus));
qdev_init_nofail(DEVICE(&s->mch));
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index ea5c265718..5d8ccaa711 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -233,12 +233,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
- h->bus = pci_register_bus(dev, NULL,
- pci_unin_set_irq, pci_unin_map_irq,
- pic,
- &d->pci_mmio,
- address_space_io,
- PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+ h->bus = pci_register_root_bus(dev, NULL,
+ pci_unin_set_irq, pci_unin_map_irq,
+ pic,
+ &d->pci_mmio,
+ address_space_io,
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
#if 0
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north");
@@ -299,12 +299,12 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
- h->bus = pci_register_bus(dev, NULL,
- pci_unin_set_irq, pci_unin_map_irq,
- pic,
- &d->pci_mmio,
- address_space_io,
- PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+ h->bus = pci_register_root_bus(dev, NULL,
+ pci_unin_set_irq, pci_unin_map_irq,
+ pic,
+ &d->pci_mmio,
+ address_space_io,
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
sysbus_mmio_map(s, 0, 0xf0800000);
sysbus_mmio_map(s, 1, 0xf0c00000);
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 6394a520fc..8803ada925 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -399,9 +399,9 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32);
memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32);
- pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
- &s->pci_mem_space, &s->pci_io_space,
- PCI_DEVFN(11, 0), TYPE_PCI_BUS);
+ pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
+ &s->pci_mem_space, &s->pci_io_space,
+ PCI_DEVFN(11, 0), TYPE_PCI_BUS);
h->bus = &s->pci_bus;
object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST);
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index 7659253090..d2f88d11dd 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -129,9 +129,9 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(sbd, &pex->mmio);
sysbus_init_mmio(sbd, &s->mmio);
- pci->bus = pci_register_bus(dev, s->name, xilinx_pcie_set_irq,
- pci_swizzle_map_irq_fn, s, &s->mmio,
- &s->io, 0, 4, TYPE_PCIE_BUS);
+ pci->bus = pci_register_root_bus(dev, s->name, xilinx_pcie_set_irq,
+ pci_swizzle_map_irq_fn, s, &s->mmio,
+ &s->io, 0, 4, TYPE_PCIE_BUS);
qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus));
qdev_init_nofail(DEVICE(&s->root));
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index b2d139bd9a..232e7dacf8 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -376,10 +376,10 @@ const char *pci_root_bus_path(PCIDevice *dev)
return rootbus->qbus.name;
}
-static void pci_bus_init(PCIBus *bus, DeviceState *parent,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io,
- uint8_t devfn_min)
+static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io,
+ uint8_t devfn_min)
{
assert(PCI_FUNC(devfn_min) == 0);
bus->devfn_min = devfn_min;
@@ -403,25 +403,27 @@ bool pci_bus_is_root(PCIBus *bus)
return PCI_BUS_GET_CLASS(bus)->is_root(bus);
}
-void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
- const char *name,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io,
- uint8_t devfn_min, const char *typename)
+void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
+ const char *name,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io,
+ uint8_t devfn_min, const char *typename)
{
qbus_create_inplace(bus, bus_size, typename, parent, name);
- pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
+ pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
+ devfn_min);
}
-PCIBus *pci_bus_new(DeviceState *parent, const char *name,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io,
- uint8_t devfn_min, const char *typename)
+PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io,
+ uint8_t devfn_min, const char *typename)
{
PCIBus *bus;
bus = PCI_BUS(qbus_create(typename, parent, name));
- pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
+ pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
+ devfn_min);
return bus;
}
@@ -435,17 +437,18 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
bus->irq_count = g_malloc0(nirq * sizeof(bus->irq_count[0]));
}
-PCIBus *pci_register_bus(DeviceState *parent, const char *name,
- pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
- void *irq_opaque,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io,
- uint8_t devfn_min, int nirq, const char *typename)
+PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
+ pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
+ void *irq_opaque,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io,
+ uint8_t devfn_min, int nirq,
+ const char *typename)
{
PCIBus *bus;
- bus = pci_bus_new(parent, name, address_space_mem,
- address_space_io, devfn_min, typename);
+ bus = pci_root_bus_new(parent, name, address_space_mem,
+ address_space_io, devfn_min, typename);
pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq);
return bus;
}
diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
index 4765dcecca..b7642bac01 100644
--- a/hw/ppc/ppc4xx_pci.c
+++ b/hw/ppc/ppc4xx_pci.c
@@ -314,9 +314,9 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[i]);
}
- b = pci_register_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
- ppc4xx_pci_map_irq, s->irq, get_system_memory(),
- get_system_io(), 0, 4, TYPE_PCI_BUS);
+ b = pci_register_root_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
+ ppc4xx_pci_map_irq, s->irq, get_system_memory(),
+ get_system_io(), 0, 4, TYPE_PCI_BUS);
h->bus = b;
pci_create_simple(b, 0, "ppc4xx-host-bridge");
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 5a3122a9f9..9262682116 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1621,10 +1621,10 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
&sphb->iowindow);
- bus = pci_register_bus(dev, NULL,
- pci_spapr_set_irq, pci_spapr_map_irq, sphb,
- &sphb->memspace, &sphb->iospace,
- PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
+ bus = pci_register_root_bus(dev, NULL,
+ pci_spapr_set_irq, pci_spapr_map_irq, sphb,
+ &sphb->memspace, &sphb->iospace,
+ PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
phb->bus = bus;
qbus_set_hotplug_handler(BUS(phb->bus), DEVICE(sphb), NULL);
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 2b1e1409bf..347329dd50 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -554,10 +554,10 @@ static int s390_pcihost_init(SysBusDevice *dev)
DPRINTF("host_init\n");
- b = pci_register_bus(DEVICE(dev), NULL,
- s390_pci_set_irq, s390_pci_map_irq, NULL,
- get_system_memory(), get_system_io(), 0, 64,
- TYPE_PCI_BUS);
+ b = pci_register_root_bus(DEVICE(dev), NULL,
+ s390_pci_set_irq, s390_pci_map_irq, NULL,
+ get_system_memory(), get_system_io(), 0, 64,
+ TYPE_PCI_BUS);
pci_setup_iommu(b, s390_pci_dma_iommu, s);
bus = BUS(b);
diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c
index cbb01af57f..4ec2e35500 100644
--- a/hw/sh4/sh_pci.c
+++ b/hw/sh4/sh_pci.c
@@ -131,12 +131,12 @@ static int sh_pci_device_init(SysBusDevice *dev)
for (i = 0; i < 4; i++) {
sysbus_init_irq(dev, &s->irq[i]);
}
- phb->bus = pci_register_bus(DEVICE(dev), "pci",
- sh_pci_set_irq, sh_pci_map_irq,
- s->irq,
- get_system_memory(),
- get_system_io(),
- PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
+ phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
+ sh_pci_set_irq, sh_pci_map_irq,
+ s->irq,
+ get_system_memory(),
+ get_system_io(),
+ PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s,
"sh_pci", 0x224);
memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2",
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 8d02a0a383..870ebcfd4b 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -400,26 +400,27 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
bool pci_bus_is_express(PCIBus *bus);
bool pci_bus_is_root(PCIBus *bus);
-void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
- const char *name,
+void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
+ const char *name,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io,
+ uint8_t devfn_min, const char *typename);
+PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
uint8_t devfn_min, const char *typename);
-PCIBus *pci_bus_new(DeviceState *parent, const char *name,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io,
- uint8_t devfn_min, const char *typename);
void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
void *irq_opaque, int nirq);
int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
/* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin);
-PCIBus *pci_register_bus(DeviceState *parent, const char *name,
- pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
- void *irq_opaque,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io,
- uint8_t devfn_min, int nirq, const char *typename);
+PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
+ pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
+ void *irq_opaque,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io,
+ uint8_t devfn_min, int nirq,
+ const char *typename);
void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn);
PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin);
bool pci_intx_route_changed(PCIINTxRoute *old, PCIINTxRoute *new);
--
2.14.3
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity David Gibson
@ 2017-11-29 8:46 ` David Gibson
2017-11-29 10:33 ` Marcel Apfelbaum
2017-11-30 6:41 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h David Gibson
` (5 subsequent siblings)
7 siblings, 2 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
include/hw/pci/pci_bus.h contains several data structures related to PCI
bridges that aren't needed by most users of pci_bus.h. We already have
a pci_bridge.h, so move them there.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/hw/pci-host/xilinx-pcie.h | 2 +-
include/hw/pci/pci_bridge.h | 48 ++++++++++++++++++++++++++++++++++++
include/hw/pci/pci_bus.h | 51 ++-------------------------------------
3 files changed, 51 insertions(+), 50 deletions(-)
diff --git a/include/hw/pci-host/xilinx-pcie.h b/include/hw/pci-host/xilinx-pcie.h
index bec66b27c5..74c04dc9bb 100644
--- a/include/hw/pci-host/xilinx-pcie.h
+++ b/include/hw/pci-host/xilinx-pcie.h
@@ -23,7 +23,7 @@
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
+#include "hw/pci/pci_bridge.h"
#include "hw/pci/pcie_host.h"
#define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host"
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 1acadc2c15..9b44ffd22a 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -27,6 +27,54 @@
#define QEMU_PCI_BRIDGE_H
#include "hw/pci/pci.h"
+#include "hw/pci/pci_bus.h"
+
+typedef struct PCIBridgeWindows PCIBridgeWindows;
+
+/*
+ * Aliases for each of the address space windows that the bridge
+ * can forward. Mapped into the bridge's parent's address space,
+ * as subregions.
+ */
+struct PCIBridgeWindows {
+ MemoryRegion alias_pref_mem;
+ MemoryRegion alias_mem;
+ MemoryRegion alias_io;
+ /*
+ * When bridge control VGA forwarding is enabled, bridges will
+ * provide positive decode on the PCI VGA defined I/O port and
+ * MMIO ranges. When enabled forwarding is only qualified on the
+ * I/O and memory enable bits in the bridge command register.
+ */
+ MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS];
+};
+
+#define TYPE_PCI_BRIDGE "base-pci-bridge"
+#define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE)
+
+struct PCIBridge {
+ /*< private >*/
+ PCIDevice parent_obj;
+ /*< public >*/
+
+ /* private member */
+ PCIBus sec_bus;
+ /*
+ * Memory regions for the bridge's address spaces. These regions are not
+ * directly added to system_memory/system_io or its descendants.
+ * Bridge's secondary bus points to these, so that devices
+ * under the bridge see these regions as its address spaces.
+ * The regions are as large as the entire address space -
+ * they don't take into account any windows.
+ */
+ MemoryRegion address_space_mem;
+ MemoryRegion address_space_io;
+
+ PCIBridgeWindows *windows;
+
+ pci_map_irq_fn map_irq;
+ const char *bus_name;
+};
#define PCI_BRIDGE_DEV_PROP_CHASSIS_NR "chassis_nr"
#define PCI_BRIDGE_DEV_PROP_MSI "msi"
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index bc34fd0017..b7da8f555b 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -2,10 +2,10 @@
#define QEMU_PCI_BUS_H
/*
- * PCI Bus and Bridge datastructures.
+ * PCI Bus datastructures.
*
* Do not access the following members directly;
- * use accessor functions in pci.h, pci_bridge.h
+ * use accessor functions in pci.h
*/
typedef struct PCIBusClass {
@@ -44,51 +44,4 @@ struct PCIBus {
Notifier machine_done;
};
-typedef struct PCIBridgeWindows PCIBridgeWindows;
-
-/*
- * Aliases for each of the address space windows that the bridge
- * can forward. Mapped into the bridge's parent's address space,
- * as subregions.
- */
-struct PCIBridgeWindows {
- MemoryRegion alias_pref_mem;
- MemoryRegion alias_mem;
- MemoryRegion alias_io;
- /*
- * When bridge control VGA forwarding is enabled, bridges will
- * provide positive decode on the PCI VGA defined I/O port and
- * MMIO ranges. When enabled forwarding is only qualified on the
- * I/O and memory enable bits in the bridge command register.
- */
- MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS];
-};
-
-#define TYPE_PCI_BRIDGE "base-pci-bridge"
-#define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE)
-
-struct PCIBridge {
- /*< private >*/
- PCIDevice parent_obj;
- /*< public >*/
-
- /* private member */
- PCIBus sec_bus;
- /*
- * Memory regions for the bridge's address spaces. These regions are not
- * directly added to system_memory/system_io or its descendants.
- * Bridge's secondary bus points to these, so that devices
- * under the bridge see these regions as its address spaces.
- * The regions are as large as the entire address space -
- * they don't take into account any windows.
- */
- MemoryRegion address_space_mem;
- MemoryRegion address_space_io;
-
- PCIBridgeWindows *windows;
-
- pci_map_irq_fn map_irq;
- const char *bus_name;
-};
-
#endif /* QEMU_PCI_BUS_H */
--
2.14.3
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity David Gibson
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h David Gibson
@ 2017-11-29 8:46 ` David Gibson
2017-11-29 10:38 ` Marcel Apfelbaum
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root() David Gibson
` (4 subsequent siblings)
7 siblings, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
include/hw/pci/pci_bus.h is now very small and can only safely be included
after hw/pci/pci.h. So, just fold it into pci.h.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/acpi/pcihp.c | 1 -
hw/i386/acpi-build.c | 1 -
hw/i386/amd_iommu.h | 1 -
hw/i386/intel_iommu.c | 1 -
hw/i386/pc.c | 1 -
hw/isa/lpc_ich9.c | 1 -
hw/pci-bridge/dec.c | 1 -
hw/pci-bridge/pci_bridge_dev.c | 1 -
hw/pci-bridge/pci_expander_bridge.c | 1 -
hw/pci-bridge/pcie_pci_bridge.c | 1 -
hw/pci-host/apb.c | 1 -
hw/pci-host/prep.c | 1 -
hw/pci-host/versatile.c | 1 -
hw/pci/pci.c | 1 -
hw/pci/pci_bridge.c | 1 -
hw/pci/pci_host.c | 1 -
hw/pci/pcie.c | 1 -
hw/pci/pcie_aer.c | 1 -
hw/pci/shpc.c | 1 -
hw/ppc/spapr_pci.c | 1 -
hw/s390x/s390-pci-bus.c | 1 -
hw/sparc64/sun4u.c | 1 -
include/hw/i386/ich9.h | 1 -
include/hw/pci/pci.h | 44 ++++++++++++++++++++++++++++++++--
include/hw/pci/pci_bridge.h | 1 -
include/hw/pci/pci_bus.h | 47 -------------------------------------
include/hw/pci/pcie_port.h | 1 -
27 files changed, 42 insertions(+), 74 deletions(-)
delete mode 100644 include/hw/pci/pci_bus.h
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 7da51c0569..0da905ab3a 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -34,7 +34,6 @@
#include "sysemu/sysemu.h"
#include "exec/ioport.h"
#include "exec/address-spaces.h"
-#include "hw/pci/pci_bus.h"
#include "qapi/error.h"
#include "qom/qom-qobject.h"
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 73519ab3ac..bda5ef1307 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -51,7 +51,6 @@
#include "hw/acpi/piix4.h"
#include "hw/acpi/pcihp.h"
#include "hw/i386/ich9.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci-host/q35.h"
#include "hw/i386/x86-iommu.h"
diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
index d370ae3549..b587f6b49f 100644
--- a/hw/i386/amd_iommu.h
+++ b/hw/i386/amd_iommu.h
@@ -27,7 +27,6 @@
#include "hw/sysbus.h"
#include "sysemu/dma.h"
#include "hw/i386/pc.h"
-#include "hw/pci/pci_bus.h"
#include "hw/i386/x86-iommu.h"
/* Capability registers */
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 3a5bb0bc2e..3ef4bfbe05 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -26,7 +26,6 @@
#include "exec/address-spaces.h"
#include "intel_iommu_internal.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/i386/pc.h"
#include "hw/i386/apic-msidef.h"
#include "hw/boards.h"
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index c3afe5b7f1..5380a004be 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -31,7 +31,6 @@
#include "hw/block/fdc.h"
#include "hw/ide.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/nvram/fw_cfg.h"
#include "hw/timer/hpet.h"
#include "hw/smbios/smbios.h"
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index ec3c9f7d0b..e77a4abb15 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -44,7 +44,6 @@
#include "hw/i386/ich9.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/ich9.h"
-#include "hw/pci/pci_bus.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
#include "qom/cpu.h"
diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c
index 84492d5e5f..ae4b9697ed 100644
--- a/hw/pci-bridge/dec.c
+++ b/hw/pci-bridge/dec.c
@@ -29,7 +29,6 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
#include "hw/pci/pci_bridge.h"
-#include "hw/pci/pci_bus.h"
/* debug DEC */
//#define DEBUG_DEC
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index d56f6638c2..bc3c8d9f57 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
@@ -27,7 +27,6 @@
#include "hw/pci/shpc.h"
#include "hw/pci/slotid_cap.h"
#include "exec/memory.h"
-#include "hw/pci/pci_bus.h"
#include "hw/hotplug.h"
#define TYPE_PCI_BRIDGE_DEV "pci-bridge"
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index b2fa829e29..5652cf06e9 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -13,7 +13,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
#include "hw/pci/pci_bridge.h"
#include "hw/i386/pc.h"
diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c
index a4d827c99d..f609a4fb32 100644
--- a/hw/pci-bridge/pcie_pci_bridge.c
+++ b/hw/pci-bridge/pcie_pci_bridge.c
@@ -10,7 +10,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci/msi.h"
#include "hw/pci/shpc.h"
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index 1df998443d..bf7c7b0079 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -32,7 +32,6 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
#include "hw/pci/pci_bridge.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci-host/apb.h"
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 01f67f9db1..56920914c6 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -27,7 +27,6 @@
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
#include "hw/i386/pc.h"
#include "hw/loader.h"
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 8803ada925..b5bf4dce55 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -10,7 +10,6 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
#include "exec/address-spaces.h"
#include "qemu/log.h"
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 232e7dacf8..6e11dc2fec 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -25,7 +25,6 @@
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
#include "monitor/monitor.h"
#include "net/net.h"
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index a47d257149..6a5072fcc6 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -31,7 +31,6 @@
#include "qemu/osdep.h"
#include "hw/pci/pci_bridge.h"
-#include "hw/pci/pci_bus.h"
#include "qemu/range.h"
#include "qapi/error.h"
diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
index 5eaa935cb5..3a26880f18 100644
--- a/hw/pci/pci_host.c
+++ b/hw/pci/pci_host.c
@@ -21,7 +21,6 @@
#include "qemu/osdep.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
-#include "hw/pci/pci_bus.h"
#include "trace.h"
/* debug PCI */
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 32191f2a55..28ba4a0a72 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -25,7 +25,6 @@
#include "hw/pci/pcie.h"
#include "hw/pci/msix.h"
#include "hw/pci/msi.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pcie_regs.h"
#include "qemu/range.h"
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 97200742b4..171955195f 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -27,7 +27,6 @@
#include "hw/pci/pcie.h"
#include "hw/pci/msix.h"
#include "hw/pci/msi.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pcie_regs.h"
#include "qapi/error.h"
diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c
index 69fc14b218..7d25e5dc78 100644
--- a/hw/pci/shpc.c
+++ b/hw/pci/shpc.c
@@ -5,7 +5,6 @@
#include "qemu/error-report.h"
#include "hw/pci/shpc.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/msi.h"
/* TODO: model power only and disabled slot states. */
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 9262682116..4742cad64c 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -42,7 +42,6 @@
#include "qapi/qmp/qerror.h"
#include "hw/ppc/fdt.h"
#include "hw/pci/pci_bridge.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_ids.h"
#include "hw/ppc/spapr_drc.h"
#include "sysemu/device_tree.h"
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 347329dd50..3a8894a36c 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -18,7 +18,6 @@
#include "cpu.h"
#include "s390-pci-bus.h"
#include "s390-pci-inst.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci/msi.h"
#include "qemu/error-report.h"
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 1672f256e7..078414388b 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -27,7 +27,6 @@
#include "cpu.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
#include "hw/pci-host/apb.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index 673d13d28f..c613f85b11 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -12,7 +12,6 @@
#include "hw/pci/pci_bridge.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/ich9.h"
-#include "hw/pci/pci_bus.h"
void ich9_lpc_set_irq(void *opaque, int irq_num, int level);
int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 870ebcfd4b..77d92a3dc4 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -392,12 +392,54 @@ typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level);
typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
+typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
+
+/*
+ * PCI Bus datastructures.
+ */
+
#define TYPE_PCI_BUS "PCI"
#define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS)
#define PCI_BUS_CLASS(klass) OBJECT_CLASS_CHECK(PCIBusClass, (klass), TYPE_PCI_BUS)
#define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS)
#define TYPE_PCIE_BUS "PCIE"
+typedef struct PCIBusClass {
+ /*< private >*/
+ BusClass parent_class;
+ /*< public >*/
+
+ bool (*is_root)(PCIBus *bus);
+ int (*bus_num)(PCIBus *bus);
+ uint16_t (*numa_node)(PCIBus *bus);
+} PCIBusClass;
+
+struct PCIBus {
+ BusState qbus;
+ PCIIOMMUFunc iommu_fn;
+ void *iommu_opaque;
+ uint8_t devfn_min;
+ uint32_t slot_reserved_mask;
+ pci_set_irq_fn set_irq;
+ pci_map_irq_fn map_irq;
+ pci_route_irq_fn route_intx_to_irq;
+ void *irq_opaque;
+ PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
+ PCIDevice *parent_dev;
+ MemoryRegion *address_space_mem;
+ MemoryRegion *address_space_io;
+
+ QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
+ QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
+
+ /* The bus IRQ state is the logical OR of the connected devices.
+ Keep a count of the number of devices with raised IRQs. */
+ int nirq;
+ int *irq_count;
+
+ Notifier machine_done;
+};
+
bool pci_bus_is_express(PCIBus *bus);
bool pci_bus_is_root(PCIBus *bus);
void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
@@ -468,8 +510,6 @@ void pci_bus_get_w64_range(PCIBus *bus, Range *range);
void pci_device_deassert_intx(PCIDevice *dev);
-typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
-
AddressSpace *pci_device_iommu_address_space(PCIDevice *dev);
void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque);
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 9b44ffd22a..454bb09951 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -27,7 +27,6 @@
#define QEMU_PCI_BRIDGE_H
#include "hw/pci/pci.h"
-#include "hw/pci/pci_bus.h"
typedef struct PCIBridgeWindows PCIBridgeWindows;
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
deleted file mode 100644
index b7da8f555b..0000000000
--- a/include/hw/pci/pci_bus.h
+++ /dev/null
@@ -1,47 +0,0 @@
-#ifndef QEMU_PCI_BUS_H
-#define QEMU_PCI_BUS_H
-
-/*
- * PCI Bus datastructures.
- *
- * Do not access the following members directly;
- * use accessor functions in pci.h
- */
-
-typedef struct PCIBusClass {
- /*< private >*/
- BusClass parent_class;
- /*< public >*/
-
- bool (*is_root)(PCIBus *bus);
- int (*bus_num)(PCIBus *bus);
- uint16_t (*numa_node)(PCIBus *bus);
-} PCIBusClass;
-
-struct PCIBus {
- BusState qbus;
- PCIIOMMUFunc iommu_fn;
- void *iommu_opaque;
- uint8_t devfn_min;
- uint32_t slot_reserved_mask;
- pci_set_irq_fn set_irq;
- pci_map_irq_fn map_irq;
- pci_route_irq_fn route_intx_to_irq;
- void *irq_opaque;
- PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
- PCIDevice *parent_dev;
- MemoryRegion *address_space_mem;
- MemoryRegion *address_space_io;
-
- QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
- QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
-
- /* The bus IRQ state is the logical OR of the connected devices.
- Keep a count of the number of devices with raised IRQs. */
- int nirq;
- int *irq_count;
-
- Notifier machine_done;
-};
-
-#endif /* QEMU_PCI_BUS_H */
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index 0736014bfd..bda76d79e0 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -22,7 +22,6 @@
#define QEMU_PCIE_PORT_H
#include "hw/pci/pci_bridge.h"
-#include "hw/pci/pci_bus.h"
#define TYPE_PCIE_PORT "pcie-port"
#define PCIE_PORT(obj) OBJECT_CHECK(PCIEPort, (obj), TYPE_PCIE_PORT)
--
2.14.3
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root()
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
` (2 preceding siblings ...)
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h David Gibson
@ 2017-11-29 8:46 ` David Gibson
2017-11-29 10:45 ` Marcel Apfelbaum
2017-11-30 6:23 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper David Gibson
` (3 subsequent siblings)
7 siblings, 2 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
pci_bus_is_root() currently relies on a method in the PCIBusClass.
But it's always known if a PCI bus is a root bus when we create it, so
using a dynamic method is overkill.
This replaces it with an IS_ROOT bit in a new flags field, which is set on
root buses and otherwise clear. As a bonus this removes the special
is_root logic from pci_expander_bridge, since it already creates its bus
as a root bus.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/pci-bridge/pci_expander_bridge.c | 6 ------
hw/pci/pci.c | 14 ++------------
include/hw/pci/pci.h | 12 +++++++++++-
3 files changed, 13 insertions(+), 19 deletions(-)
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 5652cf06e9..11dfa9258e 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -65,11 +65,6 @@ static int pxb_bus_num(PCIBus *bus)
return pxb->bus_nr;
}
-static bool pxb_is_root(PCIBus *bus)
-{
- return true; /* by definition */
-}
-
static uint16_t pxb_bus_numa_node(PCIBus *bus)
{
PXBDev *pxb = convert_to_pxb(bus->parent_dev);
@@ -82,7 +77,6 @@ static void pxb_bus_class_init(ObjectClass *class, void *data)
PCIBusClass *pbc = PCI_BUS_CLASS(class);
pbc->bus_num = pxb_bus_num;
- pbc->is_root = pxb_is_root;
pbc->numa_node = pxb_bus_numa_node;
}
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 6e11dc2fec..5fab7f23b3 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -126,14 +126,9 @@ static void pci_bus_unrealize(BusState *qbus, Error **errp)
vmstate_unregister(NULL, &vmstate_pcibus, bus);
}
-static bool pcibus_is_root(PCIBus *bus)
-{
- return !bus->parent_dev;
-}
-
static int pcibus_num(PCIBus *bus)
{
- if (pcibus_is_root(bus)) {
+ if (pci_bus_is_root(bus)) {
return 0; /* pci host bridge */
}
return bus->parent_dev->config[PCI_SECONDARY_BUS];
@@ -156,7 +151,6 @@ static void pci_bus_class_init(ObjectClass *klass, void *data)
k->unrealize = pci_bus_unrealize;
k->reset = pcibus_reset;
- pbc->is_root = pcibus_is_root;
pbc->bus_num = pcibus_num;
pbc->numa_node = pcibus_numa_node;
}
@@ -385,6 +379,7 @@ static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
bus->slot_reserved_mask = 0x0;
bus->address_space_mem = address_space_mem;
bus->address_space_io = address_space_io;
+ bus->flags |= PCI_BUS_IS_ROOT;
/* host bridge */
QLIST_INIT(&bus->child);
@@ -397,11 +392,6 @@ bool pci_bus_is_express(PCIBus *bus)
return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS);
}
-bool pci_bus_is_root(PCIBus *bus)
-{
- return PCI_BUS_GET_CLASS(bus)->is_root(bus);
-}
-
void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *address_space_mem,
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 77d92a3dc4..cbb3386207 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -404,6 +404,11 @@ typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
#define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS)
#define TYPE_PCIE_BUS "PCIE"
+enum PCIBusFlags {
+ /* This bus is the root of a PCI domain */
+ PCI_BUS_IS_ROOT = 0x0001,
+};
+
typedef struct PCIBusClass {
/*< private >*/
BusClass parent_class;
@@ -416,6 +421,7 @@ typedef struct PCIBusClass {
struct PCIBus {
BusState qbus;
+ enum PCIBusFlags flags;
PCIIOMMUFunc iommu_fn;
void *iommu_opaque;
uint8_t devfn_min;
@@ -440,8 +446,12 @@ struct PCIBus {
Notifier machine_done;
};
+static inline bool pci_bus_is_root(PCIBus *bus)
+{
+ return !!(bus->flags & PCI_BUS_IS_ROOT);
+}
+
bool pci_bus_is_express(PCIBus *bus);
-bool pci_bus_is_root(PCIBus *bus);
void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *address_space_mem,
--
2.14.3
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
` (3 preceding siblings ...)
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root() David Gibson
@ 2017-11-29 8:46 ` David Gibson
2017-11-29 10:48 ` Marcel Apfelbaum
2017-11-30 6:42 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer David Gibson
` (2 subsequent siblings)
7 siblings, 2 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
A fair proportion of the users of pci_bus_num() want to get the bus
number on a specific device, so first have to look up the bus from the
device then call it. This adds a helper to do that (since we're going
to make looking up the bus slightly more verbose).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/pci/pcie_aer.c | 2 +-
hw/s390x/s390-pci-bus.c | 2 +-
hw/scsi/megasas.c | 2 +-
hw/scsi/mptsas.c | 2 +-
hw/xen/xen_pt.c | 6 +++---
include/hw/pci/pci.h | 5 +++++
include/hw/xen/xen_common.h | 8 ++++----
7 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 171955195f..7688293edc 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -1024,7 +1024,7 @@ static int do_pcie_aer_inject_error(Monitor *mon,
}
details->id = id;
details->root_bus = pci_root_bus_path(dev);
- details->bus = pci_bus_num(dev->bus);
+ details->bus = pci_dev_bus_num(dev);
details->devfn = dev->devfn;
return 0;
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 3a8894a36c..1aecada271 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -691,7 +691,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
/* In the case the PCI device does not define an id */
/* we generate one based on the PCI address */
dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
- pci_bus_num(pdev->bus),
+ pci_dev_bus_num(pdev),
PCI_SLOT(pdev->devfn),
PCI_FUNC(pdev->devfn));
}
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index d5eae6239a..3e38e9e8aa 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -2372,7 +2372,7 @@ static void megasas_scsi_realize(PCIDevice *dev, Error **errp)
if (!s->sas_addr) {
s->sas_addr = ((NAA_LOCALLY_ASSIGNED_ID << 24) |
IEEE_COMPANY_LOCALLY_ASSIGNED) << 36;
- s->sas_addr |= (pci_bus_num(dev->bus) << 16);
+ s->sas_addr |= (pci_dev_bus_num(dev) << 16);
s->sas_addr |= (PCI_SLOT(dev->devfn) << 8);
s->sas_addr |= PCI_FUNC(dev->devfn);
}
diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c
index f6db1b0103..3f061f3f68 100644
--- a/hw/scsi/mptsas.c
+++ b/hw/scsi/mptsas.c
@@ -1312,7 +1312,7 @@ static void mptsas_scsi_realize(PCIDevice *dev, Error **errp)
if (!s->sas_addr) {
s->sas_addr = ((NAA_LOCALLY_ASSIGNED_ID << 24) |
IEEE_COMPANY_LOCALLY_ASSIGNED) << 36;
- s->sas_addr |= (pci_bus_num(dev->bus) << 16);
+ s->sas_addr |= (pci_dev_bus_num(dev) << 16);
s->sas_addr |= (PCI_SLOT(dev->devfn) << 8);
s->sas_addr |= PCI_FUNC(dev->devfn);
}
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 9bba717708..6236f0c391 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -73,7 +73,7 @@ void xen_pt_log(const PCIDevice *d, const char *f, ...)
va_start(ap, f);
if (d) {
- fprintf(stderr, "[%02x:%02x.%d] ", pci_bus_num(d->bus),
+ fprintf(stderr, "[%02x:%02x.%d] ", pci_dev_bus_num(d),
PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
}
vfprintf(stderr, f, ap);
@@ -711,7 +711,7 @@ static void xen_pt_destroy(PCIDevice *d) {
intx = xen_pt_pci_intx(s);
rc = xc_domain_unbind_pt_irq(xen_xc, xen_domid, machine_irq,
PT_IRQ_TYPE_PCI,
- pci_bus_num(d->bus),
+ pci_dev_bus_num(d),
PCI_SLOT(s->dev.devfn),
intx,
0 /* isa_irq */);
@@ -867,7 +867,7 @@ static void xen_pt_realize(PCIDevice *d, Error **errp)
uint8_t e_intx = xen_pt_pci_intx(s);
rc = xc_domain_bind_pt_pci_irq(xen_xc, xen_domid, machine_irq,
- pci_bus_num(d->bus),
+ pci_dev_bus_num(d),
PCI_SLOT(d->devfn),
e_intx);
if (rc < 0) {
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index cbb3386207..a490a2c7d4 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -488,6 +488,11 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
PCIDevice *pci_vga_init(PCIBus *bus);
int pci_bus_num(PCIBus *s);
+static inline int pci_dev_bus_num(const PCIDevice *dev)
+{
+ return pci_bus_num(dev->bus);
+}
+
int pci_bus_numa_node(PCIBus *bus);
void pci_for_each_device(PCIBus *bus, int bus_num,
void (*fn)(PCIBus *bus, PCIDevice *d, void *opaque),
diff --git a/include/hw/xen/xen_common.h b/include/hw/xen/xen_common.h
index 86c7f26106..64a978e4e0 100644
--- a/include/hw/xen/xen_common.h
+++ b/include/hw/xen/xen_common.h
@@ -542,10 +542,10 @@ static inline void xen_map_pcidev(domid_t dom,
return;
}
- trace_xen_map_pcidev(ioservid, pci_bus_num(pci_dev->bus),
+ trace_xen_map_pcidev(ioservid, pci_dev_bus_num(pci_dev),
PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
xendevicemodel_map_pcidev_to_ioreq_server(xen_dmod, dom, ioservid, 0,
- pci_bus_num(pci_dev->bus),
+ pci_dev_bus_num(pci_dev),
PCI_SLOT(pci_dev->devfn),
PCI_FUNC(pci_dev->devfn));
}
@@ -558,10 +558,10 @@ static inline void xen_unmap_pcidev(domid_t dom,
return;
}
- trace_xen_unmap_pcidev(ioservid, pci_bus_num(pci_dev->bus),
+ trace_xen_unmap_pcidev(ioservid, pci_dev_bus_num(pci_dev),
PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
xendevicemodel_unmap_pcidev_from_ioreq_server(xen_dmod, dom, ioservid, 0,
- pci_bus_num(pci_dev->bus),
+ pci_dev_bus_num(pci_dev),
PCI_SLOT(pci_dev->devfn),
PCI_FUNC(pci_dev->devfn));
}
--
2.14.3
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
` (4 preceding siblings ...)
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper David Gibson
@ 2017-11-29 8:46 ` David Gibson
2017-11-29 10:54 ` Marcel Apfelbaum
2017-11-30 6:31 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus() David Gibson
2017-11-29 9:02 ` [Qemu-devel] [for-2.12 0/7] PCI cleanups no-reply
7 siblings, 2 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
The bus pointer in PCIDevice is basically redundant with QOM information.
It's always initialized to the qdev_get_parent_bus(), the only difference
is the type.
Therefore this patch eliminates the field, instead creating a pci_get_bus()
helper to do the type mangling to derive it conveniently from the QOM
Device object underneath.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/acpi/pcihp.c | 4 +-
hw/acpi/piix4.c | 7 ++--
hw/i386/xen/xen_platform.c | 12 +++---
hw/isa/lpc_ich9.c | 10 ++---
hw/net/vmxnet3.c | 2 +-
hw/pci-bridge/pci_expander_bridge.c | 17 +++++----
hw/pci-host/piix.c | 10 ++---
hw/pci-host/versatile.c | 2 +-
hw/pci/pci.c | 76 +++++++++++++++++++------------------
hw/pci/pci_bridge.c | 6 +--
hw/pci/pcie.c | 5 ++-
hw/pci/pcie_aer.c | 2 +-
hw/ppc/spapr_pci.c | 2 +-
hw/s390x/s390-pci-bus.c | 8 ++--
hw/scsi/vmw_pvscsi.c | 2 +-
hw/usb/hcd-xhci.c | 2 +-
hw/vfio/pci.c | 10 ++---
hw/virtio/virtio-pci.c | 4 +-
hw/xen/xen_pt.c | 4 +-
include/hw/pci/pci.h | 9 +++--
20 files changed, 102 insertions(+), 92 deletions(-)
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 0da905ab3a..98f13722bc 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -222,7 +222,7 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
{
PCIDevice *pdev = PCI_DEVICE(dev);
int slot = PCI_SLOT(pdev->devfn);
- int bsel = acpi_pcihp_get_bsel(pdev->bus);
+ int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
if (bsel < 0) {
error_setg(errp, "Unsupported bus. Bus doesn't have property '"
ACPI_PCIHP_PROP_BSEL "' set");
@@ -245,7 +245,7 @@ void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
{
PCIDevice *pdev = PCI_DEVICE(dev);
int slot = PCI_SLOT(pdev->devfn);
- int bsel = acpi_pcihp_get_bsel(pdev->bus);
+ int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
if (bsel < 0) {
error_setg(errp, "Unsupported bus. Bus doesn't have property '"
ACPI_PCIHP_PROP_BSEL "' set");
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index a0fb1ce037..8b703455b7 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -460,9 +460,9 @@ static void piix4_pm_machine_ready(Notifier *n, void *opaque)
(memory_region_present(io_as, 0x2f8) ? 0x90 : 0);
if (s->use_acpi_pci_hotplug) {
- pci_for_each_bus(d->bus, piix4_update_bus_hotplug, s);
+ pci_for_each_bus(pci_get_bus(d), piix4_update_bus_hotplug, s);
} else {
- piix4_update_bus_hotplug(d->bus, s);
+ piix4_update_bus_hotplug(pci_get_bus(d), s);
}
}
@@ -535,7 +535,8 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp)
qemu_add_machine_init_done_notifier(&s->machine_ready);
qemu_register_reset(piix4_reset, s);
- piix4_acpi_system_hot_add_init(pci_address_space_io(dev), dev->bus, s);
+ piix4_acpi_system_hot_add_init(pci_address_space_io(dev),
+ pci_get_bus(dev), s);
piix4_pm_add_propeties(s);
}
diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c
index 056b87de0b..9ab54834d5 100644
--- a/hw/i386/xen/xen_platform.c
+++ b/hw/i386/xen/xen_platform.c
@@ -186,11 +186,11 @@ static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t v
if (val & (UNPLUG_IDE_SCSI_DISKS | UNPLUG_AUX_IDE_DISKS |
UNPLUG_NVME_DISKS)) {
DPRINTF("unplug disks\n");
- pci_unplug_disks(pci_dev->bus, val);
+ pci_unplug_disks(pci_get_bus(pci_dev), val);
}
if (val & UNPLUG_ALL_NICS) {
DPRINTF("unplug nics\n");
- pci_unplug_nics(pci_dev->bus);
+ pci_unplug_nics(pci_get_bus(pci_dev));
}
break;
}
@@ -372,17 +372,17 @@ static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
* If VMDP was to control both disk and LAN it would use 4.
* If it controlled just disk or just LAN, it would use 8 below.
*/
- pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS);
- pci_unplug_nics(pci_dev->bus);
+ pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
+ pci_unplug_nics(pci_get_bus(pci_dev));
}
break;
case 8:
switch (val) {
case 1:
- pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS);
+ pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
break;
case 2:
- pci_unplug_nics(pci_dev->bus);
+ pci_unplug_nics(pci_get_bus(pci_dev));
break;
default:
log_writeb(s, (uint32_t)val);
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index e77a4abb15..186457f8cb 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -161,7 +161,7 @@ static void ich9_cc_write(void *opaque, hwaddr addr,
ich9_cc_addr_len(&addr, &len);
memcpy(lpc->chip_config + addr, &val, len);
- pci_bus_fire_intx_routing_notifier(lpc->d.bus);
+ pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d));
ich9_cc_update(lpc);
}
@@ -217,7 +217,7 @@ static void ich9_lpc_update_pic(ICH9LPCState *lpc, int gsi)
int tmp_dis;
ich9_lpc_pic_irq(lpc, i, &tmp_irq, &tmp_dis);
if (!tmp_dis && tmp_irq == gsi) {
- pic_level |= pci_bus_get_irq_level(lpc->d.bus, i);
+ pic_level |= pci_bus_get_irq_level(pci_get_bus(&lpc->d), i);
}
}
if (gsi == lpc->sci_gsi) {
@@ -245,7 +245,7 @@ static void ich9_lpc_update_apic(ICH9LPCState *lpc, int gsi)
assert(gsi >= ICH9_LPC_PIC_NUM_PINS);
- level |= pci_bus_get_irq_level(lpc->d.bus, ich9_gsi_to_pirq(gsi));
+ level |= pci_bus_get_irq_level(pci_get_bus(&lpc->d), ich9_gsi_to_pirq(gsi));
if (gsi == lpc->sci_gsi) {
level |= lpc->sci_level;
}
@@ -523,10 +523,10 @@ static void ich9_lpc_config_write(PCIDevice *d,
ich9_lpc_rcba_update(lpc, rcba_old);
}
if (ranges_overlap(addr, len, ICH9_LPC_PIRQA_ROUT, 4)) {
- pci_bus_fire_intx_routing_notifier(lpc->d.bus);
+ pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d));
}
if (ranges_overlap(addr, len, ICH9_LPC_PIRQE_ROUT, 4)) {
- pci_bus_fire_intx_routing_notifier(lpc->d.bus);
+ pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d));
}
if (ranges_overlap(addr, len, ICH9_LPC_GEN_PMCON_1, 8)) {
ich9_lpc_pmcon_update(lpc);
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index b8404cb2e2..0654d594c1 100644
--- a/hw/net/vmxnet3.c
+++ b/hw/net/vmxnet3.c
@@ -2356,7 +2356,7 @@ static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp)
vmxnet3_net_init(s);
if (pci_is_express(pci_dev)) {
- if (pci_bus_is_express(pci_dev->bus)) {
+ if (pci_bus_is_express(pci_get_bus(pci_dev))) {
pcie_endpoint_cap_init(pci_dev, VMXNET3_EXP_EP_OFFSET);
}
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 11dfa9258e..fb60f9a054 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -51,7 +51,8 @@ typedef struct PXBDev {
static PXBDev *convert_to_pxb(PCIDevice *dev)
{
- return pci_bus_is_express(dev->bus) ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
+ return pci_bus_is_express(pci_get_bus(dev))
+ ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
}
static GList *pxb_dev_list;
@@ -159,7 +160,7 @@ static const TypeInfo pxb_host_info = {
*/
static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp)
{
- PCIBus *bus = dev->bus;
+ PCIBus *bus = pci_get_bus(dev);
int pxb_bus_num = pci_bus_num(pxb_bus);
if (bus->parent_dev) {
@@ -173,12 +174,12 @@ static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp)
return;
}
}
- QLIST_INSERT_HEAD(&dev->bus->child, pxb_bus, sibling);
+ QLIST_INSERT_HEAD(&pci_get_bus(dev)->child, pxb_bus, sibling);
}
static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
{
- PCIDevice *pxb = pci_dev->bus->parent_dev;
+ PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev;
/*
* The bios does not index the pxb slot number when
@@ -233,8 +234,8 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
}
bus->parent_dev = dev;
- bus->address_space_mem = dev->bus->address_space_mem;
- bus->address_space_io = dev->bus->address_space_io;
+ bus->address_space_mem = pci_get_bus(dev)->address_space_mem;
+ bus->address_space_io = pci_get_bus(dev)->address_space_io;
bus->map_irq = pxb_map_irq_fn;
PCI_HOST_BRIDGE(ds)->bus = bus;
@@ -265,7 +266,7 @@ err_register_bus:
static void pxb_dev_realize(PCIDevice *dev, Error **errp)
{
- if (pci_bus_is_express(dev->bus)) {
+ if (pci_bus_is_express(pci_get_bus(dev))) {
error_setg(errp, "pxb devices cannot reside on a PCIe bus");
return;
}
@@ -317,7 +318,7 @@ static const TypeInfo pxb_dev_info = {
static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp)
{
- if (!pci_bus_is_express(dev->bus)) {
+ if (!pci_bus_is_express(pci_get_bus(dev))) {
error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus");
return;
}
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index cf9070186c..effe3db8e2 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -512,12 +512,12 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin)
/* irq routing is changed. so rebuild bitmap */
static void piix3_update_irq_levels(PIIX3State *piix3)
{
+ PCIBus *bus = pci_get_bus(&piix3->dev);
int pirq;
piix3->pic_levels = 0;
for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
- piix3_set_irq_level(piix3, pirq,
- pci_bus_get_irq_level(piix3->dev.bus, pirq));
+ piix3_set_irq_level(piix3, pirq, pci_bus_get_irq_level(bus, pirq));
}
}
@@ -529,7 +529,7 @@ static void piix3_write_config(PCIDevice *dev,
PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
int pic_irq;
- pci_bus_fire_intx_routing_notifier(piix3->dev.bus);
+ pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev));
piix3_update_irq_levels(piix3);
for (pic_irq = 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) {
piix3_set_irq_pic(piix3, pic_irq);
@@ -601,7 +601,7 @@ static int piix3_post_load(void *opaque, int version_id)
piix3->pic_levels = 0;
for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
piix3_set_irq_level_internal(piix3, pirq,
- pci_bus_get_irq_level(piix3->dev.bus, pirq));
+ pci_bus_get_irq_level(pci_get_bus(&piix3->dev), pirq));
}
return 0;
}
@@ -613,7 +613,7 @@ static int piix3_pre_save(void *opaque)
for (i = 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) {
piix3->pci_irq_levels_vmstate[i] =
- pci_bus_get_irq_level(piix3->dev.bus, i);
+ pci_bus_get_irq_level(pci_get_bus(&piix3->dev), i);
}
return 0;
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index b5bf4dce55..2586f8c982 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -310,7 +310,7 @@ static const MemoryRegionOps pci_vpb_config_ops = {
static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
{
- PCIVPBState *s = container_of(d->bus, PCIVPBState, pci_bus);
+ PCIVPBState *s = container_of(pci_get_bus(d), PCIVPBState, pci_bus);
if (s->irq_mapping == PCI_VPB_IRQMAP_BROKEN) {
/* Legacy broken IRQ mapping for compatibility with old and
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 5fab7f23b3..cd4d9d7ecd 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -215,7 +215,7 @@ static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)
{
PCIBus *bus;
for (;;) {
- bus = pci_dev->bus;
+ bus = pci_get_bus(pci_dev);
irq_num = bus->map_irq(pci_dev, irq_num);
if (bus->set_irq)
break;
@@ -342,13 +342,13 @@ PCIBus *pci_find_primary_bus(void)
PCIBus *pci_device_root_bus(const PCIDevice *d)
{
- PCIBus *bus = d->bus;
+ PCIBus *bus = pci_get_bus(d);
while (!pci_bus_is_root(bus)) {
d = bus->parent_dev;
assert(d != NULL);
- bus = d->bus;
+ bus = pci_get_bus(d);
}
return bus;
@@ -871,7 +871,7 @@ static void pci_config_free(PCIDevice *pci_dev)
static void do_pci_unregister_device(PCIDevice *pci_dev)
{
- pci_dev->bus->devices[pci_dev->devfn] = NULL;
+ pci_get_bus(pci_dev)->devices[pci_dev->devfn] = NULL;
pci_config_free(pci_dev);
if (memory_region_is_mapped(&pci_dev->bus_master_enable_region)) {
@@ -892,7 +892,7 @@ static uint16_t pci_req_id_cache_extract(PCIReqIDCache *cache)
result = pci_get_bdf(cache->dev);
break;
case PCI_REQ_ID_SECONDARY_BUS:
- bus_n = pci_bus_num(cache->dev->bus);
+ bus_n = pci_dev_bus_num(cache->dev);
result = PCI_BUILD_BDF(bus_n, 0);
break;
default:
@@ -922,9 +922,9 @@ static PCIReqIDCache pci_req_id_cache_get(PCIDevice *dev)
.type = PCI_REQ_ID_BDF,
};
- while (!pci_bus_is_root(dev->bus)) {
+ while (!pci_bus_is_root(pci_get_bus(dev))) {
/* We are under PCI/PCIe bridges */
- parent = dev->bus->parent_dev;
+ parent = pci_get_bus(dev)->parent_dev;
if (pci_is_express(parent)) {
if (pcie_cap_get_type(parent) == PCI_EXP_TYPE_PCI_BRIDGE) {
/* When we pass through PCIe-to-PCI/PCIX bridges, we
@@ -967,7 +967,7 @@ static bool pci_bus_devfn_reserved(PCIBus *bus, int devfn)
}
/* -1 for devfn means auto assign */
-static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
+static PCIDevice *do_pci_register_device(PCIDevice *pci_dev,
const char *name, int devfn,
Error **errp)
{
@@ -976,8 +976,8 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
PCIConfigWriteFunc *config_write = pc->config_write;
Error *local_err = NULL;
DeviceState *dev = DEVICE(pci_dev);
+ PCIBus *bus = pci_get_bus(pci_dev);
- pci_dev->bus = bus;
/* Only pci bridges can be attached to extra PCI root buses */
if (pci_bus_is_root(bus) && bus->parent_dev && !pc->is_bridge) {
error_setg(errp,
@@ -1131,8 +1131,8 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
r->type = type;
r->memory = memory;
r->address_space = type & PCI_BASE_ADDRESS_SPACE_IO
- ? pci_dev->bus->address_space_io
- : pci_dev->bus->address_space_mem;
+ ? pci_get_bus(pci_dev)->address_space_io
+ : pci_get_bus(pci_dev)->address_space_mem;
wmask = ~(size - 1);
if (region_num == PCI_ROM_SLOT) {
@@ -1174,21 +1174,23 @@ static void pci_update_vga(PCIDevice *pci_dev)
void pci_register_vga(PCIDevice *pci_dev, MemoryRegion *mem,
MemoryRegion *io_lo, MemoryRegion *io_hi)
{
+ PCIBus *bus = pci_get_bus(pci_dev);
+
assert(!pci_dev->has_vga);
assert(memory_region_size(mem) == QEMU_PCI_VGA_MEM_SIZE);
pci_dev->vga_regions[QEMU_PCI_VGA_MEM] = mem;
- memory_region_add_subregion_overlap(pci_dev->bus->address_space_mem,
+ memory_region_add_subregion_overlap(bus->address_space_mem,
QEMU_PCI_VGA_MEM_BASE, mem, 1);
assert(memory_region_size(io_lo) == QEMU_PCI_VGA_IO_LO_SIZE);
pci_dev->vga_regions[QEMU_PCI_VGA_IO_LO] = io_lo;
- memory_region_add_subregion_overlap(pci_dev->bus->address_space_io,
+ memory_region_add_subregion_overlap(bus->address_space_io,
QEMU_PCI_VGA_IO_LO_BASE, io_lo, 1);
assert(memory_region_size(io_hi) == QEMU_PCI_VGA_IO_HI_SIZE);
pci_dev->vga_regions[QEMU_PCI_VGA_IO_HI] = io_hi;
- memory_region_add_subregion_overlap(pci_dev->bus->address_space_io,
+ memory_region_add_subregion_overlap(bus->address_space_io,
QEMU_PCI_VGA_IO_HI_BASE, io_hi, 1);
pci_dev->has_vga = true;
@@ -1197,15 +1199,17 @@ void pci_register_vga(PCIDevice *pci_dev, MemoryRegion *mem,
void pci_unregister_vga(PCIDevice *pci_dev)
{
+ PCIBus *bus = pci_get_bus(pci_dev);
+
if (!pci_dev->has_vga) {
return;
}
- memory_region_del_subregion(pci_dev->bus->address_space_mem,
+ memory_region_del_subregion(bus->address_space_mem,
pci_dev->vga_regions[QEMU_PCI_VGA_MEM]);
- memory_region_del_subregion(pci_dev->bus->address_space_io,
+ memory_region_del_subregion(bus->address_space_io,
pci_dev->vga_regions[QEMU_PCI_VGA_IO_LO]);
- memory_region_del_subregion(pci_dev->bus->address_space_io,
+ memory_region_del_subregion(bus->address_space_io,
pci_dev->vga_regions[QEMU_PCI_VGA_IO_HI]);
pci_dev->has_vga = false;
}
@@ -1308,7 +1312,7 @@ static void pci_update_mappings(PCIDevice *d)
/* now do the real mapping */
if (r->addr != PCI_BAR_UNMAPPED) {
- trace_pci_update_mappings_del(d, pci_bus_num(d->bus),
+ trace_pci_update_mappings_del(d, pci_dev_bus_num(d),
PCI_SLOT(d->devfn),
PCI_FUNC(d->devfn),
i, r->addr, r->size);
@@ -1316,7 +1320,7 @@ static void pci_update_mappings(PCIDevice *d)
}
r->addr = new_addr;
if (r->addr != PCI_BAR_UNMAPPED) {
- trace_pci_update_mappings_add(d, pci_bus_num(d->bus),
+ trace_pci_update_mappings_add(d, pci_dev_bus_num(d),
PCI_SLOT(d->devfn),
PCI_FUNC(d->devfn),
i, r->addr, r->size);
@@ -1435,9 +1439,9 @@ PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin)
PCIBus *bus;
do {
- bus = dev->bus;
- pin = bus->map_irq(dev, pin);
- dev = bus->parent_dev;
+ bus = pci_get_bus(dev);
+ pin = bus->map_irq(dev, pin);
+ dev = bus->parent_dev;
} while (dev);
if (!bus->route_intx_to_irq) {
@@ -2007,7 +2011,6 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)
PCIDevice *pci_dev = (PCIDevice *)qdev;
PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(pci_dev);
Error *local_err = NULL;
- PCIBus *bus;
bool is_default_rom;
/* initialize cap_present for pci_is_express() and pci_config_size() */
@@ -2015,8 +2018,7 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)
pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
}
- bus = PCI_BUS(qdev_get_parent_bus(qdev));
- pci_dev = do_pci_register_device(pci_dev, bus,
+ pci_dev = do_pci_register_device(pci_dev,
object_get_typename(OBJECT(qdev)),
pci_dev->devfn, errp);
if (pci_dev == NULL)
@@ -2309,7 +2311,7 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
error_setg(errp, "%s:%02x:%02x.%x "
"Attempt to add PCI capability %x at offset "
"%x overlaps existing capability %x at offset %x",
- pci_root_bus_path(pdev), pci_bus_num(pdev->bus),
+ pci_root_bus_path(pdev), pci_dev_bus_num(pdev),
PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
cap_id, offset, overlapping_cap, i);
return -EINVAL;
@@ -2373,7 +2375,7 @@ static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent)
monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, "
"pci id %04x:%04x (sub %04x:%04x)\n",
- indent, "", ctxt, pci_bus_num(d->bus),
+ indent, "", ctxt, pci_dev_bus_num(d),
PCI_SLOT(d->devfn), PCI_FUNC(d->devfn),
pci_get_word(d->config + PCI_VENDOR_ID),
pci_get_word(d->config + PCI_DEVICE_ID),
@@ -2456,7 +2458,7 @@ static char *pcibus_get_dev_path(DeviceState *dev)
/* Calculate # of slots on path between device and root. */;
slot_depth = 0;
- for (t = d; t; t = t->bus->parent_dev) {
+ for (t = d; t; t = pci_get_bus(t)->parent_dev) {
++slot_depth;
}
@@ -2471,7 +2473,7 @@ static char *pcibus_get_dev_path(DeviceState *dev)
/* Fill in slot numbers. We walk up from device to root, so need to print
* them in the reverse order, last to first. */
p = path + path_len;
- for (t = d; t; t = t->bus->parent_dev) {
+ for (t = d; t; t = pci_get_bus(t)->parent_dev) {
p -= slot_len;
s = snprintf(slot, sizeof slot, ":%02x.%x",
PCI_SLOT(t->devfn), PCI_FUNC(t->devfn));
@@ -2519,12 +2521,12 @@ int pci_qdev_find_device(const char *id, PCIDevice **pdev)
MemoryRegion *pci_address_space(PCIDevice *dev)
{
- return dev->bus->address_space_mem;
+ return pci_get_bus(dev)->address_space_mem;
}
MemoryRegion *pci_address_space_io(PCIDevice *dev)
{
- return dev->bus->address_space_io;
+ return pci_get_bus(dev)->address_space_io;
}
static void pci_device_class_init(ObjectClass *klass, void *data)
@@ -2552,11 +2554,11 @@ static void pci_device_class_base_init(ObjectClass *klass, void *data)
AddressSpace *pci_device_iommu_address_space(PCIDevice *dev)
{
- PCIBus *bus = PCI_BUS(dev->bus);
+ PCIBus *bus = pci_get_bus(dev);
PCIBus *iommu_bus = bus;
while(iommu_bus && !iommu_bus->iommu_fn && iommu_bus->parent_dev) {
- iommu_bus = PCI_BUS(iommu_bus->parent_dev->bus);
+ iommu_bus = pci_get_bus(iommu_bus->parent_dev);
}
if (iommu_bus && iommu_bus->iommu_fn) {
return iommu_bus->iommu_fn(bus, iommu_bus->iommu_opaque, dev->devfn);
@@ -2627,7 +2629,7 @@ void pci_bus_get_w64_range(PCIBus *bus, Range *range)
static bool pcie_has_upstream_port(PCIDevice *dev)
{
- PCIDevice *parent_dev = pci_bridge_get_device(dev->bus);
+ PCIDevice *parent_dev = pci_bridge_get_device(pci_get_bus(dev));
/* Device associated with an upstream port.
* As there are several types of these, it's easier to check the
@@ -2643,12 +2645,14 @@ static bool pcie_has_upstream_port(PCIDevice *dev)
PCIDevice *pci_get_function_0(PCIDevice *pci_dev)
{
+ PCIBus *bus = pci_get_bus(pci_dev);
+
if(pcie_has_upstream_port(pci_dev)) {
/* With an upstream PCIe port, we only support 1 device at slot 0 */
- return pci_dev->bus->devices[0];
+ return bus->devices[0];
} else {
/* Other bus types might support multiple devices at slots 0-31 */
- return pci_dev->bus->devices[PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 0)];
+ return bus->devices[PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 0)];
}
}
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 6a5072fcc6..f88c33e0e5 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -182,7 +182,7 @@ static void pci_bridge_init_vga_aliases(PCIBridge *br, PCIBus *parent,
static PCIBridgeWindows *pci_bridge_region_init(PCIBridge *br)
{
PCIDevice *pd = PCI_DEVICE(br);
- PCIBus *parent = pd->bus;
+ PCIBus *parent = pci_get_bus(pd);
PCIBridgeWindows *w = g_new(PCIBridgeWindows, 1);
uint16_t cmd = pci_get_word(pd->config + PCI_COMMAND);
@@ -213,7 +213,7 @@ static PCIBridgeWindows *pci_bridge_region_init(PCIBridge *br)
static void pci_bridge_region_del(PCIBridge *br, PCIBridgeWindows *w)
{
PCIDevice *pd = PCI_DEVICE(br);
- PCIBus *parent = pd->bus;
+ PCIBus *parent = pci_get_bus(pd);
memory_region_del_subregion(parent->address_space_io, &w->alias_io);
memory_region_del_subregion(parent->address_space_mem, &w->alias_mem);
@@ -338,7 +338,7 @@ void pci_bridge_reset(DeviceState *qdev)
/* default qdev initialization function for PCI-to-PCI bridge */
void pci_bridge_initfn(PCIDevice *dev, const char *typename)
{
- PCIBus *parent = dev->bus;
+ PCIBus *parent = pci_get_bus(dev);
PCIBridge *br = PCI_BRIDGE(dev);
PCIBus *sec_bus = &br->sec_bus;
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 28ba4a0a72..424d2f7a64 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -154,7 +154,8 @@ pcie_endpoint_cap_common_init(PCIDevice *dev, uint8_t offset, uint8_t cap_size)
* a regular Endpoint type is exposed on a root complex. These
* should instead be Root Complex Integrated Endpoints.
*/
- if (pci_bus_is_express(dev->bus) && pci_bus_is_root(dev->bus)) {
+ if (pci_bus_is_express(pci_get_bus(dev))
+ && pci_bus_is_root(pci_get_bus(dev))) {
type = PCI_EXP_TYPE_RC_END;
}
@@ -368,7 +369,7 @@ void pcie_cap_slot_hot_unplug_request_cb(HotplugHandler *hotplug_dev,
{
uint8_t *exp_cap;
PCIDevice *pci_dev = PCI_DEVICE(dev);
- PCIBus *bus = pci_dev->bus;
+ PCIBus *bus = pci_get_bus(pci_dev);
pcie_cap_slot_hotplug_common(PCI_DEVICE(hotplug_dev), dev, &exp_cap, errp);
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 7688293edc..5553e614af 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -408,7 +408,7 @@ static void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg)
*/
return;
}
- dev = pci_bridge_get_device(dev->bus);
+ dev = pci_bridge_get_device(pci_get_bus(dev));
}
}
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 4742cad64c..13d7404693 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -504,7 +504,7 @@ static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu,
goto param_error_exit;
}
- rtas_st(rets, 1, (pci_bus_num(pdev->bus) << 16) + 1);
+ rtas_st(rets, 1, (pci_bus_num(pci_get_bus(pdev)) << 16) + 1);
break;
case RTAS_GET_PE_MODE:
rtas_st(rets, 1, RTAS_PE_MODE_SHARED);
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 1aecada271..721755ded3 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -679,10 +679,10 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
s->bus_no += 1;
pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
do {
- pdev = pdev->bus->parent_dev;
+ pdev = pci_get_bus(pdev)->parent_dev;
pci_default_write_config(pdev, PCI_SUBORDINATE_BUS,
s->bus_no, 1);
- } while (pdev->bus && pci_bus_num(pdev->bus));
+ } while (pci_get_bus(pdev) && pci_dev_bus_num(pdev));
}
} else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
pdev = PCI_DEVICE(dev);
@@ -712,7 +712,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
}
pbdev->pdev = pdev;
- pbdev->iommu = s390_pci_get_iommu(s, pdev->bus, pdev->devfn);
+ pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn);
pbdev->iommu->pbdev = pbdev;
pbdev->state = ZPCI_FS_DISABLED;
@@ -806,7 +806,7 @@ static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev,
s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
pbdev->fh, pbdev->fid);
- bus = pci_dev->bus;
+ bus = pci_get_bus(pci_dev);
devfn = pci_dev->devfn;
object_unparent(OBJECT(pci_dev));
s390_pci_msix_free(pbdev);
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index d564e5caff..27749c0e42 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -1133,7 +1133,7 @@ pvscsi_realizefn(PCIDevice *pci_dev, Error **errp)
pvscsi_init_msi(s);
- if (pci_is_express(pci_dev) && pci_bus_is_express(pci_dev->bus)) {
+ if (pci_is_express(pci_dev) && pci_bus_is_express(pci_get_bus(pci_dev))) {
pcie_endpoint_cap_init(pci_dev, PVSCSI_EXP_EP_OFFSET);
}
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index af3a9d88de..228e82b3fb 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -3416,7 +3416,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, Error **errp)
PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64,
&xhci->mem);
- if (pci_bus_is_express(dev->bus) ||
+ if (pci_bus_is_express(pci_get_bus(dev)) ||
xhci_get_flag(xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) {
ret = pcie_endpoint_cap_init(dev, 0xa0);
assert(ret > 0);
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index c977ee327f..2c71295125 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -1654,8 +1654,8 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
return -EINVAL;
}
- if (!pci_bus_is_express(vdev->pdev.bus)) {
- PCIBus *bus = vdev->pdev.bus;
+ if (!pci_bus_is_express(pci_get_bus(&vdev->pdev))) {
+ PCIBus *bus = pci_get_bus(&vdev->pdev);
PCIDevice *bridge;
/*
@@ -1680,14 +1680,14 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
*/
while (!pci_bus_is_root(bus)) {
bridge = pci_bridge_get_device(bus);
- bus = bridge->bus;
+ bus = pci_get_bus(bridge);
}
if (pci_bus_is_express(bus)) {
return 0;
}
- } else if (pci_bus_is_root(vdev->pdev.bus)) {
+ } else if (pci_bus_is_root(pci_get_bus(&vdev->pdev))) {
/*
* On a Root Complex bus Endpoints become Root Complex Integrated
* Endpoints, which changes the type and clears the LNK & LNK2 fields.
@@ -1890,7 +1890,7 @@ static void vfio_add_ext_cap(VFIOPCIDevice *vdev)
uint8_t *config;
/* Only add extended caps if we have them and the guest can see them */
- if (!pci_is_express(pdev) || !pci_bus_is_express(pdev->bus) ||
+ if (!pci_is_express(pdev) || !pci_bus_is_express(pci_get_bus(pdev)) ||
!pci_get_long(pdev->config + PCI_CONFIG_SPACE_SIZE)) {
return;
}
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index e92837c42b..42b31fbcf8 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1708,8 +1708,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
{
VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
- bool pcie_port = pci_bus_is_express(pci_dev->bus) &&
- !pci_bus_is_root(pci_dev->bus);
+ bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
+ !pci_bus_is_root(pci_get_bus(pci_dev));
if (kvm_enabled() && !kvm_has_many_ioeventfds()) {
proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 6236f0c391..752b6f6d5c 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -602,7 +602,7 @@ static void xen_pt_region_update(XenPCIPassthroughState *s,
}
args.type = d->io_regions[bar].type;
- pci_for_each_device(d->bus, pci_bus_num(d->bus),
+ pci_for_each_device(pci_get_bus(d), pci_dev_bus_num(d),
xen_pt_check_bar_overlap, &args);
if (args.rc) {
XEN_PT_WARN(d, "Region: %d (addr: %#"FMT_PCIBUS
@@ -695,7 +695,7 @@ xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
PCIDevice *d = &s->dev;
gpu_dev_id = dev->device_id;
- igd_passthrough_isa_bridge_create(d->bus, gpu_dev_id);
+ igd_passthrough_isa_bridge_create(pci_get_bus(d), gpu_dev_id);
}
/* destroy. */
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index a490a2c7d4..50034157fd 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -285,7 +285,6 @@ struct PCIDevice {
uint8_t *used;
/* the following fields are read only */
- PCIBus *bus;
int32_t devfn;
/* Cached device to fetch requester ID from, to avoid the PCI
* tree walking every time we invoke PCI request (e.g.,
@@ -487,10 +486,14 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
PCIDevice *pci_vga_init(PCIBus *bus);
+static inline PCIBus *pci_get_bus(const PCIDevice *dev)
+{
+ return PCI_BUS(qdev_get_parent_bus(DEVICE(dev)));
+}
int pci_bus_num(PCIBus *s);
static inline int pci_dev_bus_num(const PCIDevice *dev)
{
- return pci_bus_num(dev->bus);
+ return pci_bus_num(pci_get_bus(dev));
}
int pci_bus_numa_node(PCIBus *bus);
@@ -795,7 +798,7 @@ static inline uint32_t pci_config_size(const PCIDevice *d)
static inline uint16_t pci_get_bdf(PCIDevice *dev)
{
- return PCI_BUILD_BDF(pci_bus_num(dev->bus), dev->devfn);
+ return PCI_BUILD_BDF(pci_bus_num(pci_get_bus(dev)), dev->devfn);
}
uint16_t pci_requester_id(PCIDevice *dev);
--
2.14.3
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus()
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
` (5 preceding siblings ...)
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer David Gibson
@ 2017-11-29 8:46 ` David Gibson
2017-11-29 10:56 ` Marcel Apfelbaum
2017-11-30 6:39 ` Peter Xu
2017-11-29 9:02 ` [Qemu-devel] [for-2.12 0/7] PCI cleanups no-reply
7 siblings, 2 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 8:46 UTC (permalink / raw)
To: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum, Igor Mammedov
Cc: qemu-devel, David Gibson
pci_find_primary_bus() only has one user, in pc_xen_hvm_init(). That's
inside the machine construction code, so it already has easy access to the
machine's primary PCI bus.
Get it directly, and thereby remove pci_find_primary_bus(). This removes
one of only a handful of users of the ugly pci_host_bridges global.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/i386/pc_piix.c | 8 ++------
hw/pci/pci.c | 16 ----------------
include/hw/pci/pci.h | 1 -
3 files changed, 2 insertions(+), 23 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 5e47528993..2febd0e136 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -394,7 +394,7 @@ static void pc_xen_hvm_init_pci(MachineState *machine)
static void pc_xen_hvm_init(MachineState *machine)
{
- PCIBus *bus;
+ PCMachineState *pcms = PC_MACHINE(machine);
if (!xen_enabled()) {
error_report("xenfv machine requires the xen accelerator");
@@ -402,11 +402,7 @@ static void pc_xen_hvm_init(MachineState *machine)
}
pc_xen_hvm_init_pci(machine);
-
- bus = pci_find_primary_bus();
- if (bus != NULL) {
- pci_create_simple(bus, -1, "xen-platform");
- }
+ pci_create_simple(pcms->bus, -1, "xen-platform");
}
#endif
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index cd4d9d7ecd..ab76c4f3f1 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -324,22 +324,6 @@ static void pci_host_bus_register(DeviceState *host)
QLIST_INSERT_HEAD(&pci_host_bridges, host_bridge, next);
}
-PCIBus *pci_find_primary_bus(void)
-{
- PCIBus *primary_bus = NULL;
- PCIHostState *host;
-
- QLIST_FOREACH(host, &pci_host_bridges, next) {
- if (primary_bus) {
- /* We have multiple root buses, refuse to select a primary */
- return NULL;
- }
- primary_bus = host->bus;
- }
-
- return primary_bus;
-}
-
PCIBus *pci_device_root_bus(const PCIDevice *d)
{
PCIBus *bus = pci_get_bus(d);
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 50034157fd..867b1ee175 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -519,7 +519,6 @@ void pci_for_each_bus(PCIBus *bus,
pci_for_each_bus_depth_first(bus, NULL, fn, opaque);
}
-PCIBus *pci_find_primary_bus(void);
PCIBus *pci_device_root_bus(const PCIDevice *d);
const char *pci_root_bus_path(PCIDevice *dev);
PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
--
2.14.3
^ permalink raw reply related [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
` (6 preceding siblings ...)
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus() David Gibson
@ 2017-11-29 9:02 ` no-reply
2017-11-29 9:18 ` Fam Zheng
7 siblings, 1 reply; 47+ messages in thread
From: no-reply @ 2017-11-29 9:02 UTC (permalink / raw)
To: david; +Cc: famz, mst, ehabkost, marcel, imammedo, qemu-devel
Hi,
This series failed build test on s390x host. Please find the details below.
Subject: [Qemu-devel] [for-2.12 0/7] PCI cleanups
Type: series
Message-id: 20171129084628.12336-1-david@gibson.dropbear.id.au
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo "=== ENV ==="
env
echo "=== PACKAGES ==="
rpm -qa
echo "=== TEST BEGIN ==="
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=$PWD/build
echo -n "Using CC: "
realpath $CC
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
# XXX: we need reliable clean up
# make check -j4 V=1
make install
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20171128174310.15700-1-lvivier@redhat.com -> patchew/20171128174310.15700-1-lvivier@redhat.com
t [tag update] patchew/20171128203326.6062-1-david@redhat.com -> patchew/20171128203326.6062-1-david@redhat.com
* [new tag] patchew/20171129084628.12336-1-david@gibson.dropbear.id.au -> patchew/20171129084628.12336-1-david@gibson.dropbear.id.au
Switched to a new branch 'test'
af03e0459c pci: Eliminate pci_find_primary_bus()
a3395678c3 pci: Eliminate redundant PCIDevice::bus pointer
7d05f523d9 pci: Add pci_dev_bus_num() helper
a1d73a76fa pci: Simplify pci_bus_is_root()
7d3b673a1f pci: Fold pci_bus.h into pci.h
591869a28d pci: Move bridge data structures from pci_bus.h to pci_bridge.h
10b3a2b790 pci: Rename root bus initialization functions for clarity
=== OUTPUT BEGIN ===
=== ENV ===
LANG=en_US.UTF-8
XDG_SESSION_ID=925
USER=fam
PWD=/var/tmp/patchew-tester-tmp-nt6ibrf7/src
HOME=/home/fam
SHELL=/bin/sh
SHLVL=2
PATCHEW=/home/fam/patchew/patchew-cli -s http://patchew.org --nodebug
LOGNAME=fam
DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/1012/bus
XDG_RUNTIME_DIR=/run/user/1012
PATH=/usr/bin:/bin
_=/usr/bin/env
=== PACKAGES ===
gpg-pubkey-873529b8-54e386ff
glibc-debuginfo-common-2.24-10.fc25.s390x
fedora-release-26-1.noarch
dejavu-sans-mono-fonts-2.35-4.fc26.noarch
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glib2-static-2.52.3-2.fc26.s390x
virglrenderer-devel-0.6.0-1.20170210git76b3da97b.fc26.s390x
yum-utils-1.1.31-512.fc26.noarch
parted-3.2-24.fc26.s390x
man-db-2.7.6.1-2.fc26.s390x
python3-beautifulsoup4-4.6.0-1.fc26.noarch
python-bunch-1.0.1-10.fc26.noarch
perl-Time-HiRes-1.9746-1.fc26.s390x
lz4-1.8.0-1.fc26.s390x
sssd-nfs-idmap-1.16.0-1.fc26.s390x
hawkey-0.6.4-3.fc25.s390x
kernel-core-4.13.13-100.fc25.s390x
python-srpm-macros-3-20.fc26.noarch
publicsuffix-list-dafsa-20170828-1.fc26.noarch
perl-srpm-macros-1-21.fc26.noarch
expat-2.2.4-1.fc26.s390x
chkconfig-1.10-1.fc26.s390x
findutils-4.6.0-12.fc26.s390x
mesa-libwayland-egl-17.2.4-2.fc26.s390x
libwayland-cursor-1.13.0-1.fc26.s390x
procps-ng-3.3.10-13.fc26.s390x
mesa-libglapi-17.2.4-2.fc26.s390x
perl-Unicode-Normalize-1.25-366.fc26.s390x
perl-IO-Socket-IP-0.39-1.fc26.noarch
hunspell-en-US-0.20140811.1-6.fc26.noarch
libxcb-1.12-3.fc26.s390x
libgo-devel-7.2.1-2.fc26.s390x
perl-Pod-Escapes-1.07-366.fc26.noarch
perl-Pod-Usage-1.69-2.fc26.noarch
libtheora-1.1.1-15.fc26.s390x
tcp_wrappers-7.6-85.fc26.s390x
coreutils-8.27-7.fc26.s390x
libmount-2.30.2-1.fc26.s390x
python2-iniparse-0.4-24.fc26.noarch
python2-decorator-4.0.11-2.fc26.noarch
ModemManager-glib-1.6.10-1.fc26.s390x
python3-decorator-4.0.11-2.fc26.noarch
python3-cffi-1.9.1-2.fc26.s390x
python-bugzilla-cli-2.1.0-1.fc26.noarch
python2-funcsigs-1.0.2-5.fc26.noarch
python2-babel-2.3.4-5.fc26.noarch
python-bugzilla-2.1.0-1.fc26.noarch
libradosstriper1-10.2.7-2.fc26.s390x
snappy-1.1.4-3.fc26.s390x
dtc-1.4.5-1.fc26.s390x
libmpcdec-1.2.6-17.fc26.s390x
rpm-libs-4.13.0.2-1.fc26.s390x
python-urlgrabber-3.10.1-11.fc26.noarch
sysfsutils-2.1.0-20.fc26.s390x
python3-hawkey-0.11.1-1.fc26.s390x
python3-dnf-plugins-core-2.1.5-1.fc26.noarch
ethtool-4.13-1.fc26.s390x
dnf-2.7.5-1.fc26.noarch
iputils-20161105-5.fc26.s390x
plymouth-scripts-0.9.3-0.7.20160620git0e65b86c.fc26.s390x
cronie-1.5.1-5.fc26.s390x
libini_config-1.3.1-34.fc26.s390x
libX11-1.6.5-2.fc26.s390x
libglvnd-egl-1.0.0-1.fc26.s390x
texlive-kpathsea-svn41139-33.fc26.2.noarch
texlive-thumbpdf-bin-svn6898.0-33.20160520.fc26.2.noarch
texlive-subfig-svn15878.1.3-33.fc26.2.noarch
texlive-gsftopk-bin-svn40473-33.20160520.fc26.2.s390x
texlive-tex-ini-files-svn40533-33.fc26.2.noarch
texlive-qstest-svn15878.0-33.fc26.2.noarch
texlive-palatino-svn31835.0-33.fc26.2.noarch
texlive-ec-svn25033.1.0-33.fc26.2.noarch
texlive-iftex-svn29654.0.2-33.fc26.2.noarch
texlive-pslatex-svn16416.0-33.fc26.2.noarch
texlive-algorithms-svn38085.0.1-33.fc26.2.noarch
texlive-filehook-svn24280.0.5d-33.fc26.2.noarch
texlive-pst-node-svn40743-33.fc26.2.noarch
texlive-rotating-svn16832.2.16b-33.fc26.2.noarch
texlive-seminar-svn34011.1.62-33.fc26.2.noarch
pulseaudio-libs-glib2-11.1-6.fc26.s390x
gtk3-3.22.21-2.fc26.s390x
libuuid-devel-2.30.2-1.fc26.s390x
java-1.8.0-openjdk-1.8.0.151-1.b12.fc26.s390x
libXinerama-devel-1.1.3-7.fc26.s390x
emacs-common-25.3-3.fc26.s390x
gtk3-devel-3.22.21-2.fc26.s390x
fedora-packager-0.6.0.1-2.fc26.noarch
libxml2-devel-2.9.4-2.fc26.s390x
snappy-devel-1.1.4-3.fc26.s390x
python2-dnf-plugin-migrate-2.1.5-1.fc26.noarch
authconfig-7.0.1-2.fc26.s390x
vim-enhanced-8.0.1187-1.fc26.s390x
newt-python3-0.52.20-1.fc26.s390x
python-decoratortools-1.8-13.fc26.noarch
valgrind-3.13.0-9.fc26.s390x
python-systemd-doc-234-1.fc26.s390x
libsss_sudo-1.16.0-1.fc26.s390x
gpg-pubkey-a0a7badb-52844296
gpg-pubkey-e372e838-56fd7943
gpg-pubkey-3b921d09-57a87096
google-roboto-slab-fonts-1.100263-0.5.20150923git.fc26.noarch
libreport-filesystem-2.9.1-3.fc26.s390x
glibc-all-langpacks-2.25-12.fc26.s390x
libcom_err-1.43.4-2.fc26.s390x
libffi-3.1-12.fc26.s390x
keyutils-libs-1.5.10-1.fc26.s390x
libwayland-server-1.13.0-1.fc26.s390x
diffutils-3.5-3.fc26.s390x
groff-base-1.22.3-9.fc26.s390x
apr-util-1.5.4-6.fc26.s390x
bluez-libs-5.46-6.fc26.s390x
perl-Data-Dumper-2.161-2.fc26.s390x
libksba-1.3.5-3.fc26.s390x
ncurses-6.0-8.20170212.fc26.s390x
gsm-1.0.17-1.fc26.s390x
libteam-1.27-1.fc26.s390x
perl-Fedora-VSP-0.001-5.fc26.noarch
libusb-0.1.5-8.fc26.s390x
acl-2.2.52-15.fc26.s390x
dwz-0.12-3.fc26.s390x
libblkid-2.30.2-1.fc26.s390x
polkit-libs-0.113-8.fc26.s390x
dbus-python-1.2.4-6.fc26.s390x
gts-0.7.6-30.20121130.fc26.s390x
libfdisk-2.30.2-1.fc26.s390x
python3-pycparser-2.14-10.fc26.noarch
python3-bugzilla-2.1.0-1.fc26.noarch
python2-docutils-0.13.1-4.fc26.noarch
pytz-2016.10-4.fc26.noarch
python2-requests-2.13.0-1.fc26.noarch
libcephfs-devel-10.2.7-2.fc26.s390x
ncurses-c++-libs-6.0-8.20170212.fc26.s390x
GeoIP-1.6.11-1.fc26.s390x
liblockfile-1.09-5.fc26.s390x
rpm-plugin-selinux-4.13.0.2-1.fc26.s390x
systemtap-devel-3.2-2.fc26.s390x
libsysfs-2.1.0-20.fc26.s390x
libdnf-0.11.1-1.fc26.s390x
python3-dnf-plugins-extras-common-2.0.3-1.fc26.noarch
libgfortran-7.2.1-2.fc26.s390x
mesa-libgbm-17.2.4-2.fc26.s390x
dracut-046-3.1.fc26.s390x
lvm2-libs-2.02.168-6.fc26.s390x
gnutls-dane-3.5.16-2.fc26.s390x
mariadb-common-10.1.26-2.fc26.s390x
libXfixes-5.0.3-2.fc26.s390x
brlapi-0.6.6-5.fc26.s390x
texlive-metafont-svn40793-33.fc26.2.noarch
texlive-graphics-cfg-svn40269-33.fc26.2.noarch
texlive-mptopdf-svn41282-33.fc26.2.noarch
texlive-makeindex-bin-svn40473-33.20160520.fc26.2.s390x
texlive-texlive-scripts-bin-svn29741.0-33.20160520.fc26.2.noarch
texlive-sauerj-svn15878.0-33.fc26.2.noarch
texlive-txfonts-svn15878.0-33.fc26.2.noarch
texlive-filecontents-svn24250.1.3-33.fc26.2.noarch
texlive-lualibs-svn40370-33.fc26.2.noarch
texlive-section-svn20180.0-33.fc26.2.noarch
texlive-ucharcat-svn38907-33.fc26.2.noarch
texlive-hyperref-svn41396-33.fc26.2.noarch
texlive-pst-3d-svn17257.1.10-33.fc26.2.noarch
texlive-oberdiek-svn41346-33.fc26.2.noarch
texlive-ae-svn15878.1.4-33.fc26.2.noarch
texlive-collection-basic-svn41149-33.20160520.fc26.2.noarch
gnat-srpm-macros-4-2.fc26.noarch
glib2-devel-2.52.3-2.fc26.s390x
netpbm-progs-10.80.00-2.fc26.s390x
libXxf86vm-devel-1.1.4-4.fc26.s390x
nettle-devel-3.3-2.fc26.s390x
cairo-gobject-devel-1.14.10-1.fc26.s390x
fedora-rpm-macros-26-2.fc26.noarch
elfutils-devel-0.169-1.fc26.s390x
libidn-devel-1.33-2.fc26.s390x
s390utils-1.36.1-3.fc26.s390x
gcc-gfortran-7.2.1-2.fc26.s390x
libtool-2.4.6-17.fc26.s390x
python3-cssselect-0.9.2-4.fc26.noarch
python2-cssselect-0.9.2-4.fc26.noarch
bison-3.0.4-6.fc26.s390x
rootfiles-8.1-20.fc26.noarch
libsss_autofs-1.16.0-1.fc26.s390x
=== TEST BEGIN ===
Using CC: /home/fam/bin/cc
Install prefix /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install
BIOS directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/share/qemu
firmware path /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/share/qemu-firmware
binary directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/bin
library directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/lib
module directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/lib/qemu
libexec directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/libexec
include directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/include
config directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/etc
local state directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/var
Manual directory /var/tmp/patchew-tester-tmp-nt6ibrf7/src/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /var/tmp/patchew-tester-tmp-nt6ibrf7/src
GIT binary git
GIT submodules ui/keycodemapdb capstone
C compiler /home/fam/bin/cc
Host C compiler cc
C++ compiler c++
Objective-C compiler /home/fam/bin/cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -DHAS_LIBSSH2_SFTP_FSYNC -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -DNCURSES_WIDECHAR -D_GNU_SOURCE -D_DEFAULT_SOURCE -m64 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wexpansion-to-defined -Wendif-labels -Wno-shift-negative-value -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -I/usr/include/p11-kit-1 -I/usr/include/libpng16 -I/usr/include/libdrm -I$(SRC_PATH)/capstone/include
LDFLAGS -Wl,--warn-common -m64 -g
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU s390x
host big endian yes
target list aarch64-softmmu alpha-softmmu arm-softmmu cris-softmmu i386-softmmu lm32-softmmu m68k-softmmu microblazeel-softmmu microblaze-softmmu mips64el-softmmu mips64-softmmu mipsel-softmmu mips-softmmu moxie-softmmu nios2-softmmu or1k-softmmu ppc64-softmmu ppcemb-softmmu ppc-softmmu s390x-softmmu sh4eb-softmmu sh4-softmmu sparc64-softmmu sparc-softmmu tricore-softmmu unicore32-softmmu x86_64-softmmu xtensaeb-softmmu xtensa-softmmu aarch64-linux-user alpha-linux-user armeb-linux-user arm-linux-user cris-linux-user hppa-linux-user i386-linux-user m68k-linux-user microblazeel-linux-user microblaze-linux-user mips64el-linux-user mips64-linux-user mipsel-linux-user mips-linux-user mipsn32el-linux-user mipsn32-linux-user nios2-linux-user or1k-linux-user ppc64abi32-linux-user ppc64le-linux-user ppc64-linux-user ppc-linux-user s390x-linux-user sh4eb-linux-user sh4-linux-user sparc32plus-linux-user sparc64-linux-user sparc-linux-user tilegx-linux-user x86_64-linux-user
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
SDL support yes (2.0.7)
GTK support yes (3.22.21)
GTK GL support yes
VTE support yes (0.48.4)
TLS priority NORMAL
GNUTLS support yes
GNUTLS rnd yes
libgcrypt no
libgcrypt kdf no
nettle yes (3.3)
nettle kdf yes
libtasn1 yes
curses support yes
virgl support yes
curl support yes
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support yes
Multipath support no
VNC support yes
VNC SASL support yes
VNC JPEG support yes
VNC PNG support yes
xen support no
brlapi support yes
bluez support yes
Documentation yes
PIE no
vde support no
netmap support no
Linux AIO support yes
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
TCG support yes
TCG debug enabled no
TCG interpreter no
RDMA support no
fdt support yes
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
libcap-ng support yes
vhost-net support yes
vhost-scsi support yes
vhost-vsock support yes
vhost-user support yes
Trace backends log
spice support no
rbd support yes
xfsctl support no
smartcard support yes
libusb yes
usb net redir yes
OpenGL support yes
OpenGL dmabufs yes
libiscsi support yes
libnfs support yes
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support yes
coroutine backend ucontext
coroutine pool yes
debug stack usage no
crypto afalg no
GlusterFS support yes
gcov gcov
gcov enabled no
TPM support yes
libssh2 support yes
TPM passthrough no
TPM emulator yes
QOM debugging yes
Live block migration yes
lzo support yes
snappy support yes
bzip2 support yes
NUMA host support no
tcmalloc support no
jemalloc support no
avx2 optimization no
replication support yes
VxHS block device no
capstone git
GEN aarch64-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak
GEN arm-softmmu/config-devices.mak
GEN alpha-softmmu/config-devices.mak
GEN aarch64-softmmu/config-devices.mak
GEN i386-softmmu/config-devices.mak.tmp
GEN lm32-softmmu/config-devices.mak.tmp
GEN m68k-softmmu/config-devices.mak.tmp
GEN microblazeel-softmmu/config-devices.mak.tmp
GEN lm32-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak.tmp
GEN microblazeel-softmmu/config-devices.mak
GEN mips64el-softmmu/config-devices.mak.tmp
GEN i386-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak.tmp
GEN microblaze-softmmu/config-devices.mak
GEN mipsel-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak.tmp
GEN mipsel-softmmu/config-devices.mak
GEN nios2-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak
GEN or1k-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak.tmp
GEN moxie-softmmu/config-devices.mak
GEN nios2-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak.tmp
GEN ppc-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak
GEN s390x-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak.tmp
GEN s390x-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak
GEN sh4-softmmu/config-devices.mak.tmp
GEN ppc-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak.tmp
GEN sparc-softmmu/config-devices.mak.tmp
GEN sh4eb-softmmu/config-devices.mak
GEN tricore-softmmu/config-devices.mak.tmp
GEN sparc-softmmu/config-devices.mak
GEN sh4-softmmu/config-devices.mak
GEN unicore32-softmmu/config-devices.mak.tmp
GEN x86_64-softmmu/config-devices.mak.tmp
GEN sparc64-softmmu/config-devices.mak
GEN tricore-softmmu/config-devices.mak
GEN xtensaeb-softmmu/config-devices.mak.tmp
GEN xtensa-softmmu/config-devices.mak.tmp
GEN unicore32-softmmu/config-devices.mak
GEN xtensaeb-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak
GEN aarch64-linux-user/config-devices.mak.tmp
GEN alpha-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak.tmp
GEN x86_64-softmmu/config-devices.mak
GEN arm-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak
GEN aarch64-linux-user/config-devices.mak
GEN alpha-linux-user/config-devices.mak
GEN cris-linux-user/config-devices.mak.tmp
GEN hppa-linux-user/config-devices.mak.tmp
GEN arm-linux-user/config-devices.mak
GEN i386-linux-user/config-devices.mak.tmp
GEN m68k-linux-user/config-devices.mak.tmp
GEN cris-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak
GEN m68k-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak
GEN microblaze-linux-user/config-devices.mak.tmp
GEN mips64el-linux-user/config-devices.mak.tmp
GEN mips64-linux-user/config-devices.mak.tmp
GEN mips64el-linux-user/config-devices.mak
GEN microblaze-linux-user/config-devices.mak
GEN mips64-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak
GEN mipsel-linux-user/config-devices.mak.tmp
GEN mips-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak.tmp
GEN mipsel-linux-user/config-devices.mak
GEN mips-linux-user/config-devices.mak
GEN nios2-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak
GEN mipsn32-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak.tmp
GEN ppc64abi32-linux-user/config-devices.mak.tmp
GEN ppc64le-linux-user/config-devices.mak.tmp
GEN nios2-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak
GEN ppc64-linux-user/config-devices.mak.tmp
GEN ppc-linux-user/config-devices.mak.tmp
GEN ppc64abi32-linux-user/config-devices.mak
GEN ppc64le-linux-user/config-devices.mak
GEN s390x-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak
GEN sh4eb-linux-user/config-devices.mak.tmp
GEN sh4-linux-user/config-devices.mak.tmp
GEN ppc-linux-user/config-devices.mak
GEN s390x-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak
GEN sparc64-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak.tmp
GEN sh4-linux-user/config-devices.mak
GEN tilegx-linux-user/config-devices.mak.tmp
GEN sparc32plus-linux-user/config-devices.mak
GEN sparc-linux-user/config-devices.mak
GEN sparc64-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak.tmp
GEN tilegx-linux-user/config-devices.mak
GEN config-host.h
GIT ui/keycodemapdb capstone
GEN x86_64-linux-user/config-devices.mak
GEN qemu-options.def
GEN qmp-commands.h
GEN qapi-types.h
GEN qapi-visit.h
GEN qapi-event.h
GEN qmp-marshal.c
GEN qapi-types.c
GEN qapi-visit.c
GEN qapi-event.c
GEN qmp-introspect.h
GEN qmp-introspect.c
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
Submodule 'capstone' (git://git.qemu.org/capstone.git) registered for path 'capstone'
Submodule 'ui/keycodemapdb' (git://git.qemu.org/keycodemapdb.git) registered for path 'ui/keycodemapdb'
GEN trace/generated-helpers.h
Cloning into '/var/tmp/patchew-tester-tmp-nt6ibrf7/src/capstone'...
GEN trace/generated-helpers.c
GEN module_block.h
GEN tests/test-qapi-types.h
GEN tests/test-qapi-visit.h
GEN tests/test-qmp-commands.h
GEN tests/test-qapi-event.h
GEN tests/test-qmp-introspect.h
GEN trace-root.h
GEN util/trace.h
GEN crypto/trace.h
GEN io/trace.h
GEN migration/trace.h
GEN block/trace.h
GEN chardev/trace.h
GEN hw/block/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/intc/trace.h
GEN hw/net/trace.h
GEN hw/virtio/trace.h
GEN hw/audio/trace.h
GEN hw/misc/trace.h
GEN hw/usb/trace.h
GEN hw/scsi/trace.h
GEN hw/nvram/trace.h
GEN hw/display/trace.h
GEN hw/input/trace.h
GEN hw/timer/trace.h
GEN hw/dma/trace.h
GEN hw/sparc/trace.h
GEN hw/sd/trace.h
GEN hw/isa/trace.h
GEN hw/mem/trace.h
GEN hw/i386/trace.h
GEN hw/i386/xen/trace.h
GEN hw/9pfs/trace.h
GEN hw/ppc/trace.h
GEN hw/pci/trace.h
GEN hw/s390x/trace.h
GEN hw/vfio/trace.h
GEN hw/acpi/trace.h
GEN hw/arm/trace.h
GEN hw/alpha/trace.h
GEN hw/xen/trace.h
GEN hw/ide/trace.h
GEN ui/trace.h
GEN audio/trace.h
GEN net/trace.h
GEN target/arm/trace.h
GEN target/i386/trace.h
GEN target/mips/trace.h
GEN target/sparc/trace.h
GEN target/s390x/trace.h
GEN target/ppc/trace.h
GEN qom/trace.h
GEN linux-user/trace.h
GEN qapi/trace.h
GEN accel/tcg/trace.h
GEN accel/kvm/trace.h
GEN nbd/trace.h
GEN scsi/trace.h
GEN trace-root.c
GEN util/trace.c
GEN crypto/trace.c
GEN io/trace.c
GEN migration/trace.c
GEN block/trace.c
GEN chardev/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/intc/trace.c
GEN hw/net/trace.c
GEN hw/virtio/trace.c
GEN hw/audio/trace.c
GEN hw/misc/trace.c
GEN hw/usb/trace.c
GEN hw/scsi/trace.c
GEN hw/nvram/trace.c
GEN hw/display/trace.c
GEN hw/input/trace.c
GEN hw/timer/trace.c
GEN hw/dma/trace.c
GEN hw/sparc/trace.c
GEN hw/sd/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/i386/trace.c
GEN hw/i386/xen/trace.c
GEN hw/9pfs/trace.c
GEN hw/ppc/trace.c
GEN hw/pci/trace.c
GEN hw/s390x/trace.c
GEN hw/vfio/trace.c
GEN hw/acpi/trace.c
GEN hw/arm/trace.c
GEN hw/alpha/trace.c
GEN hw/xen/trace.c
GEN hw/ide/trace.c
GEN ui/trace.c
GEN audio/trace.c
GEN net/trace.c
GEN target/arm/trace.c
GEN target/i386/trace.c
GEN target/mips/trace.c
GEN target/sparc/trace.c
GEN target/s390x/trace.c
GEN target/ppc/trace.c
GEN qom/trace.c
GEN linux-user/trace.c
GEN qapi/trace.c
GEN accel/tcg/trace.c
GEN accel/kvm/trace.c
GEN nbd/trace.c
GEN scsi/trace.c
GEN config-all-devices.mak
Cloning into '/var/tmp/patchew-tester-tmp-nt6ibrf7/src/ui/keycodemapdb'...
GEN ui/input-keymap-linux-to-qcode.c
GEN ui/input-keymap-qcode-to-qnum.c
GEN ui/input-keymap-qnum-to-qcode.c
CC cs.o
CC utils.o
CC SStream.o
CC MCInstrDesc.o
CC MCRegisterInfo.o
CC arch/ARM/ARMDisassembler.o
CC arch/ARM/ARMInstPrinter.o
CC arch/ARM/ARMMapping.o
CC arch/ARM/ARMModule.o
CC arch/AArch64/AArch64BaseInfo.o
CC arch/AArch64/AArch64Disassembler.o
CC arch/AArch64/AArch64InstPrinter.o
CC arch/AArch64/AArch64Mapping.o
CC arch/AArch64/AArch64Module.o
CC arch/Mips/MipsDisassembler.o
CC arch/Mips/MipsInstPrinter.o
CC arch/Mips/MipsMapping.o
CC arch/Mips/MipsModule.o
CC arch/PowerPC/PPCDisassembler.o
CC arch/PowerPC/PPCInstPrinter.o
CC arch/PowerPC/PPCMapping.o
CC arch/PowerPC/PPCModule.o
CC arch/Sparc/SparcDisassembler.o
CC arch/Sparc/SparcInstPrinter.o
CC arch/Sparc/SparcMapping.o
CC arch/Sparc/SparcModule.o
CC arch/SystemZ/SystemZDisassembler.o
CC arch/SystemZ/SystemZInstPrinter.o
CC arch/SystemZ/SystemZMapping.o
CC arch/SystemZ/SystemZModule.o
CC arch/SystemZ/SystemZMCTargetDesc.o
CC arch/X86/X86DisassemblerDecoder.o
CC arch/X86/X86Disassembler.o
CC arch/X86/X86IntelInstPrinter.o
CC arch/X86/X86ATTInstPrinter.o
CC arch/X86/X86Mapping.o
CC arch/X86/X86Module.o
CC arch/XCore/XCoreDisassembler.o
CC arch/XCore/XCoreInstPrinter.o
CC arch/XCore/XCoreMapping.o
CC arch/XCore/XCoreModule.o
CC MCInst.o
AR libcapstone.a
ar: creating /var/tmp/patchew-tester-tmp-nt6ibrf7/src/build/capstone/libcapstone.a
make[1]: '/var/tmp/patchew-tester-tmp-nt6ibrf7/src/build/capstone/libcapstone.a' is up to date.
GEN docs/version.texi
GEN qemu-options.texi
CC tests/qemu-iotests/socket_scm_helper.o
GEN qemu-monitor.texi
GEN qemu-img-cmds.texi
GEN qemu-monitor-info.texi
GEN qemu-img.1
GEN qemu-nbd.8
GEN qemu-ga.8
GEN docs/interop/qemu-qmp-qapi.texi
GEN docs/interop/qemu-ga-qapi.texi
GEN docs/qemu-block-drivers.7
GEN fsdev/virtfs-proxy-helper.1
GEN qga/qapi-generated/qga-qapi-types.h
GEN qga/qapi-generated/qga-qapi-visit.h
GEN qga/qapi-generated/qga-qmp-commands.h
GEN qga/qapi-generated/qga-qapi-types.c
GEN qga/qapi-generated/qga-qmp-marshal.c
GEN qga/qapi-generated/qga-qapi-visit.c
CC qmp-introspect.o
CC qapi-types.o
CC qapi-visit.o
CC qapi-event.o
CC qapi/qapi-visit-core.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-input-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/qmp-dispatch.o
CC qapi/string-input-visitor.o
CC qapi/string-output-visitor.o
CC qapi/opts-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/qmp-event.o
CC qapi/qapi-util.o
CC qobject/qnull.o
CC qobject/qnum.o
CC qobject/qstring.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qbool.o
CC qobject/qlit.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC qobject/json-parser.o
CC trace/control.o
CC trace/qmp.o
CC util/osdep.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/thread-pool.o
CC util/qemu-timer.o
CC util/main-loop.o
CC util/iohandler.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/event_notifier-posix.o
CC util/mmap-alloc.o
CC util/oslib-posix.o
CC util/qemu-openpty.o
CC util/qemu-thread-posix.o
CC util/memfd.o
CC util/envlist.o
CC util/path.o
CC util/module.o
CC util/host-utils.o
CC util/bitmap.o
CC util/bitops.o
CC util/hbitmap.o
CC util/fifo8.o
CC util/acl.o
CC util/cacheinfo.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/iov.o
CC util/qemu-config.o
CC util/qemu-sockets.o
CC util/uri.o
CC util/notify.o
CC util/qemu-option.o
CC util/qemu-progress.o
CC util/keyval.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/buffer.o
CC util/timed-average.o
CC util/base64.o
CC util/log.o
CC util/pagesize.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC util/stats64.o
CC util/systemd.o
CC trace-root.o
CC util/trace.o
CC crypto/trace.o
CC io/trace.o
CC migration/trace.o
CC block/trace.o
CC chardev/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/char/trace.o
CC hw/intc/trace.o
CC hw/net/trace.o
CC hw/virtio/trace.o
CC hw/audio/trace.o
CC hw/misc/trace.o
CC hw/usb/trace.o
CC hw/scsi/trace.o
CC hw/nvram/trace.o
CC hw/display/trace.o
CC hw/input/trace.o
CC hw/timer/trace.o
CC hw/dma/trace.o
CC hw/sparc/trace.o
CC hw/sd/trace.o
CC hw/isa/trace.o
CC hw/mem/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/9pfs/trace.o
CC hw/ppc/trace.o
CC hw/pci/trace.o
CC hw/s390x/trace.o
CC hw/vfio/trace.o
CC hw/acpi/trace.o
CC hw/arm/trace.o
CC hw/alpha/trace.o
CC hw/xen/trace.o
CC hw/ide/trace.o
CC ui/trace.o
CC audio/trace.o
CC net/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/mips/trace.o
CC target/sparc/trace.o
CC target/s390x/trace.o
CC target/ppc/trace.o
CC qom/trace.o
CC linux-user/trace.o
CC qapi/trace.o
CC accel/tcg/trace.o
CC accel/kvm/trace.o
CC nbd/trace.o
CC scsi/trace.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-def.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/blk-commit-all.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/clock-warp.o
CC stubs/cpu-get-clock.o
CC stubs/cpu-get-icount.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/is-daemonized.o
CC stubs/linux-aio.o
CC stubs/machine-init-done.o
CC stubs/migr-blocker.o
CC stubs/change-state-handler.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/replay.o
CC stubs/runstate-check.o
CC stubs/set-fd-handler.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/tpm.o
CC stubs/trace-control.o
CC stubs/uuid.o
CC stubs/vm-stop.o
CC stubs/vmstate.o
CC stubs/qmp_pc_dimm.o
CC stubs/target-monitor-defs.o
CC stubs/target-get-monitor-def.o
CC stubs/pc_madt_cpu_entry.o
CC stubs/vmgenid.o
CC stubs/xen-common.o
CC stubs/xen-hvm.o
CC stubs/pci-host-piix.o
CC qemu-keymap.o
CC ui/input-keymap.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-server/ivshmem-server.o
CC contrib/ivshmem-server/main.o
CC qemu-nbd.o
CC block.o
CC blockjob.o
CC qemu-io-cmds.o
CC replication.o
CC block/raw-format.o
CC block/qcow.o
CC block/vdi.o
CC block/vmdk.o
CC block/cloop.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/dmg.o
CC block/qcow2.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qcow2-bitmap.o
CC block/qed.o
CC block/qed-l2-cache.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/qed-check.o
CC block/vhdx.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkdebug.o
CC block/blkverify.o
CC block/blkreplay.o
CC block/block-backend.o
CC block/snapshot.o
CC block/qapi.o
CC block/file-posix.o
CC block/linux-aio.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/throttle-groups.o
CC block/nbd.o
CC block/nbd-client.o
CC block/sheepdog.o
CC block/iscsi-opts.o
CC block/accounting.o
CC block/dirty-bitmap.o
CC block/write-threshold.o
CC block/backup.o
CC block/replication.o
CC block/throttle.o
CC block/crypto.o
CC nbd/server.o
CC nbd/client.o
CC nbd/common.o
CC scsi/utils.o
CC scsi/pr-manager.o
CC scsi/pr-manager-helper.o
CC block/nfs.o
CC block/iscsi.o
CC block/curl.o
CC block/rbd.o
CC block/gluster.o
CC block/ssh.o
CC block/dmg-bz2.o
CC crypto/init.o
CC crypto/hash.o
CC crypto/hash-nettle.o
CC crypto/hmac.o
CC crypto/hmac-nettle.o
CC crypto/aes.o
CC crypto/desrfb.o
CC crypto/cipher.o
CC crypto/tlscreds.o
CC crypto/tlscredsanon.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/secret.o
CC crypto/random-gnutls.o
CC crypto/pbkdf.o
CC crypto/pbkdf-nettle.o
CC crypto/ivgen.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen-plain.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block.o
CC crypto/block-qcow.o
CC crypto/block-luks.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-tls.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/task.o
CC qom/object.o
CC qom/container.o
CC qom/qom-qobject.o
CC qom/object_interfaces.o
GEN qemu-img-cmds.h
CC qemu-io.o
CC fsdev/virtfs-proxy-helper.o
CC fsdev/9p-marshal.o
CC fsdev/9p-iov-marshal.o
CC scsi/qemu-pr-helper.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC bootdevice.o
CC iothread.o
CC qdev-monitor.o
CC device-hotplug.o
CC os-posix.o
CC bt-host.o
CC bt-vhci.o
CC dma-helpers.o
CC vl.o
CC tpm.o
CC qemu-seccomp.o
CC device_tree.o
CC qmp-marshal.o
CC qmp.o
CC hmp.o
CC cpus-common.o
CC audio/audio.o
CC audio/noaudio.o
CC audio/wavaudio.o
CC audio/mixeng.o
CC audio/sdlaudio.o
CC audio/ossaudio.o
CC audio/wavcapture.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/rng-random.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-ram.o
CC backends/hostmem-file.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC block/stream.o
CC chardev/msmouse.o
CC chardev/wctablet.o
CC chardev/testdev.o
CC chardev/baum.o
CC disas/alpha.o
CC disas/arm.o
CXX disas/arm-a64.o
CC disas/cris.o
CC disas/hppa.o
CC disas/i386.o
CC disas/m68k.o
CC disas/microblaze.o
CC disas/mips.o
CC disas/nios2.o
CC disas/moxie.o
CC disas/ppc.o
CC disas/s390.o
CC disas/sh4.o
CC disas/sparc.o
CC disas/lm32.o
CXX disas/libvixl/vixl/utils.o
CXX disas/libvixl/vixl/compiler-intrinsics.o
CXX disas/libvixl/vixl/a64/instructions-a64.o
CXX disas/libvixl/vixl/a64/decoder-a64.o
CXX disas/libvixl/vixl/a64/disasm-a64.o
CC fsdev/qemu-fsdev.o
CC fsdev/qemu-fsdev-opts.o
CC fsdev/qemu-fsdev-throttle.o
CC fsdev/qemu-fsdev-dummy.o
CC hw/9pfs/9p.o
CC hw/9pfs/9p-util.o
CC hw/9pfs/9p-local.o
CC hw/9pfs/9p-xattr.o
CC hw/9pfs/9p-xattr-user.o
CC hw/9pfs/9p-posix-acl.o
CC hw/9pfs/coth.o
CC hw/9pfs/cofs.o
CC hw/9pfs/codir.o
CC hw/9pfs/cofile.o
CC hw/9pfs/coxattr.o
CC hw/9pfs/9p-synth.o
CC hw/9pfs/9p-handle.o
CC hw/9pfs/9p-proxy.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/nvdimm.o
CC hw/acpi/vmgenid.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/es1370.o
CC hw/audio/ac97.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_hal.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/pl041.o
CC hw/audio/lm4549.o
CC hw/audio/cs4231.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/milkymist-ac97.o
CC hw/audio/soundhw.o
CC hw/block/block.o
CC hw/block/cdrom.o
CC hw/block/hd-geometry.o
CC hw/block/fdc.o
CC hw/block/m25p80.o
CC hw/block/nand.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/sdp.o
CC hw/bt/hci.o
CC hw/bt/hid.o
CC hw/bt/hci-csr.o
CC hw/char/ipoctal232.o
CC hw/char/escc.o
CC hw/char/parallel.o
CC hw/char/pl011.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/virtio-console.o
CC hw/char/xilinx_uartlite.o
CC hw/char/cadence_uart.o
CC hw/char/cmsdk-apb-uart.o
CC hw/char/etraxfs_ser.o
CC hw/char/debugcon.o
CC hw/char/grlib_apbuart.o
CC hw/char/imx_serial.o
CC hw/char/lm32_juart.o
CC hw/char/lm32_uart.o
CC hw/char/milkymist-uart.o
CC hw/char/sclpconsole.o
CC hw/char/sclpconsole-lm.o
CC hw/core/qdev.o
CC hw/core/qdev-properties.o
CC hw/core/bus.o
CC hw/core/reset.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/nmi.o
CC hw/core/empty_slot.o
CC hw/core/stream.o
CC hw/core/ptimer.o
CC hw/core/sysbus.o
CC hw/core/machine.o
CC hw/core/loader.o
CC hw/core/loader-fit.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/platform-bus.o
CC hw/cpu/core.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/g364fb.o
CC hw/display/jazz_led.o
CC hw/display/pl110.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/vga-pci.o
CC hw/display/vga-isa.o
CC hw/display/vga-isa-mm.o
CC hw/display/vmware_vga.o
CC hw/display/blizzard.o
CC hw/display/exynos4210_fimd.o
CC hw/display/framebuffer.o
CC hw/display/milkymist-vgafb.o
CC hw/display/tc6393xb.o
CC hw/display/milkymist-tmu2.o
CC hw/dma/puv3_dma.o
CC hw/dma/rc4030.o
CC hw/dma/pl080.o
CC hw/dma/pl330.o
CC hw/dma/i82374.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/dma/etraxfs_dma.o
CC hw/dma/sparc32_dma.o
CC hw/dma/sun4m_iommu.o
CC hw/gpio/max7310.o
CC hw/gpio/pl061.o
CC hw/gpio/puv3_gpio.o
CC hw/gpio/zaurus.o
CC hw/gpio/mpc8xxx.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/qdev.o
CC hw/ide/pci.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/cmd646.o
CC hw/ide/macio.o
CC hw/ide/mmio.o
CC hw/ide/via.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ich.o
CC hw/ide/ahci-allwinner.o
CC hw/input/adb.o
CC hw/input/hid.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/ps2.o
CC hw/input/stellaris_input.o
CC hw/input/tsc2005.o
CC hw/input/vmmouse.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-hid.o
CC hw/input/virtio-input-host.o
CC hw/intc/heathrow_pic.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/puv3_intc.o
CC hw/intc/xilinx_intc.o
CC hw/intc/etraxfs_pic.o
CC hw/intc/imx_avic.o
CC hw/intc/lm32_pic.o
CC hw/intc/realview_gic.o
CC hw/intc/slavio_intctl.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3_dist.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/openpic.o
CC hw/intc/intc.o
CC hw/ipack/ipack.o
CC hw/ipack/tpci200.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/apm.o
CC hw/isa/i82378.o
CC hw/isa/pc87312.o
CC hw/isa/piix4.o
CC hw/isa/vt82c686.o
CC hw/mem/pc-dimm.o
CC hw/misc/applesmc.o
CC hw/mem/nvdimm.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/tmp421.o
CC hw/misc/debugexit.o
CC hw/misc/sga.o
CC hw/misc/pc-testdev.o
CC hw/misc/pci-testdev.o
CC hw/misc/edu.o
CC hw/misc/unimp.o
CC hw/misc/vmcoreinfo.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/misc/puv3_pm.o
CC hw/misc/macio/macio.o
CC hw/misc/macio/cuda.o
CC hw/misc/macio/mac_dbdma.o
CC hw/net/dp8393x.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000.o
CC hw/net/e1000x_common.o
CC hw/net/net_tx_pkt.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e.o
CC hw/net/e1000e_core.o
CC hw/net/rtl8139.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/opencores_eth.o
CC hw/net/xgmac.o
CC hw/net/mipsnet.o
CC hw/net/xilinx_axienet.o
CC hw/net/allwinner_emac.o
CC hw/net/imx_fec.o
CC hw/net/cadence_gem.o
CC hw/net/stellaris_enet.o
CC hw/net/lance.o
CC hw/net/sunhme.o
CC hw/net/ftgmac100.o
CC hw/net/sungem.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/nvram/ds1225y.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/nvram/mac_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pcie_pci_bridge.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-bridge/dec.o
CC hw/pci-host/pam.o
CC hw/pci-host/prep.o
CC hw/pci-host/grackle.o
CC hw/pci-host/uninorth.o
CC hw/pci-host/ppce500.o
CC hw/pci-host/versatile.o
CC hw/pci-host/apb.o
CC hw/pci-host/bonito.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci-host/xilinx-pcie.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie.o
CC hw/pci/pcie_aer.o
CC hw/pci/pcie_port.o
CC hw/pci/pci-stub.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-generic.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/ssi/mss-spi.o
CC hw/timer/arm_timer.o
CC hw/timer/arm_mptimer.o
CC hw/timer/armv7m_systick.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/m48t59.o
CC hw/timer/m48t59-isa.o
CC hw/timer/pl031.o
CC hw/timer/puv3_ost.o
CC hw/timer/twl92230.o
CC hw/timer/xilinx_timer.o
CC hw/timer/slavio_timer.o
CC hw/timer/etraxfs_timer.o
CC hw/timer/grlib_gptimer.o
CC hw/timer/imx_epit.o
CC hw/timer/imx_gpt.o
CC hw/timer/lm32_timer.o
CC hw/timer/milkymist-sysctl.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/aspeed_timer.o
CC hw/timer/sun4v-rtc.o
CC hw/timer/cmsdk-apb-timer.o
CC hw/timer/mss-timer.o
CC hw/tpm/tpm_tis.o
CC hw/tpm/tpm_emulator.o
CC hw/tpm/tpm_util.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc.o
CC hw/usb/desc-msos.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-xhci-nec.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-network.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/redirect.o
CC hw/usb/quirks.o
CC hw/usb/host-libusb.o
CC hw/usb/host-legacy.o
CC hw/usb/host-stub.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-mmio.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/watchdog.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_diag288.o
CC hw/watchdog/wdt_aspeed.o
CC migration/migration.o
CC migration/socket.o
CC migration/fd.o
CC migration/exec.o
CC migration/tls.o
CC migration/channel.o
CC migration/savevm.o
CC migration/colo-comm.o
CC migration/colo.o
CC migration/colo-failover.o
CC migration/vmstate.o
CC migration/vmstate-types.o
CC migration/page_cache.o
CC migration/qemu-file.o
CC migration/global_state.o
CC migration/qemu-file-channel.o
CC migration/xbzrle.o
CC migration/postcopy-ram.o
CC migration/qjson.o
CC migration/block.o
CC net/net.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/vhost-user.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/colo.o
CC net/filter-rewriter.o
CC net/filter-replay.o
CC net/tap.o
CC net/tap-linux.o
CC qom/cpu.o
CC replay/replay.o
CC replay/replay-internal.o
CC replay/replay-events.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
CC replay/replay-audio.o
CC slirp/cksum.o
CC slirp/if.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_subr.o
CC slirp/tcp_timer.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/bootp.o
CC slirp/tftp.o
CC slirp/arp_table.o
CC slirp/ndp_table.o
CC slirp/ncsi.o
CC ui/keymaps.o
CC ui/console.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/sdl2.o
CC ui/sdl2-input.o
CC ui/sdl2-2d.o
CC ui/sdl2-gl.o
CC ui/x_keymap.o
CC ui/curses.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-auth-sasl.o
CC ui/vnc-ws.o
CC ui/vnc-jobs.o
CC ui/gtk.o
VERT ui/shader/texture-blit-vert.h
VERT ui/shader/texture-blit-flip-vert.h
FRAG ui/shader/texture-blit-frag.h
CC ui/console-gl.o
CC ui/egl-helpers.o
CC ui/egl-context.o
CC ui/egl-headless.o
CC ui/gtk-gl-area.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-fe.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
CC chardev/char-parallel.o
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-ringbuf.o
CC chardev/char-serial.o
CC chardev/char-socket.o
CC chardev/char-stdio.o
CC chardev/char-udp.o
LINK tests/qemu-iotests/socket_scm_helper
GEN qemu-doc.html
CCAS s390-ccw/start.o
GEN qemu-doc.txt
CC s390-ccw/main.o
CC s390-ccw/bootmap.o
GEN qemu.1
CC s390-ccw/sclp.o
CC s390-ccw/virtio.o
CC s390-ccw/virtio-scsi.o
GEN docs/interop/qemu-qmp-ref.html
CC s390-ccw/virtio-blkdev.o
s390-netboot.img not built since roms/SLOF/ is not available.
BUILD s390-ccw/s390-ccw.elf
STRIP s390-ccw/s390-ccw.img
GEN docs/interop/qemu-qmp-ref.txt
GEN docs/interop/qemu-qmp-ref.7
GEN docs/interop/qemu-ga-ref.html
GEN docs/interop/qemu-ga-ref.txt
GEN docs/interop/qemu-ga-ref.7
CC qga/commands.o
CC qga/guest-agent-command-state.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qmp-marshal.o
AR libqemuutil.a
CC qemu-img.o
LINK qemu-io
LINK fsdev/virtfs-proxy-helper
LINK scsi/qemu-pr-helper
LINK qemu-bridge-helper
CC ui/shader.o
LINK qemu-ga
LINK qemu-keymap
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
LINK qemu-img
GEN alpha-softmmu/hmp-commands.h
GEN alpha-softmmu/hmp-commands-info.h
GEN alpha-softmmu/config-target.h
CC alpha-softmmu/exec.o
GEN cris-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands-info.h
GEN cris-softmmu/config-target.h
GEN aarch64-softmmu/hmp-commands.h
GEN aarch64-softmmu/hmp-commands-info.h
GEN aarch64-softmmu/config-target.h
CC aarch64-softmmu/exec.o
GEN arm-softmmu/hmp-commands.h
GEN arm-softmmu/hmp-commands-info.h
CC cris-softmmu/exec.o
GEN arm-softmmu/config-target.h
CC arm-softmmu/exec.o
CC alpha-softmmu/tcg/tcg.o
CC aarch64-softmmu/tcg/tcg.o
CC cris-softmmu/tcg/tcg.o
CC arm-softmmu/tcg/tcg.o
CC alpha-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/tcg/tcg-op.o
CC cris-softmmu/tcg/tcg-op.o
CC arm-softmmu/tcg/tcg-op.o
CC alpha-softmmu/tcg/optimize.o
CC aarch64-softmmu/tcg/optimize.o
CC cris-softmmu/tcg/optimize.o
CC alpha-softmmu/tcg/tcg-common.o
CC arm-softmmu/tcg/optimize.o
CC alpha-softmmu/fpu/softfloat.o
CC aarch64-softmmu/tcg/tcg-common.o
CC cris-softmmu/tcg/tcg-common.o
CC cris-softmmu/fpu/softfloat.o
CC aarch64-softmmu/fpu/softfloat.o
CC arm-softmmu/tcg/tcg-common.o
CC arm-softmmu/fpu/softfloat.o
CC alpha-softmmu/disas.o
CC alpha-softmmu/arch_init.o
CC cris-softmmu/disas.o
CC alpha-softmmu/cpus.o
CC aarch64-softmmu/disas.o
CC cris-softmmu/arch_init.o
GEN aarch64-softmmu/gdbstub-xml.c
CC cris-softmmu/cpus.o
CC alpha-softmmu/monitor.o
CC aarch64-softmmu/arch_init.o
CC arm-softmmu/disas.o
CC aarch64-softmmu/cpus.o
CC cris-softmmu/monitor.o
GEN arm-softmmu/gdbstub-xml.c
CC aarch64-softmmu/monitor.o
CC alpha-softmmu/gdbstub.o
CC arm-softmmu/arch_init.o
CC arm-softmmu/cpus.o
CC alpha-softmmu/balloon.o
CC alpha-softmmu/ioport.o
CC cris-softmmu/gdbstub.o
CC aarch64-softmmu/gdbstub.o
CC arm-softmmu/monitor.o
CC alpha-softmmu/numa.o
CC cris-softmmu/balloon.o
CC alpha-softmmu/qtest.o
CC cris-softmmu/ioport.o
CC aarch64-softmmu/balloon.o
CC aarch64-softmmu/ioport.o
CC alpha-softmmu/memory.o
CC cris-softmmu/numa.o
CC aarch64-softmmu/numa.o
CC arm-softmmu/gdbstub.o
CC cris-softmmu/qtest.o
CC arm-softmmu/balloon.o
CC cris-softmmu/memory.o
CC aarch64-softmmu/qtest.o
CC arm-softmmu/ioport.o
CC alpha-softmmu/memory_mapping.o
CC arm-softmmu/numa.o
CC aarch64-softmmu/memory.o
CC alpha-softmmu/dump.o
CC arm-softmmu/qtest.o
CC cris-softmmu/memory_mapping.o
CC arm-softmmu/memory.o
CC alpha-softmmu/migration/ram.o
CC cris-softmmu/dump.o
CC aarch64-softmmu/memory_mapping.o
CC aarch64-softmmu/dump.o
CC alpha-softmmu/accel/accel.o
CC alpha-softmmu/accel/stubs/hax-stub.o
CC arm-softmmu/memory_mapping.o
CC cris-softmmu/migration/ram.o
CC arm-softmmu/dump.o
CC alpha-softmmu/accel/stubs/kvm-stub.o
CC aarch64-softmmu/migration/ram.o
CC alpha-softmmu/accel/tcg/tcg-all.o
CC alpha-softmmu/accel/tcg/cputlb.o
CC cris-softmmu/accel/accel.o
CC arm-softmmu/migration/ram.o
CC cris-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/accel/accel.o
CC cris-softmmu/accel/stubs/kvm-stub.o
CC aarch64-softmmu/accel/stubs/hax-stub.o
CC arm-softmmu/accel/accel.o
CC cris-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/accel/stubs/kvm-stub.o
CC cris-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/accel/stubs/hax-stub.o
CC arm-softmmu/accel/stubs/kvm-stub.o
CC aarch64-softmmu/accel/tcg/tcg-all.o
CC alpha-softmmu/accel/tcg/tcg-runtime.o
CC aarch64-softmmu/accel/tcg/cputlb.o
CC alpha-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/accel/tcg/tcg-all.o
CC alpha-softmmu/accel/tcg/cpu-exec-common.o
CC arm-softmmu/accel/tcg/cputlb.o
CC cris-softmmu/accel/tcg/tcg-runtime.o
CC alpha-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/accel/tcg/cpu-exec.o
CC alpha-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/accel/tcg/tcg-runtime.o
CC cris-softmmu/accel/tcg/cpu-exec-common.o
CC alpha-softmmu/hw/9pfs/virtio-9p-device.o
CC cris-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/accel/tcg/tcg-runtime.o
CC aarch64-softmmu/accel/tcg/cpu-exec.o
CC alpha-softmmu/hw/block/virtio-blk.o
CC arm-softmmu/accel/tcg/cpu-exec.o
CC cris-softmmu/accel/tcg/translator.o
CC alpha-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/accel/tcg/cpu-exec-common.o
CC cris-softmmu/hw/core/generic-loader.o
CC alpha-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/accel/tcg/cpu-exec-common.o
CC cris-softmmu/hw/core/null-machine.o
CC arm-softmmu/accel/tcg/translate-all.o
CC alpha-softmmu/hw/core/generic-loader.o
CC cris-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/accel/tcg/translator.o
CC alpha-softmmu/hw/core/null-machine.o
CC cris-softmmu/hw/net/etraxfs_eth.o
CC arm-softmmu/accel/tcg/translator.o
CC alpha-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/9pfs/virtio-9p-device.o
CC cris-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC cris-softmmu/hw/net/rocker/qmp-norocker.o
CC arm-softmmu/hw/9pfs/virtio-9p-device.o
CC cris-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC arm-softmmu/hw/adc/stm32f2xx_adc.o
CC alpha-softmmu/hw/display/virtio-gpu.o
CC cris-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/block/virtio-blk.o
CC cris-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC alpha-softmmu/hw/display/virtio-gpu-3d.o
CC cris-softmmu/hw/cris/boot.o
CC arm-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/hw/char/omap_uart.o
CC cris-softmmu/hw/cris/axis_dev88.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC arm-softmmu/hw/char/exynos4210_uart.o
CC cris-softmmu/target/cris/translate.o
CC alpha-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC arm-softmmu/hw/char/omap_uart.o
CC arm-softmmu/hw/char/digic-uart.o
CC alpha-softmmu/hw/misc/ivshmem.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC alpha-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/char/bcm2835_aux.o
CC aarch64-softmmu/hw/core/generic-loader.o
CC cris-softmmu/target/cris/op_helper.o
CC arm-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/core/null-machine.o
CC cris-softmmu/target/cris/helper.o
CC alpha-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC alpha-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/core/generic-loader.o
CC cris-softmmu/target/cris/cpu.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC arm-softmmu/hw/core/null-machine.o
CC cris-softmmu/target/cris/gdbstub.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC alpha-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/cpu/arm11mpcore.o
CC cris-softmmu/target/cris/mmu.o
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC alpha-softmmu/hw/scsi/vhost-scsi-common.o
CC arm-softmmu/hw/cpu/realview_mpcore.o
CC alpha-softmmu/hw/scsi/vhost-scsi.o
CC cris-softmmu/target/cris/machine.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC arm-softmmu/hw/cpu/a9mpcore.o
GEN trace/generated-helpers.c
CC cris-softmmu/trace/control-target.o
CC alpha-softmmu/hw/scsi/vhost-user-scsi.o
CC arm-softmmu/hw/cpu/a15mpcore.o
CC aarch64-softmmu/hw/display/omap_lcdc.o
CC cris-softmmu/trace/generated-helpers.o
CC alpha-softmmu/hw/timer/mc146818rtc.o
CC arm-softmmu/hw/display/omap_dss.o
LINK cris-softmmu/qemu-system-cris
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC alpha-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/display/omap_lcdc.o
CC alpha-softmmu/hw/vfio/pci.o
CC arm-softmmu/hw/display/pxa2xx_lcd.o
CC aarch64-softmmu/hw/display/bcm2835_fb.o
CC aarch64-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
CC arm-softmmu/hw/display/bcm2835_fb.o
CC arm-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/display/dpcd.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC arm-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC arm-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC alpha-softmmu/hw/vfio/pci-quirks.o
CC alpha-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC alpha-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC alpha-softmmu/hw/virtio/virtio.o
CC alpha-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/input/tsc210x.o
GEN i386-softmmu/hmp-commands.h
GEN i386-softmmu/hmp-commands-info.h
GEN i386-softmmu/config-target.h
CC i386-softmmu/exec.o
CC alpha-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC alpha-softmmu/hw/virtio/vhost-backend.o
CC alpha-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC alpha-softmmu/hw/virtio/vhost-vsock.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC alpha-softmmu/hw/virtio/virtio-crypto.o
CC i386-softmmu/tcg/tcg.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC alpha-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC alpha-softmmu/hw/alpha/dp264.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
CC alpha-softmmu/hw/alpha/pci.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC alpha-softmmu/hw/alpha/typhoon.o
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC alpha-softmmu/target/alpha/machine.o
CC alpha-softmmu/target/alpha/translate.o
CC i386-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/hw/misc/ivshmem.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC aarch64-softmmu/hw/misc/cbus.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC alpha-softmmu/target/alpha/helper.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC alpha-softmmu/target/alpha/cpu.o
CC aarch64-softmmu/hw/misc/exynos4210_rng.o
CC i386-softmmu/tcg/optimize.o
CC alpha-softmmu/target/alpha/int_helper.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC alpha-softmmu/target/alpha/fpu_helper.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC alpha-softmmu/target/alpha/vax_helper.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC i386-softmmu/tcg/tcg-common.o
CC alpha-softmmu/target/alpha/sys_helper.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC i386-softmmu/fpu/softfloat.o
CC alpha-softmmu/target/alpha/mem_helper.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC alpha-softmmu/target/alpha/gdbstub.o
CC aarch64-softmmu/hw/misc/omap_clk.o
GEN trace/generated-helpers.c
CC alpha-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC alpha-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/misc/omap_l4.o
LINK alpha-softmmu/qemu-system-alpha
CC aarch64-softmmu/hw/misc/omap_sdrc.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
GEN lm32-softmmu/hmp-commands.h
GEN lm32-softmmu/hmp-commands-info.h
GEN lm32-softmmu/config-target.h
CC lm32-softmmu/exec.o
CC lm32-softmmu/tcg/tcg.o
CC lm32-softmmu/tcg/tcg-op.o
CC lm32-softmmu/tcg/optimize.o
CC lm32-softmmu/tcg/tcg-common.o
CC lm32-softmmu/fpu/softfloat.o
CC lm32-softmmu/disas.o
CC lm32-softmmu/arch_init.o
CC lm32-softmmu/cpus.o
CC lm32-softmmu/monitor.o
CC lm32-softmmu/gdbstub.o
CC lm32-softmmu/balloon.o
CC lm32-softmmu/ioport.o
CC lm32-softmmu/numa.o
CC lm32-softmmu/qtest.o
CC lm32-softmmu/memory.o
CC lm32-softmmu/memory_mapping.o
CC lm32-softmmu/dump.o
CC lm32-softmmu/migration/ram.o
CC lm32-softmmu/accel/accel.o
CC lm32-softmmu/accel/stubs/hax-stub.o
CC lm32-softmmu/accel/stubs/kvm-stub.o
CC lm32-softmmu/accel/tcg/tcg-all.o
CC lm32-softmmu/accel/tcg/cputlb.o
CC lm32-softmmu/accel/tcg/tcg-runtime.o
CC lm32-softmmu/accel/tcg/cpu-exec.o
CC lm32-softmmu/accel/tcg/cpu-exec-common.o
CC lm32-softmmu/accel/tcg/translate-all.o
CC lm32-softmmu/accel/tcg/translator.o
CC lm32-softmmu/hw/core/generic-loader.o
CC lm32-softmmu/hw/core/null-machine.o
CC lm32-softmmu/hw/input/milkymist-softusb.o
CC lm32-softmmu/hw/misc/milkymist-hpdmc.o
CC lm32-softmmu/hw/misc/milkymist-pfpu.o
CC lm32-softmmu/hw/misc/mmio_interface.o
CC lm32-softmmu/hw/net/milkymist-minimac2.o
CC lm32-softmmu/hw/net/vhost_net.o
CC lm32-softmmu/hw/net/rocker/qmp-norocker.o
CC lm32-softmmu/hw/sd/milkymist-memcard.o
CC lm32-softmmu/hw/vfio/common.o
CC lm32-softmmu/hw/vfio/platform.o
CC lm32-softmmu/hw/vfio/spapr.o
CC lm32-softmmu/hw/lm32/lm32_boards.o
CC lm32-softmmu/hw/lm32/milkymist.o
CC lm32-softmmu/target/lm32/translate.o
CC lm32-softmmu/target/lm32/op_helper.o
CC lm32-softmmu/target/lm32/helper.o
CC lm32-softmmu/target/lm32/cpu.o
CC lm32-softmmu/target/lm32/gdbstub.o
CC lm32-softmmu/target/lm32/lm32-semi.o
CC lm32-softmmu/target/lm32/machine.o
GEN trace/generated-helpers.c
CC lm32-softmmu/trace/control-target.o
CC lm32-softmmu/trace/generated-helpers.o
LINK lm32-softmmu/qemu-system-lm32
CC i386-softmmu/disas.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
GEN i386-softmmu/gdbstub-xml.c
CC i386-softmmu/arch_init.o
CC aarch64-softmmu/hw/misc/mps2-scc.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC i386-softmmu/cpus.o
CC arm-softmmu/hw/display/virtio-gpu-pci.o
CC i386-softmmu/monitor.o
CC arm-softmmu/hw/dma/omap_dma.o
GEN m68k-softmmu/hmp-commands.h
GEN m68k-softmmu/hmp-commands-info.h
GEN m68k-softmmu/config-target.h
CC m68k-softmmu/exec.o
CC m68k-softmmu/tcg/tcg.o
CC m68k-softmmu/tcg/tcg-op.o
CC m68k-softmmu/tcg/optimize.o
CC m68k-softmmu/tcg/tcg-common.o
CC m68k-softmmu/fpu/softfloat.o
CC m68k-softmmu/disas.o
GEN m68k-softmmu/gdbstub-xml.c
CC m68k-softmmu/arch_init.o
CC m68k-softmmu/cpus.o
CC m68k-softmmu/monitor.o
CC m68k-softmmu/gdbstub.o
CC m68k-softmmu/balloon.o
CC m68k-softmmu/ioport.o
CC m68k-softmmu/numa.o
CC m68k-softmmu/qtest.o
CC m68k-softmmu/memory.o
CC m68k-softmmu/memory_mapping.o
CC m68k-softmmu/dump.o
CC m68k-softmmu/migration/ram.o
CC m68k-softmmu/accel/accel.o
CC m68k-softmmu/accel/stubs/hax-stub.o
CC m68k-softmmu/accel/stubs/kvm-stub.o
CC m68k-softmmu/accel/tcg/tcg-all.o
CC m68k-softmmu/accel/tcg/cputlb.o
CC m68k-softmmu/accel/tcg/tcg-runtime.o
CC m68k-softmmu/accel/tcg/cpu-exec.o
CC m68k-softmmu/accel/tcg/cpu-exec-common.o
CC m68k-softmmu/accel/tcg/translate-all.o
CC m68k-softmmu/accel/tcg/translator.o
CC m68k-softmmu/hw/char/mcf_uart.o
CC m68k-softmmu/hw/core/generic-loader.o
CC m68k-softmmu/hw/core/null-machine.o
CC m68k-softmmu/hw/misc/mmio_interface.o
CC m68k-softmmu/hw/net/mcf_fec.o
CC m68k-softmmu/hw/net/vhost_net.o
CC m68k-softmmu/hw/net/rocker/qmp-norocker.o
CC m68k-softmmu/hw/vfio/common.o
CC m68k-softmmu/hw/vfio/platform.o
CC m68k-softmmu/hw/vfio/spapr.o
CC m68k-softmmu/hw/m68k/an5206.o
CC m68k-softmmu/hw/m68k/mcf5208.o
CC m68k-softmmu/hw/m68k/mcf5206.o
CC m68k-softmmu/hw/m68k/mcf_intc.o
CC m68k-softmmu/target/m68k/m68k-semi.o
CC m68k-softmmu/target/m68k/translate.o
CC m68k-softmmu/target/m68k/op_helper.o
CC m68k-softmmu/target/m68k/helper.o
CC m68k-softmmu/target/m68k/cpu.o
CC m68k-softmmu/target/m68k/fpu_helper.o
CC m68k-softmmu/target/m68k/gdbstub.o
GEN trace/generated-helpers.c
CC m68k-softmmu/trace/control-target.o
CC m68k-softmmu/gdbstub-xml.o
CC m68k-softmmu/trace/generated-helpers.o
LINK m68k-softmmu/qemu-system-m68k
CC arm-softmmu/hw/dma/soc_dma.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC i386-softmmu/gdbstub.o
CC arm-softmmu/hw/dma/pxa2xx_dma.o
CC arm-softmmu/hw/dma/bcm2835_dma.o
CC i386-softmmu/balloon.o
GEN microblazeel-softmmu/hmp-commands.h
CC arm-softmmu/hw/gpio/omap_gpio.o
GEN microblazeel-softmmu/hmp-commands-info.h
GEN microblazeel-softmmu/config-target.h
CC microblazeel-softmmu/exec.o
CC i386-softmmu/ioport.o
CC arm-softmmu/hw/gpio/imx_gpio.o
CC i386-softmmu/numa.o
CC arm-softmmu/hw/gpio/bcm2835_gpio.o
CC arm-softmmu/hw/i2c/omap_i2c.o
CC i386-softmmu/qtest.o
CC arm-softmmu/hw/input/pxa2xx_keypad.o
CC i386-softmmu/memory.o
CC arm-softmmu/hw/input/tsc210x.o
CC microblazeel-softmmu/tcg/tcg.o
CC arm-softmmu/hw/intc/armv7m_nvic.o
CC i386-softmmu/memory_mapping.o
CC arm-softmmu/hw/intc/exynos4210_gic.o
CC i386-softmmu/dump.o
CC arm-softmmu/hw/intc/exynos4210_combiner.o
CC arm-softmmu/hw/intc/omap_intc.o
CC i386-softmmu/migration/ram.o
CC microblazeel-softmmu/tcg/tcg-op.o
CC arm-softmmu/hw/intc/bcm2835_ic.o
CC arm-softmmu/hw/intc/bcm2836_control.o
CC arm-softmmu/hw/intc/allwinner-a10-pic.o
CC arm-softmmu/hw/intc/aspeed_vic.o
CC i386-softmmu/accel/accel.o
CC i386-softmmu/accel/stubs/hax-stub.o
CC arm-softmmu/hw/intc/arm_gicv3_cpuif.o
CC i386-softmmu/accel/stubs/kvm-stub.o
CC i386-softmmu/accel/tcg/tcg-all.o
CC microblazeel-softmmu/tcg/optimize.o
CC i386-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/hw/misc/ivshmem.o
CC microblazeel-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/fpu/softfloat.o
CC arm-softmmu/hw/misc/arm_sysctl.o
CC arm-softmmu/hw/misc/cbus.o
CC arm-softmmu/hw/misc/exynos4210_pmu.o
CC arm-softmmu/hw/misc/exynos4210_clk.o
CC i386-softmmu/accel/tcg/tcg-runtime.o
CC arm-softmmu/hw/misc/exynos4210_rng.o
CC i386-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/hw/misc/imx_ccm.o
CC arm-softmmu/hw/misc/imx31_ccm.o
CC i386-softmmu/accel/tcg/cpu-exec-common.o
CC arm-softmmu/hw/misc/imx25_ccm.o
CC i386-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/hw/misc/imx6_ccm.o
CC arm-softmmu/hw/misc/imx6_src.o
CC i386-softmmu/accel/tcg/translator.o
CC arm-softmmu/hw/misc/mst_fpga.o
CC arm-softmmu/hw/misc/omap_clk.o
CC microblazeel-softmmu/disas.o
CC i386-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/hw/misc/omap_gpmc.o
CC i386-softmmu/hw/block/virtio-blk.o
CC microblazeel-softmmu/arch_init.o
CC arm-softmmu/hw/misc/omap_l4.o
CC microblazeel-softmmu/cpus.o
CC arm-softmmu/hw/misc/omap_sdrc.o
CC i386-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/misc/omap_tap.o
CC arm-softmmu/hw/misc/bcm2835_mbox.o
CC i386-softmmu/hw/char/virtio-serial-bus.o
CC microblazeel-softmmu/monitor.o
CC arm-softmmu/hw/misc/bcm2835_property.o
CC i386-softmmu/hw/core/generic-loader.o
CC arm-softmmu/hw/misc/bcm2835_rng.o
CC i386-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/misc/zynq_slcr.o
CC i386-softmmu/hw/display/vga.o
CC arm-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/misc/stm32f2xx_syscfg.o
CC microblazeel-softmmu/gdbstub.o
CC arm-softmmu/hw/misc/mps2-scc.o
CC arm-softmmu/hw/misc/aspeed_scu.o
CC i386-softmmu/hw/display/virtio-gpu.o
CC arm-softmmu/hw/misc/aspeed_sdmc.o
CC microblazeel-softmmu/balloon.o
CC microblazeel-softmmu/ioport.o
CC arm-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/hw/misc/msf2-sysreg.o
CC microblazeel-softmmu/numa.o
CC arm-softmmu/hw/net/virtio-net.o
CC i386-softmmu/hw/display/virtio-gpu-3d.o
CC microblazeel-softmmu/qtest.o
CC i386-softmmu/hw/display/virtio-gpu-pci.o
CC microblazeel-softmmu/memory.o
CC arm-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/pcmcia/pxa2xx.o
CC i386-softmmu/hw/display/virtio-vga.o
CC arm-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/hw/intc/apic.o
CC arm-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC i386-softmmu/hw/intc/apic_common.o
CC arm-softmmu/hw/scsi/vhost-scsi-common.o
CC microblazeel-softmmu/memory_mapping.o
CC microblazeel-softmmu/dump.o
CC arm-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/hw/intc/ioapic.o
CC arm-softmmu/hw/scsi/vhost-user-scsi.o
CC i386-softmmu/hw/isa/lpc_ich9.o
CC arm-softmmu/hw/sd/omap_mmc.o
CC microblazeel-softmmu/migration/ram.o
CC i386-softmmu/hw/misc/vmport.o
CC arm-softmmu/hw/sd/pxa2xx_mmci.o
CC i386-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/sd/bcm2835_sdhost.o
CC arm-softmmu/hw/ssi/omap_spi.o
CC i386-softmmu/hw/misc/pvpanic.o
CC microblazeel-softmmu/accel/accel.o
CC arm-softmmu/hw/ssi/imx_spi.o
CC i386-softmmu/hw/misc/mmio_interface.o
CC microblazeel-softmmu/accel/stubs/hax-stub.o
CC i386-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/timer/exynos4210_mct.o
CC microblazeel-softmmu/accel/stubs/kvm-stub.o
CC microblazeel-softmmu/accel/tcg/tcg-all.o
CC arm-softmmu/hw/timer/exynos4210_pwm.o
CC microblazeel-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/hw/timer/exynos4210_rtc.o
CC i386-softmmu/hw/net/vhost_net.o
CC i386-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/timer/omap_gptimer.o
CC arm-softmmu/hw/timer/omap_synctimer.o
CC i386-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/timer/pxa2xx_timer.o
CC i386-softmmu/hw/scsi/vhost-scsi-common.o
CC arm-softmmu/hw/timer/digic-timer.o
CC i386-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/timer/allwinner-a10-pit.o
CC i386-softmmu/hw/scsi/vhost-user-scsi.o
CC microblazeel-softmmu/accel/tcg/tcg-runtime.o
CC arm-softmmu/hw/usb/tusb6010.o
CC i386-softmmu/hw/timer/mc146818rtc.o
CC microblazeel-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/hw/vfio/common.o
CC microblazeel-softmmu/accel/tcg/cpu-exec-common.o
CC i386-softmmu/hw/vfio/common.o
CC microblazeel-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/hw/vfio/pci.o
CC i386-softmmu/hw/vfio/pci.o
CC microblazeel-softmmu/accel/tcg/translator.o
CC microblazeel-softmmu/hw/core/generic-loader.o
CC microblazeel-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/vfio/pci-quirks.o
CC microblazeel-softmmu/hw/misc/mmio_interface.o
CC i386-softmmu/hw/vfio/pci-quirks.o
CC microblazeel-softmmu/hw/net/xilinx_ethlite.o
CC microblazeel-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/vfio/platform.o
CC microblazeel-softmmu/hw/net/rocker/qmp-norocker.o
CC i386-softmmu/hw/vfio/platform.o
CC microblazeel-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/vfio/calxeda-xgmac.o
CC arm-softmmu/hw/vfio/amd-xgbe.o
CC i386-softmmu/hw/vfio/spapr.o
CC arm-softmmu/hw/vfio/spapr.o
CC microblazeel-softmmu/hw/vfio/platform.o
CC i386-softmmu/hw/virtio/virtio.o
CC arm-softmmu/hw/virtio/virtio.o
CC microblazeel-softmmu/hw/vfio/spapr.o
CC microblazeel-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC microblazeel-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC i386-softmmu/hw/virtio/virtio-balloon.o
CC arm-softmmu/hw/virtio/virtio-balloon.o
CC microblazeel-softmmu/hw/microblaze/boot.o
CC i386-softmmu/hw/virtio/vhost.o
CC microblazeel-softmmu/target/microblaze/translate.o
CC arm-softmmu/hw/virtio/vhost.o
CC i386-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/virtio/vhost-backend.o
CC i386-softmmu/hw/virtio/vhost-user.o
CC arm-softmmu/hw/virtio/vhost-user.o
CC i386-softmmu/hw/virtio/vhost-vsock.o
CC arm-softmmu/hw/virtio/vhost-vsock.o
CC microblazeel-softmmu/target/microblaze/op_helper.o
CC i386-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/virtio/virtio-crypto.o
CC microblazeel-softmmu/target/microblaze/helper.o
CC i386-softmmu/hw/virtio/virtio-crypto-pci.o
CC microblazeel-softmmu/target/microblaze/cpu.o
CC arm-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/hw/i386/multiboot.o
CC microblazeel-softmmu/target/microblaze/gdbstub.o
CC arm-softmmu/hw/arm/boot.o
CC microblazeel-softmmu/target/microblaze/mmu.o
CC i386-softmmu/hw/i386/pc.o
GEN trace/generated-helpers.c
CC microblazeel-softmmu/trace/control-target.o
CC arm-softmmu/hw/arm/collie.o
CC microblazeel-softmmu/trace/generated-helpers.o
CC arm-softmmu/hw/arm/exynos4_boards.o
LINK microblazeel-softmmu/qemu-system-microblazeel
CC arm-softmmu/hw/arm/gumstix.o
CC i386-softmmu/hw/i386/pc_piix.o
CC arm-softmmu/hw/arm/highbank.o
CC arm-softmmu/hw/arm/digic_boards.o
CC i386-softmmu/hw/i386/pc_q35.o
CC arm-softmmu/hw/arm/integratorcp.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC arm-softmmu/hw/arm/mainstone.o
GEN microblaze-softmmu/hmp-commands.h
GEN microblaze-softmmu/hmp-commands-info.h
GEN microblaze-softmmu/config-target.h
CC microblaze-softmmu/exec.o
CC microblaze-softmmu/tcg/tcg.o
CC microblaze-softmmu/tcg/tcg-op.o
CC microblaze-softmmu/tcg/optimize.o
CC microblaze-softmmu/tcg/tcg-common.o
CC microblaze-softmmu/fpu/softfloat.o
CC microblaze-softmmu/disas.o
CC microblaze-softmmu/arch_init.o
CC microblaze-softmmu/cpus.o
CC microblaze-softmmu/monitor.o
CC microblaze-softmmu/gdbstub.o
CC microblaze-softmmu/balloon.o
CC microblaze-softmmu/ioport.o
CC microblaze-softmmu/numa.o
CC microblaze-softmmu/qtest.o
CC microblaze-softmmu/memory.o
CC microblaze-softmmu/memory_mapping.o
CC microblaze-softmmu/dump.o
CC microblaze-softmmu/migration/ram.o
CC microblaze-softmmu/accel/accel.o
CC microblaze-softmmu/accel/stubs/hax-stub.o
CC microblaze-softmmu/accel/stubs/kvm-stub.o
CC microblaze-softmmu/accel/tcg/tcg-all.o
CC microblaze-softmmu/accel/tcg/cputlb.o
CC microblaze-softmmu/accel/tcg/tcg-runtime.o
CC microblaze-softmmu/accel/tcg/cpu-exec.o
CC microblaze-softmmu/accel/tcg/cpu-exec-common.o
CC microblaze-softmmu/accel/tcg/translate-all.o
CC microblaze-softmmu/accel/tcg/translator.o
CC microblaze-softmmu/hw/core/generic-loader.o
CC microblaze-softmmu/hw/core/null-machine.o
CC microblaze-softmmu/hw/misc/mmio_interface.o
CC microblaze-softmmu/hw/net/xilinx_ethlite.o
CC microblaze-softmmu/hw/net/vhost_net.o
CC microblaze-softmmu/hw/net/rocker/qmp-norocker.o
CC microblaze-softmmu/hw/vfio/common.o
CC microblaze-softmmu/hw/vfio/platform.o
CC microblaze-softmmu/hw/vfio/spapr.o
CC microblaze-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC microblaze-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC microblaze-softmmu/hw/microblaze/boot.o
CC microblaze-softmmu/target/microblaze/translate.o
CC microblaze-softmmu/target/microblaze/op_helper.o
CC microblaze-softmmu/target/microblaze/helper.o
CC microblaze-softmmu/target/microblaze/cpu.o
CC microblaze-softmmu/target/microblaze/gdbstub.o
CC microblaze-softmmu/target/microblaze/mmu.o
GEN trace/generated-helpers.c
CC microblaze-softmmu/trace/control-target.o
CC microblaze-softmmu/trace/generated-helpers.o
LINK microblaze-softmmu/qemu-system-microblaze
CC aarch64-softmmu/hw/misc/mmio_interface.o
CC i386-softmmu/hw/i386/pc_sysfw.o
CC aarch64-softmmu/hw/misc/msf2-sysreg.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC i386-softmmu/hw/i386/x86-iommu.o
CC arm-softmmu/hw/arm/musicpal.o
CC i386-softmmu/hw/i386/intel_iommu.o
CC i386-softmmu/hw/i386/amd_iommu.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/arm/nseries.o
CC i386-softmmu/hw/i386/kvmvapic.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC arm-softmmu/hw/arm/omap_sx1.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/hw/i386/acpi-build.o
CC arm-softmmu/hw/arm/palm.o
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC i386-softmmu/target/i386/helper.o
CC aarch64-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/target/i386/cpu.o
CC aarch64-softmmu/hw/scsi/vhost-user-scsi.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
GEN mips64el-softmmu/hmp-commands.h
GEN mips64el-softmmu/hmp-commands-info.h
GEN mips64el-softmmu/config-target.h
CC mips64el-softmmu/exec.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC i386-softmmu/target/i386/gdbstub.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC i386-softmmu/target/i386/xsave_helper.o
CC i386-softmmu/target/i386/translate.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC mips64el-softmmu/tcg/tcg.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC aarch64-softmmu/hw/usb/tusb6010.o
CC aarch64-softmmu/hw/vfio/common.o
CC mips64el-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC mips64el-softmmu/tcg/optimize.o
CC aarch64-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/tcg/tcg-common.o
CC i386-softmmu/target/i386/bpt_helper.o
CC mips64el-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC i386-softmmu/target/i386/cc_helper.o
CC i386-softmmu/target/i386/excp_helper.o
CC i386-softmmu/target/i386/fpu_helper.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC mips64el-softmmu/disas.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC mips64el-softmmu/arch_init.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC mips64el-softmmu/cpus.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/target/i386/int_helper.o
CC aarch64-softmmu/hw/arm/boot.o
CC i386-softmmu/target/i386/mem_helper.o
CC mips64el-softmmu/monitor.o
CC i386-softmmu/target/i386/misc_helper.o
CC aarch64-softmmu/hw/arm/collie.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC i386-softmmu/target/i386/mpx_helper.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC aarch64-softmmu/hw/arm/highbank.o
CC i386-softmmu/target/i386/seg_helper.o
CC mips64el-softmmu/gdbstub.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC mips64el-softmmu/balloon.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC mips64el-softmmu/ioport.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC mips64el-softmmu/numa.o
CC mips64el-softmmu/qtest.o
CC aarch64-softmmu/hw/arm/nseries.o
CC i386-softmmu/target/i386/smm_helper.o
CC mips64el-softmmu/memory.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC i386-softmmu/target/i386/svm_helper.o
CC aarch64-softmmu/hw/arm/palm.o
CC i386-softmmu/target/i386/machine.o
CC aarch64-softmmu/hw/arm/realview.o
CC i386-softmmu/target/i386/arch_memory_mapping.o
CC mips64el-softmmu/memory_mapping.o
CC aarch64-softmmu/hw/arm/spitz.o
CC i386-softmmu/target/i386/arch_dump.o
CC mips64el-softmmu/dump.o
CC i386-softmmu/target/i386/monitor.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC i386-softmmu/target/i386/kvm-stub.o
CC mips64el-softmmu/migration/ram.o
GEN trace/generated-helpers.c
CC i386-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/arm/tosa.o
CC i386-softmmu/gdbstub-xml.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC i386-softmmu/trace/generated-helpers.o
LINK i386-softmmu/qemu-system-i386
CC aarch64-softmmu/hw/arm/vexpress.o
CC mips64el-softmmu/accel/accel.o
CC aarch64-softmmu/hw/arm/virt.o
CC mips64el-softmmu/accel/stubs/hax-stub.o
CC mips64el-softmmu/accel/stubs/kvm-stub.o
CC mips64el-softmmu/accel/tcg/tcg-all.o
CC mips64el-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC aarch64-softmmu/hw/arm/z2.o
GEN mips64-softmmu/hmp-commands.h
GEN mips64-softmmu/hmp-commands-info.h
GEN mips64-softmmu/config-target.h
CC mips64-softmmu/exec.o
CC mips64-softmmu/tcg/tcg.o
CC mips64-softmmu/tcg/tcg-op.o
CC mips64-softmmu/tcg/optimize.o
CC mips64-softmmu/tcg/tcg-common.o
CC mips64-softmmu/fpu/softfloat.o
CC mips64-softmmu/disas.o
CC mips64-softmmu/arch_init.o
CC mips64-softmmu/cpus.o
CC mips64-softmmu/monitor.o
CC mips64-softmmu/gdbstub.o
CC mips64-softmmu/balloon.o
CC mips64-softmmu/ioport.o
CC mips64-softmmu/numa.o
CC mips64-softmmu/qtest.o
CC mips64-softmmu/memory.o
CC mips64-softmmu/memory_mapping.o
CC mips64-softmmu/dump.o
CC mips64-softmmu/migration/ram.o
CC mips64-softmmu/accel/accel.o
CC mips64-softmmu/accel/stubs/hax-stub.o
CC mips64-softmmu/accel/stubs/kvm-stub.o
CC mips64-softmmu/accel/tcg/tcg-all.o
CC mips64-softmmu/accel/tcg/cputlb.o
CC mips64-softmmu/accel/tcg/tcg-runtime.o
CC mips64-softmmu/accel/tcg/cpu-exec.o
CC mips64-softmmu/accel/tcg/cpu-exec-common.o
CC mips64-softmmu/accel/tcg/translate-all.o
CC mips64-softmmu/accel/tcg/translator.o
CC mips64-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/block/virtio-blk.o
CC mips64-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/hw/core/generic-loader.o
CC mips64-softmmu/hw/core/null-machine.o
CC mips64-softmmu/hw/display/vga.o
CC mips64-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/hw/display/virtio-gpu-pci.o
CC mips64-softmmu/hw/intc/mips_gic.o
CC mips64-softmmu/hw/misc/ivshmem.o
CC mips64-softmmu/hw/misc/mips_cmgcr.o
CC mips64-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/hw/misc/mips_itu.o
CC mips64-softmmu/hw/misc/mmio_interface.o
CC mips64-softmmu/hw/net/virtio-net.o
CC mips64-softmmu/hw/net/vhost_net.o
CC mips64-softmmu/hw/scsi/virtio-scsi.o
CC mips64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64-softmmu/hw/scsi/vhost-scsi.o
CC mips64-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64-softmmu/hw/timer/mips_gictimer.o
CC mips64-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/hw/vfio/common.o
CC mips64-softmmu/hw/vfio/pci.o
CC mips64-softmmu/hw/vfio/pci-quirks.o
CC mips64-softmmu/hw/vfio/platform.o
CC mips64-softmmu/hw/vfio/spapr.o
CC mips64-softmmu/hw/virtio/virtio.o
CC mips64-softmmu/hw/virtio/virtio-balloon.o
CC mips64-softmmu/hw/virtio/vhost.o
CC mips64-softmmu/hw/virtio/vhost-backend.o
CC mips64-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/hw/virtio/vhost-vsock.o
CC mips64-softmmu/hw/virtio/virtio-crypto.o
CC mips64-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips64-softmmu/hw/mips/mips_r4k.o
CC mips64-softmmu/hw/mips/mips_malta.o
CC mips64-softmmu/hw/mips/mips_mipssim.o
CC mips64-softmmu/hw/mips/addr.o
CC mips64-softmmu/hw/mips/mips_int.o
CC mips64-softmmu/hw/mips/mips_jazz.o
CC mips64-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/hw/mips/cps.o
CC mips64-softmmu/target/mips/translate.o
CC mips64-softmmu/target/mips/dsp_helper.o
CC mips64-softmmu/target/mips/op_helper.o
CC mips64-softmmu/target/mips/lmi_helper.o
CC mips64-softmmu/target/mips/helper.o
CC mips64-softmmu/target/mips/cpu.o
CC mips64-softmmu/target/mips/gdbstub.o
CC mips64-softmmu/target/mips/msa_helper.o
CC mips64-softmmu/target/mips/mips-semi.o
CC mips64-softmmu/target/mips/machine.o
CC mips64-softmmu/target/mips/cp0_timer.o
GEN trace/generated-helpers.c
CC mips64-softmmu/trace/control-target.o
CC mips64-softmmu/trace/generated-helpers.o
LINK mips64-softmmu/qemu-system-mips64
CC mips64el-softmmu/accel/tcg/tcg-runtime.o
CC arm-softmmu/hw/arm/realview.o
CC mips64el-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/hw/arm/spitz.o
CC mips64el-softmmu/accel/tcg/cpu-exec-common.o
CC mips64el-softmmu/accel/tcg/translate-all.o
GEN mipsel-softmmu/hmp-commands.h
GEN mipsel-softmmu/hmp-commands-info.h
GEN mipsel-softmmu/config-target.h
CC mipsel-softmmu/exec.o
CC mips64el-softmmu/accel/tcg/translator.o
CC mips64el-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64el-softmmu/hw/block/virtio-blk.o
CC mips64el-softmmu/hw/block/dataplane/virtio-blk.o
CC mipsel-softmmu/tcg/tcg.o
CC mips64el-softmmu/hw/char/virtio-serial-bus.o
CC mips64el-softmmu/hw/core/generic-loader.o
CC mips64el-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/hw/display/vga.o
CC mips64el-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/tcg/tcg-op.o
CC mips64el-softmmu/hw/display/virtio-gpu-3d.o
CC mips64el-softmmu/hw/display/virtio-gpu-pci.o
CC mips64el-softmmu/hw/intc/mips_gic.o
CC mipsel-softmmu/tcg/optimize.o
CC mips64el-softmmu/hw/misc/ivshmem.o
CC mips64el-softmmu/hw/misc/mips_cmgcr.o
CC mips64el-softmmu/hw/misc/mips_cpc.o
CC mipsel-softmmu/tcg/tcg-common.o
CC mips64el-softmmu/hw/misc/mips_itu.o
CC mipsel-softmmu/fpu/softfloat.o
CC mips64el-softmmu/hw/misc/mmio_interface.o
CC mips64el-softmmu/hw/net/virtio-net.o
CC mips64el-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/hw/scsi/virtio-scsi.o
CC mips64el-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64el-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64el-softmmu/hw/scsi/vhost-scsi.o
CC mips64el-softmmu/hw/scsi/vhost-user-scsi.o
CC mipsel-softmmu/disas.o
CC mips64el-softmmu/hw/timer/mips_gictimer.o
CC mips64el-softmmu/hw/timer/mc146818rtc.o
CC mipsel-softmmu/arch_init.o
CC mipsel-softmmu/cpus.o
CC mips64el-softmmu/hw/vfio/common.o
CC mipsel-softmmu/monitor.o
CC mips64el-softmmu/hw/vfio/pci.o
CC mips64el-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/gdbstub.o
CC mips64el-softmmu/hw/vfio/platform.o
CC mipsel-softmmu/balloon.o
CC mips64el-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/ioport.o
CC mips64el-softmmu/hw/virtio/virtio.o
CC mipsel-softmmu/numa.o
CC mipsel-softmmu/qtest.o
CC mipsel-softmmu/memory.o
CC mips64el-softmmu/hw/virtio/virtio-balloon.o
CC mips64el-softmmu/hw/virtio/vhost.o
CC mips64el-softmmu/hw/virtio/vhost-backend.o
CC mipsel-softmmu/memory_mapping.o
CC mips64el-softmmu/hw/virtio/vhost-user.o
CC mipsel-softmmu/dump.o
CC mips64el-softmmu/hw/virtio/vhost-vsock.o
CC mips64el-softmmu/hw/virtio/virtio-crypto.o
CC mipsel-softmmu/migration/ram.o
CC mips64el-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips64el-softmmu/hw/mips/mips_r4k.o
CC mips64el-softmmu/hw/mips/mips_malta.o
CC mipsel-softmmu/accel/accel.o
CC mipsel-softmmu/accel/stubs/hax-stub.o
CC mipsel-softmmu/accel/stubs/kvm-stub.o
CC mips64el-softmmu/hw/mips/mips_mipssim.o
CC mipsel-softmmu/accel/tcg/tcg-all.o
CC mips64el-softmmu/hw/mips/addr.o
CC mipsel-softmmu/accel/tcg/cputlb.o
CC mips64el-softmmu/hw/mips/mips_int.o
CC mips64el-softmmu/hw/mips/mips_jazz.o
CC mips64el-softmmu/hw/mips/mips_fulong2e.o
CC mips64el-softmmu/hw/mips/gt64xxx_pci.o
CC mips64el-softmmu/hw/mips/cps.o
CC mips64el-softmmu/hw/mips/boston.o
CC mipsel-softmmu/accel/tcg/tcg-runtime.o
CC mips64el-softmmu/target/mips/translate.o
CC mipsel-softmmu/accel/tcg/cpu-exec.o
CC mipsel-softmmu/accel/tcg/cpu-exec-common.o
CC mipsel-softmmu/accel/tcg/translate-all.o
CC mipsel-softmmu/accel/tcg/translator.o
CC mipsel-softmmu/hw/9pfs/virtio-9p-device.o
CC mipsel-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/hw/block/dataplane/virtio-blk.o
CC mipsel-softmmu/hw/char/virtio-serial-bus.o
CC mipsel-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/hw/core/null-machine.o
CC mipsel-softmmu/hw/display/vga.o
CC mipsel-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/hw/display/virtio-gpu-3d.o
CC mipsel-softmmu/hw/display/virtio-gpu-pci.o
CC mipsel-softmmu/hw/intc/mips_gic.o
CC mipsel-softmmu/hw/misc/ivshmem.o
CC mipsel-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/hw/misc/mips_cpc.o
CC mipsel-softmmu/hw/misc/mips_itu.o
CC mipsel-softmmu/hw/misc/mmio_interface.o
CC mipsel-softmmu/hw/net/virtio-net.o
CC mipsel-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mipsel-softmmu/hw/scsi/vhost-scsi-common.o
CC mipsel-softmmu/hw/scsi/vhost-scsi.o
CC mipsel-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64el-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/hw/timer/mc146818rtc.o
CC mipsel-softmmu/hw/vfio/common.o
CC mipsel-softmmu/hw/vfio/pci.o
CC mips64el-softmmu/target/mips/op_helper.o
CC mipsel-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/hw/vfio/platform.o
CC mipsel-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/hw/virtio/virtio.o
CC mips64el-softmmu/target/mips/lmi_helper.o
CC mips64el-softmmu/target/mips/helper.o
CC mipsel-softmmu/hw/virtio/virtio-balloon.o
CC mips64el-softmmu/target/mips/cpu.o
CC mipsel-softmmu/hw/virtio/vhost.o
CC mips64el-softmmu/target/mips/gdbstub.o
CC mips64el-softmmu/target/mips/msa_helper.o
CC mipsel-softmmu/hw/virtio/vhost-backend.o
CC mipsel-softmmu/hw/virtio/vhost-user.o
CC mipsel-softmmu/hw/virtio/vhost-vsock.o
CC mipsel-softmmu/hw/virtio/virtio-crypto.o
CC mipsel-softmmu/hw/virtio/virtio-crypto-pci.o
make[1]: *** [/var/tmp/patchew-tester-tmp-nt6ibrf7/src/rules.mak:66: hw/virtio/virtio-crypto-pci.o] Error 1
make: *** [Makefile:383: subdir-mipsel-softmmu] Error 2
make: *** Waiting for unfinished jobs....
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
CC mips64el-softmmu/target/mips/mips-semi.o
CC mips64el-softmmu/target/mips/machine.o
/tmp/cc3Czn0R.s: Assembler messages:
/tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
/tmp/cc3Czn0R.s: Fatal error: can't close hw/arm/virt-acpi-build.o: No space left on device
CC mips64el-softmmu/target/mips/cp0_timer.o
GEN trace/generated-helpers.c
CC mips64el-softmmu/trace/control-target.o
make[1]: *** [/var/tmp/patchew-tester-tmp-nt6ibrf7/src/rules.mak:66: trace/control-target.o] Error 1
make[1]: *** Waiting for unfinished jobs....
CC arm-softmmu/hw/arm/stellaris.o
CC arm-softmmu/hw/arm/tosa.o
CC arm-softmmu/hw/arm/versatilepb.o
/var/tmp/patchew-tester-tmp-nt6ibrf7/src/hw/arm/stellaris.c:1538:1: fatal error: error writing to /tmp/ccDIRU2E.s: No space left on device
type_init(stellaris_register_types)
^~~~~~~~~
compilation terminated.
make[1]: *** [/var/tmp/patchew-tester-tmp-nt6ibrf7/src/rules.mak:66: hw/arm/stellaris.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make[1]: *** [/var/tmp/patchew-tester-tmp-nt6ibrf7/src/rules.mak:66: hw/arm/virt-acpi-build.o] Error 1
make[1]: *** Waiting for unfinished jobs....
CC aarch64-softmmu/hw/arm/netduino2.o
make[1]: *** [/var/tmp/patchew-tester-tmp-nt6ibrf7/src/rules.mak:66: target/mips/msa_helper.o] Error 1
make: *** [Makefile:383: subdir-mips64el-softmmu] Error 2
/var/tmp/patchew-tester-tmp-nt6ibrf7/src/hw/arm/versatilepb.c:450:1: fatal error: error writing to /tmp/ccarln8S.s: No space left on device
type_init(versatilepb_register_types)
^~~~~~~~~
compilation terminated.
make[1]: *** [/var/tmp/patchew-tester-tmp-nt6ibrf7/src/rules.mak:66: hw/arm/versatilepb.o] Error 1
make: *** [Makefile:383: subdir-arm-softmmu] Error 2
make: *** [Makefile:383: subdir-aarch64-softmmu] Error 2
=== OUTPUT END ===
Test command exited with code: 2
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-11-29 9:02 ` [Qemu-devel] [for-2.12 0/7] PCI cleanups no-reply
@ 2017-11-29 9:18 ` Fam Zheng
2017-11-29 10:11 ` David Gibson
2017-12-05 4:49 ` Michael S. Tsirkin
0 siblings, 2 replies; 47+ messages in thread
From: Fam Zheng @ 2017-11-29 9:18 UTC (permalink / raw)
To: qemu-devel; +Cc: david, ehabkost, mst, marcel, imammedo
On Wed, 11/29 01:02, no-reply@patchew.org wrote:
> /tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
Hmm, the host is shared and what I have is a normal user account, so there is no
control over disk space availability. Anyway this is completely unrelated to
this series. Sorry for the noise.
Fam
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity David Gibson
@ 2017-11-29 9:43 ` Marcel Apfelbaum
2017-11-30 6:17 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 9:43 UTC (permalink / raw)
To: David Gibson, Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov
Cc: qemu-devel
Hi David,
On 29/11/2017 10:46, David Gibson wrote:
> pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus()
> are misleadingly named. They're not used for initializing *any* PCI bus,
> but only for a root PCI bus.
>
> Non-root buses - i.e. ones under a logical PCI to PCI bridge - are instead
> created with a direct qbus_create_inplace() (see pci_bridge_initfn()).
>
> This patch renames the functions to make it clear they're only used for
> a root bus.
>
Agreed.
pci_bus_init calls pci_host_bus_register so is a root bus for sure.
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Thanks,
Marcel
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/alpha/typhoon.c | 8 +++---
> hw/mips/gt64xxx_pci.c | 12 ++++-----
> hw/pci-bridge/pci_expander_bridge.c | 4 +--
> hw/pci-host/apb.c | 10 ++++----
> hw/pci-host/bonito.c | 8 +++---
> hw/pci-host/gpex.c | 6 ++---
> hw/pci-host/grackle.c | 14 +++++------
> hw/pci-host/piix.c | 4 +--
> hw/pci-host/ppce500.c | 6 ++---
> hw/pci-host/prep.c | 4 +--
> hw/pci-host/q35.c | 7 +++---
> hw/pci-host/uninorth.c | 24 +++++++++---------
> hw/pci-host/versatile.c | 6 ++---
> hw/pci-host/xilinx-pcie.c | 6 ++---
> hw/pci/pci.c | 49 ++++++++++++++++++++-----------------
> hw/ppc/ppc4xx_pci.c | 6 ++---
> hw/ppc/spapr_pci.c | 8 +++---
> hw/s390x/s390-pci-bus.c | 8 +++---
> hw/sh4/sh_pci.c | 12 ++++-----
> include/hw/pci/pci.h | 25 ++++++++++---------
> 20 files changed, 116 insertions(+), 111 deletions(-)
>
> diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
> index ae11e012c7..6a40869488 100644
> --- a/hw/alpha/typhoon.c
> +++ b/hw/alpha/typhoon.c
> @@ -881,10 +881,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
> memory_region_add_subregion(addr_space, 0x801fc000000ULL,
> &s->pchip.reg_io);
>
> - b = pci_register_bus(dev, "pci",
> - typhoon_set_irq, sys_map_irq, s,
> - &s->pchip.reg_mem, &s->pchip.reg_io,
> - 0, 64, TYPE_PCI_BUS);
> + b = pci_register_root_bus(dev, "pci",
> + typhoon_set_irq, sys_map_irq, s,
> + &s->pchip.reg_mem, &s->pchip.reg_io,
> + 0, 64, TYPE_PCI_BUS);
> phb->bus = b;
> qdev_init_nofail(dev);
>
> diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
> index 5a9dad9aae..a9c222a967 100644
> --- a/hw/mips/gt64xxx_pci.c
> +++ b/hw/mips/gt64xxx_pci.c
> @@ -1171,12 +1171,12 @@ PCIBus *gt64120_register(qemu_irq *pic)
> phb = PCI_HOST_BRIDGE(dev);
> memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX);
> address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem");
> - phb->bus = pci_register_bus(dev, "pci",
> - gt64120_pci_set_irq, gt64120_pci_map_irq,
> - pic,
> - &d->pci0_mem,
> - get_system_io(),
> - PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(dev, "pci",
> + gt64120_pci_set_irq, gt64120_pci_map_irq,
> + pic,
> + &d->pci0_mem,
> + get_system_io(),
> + PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
> qdev_init_nofail(dev);
> memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000);
>
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index 8c8ac737ad..b2fa829e29 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -230,9 +230,9 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
>
> ds = qdev_create(NULL, TYPE_PXB_HOST);
> if (pcie) {
> - bus = pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> + bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> } else {
> - bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
> + bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
> bds = qdev_create(BUS(bus), "pci-bridge");
> bds->id = dev_name;
> qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
> diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
> index 64025cd8cc..1df998443d 100644
> --- a/hw/pci-host/apb.c
> +++ b/hw/pci-host/apb.c
> @@ -714,11 +714,11 @@ PCIBus *pci_apb_init(hwaddr special_base,
> dev = qdev_create(NULL, TYPE_APB);
> d = APB_DEVICE(dev);
> phb = PCI_HOST_BRIDGE(dev);
> - phb->bus = pci_register_bus(DEVICE(phb), "pci",
> - pci_apb_set_irq, pci_apb_map_irq, d,
> - &d->pci_mmio,
> - &d->pci_ioport,
> - 0, 32, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(DEVICE(phb), "pci",
> + pci_apb_set_irq, pci_apb_map_irq, d,
> + &d->pci_mmio,
> + &d->pci_ioport,
> + 0, 32, TYPE_PCI_BUS);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> /* apb_config */
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 9f61e27edc..f08593feab 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -714,10 +714,10 @@ static int bonito_pcihost_initfn(SysBusDevice *dev)
> {
> PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>
> - phb->bus = pci_register_bus(DEVICE(dev), "pci",
> - pci_bonito_set_irq, pci_bonito_map_irq, dev,
> - get_system_memory(), get_system_io(),
> - 0x28, 32, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
> + pci_bonito_set_irq, pci_bonito_map_irq,
> + dev, get_system_memory(), get_system_io(),
> + 0x28, 32, TYPE_PCI_BUS);
>
> return 0;
> }
> diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
> index edf305b1fd..2583b151a4 100644
> --- a/hw/pci-host/gpex.c
> +++ b/hw/pci-host/gpex.c
> @@ -89,9 +89,9 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
> s->irq_num[i] = -1;
> }
>
> - pci->bus = pci_register_bus(dev, "pcie.0", gpex_set_irq,
> - pci_swizzle_map_irq_fn, s, &s->io_mmio,
> - &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
> + pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
> + pci_swizzle_map_irq_fn, s, &s->io_mmio,
> + &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
>
> qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
> pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
> diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
> index 38cd279b6b..3caf1ccb37 100644
> --- a/hw/pci-host/grackle.c
> +++ b/hw/pci-host/grackle.c
> @@ -82,13 +82,13 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> &d->pci_hole);
>
> - phb->bus = pci_register_bus(dev, NULL,
> - pci_grackle_set_irq,
> - pci_grackle_map_irq,
> - pic,
> - &d->pci_mmio,
> - address_space_io,
> - 0, 4, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(dev, NULL,
> + pci_grackle_set_irq,
> + pci_grackle_map_irq,
> + pic,
> + &d->pci_mmio,
> + address_space_io,
> + 0, 4, TYPE_PCI_BUS);
>
> pci_create_simple(phb->bus, 0, "grackle");
> qdev_init_nofail(dev);
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index a684a7cca9..cf9070186c 100644
> --- a/hw/pci-host/piix.c
> +++ b/hw/pci-host/piix.c
> @@ -361,8 +361,8 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
>
> dev = qdev_create(NULL, host_type);
> s = PCI_HOST_BRIDGE(dev);
> - b = pci_bus_new(dev, NULL, pci_address_space,
> - address_space_io, 0, TYPE_PCI_BUS);
> + b = pci_root_bus_new(dev, NULL, pci_address_space,
> + address_space_io, 0, TYPE_PCI_BUS);
> s->bus = b;
> object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL);
> qdev_init_nofail(dev);
> diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
> index 39cd24464d..67edbf744c 100644
> --- a/hw/pci-host/ppce500.c
> +++ b/hw/pci-host/ppce500.c
> @@ -465,9 +465,9 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
> /* PIO lives at the bottom of our bus space */
> memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2);
>
> - b = pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
> - mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
> - PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
> + b = pci_register_root_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
> + mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
> + PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
> h->bus = b;
>
> /* Set up PCI view of memory */
> diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
> index 92eed0f3e1..01f67f9db1 100644
> --- a/hw/pci-host/prep.c
> +++ b/hw/pci-host/prep.c
> @@ -269,8 +269,8 @@ static void raven_pcihost_initfn(Object *obj)
> memory_region_add_subregion_overlap(address_space_mem, 0x80000000,
> &s->pci_io_non_contiguous, 1);
> memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory);
> - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
> - &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
> + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
> + &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
>
> /* Bus master address space */
> memory_region_init(&s->bm, obj, "bm-raven", UINT32_MAX);
> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> index 6cb9a8d121..a36a1195e4 100644
> --- a/hw/pci-host/q35.c
> +++ b/hw/pci-host/q35.c
> @@ -51,9 +51,10 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
> sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
> sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
>
> - pci->bus = pci_bus_new(DEVICE(s), "pcie.0",
> - s->mch.pci_address_space, s->mch.address_space_io,
> - 0, TYPE_PCIE_BUS);
> + pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0",
> + s->mch.pci_address_space,
> + s->mch.address_space_io,
> + 0, TYPE_PCIE_BUS);
> PC_MACHINE(qdev_get_machine())->bus = pci->bus;
> qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus));
> qdev_init_nofail(DEVICE(&s->mch));
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index ea5c265718..5d8ccaa711 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -233,12 +233,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> &d->pci_hole);
>
> - h->bus = pci_register_bus(dev, NULL,
> - pci_unin_set_irq, pci_unin_map_irq,
> - pic,
> - &d->pci_mmio,
> - address_space_io,
> - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> + h->bus = pci_register_root_bus(dev, NULL,
> + pci_unin_set_irq, pci_unin_map_irq,
> + pic,
> + &d->pci_mmio,
> + address_space_io,
> + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
>
> #if 0
> pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north");
> @@ -299,12 +299,12 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> &d->pci_hole);
>
> - h->bus = pci_register_bus(dev, NULL,
> - pci_unin_set_irq, pci_unin_map_irq,
> - pic,
> - &d->pci_mmio,
> - address_space_io,
> - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> + h->bus = pci_register_root_bus(dev, NULL,
> + pci_unin_set_irq, pci_unin_map_irq,
> + pic,
> + &d->pci_mmio,
> + address_space_io,
> + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
>
> sysbus_mmio_map(s, 0, 0xf0800000);
> sysbus_mmio_map(s, 1, 0xf0c00000);
> diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
> index 6394a520fc..8803ada925 100644
> --- a/hw/pci-host/versatile.c
> +++ b/hw/pci-host/versatile.c
> @@ -399,9 +399,9 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
> memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32);
> memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32);
>
> - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
> - &s->pci_mem_space, &s->pci_io_space,
> - PCI_DEVFN(11, 0), TYPE_PCI_BUS);
> + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
> + &s->pci_mem_space, &s->pci_io_space,
> + PCI_DEVFN(11, 0), TYPE_PCI_BUS);
> h->bus = &s->pci_bus;
>
> object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST);
> diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
> index 7659253090..d2f88d11dd 100644
> --- a/hw/pci-host/xilinx-pcie.c
> +++ b/hw/pci-host/xilinx-pcie.c
> @@ -129,9 +129,9 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp)
> sysbus_init_mmio(sbd, &pex->mmio);
> sysbus_init_mmio(sbd, &s->mmio);
>
> - pci->bus = pci_register_bus(dev, s->name, xilinx_pcie_set_irq,
> - pci_swizzle_map_irq_fn, s, &s->mmio,
> - &s->io, 0, 4, TYPE_PCIE_BUS);
> + pci->bus = pci_register_root_bus(dev, s->name, xilinx_pcie_set_irq,
> + pci_swizzle_map_irq_fn, s, &s->mmio,
> + &s->io, 0, 4, TYPE_PCIE_BUS);
>
> qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus));
> qdev_init_nofail(DEVICE(&s->root));
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index b2d139bd9a..232e7dacf8 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -376,10 +376,10 @@ const char *pci_root_bus_path(PCIDevice *dev)
> return rootbus->qbus.name;
> }
>
> -static void pci_bus_init(PCIBus *bus, DeviceState *parent,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min)
> +static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min)
> {
> assert(PCI_FUNC(devfn_min) == 0);
> bus->devfn_min = devfn_min;
> @@ -403,25 +403,27 @@ bool pci_bus_is_root(PCIBus *bus)
> return PCI_BUS_GET_CLASS(bus)->is_root(bus);
> }
>
> -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> - const char *name,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, const char *typename)
> +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> + const char *name,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, const char *typename)
> {
> qbus_create_inplace(bus, bus_size, typename, parent, name);
> - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
> + pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
> + devfn_min);
> }
>
> -PCIBus *pci_bus_new(DeviceState *parent, const char *name,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, const char *typename)
> +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, const char *typename)
> {
> PCIBus *bus;
>
> bus = PCI_BUS(qbus_create(typename, parent, name));
> - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
> + pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
> + devfn_min);
> return bus;
> }
>
> @@ -435,17 +437,18 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> bus->irq_count = g_malloc0(nirq * sizeof(bus->irq_count[0]));
> }
>
> -PCIBus *pci_register_bus(DeviceState *parent, const char *name,
> - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> - void *irq_opaque,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, int nirq, const char *typename)
> +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
> + pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> + void *irq_opaque,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, int nirq,
> + const char *typename)
> {
> PCIBus *bus;
>
> - bus = pci_bus_new(parent, name, address_space_mem,
> - address_space_io, devfn_min, typename);
> + bus = pci_root_bus_new(parent, name, address_space_mem,
> + address_space_io, devfn_min, typename);
> pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq);
> return bus;
> }
> diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
> index 4765dcecca..b7642bac01 100644
> --- a/hw/ppc/ppc4xx_pci.c
> +++ b/hw/ppc/ppc4xx_pci.c
> @@ -314,9 +314,9 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev)
> sysbus_init_irq(dev, &s->irq[i]);
> }
>
> - b = pci_register_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
> - ppc4xx_pci_map_irq, s->irq, get_system_memory(),
> - get_system_io(), 0, 4, TYPE_PCI_BUS);
> + b = pci_register_root_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
> + ppc4xx_pci_map_irq, s->irq, get_system_memory(),
> + get_system_io(), 0, 4, TYPE_PCI_BUS);
> h->bus = b;
>
> pci_create_simple(b, 0, "ppc4xx-host-bridge");
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 5a3122a9f9..9262682116 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -1621,10 +1621,10 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
> memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
> &sphb->iowindow);
>
> - bus = pci_register_bus(dev, NULL,
> - pci_spapr_set_irq, pci_spapr_map_irq, sphb,
> - &sphb->memspace, &sphb->iospace,
> - PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
> + bus = pci_register_root_bus(dev, NULL,
> + pci_spapr_set_irq, pci_spapr_map_irq, sphb,
> + &sphb->memspace, &sphb->iospace,
> + PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
> phb->bus = bus;
> qbus_set_hotplug_handler(BUS(phb->bus), DEVICE(sphb), NULL);
>
> diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
> index 2b1e1409bf..347329dd50 100644
> --- a/hw/s390x/s390-pci-bus.c
> +++ b/hw/s390x/s390-pci-bus.c
> @@ -554,10 +554,10 @@ static int s390_pcihost_init(SysBusDevice *dev)
>
> DPRINTF("host_init\n");
>
> - b = pci_register_bus(DEVICE(dev), NULL,
> - s390_pci_set_irq, s390_pci_map_irq, NULL,
> - get_system_memory(), get_system_io(), 0, 64,
> - TYPE_PCI_BUS);
> + b = pci_register_root_bus(DEVICE(dev), NULL,
> + s390_pci_set_irq, s390_pci_map_irq, NULL,
> + get_system_memory(), get_system_io(), 0, 64,
> + TYPE_PCI_BUS);
> pci_setup_iommu(b, s390_pci_dma_iommu, s);
>
> bus = BUS(b);
> diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c
> index cbb01af57f..4ec2e35500 100644
> --- a/hw/sh4/sh_pci.c
> +++ b/hw/sh4/sh_pci.c
> @@ -131,12 +131,12 @@ static int sh_pci_device_init(SysBusDevice *dev)
> for (i = 0; i < 4; i++) {
> sysbus_init_irq(dev, &s->irq[i]);
> }
> - phb->bus = pci_register_bus(DEVICE(dev), "pci",
> - sh_pci_set_irq, sh_pci_map_irq,
> - s->irq,
> - get_system_memory(),
> - get_system_io(),
> - PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
> + sh_pci_set_irq, sh_pci_map_irq,
> + s->irq,
> + get_system_memory(),
> + get_system_io(),
> + PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
> memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s,
> "sh_pci", 0x224);
> memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2",
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 8d02a0a383..870ebcfd4b 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -400,26 +400,27 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
>
> bool pci_bus_is_express(PCIBus *bus);
> bool pci_bus_is_root(PCIBus *bus);
> -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> - const char *name,
> +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> + const char *name,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, const char *typename);
> +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
> MemoryRegion *address_space_mem,
> MemoryRegion *address_space_io,
> uint8_t devfn_min, const char *typename);
> -PCIBus *pci_bus_new(DeviceState *parent, const char *name,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, const char *typename);
> void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> void *irq_opaque, int nirq);
> int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
> /* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
> int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin);
> -PCIBus *pci_register_bus(DeviceState *parent, const char *name,
> - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> - void *irq_opaque,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, int nirq, const char *typename);
> +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
> + pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> + void *irq_opaque,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, int nirq,
> + const char *typename);
> void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn);
> PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin);
> bool pci_intx_route_changed(PCIINTxRoute *old, PCIINTxRoute *new);
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-11-29 9:18 ` Fam Zheng
@ 2017-11-29 10:11 ` David Gibson
2017-12-05 4:49 ` Michael S. Tsirkin
1 sibling, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 10:11 UTC (permalink / raw)
To: Fam Zheng; +Cc: qemu-devel, ehabkost, mst, marcel, imammedo
[-- Attachment #1: Type: text/plain, Size: 797 bytes --]
On Wed, Nov 29, 2017 at 05:18:47PM +0800, Fam Zheng wrote:
> On Wed, 11/29 01:02, no-reply@patchew.org wrote:
> > /tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
>
> Hmm, the host is shared and what I have is a normal user account, so there is no
> control over disk space availability. Anyway this is completely unrelated to
> this series. Sorry for the noise.
Yeah, I'm afraid I've mostly been ignoring these build warnings,
because s390's been failing a lot for reasons unrelated to the series.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h David Gibson
@ 2017-11-29 10:33 ` Marcel Apfelbaum
2017-11-30 6:41 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 10:33 UTC (permalink / raw)
To: David Gibson, Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov
Cc: qemu-devel
On 29/11/2017 10:46, David Gibson wrote:
> include/hw/pci/pci_bus.h contains several data structures related to PCI
> bridges that aren't needed by most users of pci_bus.h. We already have
> a pci_bridge.h, so move them there.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> include/hw/pci-host/xilinx-pcie.h | 2 +-
> include/hw/pci/pci_bridge.h | 48 ++++++++++++++++++++++++++++++++++++
> include/hw/pci/pci_bus.h | 51 ++-------------------------------------
> 3 files changed, 51 insertions(+), 50 deletions(-)
>
> diff --git a/include/hw/pci-host/xilinx-pcie.h b/include/hw/pci-host/xilinx-pcie.h
> index bec66b27c5..74c04dc9bb 100644
> --- a/include/hw/pci-host/xilinx-pcie.h
> +++ b/include/hw/pci-host/xilinx-pcie.h
> @@ -23,7 +23,7 @@
> #include "hw/hw.h"
> #include "hw/sysbus.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> +#include "hw/pci/pci_bridge.h"
> #include "hw/pci/pcie_host.h"
>
> #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host"
> diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
> index 1acadc2c15..9b44ffd22a 100644
> --- a/include/hw/pci/pci_bridge.h
> +++ b/include/hw/pci/pci_bridge.h
> @@ -27,6 +27,54 @@
> #define QEMU_PCI_BRIDGE_H
>
> #include "hw/pci/pci.h"
> +#include "hw/pci/pci_bus.h"
> +
> +typedef struct PCIBridgeWindows PCIBridgeWindows;
> +
> +/*
> + * Aliases for each of the address space windows that the bridge
> + * can forward. Mapped into the bridge's parent's address space,
> + * as subregions.
> + */
> +struct PCIBridgeWindows {
> + MemoryRegion alias_pref_mem;
> + MemoryRegion alias_mem;
> + MemoryRegion alias_io;
> + /*
> + * When bridge control VGA forwarding is enabled, bridges will
> + * provide positive decode on the PCI VGA defined I/O port and
> + * MMIO ranges. When enabled forwarding is only qualified on the
> + * I/O and memory enable bits in the bridge command register.
> + */
> + MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS];
> +};
> +
> +#define TYPE_PCI_BRIDGE "base-pci-bridge"
> +#define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE)
> +
> +struct PCIBridge {
> + /*< private >*/
> + PCIDevice parent_obj;
> + /*< public >*/
> +
> + /* private member */
> + PCIBus sec_bus;
> + /*
> + * Memory regions for the bridge's address spaces. These regions are not
> + * directly added to system_memory/system_io or its descendants.
> + * Bridge's secondary bus points to these, so that devices
> + * under the bridge see these regions as its address spaces.
> + * The regions are as large as the entire address space -
> + * they don't take into account any windows.
> + */
> + MemoryRegion address_space_mem;
> + MemoryRegion address_space_io;
> +
> + PCIBridgeWindows *windows;
> +
> + pci_map_irq_fn map_irq;
> + const char *bus_name;
> +};
>
> #define PCI_BRIDGE_DEV_PROP_CHASSIS_NR "chassis_nr"
> #define PCI_BRIDGE_DEV_PROP_MSI "msi"
> diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
> index bc34fd0017..b7da8f555b 100644
> --- a/include/hw/pci/pci_bus.h
> +++ b/include/hw/pci/pci_bus.h
> @@ -2,10 +2,10 @@
> #define QEMU_PCI_BUS_H
>
> /*
> - * PCI Bus and Bridge datastructures.
> + * PCI Bus datastructures.
> *
> * Do not access the following members directly;
> - * use accessor functions in pci.h, pci_bridge.h
> + * use accessor functions in pci.h
> */
>
> typedef struct PCIBusClass {
> @@ -44,51 +44,4 @@ struct PCIBus {
> Notifier machine_done;
> };
>
> -typedef struct PCIBridgeWindows PCIBridgeWindows;
> -
> -/*
> - * Aliases for each of the address space windows that the bridge
> - * can forward. Mapped into the bridge's parent's address space,
> - * as subregions.
> - */
> -struct PCIBridgeWindows {
> - MemoryRegion alias_pref_mem;
> - MemoryRegion alias_mem;
> - MemoryRegion alias_io;
> - /*
> - * When bridge control VGA forwarding is enabled, bridges will
> - * provide positive decode on the PCI VGA defined I/O port and
> - * MMIO ranges. When enabled forwarding is only qualified on the
> - * I/O and memory enable bits in the bridge command register.
> - */
> - MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS];
> -};
> -
> -#define TYPE_PCI_BRIDGE "base-pci-bridge"
> -#define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE)
> -
> -struct PCIBridge {
> - /*< private >*/
> - PCIDevice parent_obj;
> - /*< public >*/
> -
> - /* private member */
> - PCIBus sec_bus;
> - /*
> - * Memory regions for the bridge's address spaces. These regions are not
> - * directly added to system_memory/system_io or its descendants.
> - * Bridge's secondary bus points to these, so that devices
> - * under the bridge see these regions as its address spaces.
> - * The regions are as large as the entire address space -
> - * they don't take into account any windows.
> - */
> - MemoryRegion address_space_mem;
> - MemoryRegion address_space_io;
> -
> - PCIBridgeWindows *windows;
> -
> - pci_map_irq_fn map_irq;
> - const char *bus_name;
> -};
> -
> #endif /* QEMU_PCI_BUS_H */
>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Thanks,
Marcel
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h David Gibson
@ 2017-11-29 10:38 ` Marcel Apfelbaum
2017-11-30 4:02 ` David Gibson
0 siblings, 1 reply; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 10:38 UTC (permalink / raw)
To: David Gibson, Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov
Cc: qemu-devel
On 29/11/2017 10:46, David Gibson wrote:
> include/hw/pci/pci_bus.h is now very small and can only safely be included
> after hw/pci/pci.h. So, just fold it into pci.h.
>
I don't get the benefit from merging the header files.
I would go the other way around and find stuff specific
to pci_bus and add it there, like the pci_bus_new*
you touched in the prev patch.
Maybe if *all* code files requiring pci.h would automatically
need pci_bus.h would make sense, but I didn't check that.
Thanks,
Marcel
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/acpi/pcihp.c | 1 -
> hw/i386/acpi-build.c | 1 -
> hw/i386/amd_iommu.h | 1 -
> hw/i386/intel_iommu.c | 1 -
> hw/i386/pc.c | 1 -
> hw/isa/lpc_ich9.c | 1 -
> hw/pci-bridge/dec.c | 1 -
> hw/pci-bridge/pci_bridge_dev.c | 1 -
> hw/pci-bridge/pci_expander_bridge.c | 1 -
> hw/pci-bridge/pcie_pci_bridge.c | 1 -
> hw/pci-host/apb.c | 1 -
> hw/pci-host/prep.c | 1 -
> hw/pci-host/versatile.c | 1 -
> hw/pci/pci.c | 1 -
> hw/pci/pci_bridge.c | 1 -
> hw/pci/pci_host.c | 1 -
> hw/pci/pcie.c | 1 -
> hw/pci/pcie_aer.c | 1 -
> hw/pci/shpc.c | 1 -
> hw/ppc/spapr_pci.c | 1 -
> hw/s390x/s390-pci-bus.c | 1 -
> hw/sparc64/sun4u.c | 1 -
> include/hw/i386/ich9.h | 1 -
> include/hw/pci/pci.h | 44 ++++++++++++++++++++++++++++++++--
> include/hw/pci/pci_bridge.h | 1 -
> include/hw/pci/pci_bus.h | 47 -------------------------------------
> include/hw/pci/pcie_port.h | 1 -
> 27 files changed, 42 insertions(+), 74 deletions(-)
> delete mode 100644 include/hw/pci/pci_bus.h
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 7da51c0569..0da905ab3a 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -34,7 +34,6 @@
> #include "sysemu/sysemu.h"
> #include "exec/ioport.h"
> #include "exec/address-spaces.h"
> -#include "hw/pci/pci_bus.h"
> #include "qapi/error.h"
> #include "qom/qom-qobject.h"
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 73519ab3ac..bda5ef1307 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -51,7 +51,6 @@
> #include "hw/acpi/piix4.h"
> #include "hw/acpi/pcihp.h"
> #include "hw/i386/ich9.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci-host/q35.h"
> #include "hw/i386/x86-iommu.h"
>
> diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
> index d370ae3549..b587f6b49f 100644
> --- a/hw/i386/amd_iommu.h
> +++ b/hw/i386/amd_iommu.h
> @@ -27,7 +27,6 @@
> #include "hw/sysbus.h"
> #include "sysemu/dma.h"
> #include "hw/i386/pc.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/i386/x86-iommu.h"
>
> /* Capability registers */
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 3a5bb0bc2e..3ef4bfbe05 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -26,7 +26,6 @@
> #include "exec/address-spaces.h"
> #include "intel_iommu_internal.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/i386/pc.h"
> #include "hw/i386/apic-msidef.h"
> #include "hw/boards.h"
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index c3afe5b7f1..5380a004be 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -31,7 +31,6 @@
> #include "hw/block/fdc.h"
> #include "hw/ide.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/nvram/fw_cfg.h"
> #include "hw/timer/hpet.h"
> #include "hw/smbios/smbios.h"
> diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
> index ec3c9f7d0b..e77a4abb15 100644
> --- a/hw/isa/lpc_ich9.c
> +++ b/hw/isa/lpc_ich9.c
> @@ -44,7 +44,6 @@
> #include "hw/i386/ich9.h"
> #include "hw/acpi/acpi.h"
> #include "hw/acpi/ich9.h"
> -#include "hw/pci/pci_bus.h"
> #include "exec/address-spaces.h"
> #include "sysemu/sysemu.h"
> #include "qom/cpu.h"
> diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c
> index 84492d5e5f..ae4b9697ed 100644
> --- a/hw/pci-bridge/dec.c
> +++ b/hw/pci-bridge/dec.c
> @@ -29,7 +29,6 @@
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_host.h"
> #include "hw/pci/pci_bridge.h"
> -#include "hw/pci/pci_bus.h"
>
> /* debug DEC */
> //#define DEBUG_DEC
> diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
> index d56f6638c2..bc3c8d9f57 100644
> --- a/hw/pci-bridge/pci_bridge_dev.c
> +++ b/hw/pci-bridge/pci_bridge_dev.c
> @@ -27,7 +27,6 @@
> #include "hw/pci/shpc.h"
> #include "hw/pci/slotid_cap.h"
> #include "exec/memory.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/hotplug.h"
>
> #define TYPE_PCI_BRIDGE_DEV "pci-bridge"
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index b2fa829e29..5652cf06e9 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -13,7 +13,6 @@
> #include "qemu/osdep.h"
> #include "qapi/error.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_host.h"
> #include "hw/pci/pci_bridge.h"
> #include "hw/i386/pc.h"
> diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c
> index a4d827c99d..f609a4fb32 100644
> --- a/hw/pci-bridge/pcie_pci_bridge.c
> +++ b/hw/pci-bridge/pcie_pci_bridge.c
> @@ -10,7 +10,6 @@
> #include "qemu/osdep.h"
> #include "qapi/error.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_bridge.h"
> #include "hw/pci/msi.h"
> #include "hw/pci/shpc.h"
> diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
> index 1df998443d..bf7c7b0079 100644
> --- a/hw/pci-host/apb.c
> +++ b/hw/pci-host/apb.c
> @@ -32,7 +32,6 @@
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_host.h"
> #include "hw/pci/pci_bridge.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci-host/apb.h"
> #include "sysemu/sysemu.h"
> #include "exec/address-spaces.h"
> diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
> index 01f67f9db1..56920914c6 100644
> --- a/hw/pci-host/prep.c
> +++ b/hw/pci-host/prep.c
> @@ -27,7 +27,6 @@
> #include "qapi/error.h"
> #include "hw/hw.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_host.h"
> #include "hw/i386/pc.h"
> #include "hw/loader.h"
> diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
> index 8803ada925..b5bf4dce55 100644
> --- a/hw/pci-host/versatile.c
> +++ b/hw/pci-host/versatile.c
> @@ -10,7 +10,6 @@
> #include "qemu/osdep.h"
> #include "hw/sysbus.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_host.h"
> #include "exec/address-spaces.h"
> #include "qemu/log.h"
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index 232e7dacf8..6e11dc2fec 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -25,7 +25,6 @@
> #include "hw/hw.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_bridge.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_host.h"
> #include "monitor/monitor.h"
> #include "net/net.h"
> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
> index a47d257149..6a5072fcc6 100644
> --- a/hw/pci/pci_bridge.c
> +++ b/hw/pci/pci_bridge.c
> @@ -31,7 +31,6 @@
>
> #include "qemu/osdep.h"
> #include "hw/pci/pci_bridge.h"
> -#include "hw/pci/pci_bus.h"
> #include "qemu/range.h"
> #include "qapi/error.h"
>
> diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
> index 5eaa935cb5..3a26880f18 100644
> --- a/hw/pci/pci_host.c
> +++ b/hw/pci/pci_host.c
> @@ -21,7 +21,6 @@
> #include "qemu/osdep.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_host.h"
> -#include "hw/pci/pci_bus.h"
> #include "trace.h"
>
> /* debug PCI */
> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
> index 32191f2a55..28ba4a0a72 100644
> --- a/hw/pci/pcie.c
> +++ b/hw/pci/pcie.c
> @@ -25,7 +25,6 @@
> #include "hw/pci/pcie.h"
> #include "hw/pci/msix.h"
> #include "hw/pci/msi.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pcie_regs.h"
> #include "qemu/range.h"
>
> diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> index 97200742b4..171955195f 100644
> --- a/hw/pci/pcie_aer.c
> +++ b/hw/pci/pcie_aer.c
> @@ -27,7 +27,6 @@
> #include "hw/pci/pcie.h"
> #include "hw/pci/msix.h"
> #include "hw/pci/msi.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pcie_regs.h"
> #include "qapi/error.h"
>
> diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c
> index 69fc14b218..7d25e5dc78 100644
> --- a/hw/pci/shpc.c
> +++ b/hw/pci/shpc.c
> @@ -5,7 +5,6 @@
> #include "qemu/error-report.h"
> #include "hw/pci/shpc.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/msi.h"
>
> /* TODO: model power only and disabled slot states. */
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 9262682116..4742cad64c 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -42,7 +42,6 @@
> #include "qapi/qmp/qerror.h"
> #include "hw/ppc/fdt.h"
> #include "hw/pci/pci_bridge.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_ids.h"
> #include "hw/ppc/spapr_drc.h"
> #include "sysemu/device_tree.h"
> diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
> index 347329dd50..3a8894a36c 100644
> --- a/hw/s390x/s390-pci-bus.c
> +++ b/hw/s390x/s390-pci-bus.c
> @@ -18,7 +18,6 @@
> #include "cpu.h"
> #include "s390-pci-bus.h"
> #include "s390-pci-inst.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_bridge.h"
> #include "hw/pci/msi.h"
> #include "qemu/error-report.h"
> diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
> index 1672f256e7..078414388b 100644
> --- a/hw/sparc64/sun4u.c
> +++ b/hw/sparc64/sun4u.c
> @@ -27,7 +27,6 @@
> #include "cpu.h"
> #include "hw/hw.h"
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
> #include "hw/pci-host/apb.h"
> #include "hw/i386/pc.h"
> #include "hw/char/serial.h"
> diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
> index 673d13d28f..c613f85b11 100644
> --- a/include/hw/i386/ich9.h
> +++ b/include/hw/i386/ich9.h
> @@ -12,7 +12,6 @@
> #include "hw/pci/pci_bridge.h"
> #include "hw/acpi/acpi.h"
> #include "hw/acpi/ich9.h"
> -#include "hw/pci/pci_bus.h"
>
> void ich9_lpc_set_irq(void *opaque, int irq_num, int level);
> int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 870ebcfd4b..77d92a3dc4 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -392,12 +392,54 @@ typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level);
> typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
> typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
>
> +typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
> +
> +/*
> + * PCI Bus datastructures.
> + */
> +
> #define TYPE_PCI_BUS "PCI"
> #define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS)
> #define PCI_BUS_CLASS(klass) OBJECT_CLASS_CHECK(PCIBusClass, (klass), TYPE_PCI_BUS)
> #define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS)
> #define TYPE_PCIE_BUS "PCIE"
>
> +typedef struct PCIBusClass {
> + /*< private >*/
> + BusClass parent_class;
> + /*< public >*/
> +
> + bool (*is_root)(PCIBus *bus);
> + int (*bus_num)(PCIBus *bus);
> + uint16_t (*numa_node)(PCIBus *bus);
> +} PCIBusClass;
> +
> +struct PCIBus {
> + BusState qbus;
> + PCIIOMMUFunc iommu_fn;
> + void *iommu_opaque;
> + uint8_t devfn_min;
> + uint32_t slot_reserved_mask;
> + pci_set_irq_fn set_irq;
> + pci_map_irq_fn map_irq;
> + pci_route_irq_fn route_intx_to_irq;
> + void *irq_opaque;
> + PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
> + PCIDevice *parent_dev;
> + MemoryRegion *address_space_mem;
> + MemoryRegion *address_space_io;
> +
> + QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
> + QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
> +
> + /* The bus IRQ state is the logical OR of the connected devices.
> + Keep a count of the number of devices with raised IRQs. */
> + int nirq;
> + int *irq_count;
> +
> + Notifier machine_done;
> +};
> +
> bool pci_bus_is_express(PCIBus *bus);
> bool pci_bus_is_root(PCIBus *bus);
> void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> @@ -468,8 +510,6 @@ void pci_bus_get_w64_range(PCIBus *bus, Range *range);
>
> void pci_device_deassert_intx(PCIDevice *dev);
>
> -typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
> -
> AddressSpace *pci_device_iommu_address_space(PCIDevice *dev);
> void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque);
>
> diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
> index 9b44ffd22a..454bb09951 100644
> --- a/include/hw/pci/pci_bridge.h
> +++ b/include/hw/pci/pci_bridge.h
> @@ -27,7 +27,6 @@
> #define QEMU_PCI_BRIDGE_H
>
> #include "hw/pci/pci.h"
> -#include "hw/pci/pci_bus.h"
>
> typedef struct PCIBridgeWindows PCIBridgeWindows;
>
> diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
> deleted file mode 100644
> index b7da8f555b..0000000000
> --- a/include/hw/pci/pci_bus.h
> +++ /dev/null
> @@ -1,47 +0,0 @@
> -#ifndef QEMU_PCI_BUS_H
> -#define QEMU_PCI_BUS_H
> -
> -/*
> - * PCI Bus datastructures.
> - *
> - * Do not access the following members directly;
> - * use accessor functions in pci.h
> - */
> -
> -typedef struct PCIBusClass {
> - /*< private >*/
> - BusClass parent_class;
> - /*< public >*/
> -
> - bool (*is_root)(PCIBus *bus);
> - int (*bus_num)(PCIBus *bus);
> - uint16_t (*numa_node)(PCIBus *bus);
> -} PCIBusClass;
> -
> -struct PCIBus {
> - BusState qbus;
> - PCIIOMMUFunc iommu_fn;
> - void *iommu_opaque;
> - uint8_t devfn_min;
> - uint32_t slot_reserved_mask;
> - pci_set_irq_fn set_irq;
> - pci_map_irq_fn map_irq;
> - pci_route_irq_fn route_intx_to_irq;
> - void *irq_opaque;
> - PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
> - PCIDevice *parent_dev;
> - MemoryRegion *address_space_mem;
> - MemoryRegion *address_space_io;
> -
> - QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
> - QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
> -
> - /* The bus IRQ state is the logical OR of the connected devices.
> - Keep a count of the number of devices with raised IRQs. */
> - int nirq;
> - int *irq_count;
> -
> - Notifier machine_done;
> -};
> -
> -#endif /* QEMU_PCI_BUS_H */
> diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
> index 0736014bfd..bda76d79e0 100644
> --- a/include/hw/pci/pcie_port.h
> +++ b/include/hw/pci/pcie_port.h
> @@ -22,7 +22,6 @@
> #define QEMU_PCIE_PORT_H
>
> #include "hw/pci/pci_bridge.h"
> -#include "hw/pci/pci_bus.h"
>
> #define TYPE_PCIE_PORT "pcie-port"
> #define PCIE_PORT(obj) OBJECT_CHECK(PCIEPort, (obj), TYPE_PCIE_PORT)
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root()
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root() David Gibson
@ 2017-11-29 10:45 ` Marcel Apfelbaum
2017-11-29 13:12 ` David Gibson
2017-11-30 6:23 ` Peter Xu
1 sibling, 1 reply; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 10:45 UTC (permalink / raw)
To: David Gibson, Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov
Cc: qemu-devel
On 29/11/2017 10:46, David Gibson wrote:
> pci_bus_is_root() currently relies on a method in the PCIBusClass.
> But it's always known if a PCI bus is a root bus when we create it, so
> using a dynamic method is overkill.
>
> This replaces it with an IS_ROOT bit in a new flags field, which is set on
> root buses and otherwise clear. As a bonus this removes the special
> is_root logic from pci_expander_bridge, since it already creates its bus
> as a root bus.
>
I agree it makes the code simpler, I am not sure about
the enum. Why not make it a boolean field and when will need
more flags just convert it to an enum (or not)?
Thanks,
Marcel
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/pci-bridge/pci_expander_bridge.c | 6 ------
> hw/pci/pci.c | 14 ++------------
> include/hw/pci/pci.h | 12 +++++++++++-
> 3 files changed, 13 insertions(+), 19 deletions(-)
>
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index 5652cf06e9..11dfa9258e 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -65,11 +65,6 @@ static int pxb_bus_num(PCIBus *bus)
> return pxb->bus_nr;
> }
>
> -static bool pxb_is_root(PCIBus *bus)
> -{
> - return true; /* by definition */
> -}
> -
> static uint16_t pxb_bus_numa_node(PCIBus *bus)
> {
> PXBDev *pxb = convert_to_pxb(bus->parent_dev);
> @@ -82,7 +77,6 @@ static void pxb_bus_class_init(ObjectClass *class, void *data)
> PCIBusClass *pbc = PCI_BUS_CLASS(class);
>
> pbc->bus_num = pxb_bus_num;
> - pbc->is_root = pxb_is_root;
> pbc->numa_node = pxb_bus_numa_node;
> }
>
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index 6e11dc2fec..5fab7f23b3 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -126,14 +126,9 @@ static void pci_bus_unrealize(BusState *qbus, Error **errp)
> vmstate_unregister(NULL, &vmstate_pcibus, bus);
> }
>
> -static bool pcibus_is_root(PCIBus *bus)
> -{
> - return !bus->parent_dev;
> -}
> -
> static int pcibus_num(PCIBus *bus)
> {
> - if (pcibus_is_root(bus)) {
> + if (pci_bus_is_root(bus)) {
> return 0; /* pci host bridge */
> }
> return bus->parent_dev->config[PCI_SECONDARY_BUS];
> @@ -156,7 +151,6 @@ static void pci_bus_class_init(ObjectClass *klass, void *data)
> k->unrealize = pci_bus_unrealize;
> k->reset = pcibus_reset;
>
> - pbc->is_root = pcibus_is_root;
> pbc->bus_num = pcibus_num;
> pbc->numa_node = pcibus_numa_node;
> }
> @@ -385,6 +379,7 @@ static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
> bus->slot_reserved_mask = 0x0;
> bus->address_space_mem = address_space_mem;
> bus->address_space_io = address_space_io;
> + bus->flags |= PCI_BUS_IS_ROOT;
>
> /* host bridge */
> QLIST_INIT(&bus->child);
> @@ -397,11 +392,6 @@ bool pci_bus_is_express(PCIBus *bus)
> return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS);
> }
>
> -bool pci_bus_is_root(PCIBus *bus)
> -{
> - return PCI_BUS_GET_CLASS(bus)->is_root(bus);
> -}
> -
> void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> const char *name,
> MemoryRegion *address_space_mem,
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 77d92a3dc4..cbb3386207 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -404,6 +404,11 @@ typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
> #define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS)
> #define TYPE_PCIE_BUS "PCIE"
>
> +enum PCIBusFlags {
> + /* This bus is the root of a PCI domain */
> + PCI_BUS_IS_ROOT = 0x0001,
> +};
> +
> typedef struct PCIBusClass {
> /*< private >*/
> BusClass parent_class;
> @@ -416,6 +421,7 @@ typedef struct PCIBusClass {
>
> struct PCIBus {
> BusState qbus;
> + enum PCIBusFlags flags;
> PCIIOMMUFunc iommu_fn;
> void *iommu_opaque;
> uint8_t devfn_min;
> @@ -440,8 +446,12 @@ struct PCIBus {
> Notifier machine_done;
> };
>
> +static inline bool pci_bus_is_root(PCIBus *bus)
> +{
> + return !!(bus->flags & PCI_BUS_IS_ROOT);
> +}
> +
> bool pci_bus_is_express(PCIBus *bus);
> -bool pci_bus_is_root(PCIBus *bus);
> void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> const char *name,
> MemoryRegion *address_space_mem,
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper David Gibson
@ 2017-11-29 10:48 ` Marcel Apfelbaum
2017-11-30 6:42 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 10:48 UTC (permalink / raw)
To: David Gibson, Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov
Cc: qemu-devel
On 29/11/2017 10:46, David Gibson wrote:
> A fair proportion of the users of pci_bus_num() want to get the bus
> number on a specific device, so first have to look up the bus from the
> device then call it. This adds a helper to do that (since we're going
> to make looking up the bus slightly more verbose).
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/pci/pcie_aer.c | 2 +-
> hw/s390x/s390-pci-bus.c | 2 +-
> hw/scsi/megasas.c | 2 +-
> hw/scsi/mptsas.c | 2 +-
> hw/xen/xen_pt.c | 6 +++---
> include/hw/pci/pci.h | 5 +++++
> include/hw/xen/xen_common.h | 8 ++++----
> 7 files changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> index 171955195f..7688293edc 100644
> --- a/hw/pci/pcie_aer.c
> +++ b/hw/pci/pcie_aer.c
> @@ -1024,7 +1024,7 @@ static int do_pcie_aer_inject_error(Monitor *mon,
> }
> details->id = id;
> details->root_bus = pci_root_bus_path(dev);
> - details->bus = pci_bus_num(dev->bus);
> + details->bus = pci_dev_bus_num(dev);
> details->devfn = dev->devfn;
>
> return 0;
> diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
> index 3a8894a36c..1aecada271 100644
> --- a/hw/s390x/s390-pci-bus.c
> +++ b/hw/s390x/s390-pci-bus.c
> @@ -691,7 +691,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
> /* In the case the PCI device does not define an id */
> /* we generate one based on the PCI address */
> dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
> - pci_bus_num(pdev->bus),
> + pci_dev_bus_num(pdev),
> PCI_SLOT(pdev->devfn),
> PCI_FUNC(pdev->devfn));
> }
> diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
> index d5eae6239a..3e38e9e8aa 100644
> --- a/hw/scsi/megasas.c
> +++ b/hw/scsi/megasas.c
> @@ -2372,7 +2372,7 @@ static void megasas_scsi_realize(PCIDevice *dev, Error **errp)
> if (!s->sas_addr) {
> s->sas_addr = ((NAA_LOCALLY_ASSIGNED_ID << 24) |
> IEEE_COMPANY_LOCALLY_ASSIGNED) << 36;
> - s->sas_addr |= (pci_bus_num(dev->bus) << 16);
> + s->sas_addr |= (pci_dev_bus_num(dev) << 16);
> s->sas_addr |= (PCI_SLOT(dev->devfn) << 8);
> s->sas_addr |= PCI_FUNC(dev->devfn);
> }
> diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c
> index f6db1b0103..3f061f3f68 100644
> --- a/hw/scsi/mptsas.c
> +++ b/hw/scsi/mptsas.c
> @@ -1312,7 +1312,7 @@ static void mptsas_scsi_realize(PCIDevice *dev, Error **errp)
> if (!s->sas_addr) {
> s->sas_addr = ((NAA_LOCALLY_ASSIGNED_ID << 24) |
> IEEE_COMPANY_LOCALLY_ASSIGNED) << 36;
> - s->sas_addr |= (pci_bus_num(dev->bus) << 16);
> + s->sas_addr |= (pci_dev_bus_num(dev) << 16);
> s->sas_addr |= (PCI_SLOT(dev->devfn) << 8);
> s->sas_addr |= PCI_FUNC(dev->devfn);
> }
> diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
> index 9bba717708..6236f0c391 100644
> --- a/hw/xen/xen_pt.c
> +++ b/hw/xen/xen_pt.c
> @@ -73,7 +73,7 @@ void xen_pt_log(const PCIDevice *d, const char *f, ...)
>
> va_start(ap, f);
> if (d) {
> - fprintf(stderr, "[%02x:%02x.%d] ", pci_bus_num(d->bus),
> + fprintf(stderr, "[%02x:%02x.%d] ", pci_dev_bus_num(d),
> PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
> }
> vfprintf(stderr, f, ap);
> @@ -711,7 +711,7 @@ static void xen_pt_destroy(PCIDevice *d) {
> intx = xen_pt_pci_intx(s);
> rc = xc_domain_unbind_pt_irq(xen_xc, xen_domid, machine_irq,
> PT_IRQ_TYPE_PCI,
> - pci_bus_num(d->bus),
> + pci_dev_bus_num(d),
> PCI_SLOT(s->dev.devfn),
> intx,
> 0 /* isa_irq */);
> @@ -867,7 +867,7 @@ static void xen_pt_realize(PCIDevice *d, Error **errp)
> uint8_t e_intx = xen_pt_pci_intx(s);
>
> rc = xc_domain_bind_pt_pci_irq(xen_xc, xen_domid, machine_irq,
> - pci_bus_num(d->bus),
> + pci_dev_bus_num(d),
> PCI_SLOT(d->devfn),
> e_intx);
> if (rc < 0) {
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index cbb3386207..a490a2c7d4 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -488,6 +488,11 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
> PCIDevice *pci_vga_init(PCIBus *bus);
>
> int pci_bus_num(PCIBus *s);
> +static inline int pci_dev_bus_num(const PCIDevice *dev)
> +{
> + return pci_bus_num(dev->bus);
> +}
> +
> int pci_bus_numa_node(PCIBus *bus);
> void pci_for_each_device(PCIBus *bus, int bus_num,
> void (*fn)(PCIBus *bus, PCIDevice *d, void *opaque),
> diff --git a/include/hw/xen/xen_common.h b/include/hw/xen/xen_common.h
> index 86c7f26106..64a978e4e0 100644
> --- a/include/hw/xen/xen_common.h
> +++ b/include/hw/xen/xen_common.h
> @@ -542,10 +542,10 @@ static inline void xen_map_pcidev(domid_t dom,
> return;
> }
>
> - trace_xen_map_pcidev(ioservid, pci_bus_num(pci_dev->bus),
> + trace_xen_map_pcidev(ioservid, pci_dev_bus_num(pci_dev),
> PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
> xendevicemodel_map_pcidev_to_ioreq_server(xen_dmod, dom, ioservid, 0,
> - pci_bus_num(pci_dev->bus),
> + pci_dev_bus_num(pci_dev),
> PCI_SLOT(pci_dev->devfn),
> PCI_FUNC(pci_dev->devfn));
> }
> @@ -558,10 +558,10 @@ static inline void xen_unmap_pcidev(domid_t dom,
> return;
> }
>
> - trace_xen_unmap_pcidev(ioservid, pci_bus_num(pci_dev->bus),
> + trace_xen_unmap_pcidev(ioservid, pci_dev_bus_num(pci_dev),
> PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
> xendevicemodel_unmap_pcidev_from_ioreq_server(xen_dmod, dom, ioservid, 0,
> - pci_bus_num(pci_dev->bus),
> + pci_dev_bus_num(pci_dev),
> PCI_SLOT(pci_dev->devfn),
> PCI_FUNC(pci_dev->devfn));
> }
>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Thanks,
Marcel
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer David Gibson
@ 2017-11-29 10:54 ` Marcel Apfelbaum
2017-11-29 11:41 ` Eduardo Habkost
2017-11-30 6:31 ` Peter Xu
1 sibling, 1 reply; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 10:54 UTC (permalink / raw)
To: David Gibson, Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov
Cc: qemu-devel
On 29/11/2017 10:46, David Gibson wrote:
> The bus pointer in PCIDevice is basically redundant with QOM information.
> It's always initialized to the qdev_get_parent_bus(), the only difference
> is the type.
>
> Therefore this patch eliminates the field, instead creating a pci_get_bus()
> helper to do the type mangling to derive it conveniently from the QOM
> Device object underneath.
>
Hi David,
I personally don't see why the caching of the bus bothers you.
It makes the code a little easier to read, but indeed is a duplication
of data; let's see what Michael has to say, is a matter of
taste I suppose.
Thanks,
Marcel
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/acpi/pcihp.c | 4 +-
> hw/acpi/piix4.c | 7 ++--
> hw/i386/xen/xen_platform.c | 12 +++---
> hw/isa/lpc_ich9.c | 10 ++---
> hw/net/vmxnet3.c | 2 +-
> hw/pci-bridge/pci_expander_bridge.c | 17 +++++----
> hw/pci-host/piix.c | 10 ++---
> hw/pci-host/versatile.c | 2 +-
> hw/pci/pci.c | 76 +++++++++++++++++++------------------
> hw/pci/pci_bridge.c | 6 +--
> hw/pci/pcie.c | 5 ++-
> hw/pci/pcie_aer.c | 2 +-
> hw/ppc/spapr_pci.c | 2 +-
> hw/s390x/s390-pci-bus.c | 8 ++--
> hw/scsi/vmw_pvscsi.c | 2 +-
> hw/usb/hcd-xhci.c | 2 +-
> hw/vfio/pci.c | 10 ++---
> hw/virtio/virtio-pci.c | 4 +-
> hw/xen/xen_pt.c | 4 +-
> include/hw/pci/pci.h | 9 +++--
> 20 files changed, 102 insertions(+), 92 deletions(-)
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 0da905ab3a..98f13722bc 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -222,7 +222,7 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
> {
> PCIDevice *pdev = PCI_DEVICE(dev);
> int slot = PCI_SLOT(pdev->devfn);
> - int bsel = acpi_pcihp_get_bsel(pdev->bus);
> + int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
> if (bsel < 0) {
> error_setg(errp, "Unsupported bus. Bus doesn't have property '"
> ACPI_PCIHP_PROP_BSEL "' set");
> @@ -245,7 +245,7 @@ void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
> {
> PCIDevice *pdev = PCI_DEVICE(dev);
> int slot = PCI_SLOT(pdev->devfn);
> - int bsel = acpi_pcihp_get_bsel(pdev->bus);
> + int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
> if (bsel < 0) {
> error_setg(errp, "Unsupported bus. Bus doesn't have property '"
> ACPI_PCIHP_PROP_BSEL "' set");
> diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
> index a0fb1ce037..8b703455b7 100644
> --- a/hw/acpi/piix4.c
> +++ b/hw/acpi/piix4.c
> @@ -460,9 +460,9 @@ static void piix4_pm_machine_ready(Notifier *n, void *opaque)
> (memory_region_present(io_as, 0x2f8) ? 0x90 : 0);
>
> if (s->use_acpi_pci_hotplug) {
> - pci_for_each_bus(d->bus, piix4_update_bus_hotplug, s);
> + pci_for_each_bus(pci_get_bus(d), piix4_update_bus_hotplug, s);
> } else {
> - piix4_update_bus_hotplug(d->bus, s);
> + piix4_update_bus_hotplug(pci_get_bus(d), s);
> }
> }
>
> @@ -535,7 +535,8 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp)
> qemu_add_machine_init_done_notifier(&s->machine_ready);
> qemu_register_reset(piix4_reset, s);
>
> - piix4_acpi_system_hot_add_init(pci_address_space_io(dev), dev->bus, s);
> + piix4_acpi_system_hot_add_init(pci_address_space_io(dev),
> + pci_get_bus(dev), s);
>
> piix4_pm_add_propeties(s);
> }
> diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c
> index 056b87de0b..9ab54834d5 100644
> --- a/hw/i386/xen/xen_platform.c
> +++ b/hw/i386/xen/xen_platform.c
> @@ -186,11 +186,11 @@ static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t v
> if (val & (UNPLUG_IDE_SCSI_DISKS | UNPLUG_AUX_IDE_DISKS |
> UNPLUG_NVME_DISKS)) {
> DPRINTF("unplug disks\n");
> - pci_unplug_disks(pci_dev->bus, val);
> + pci_unplug_disks(pci_get_bus(pci_dev), val);
> }
> if (val & UNPLUG_ALL_NICS) {
> DPRINTF("unplug nics\n");
> - pci_unplug_nics(pci_dev->bus);
> + pci_unplug_nics(pci_get_bus(pci_dev));
> }
> break;
> }
> @@ -372,17 +372,17 @@ static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
> * If VMDP was to control both disk and LAN it would use 4.
> * If it controlled just disk or just LAN, it would use 8 below.
> */
> - pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS);
> - pci_unplug_nics(pci_dev->bus);
> + pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
> + pci_unplug_nics(pci_get_bus(pci_dev));
> }
> break;
> case 8:
> switch (val) {
> case 1:
> - pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS);
> + pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
> break;
> case 2:
> - pci_unplug_nics(pci_dev->bus);
> + pci_unplug_nics(pci_get_bus(pci_dev));
> break;
> default:
> log_writeb(s, (uint32_t)val);
> diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
> index e77a4abb15..186457f8cb 100644
> --- a/hw/isa/lpc_ich9.c
> +++ b/hw/isa/lpc_ich9.c
> @@ -161,7 +161,7 @@ static void ich9_cc_write(void *opaque, hwaddr addr,
>
> ich9_cc_addr_len(&addr, &len);
> memcpy(lpc->chip_config + addr, &val, len);
> - pci_bus_fire_intx_routing_notifier(lpc->d.bus);
> + pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d));
> ich9_cc_update(lpc);
> }
>
> @@ -217,7 +217,7 @@ static void ich9_lpc_update_pic(ICH9LPCState *lpc, int gsi)
> int tmp_dis;
> ich9_lpc_pic_irq(lpc, i, &tmp_irq, &tmp_dis);
> if (!tmp_dis && tmp_irq == gsi) {
> - pic_level |= pci_bus_get_irq_level(lpc->d.bus, i);
> + pic_level |= pci_bus_get_irq_level(pci_get_bus(&lpc->d), i);
> }
> }
> if (gsi == lpc->sci_gsi) {
> @@ -245,7 +245,7 @@ static void ich9_lpc_update_apic(ICH9LPCState *lpc, int gsi)
>
> assert(gsi >= ICH9_LPC_PIC_NUM_PINS);
>
> - level |= pci_bus_get_irq_level(lpc->d.bus, ich9_gsi_to_pirq(gsi));
> + level |= pci_bus_get_irq_level(pci_get_bus(&lpc->d), ich9_gsi_to_pirq(gsi));
> if (gsi == lpc->sci_gsi) {
> level |= lpc->sci_level;
> }
> @@ -523,10 +523,10 @@ static void ich9_lpc_config_write(PCIDevice *d,
> ich9_lpc_rcba_update(lpc, rcba_old);
> }
> if (ranges_overlap(addr, len, ICH9_LPC_PIRQA_ROUT, 4)) {
> - pci_bus_fire_intx_routing_notifier(lpc->d.bus);
> + pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d));
> }
> if (ranges_overlap(addr, len, ICH9_LPC_PIRQE_ROUT, 4)) {
> - pci_bus_fire_intx_routing_notifier(lpc->d.bus);
> + pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d));
> }
> if (ranges_overlap(addr, len, ICH9_LPC_GEN_PMCON_1, 8)) {
> ich9_lpc_pmcon_update(lpc);
> diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
> index b8404cb2e2..0654d594c1 100644
> --- a/hw/net/vmxnet3.c
> +++ b/hw/net/vmxnet3.c
> @@ -2356,7 +2356,7 @@ static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp)
> vmxnet3_net_init(s);
>
> if (pci_is_express(pci_dev)) {
> - if (pci_bus_is_express(pci_dev->bus)) {
> + if (pci_bus_is_express(pci_get_bus(pci_dev))) {
> pcie_endpoint_cap_init(pci_dev, VMXNET3_EXP_EP_OFFSET);
> }
>
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index 11dfa9258e..fb60f9a054 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -51,7 +51,8 @@ typedef struct PXBDev {
>
> static PXBDev *convert_to_pxb(PCIDevice *dev)
> {
> - return pci_bus_is_express(dev->bus) ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
> + return pci_bus_is_express(pci_get_bus(dev))
> + ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
> }
>
> static GList *pxb_dev_list;
> @@ -159,7 +160,7 @@ static const TypeInfo pxb_host_info = {
> */
> static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp)
> {
> - PCIBus *bus = dev->bus;
> + PCIBus *bus = pci_get_bus(dev);
> int pxb_bus_num = pci_bus_num(pxb_bus);
>
> if (bus->parent_dev) {
> @@ -173,12 +174,12 @@ static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp)
> return;
> }
> }
> - QLIST_INSERT_HEAD(&dev->bus->child, pxb_bus, sibling);
> + QLIST_INSERT_HEAD(&pci_get_bus(dev)->child, pxb_bus, sibling);
> }
>
> static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
> {
> - PCIDevice *pxb = pci_dev->bus->parent_dev;
> + PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev;
>
> /*
> * The bios does not index the pxb slot number when
> @@ -233,8 +234,8 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
> }
>
> bus->parent_dev = dev;
> - bus->address_space_mem = dev->bus->address_space_mem;
> - bus->address_space_io = dev->bus->address_space_io;
> + bus->address_space_mem = pci_get_bus(dev)->address_space_mem;
> + bus->address_space_io = pci_get_bus(dev)->address_space_io;
> bus->map_irq = pxb_map_irq_fn;
>
> PCI_HOST_BRIDGE(ds)->bus = bus;
> @@ -265,7 +266,7 @@ err_register_bus:
>
> static void pxb_dev_realize(PCIDevice *dev, Error **errp)
> {
> - if (pci_bus_is_express(dev->bus)) {
> + if (pci_bus_is_express(pci_get_bus(dev))) {
> error_setg(errp, "pxb devices cannot reside on a PCIe bus");
> return;
> }
> @@ -317,7 +318,7 @@ static const TypeInfo pxb_dev_info = {
>
> static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp)
> {
> - if (!pci_bus_is_express(dev->bus)) {
> + if (!pci_bus_is_express(pci_get_bus(dev))) {
> error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus");
> return;
> }
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index cf9070186c..effe3db8e2 100644
> --- a/hw/pci-host/piix.c
> +++ b/hw/pci-host/piix.c
> @@ -512,12 +512,12 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin)
> /* irq routing is changed. so rebuild bitmap */
> static void piix3_update_irq_levels(PIIX3State *piix3)
> {
> + PCIBus *bus = pci_get_bus(&piix3->dev);
> int pirq;
>
> piix3->pic_levels = 0;
> for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
> - piix3_set_irq_level(piix3, pirq,
> - pci_bus_get_irq_level(piix3->dev.bus, pirq));
> + piix3_set_irq_level(piix3, pirq, pci_bus_get_irq_level(bus, pirq));
> }
> }
>
> @@ -529,7 +529,7 @@ static void piix3_write_config(PCIDevice *dev,
> PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
> int pic_irq;
>
> - pci_bus_fire_intx_routing_notifier(piix3->dev.bus);
> + pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev));
> piix3_update_irq_levels(piix3);
> for (pic_irq = 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) {
> piix3_set_irq_pic(piix3, pic_irq);
> @@ -601,7 +601,7 @@ static int piix3_post_load(void *opaque, int version_id)
> piix3->pic_levels = 0;
> for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
> piix3_set_irq_level_internal(piix3, pirq,
> - pci_bus_get_irq_level(piix3->dev.bus, pirq));
> + pci_bus_get_irq_level(pci_get_bus(&piix3->dev), pirq));
> }
> return 0;
> }
> @@ -613,7 +613,7 @@ static int piix3_pre_save(void *opaque)
>
> for (i = 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) {
> piix3->pci_irq_levels_vmstate[i] =
> - pci_bus_get_irq_level(piix3->dev.bus, i);
> + pci_bus_get_irq_level(pci_get_bus(&piix3->dev), i);
> }
>
> return 0;
> diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
> index b5bf4dce55..2586f8c982 100644
> --- a/hw/pci-host/versatile.c
> +++ b/hw/pci-host/versatile.c
> @@ -310,7 +310,7 @@ static const MemoryRegionOps pci_vpb_config_ops = {
>
> static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
> {
> - PCIVPBState *s = container_of(d->bus, PCIVPBState, pci_bus);
> + PCIVPBState *s = container_of(pci_get_bus(d), PCIVPBState, pci_bus);
>
> if (s->irq_mapping == PCI_VPB_IRQMAP_BROKEN) {
> /* Legacy broken IRQ mapping for compatibility with old and
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index 5fab7f23b3..cd4d9d7ecd 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -215,7 +215,7 @@ static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)
> {
> PCIBus *bus;
> for (;;) {
> - bus = pci_dev->bus;
> + bus = pci_get_bus(pci_dev);
> irq_num = bus->map_irq(pci_dev, irq_num);
> if (bus->set_irq)
> break;
> @@ -342,13 +342,13 @@ PCIBus *pci_find_primary_bus(void)
>
> PCIBus *pci_device_root_bus(const PCIDevice *d)
> {
> - PCIBus *bus = d->bus;
> + PCIBus *bus = pci_get_bus(d);
>
> while (!pci_bus_is_root(bus)) {
> d = bus->parent_dev;
> assert(d != NULL);
>
> - bus = d->bus;
> + bus = pci_get_bus(d);
> }
>
> return bus;
> @@ -871,7 +871,7 @@ static void pci_config_free(PCIDevice *pci_dev)
>
> static void do_pci_unregister_device(PCIDevice *pci_dev)
> {
> - pci_dev->bus->devices[pci_dev->devfn] = NULL;
> + pci_get_bus(pci_dev)->devices[pci_dev->devfn] = NULL;
> pci_config_free(pci_dev);
>
> if (memory_region_is_mapped(&pci_dev->bus_master_enable_region)) {
> @@ -892,7 +892,7 @@ static uint16_t pci_req_id_cache_extract(PCIReqIDCache *cache)
> result = pci_get_bdf(cache->dev);
> break;
> case PCI_REQ_ID_SECONDARY_BUS:
> - bus_n = pci_bus_num(cache->dev->bus);
> + bus_n = pci_dev_bus_num(cache->dev);
> result = PCI_BUILD_BDF(bus_n, 0);
> break;
> default:
> @@ -922,9 +922,9 @@ static PCIReqIDCache pci_req_id_cache_get(PCIDevice *dev)
> .type = PCI_REQ_ID_BDF,
> };
>
> - while (!pci_bus_is_root(dev->bus)) {
> + while (!pci_bus_is_root(pci_get_bus(dev))) {
> /* We are under PCI/PCIe bridges */
> - parent = dev->bus->parent_dev;
> + parent = pci_get_bus(dev)->parent_dev;
> if (pci_is_express(parent)) {
> if (pcie_cap_get_type(parent) == PCI_EXP_TYPE_PCI_BRIDGE) {
> /* When we pass through PCIe-to-PCI/PCIX bridges, we
> @@ -967,7 +967,7 @@ static bool pci_bus_devfn_reserved(PCIBus *bus, int devfn)
> }
>
> /* -1 for devfn means auto assign */
> -static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
> +static PCIDevice *do_pci_register_device(PCIDevice *pci_dev,
> const char *name, int devfn,
> Error **errp)
> {
> @@ -976,8 +976,8 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
> PCIConfigWriteFunc *config_write = pc->config_write;
> Error *local_err = NULL;
> DeviceState *dev = DEVICE(pci_dev);
> + PCIBus *bus = pci_get_bus(pci_dev);
>
> - pci_dev->bus = bus;
> /* Only pci bridges can be attached to extra PCI root buses */
> if (pci_bus_is_root(bus) && bus->parent_dev && !pc->is_bridge) {
> error_setg(errp,
> @@ -1131,8 +1131,8 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
> r->type = type;
> r->memory = memory;
> r->address_space = type & PCI_BASE_ADDRESS_SPACE_IO
> - ? pci_dev->bus->address_space_io
> - : pci_dev->bus->address_space_mem;
> + ? pci_get_bus(pci_dev)->address_space_io
> + : pci_get_bus(pci_dev)->address_space_mem;
>
> wmask = ~(size - 1);
> if (region_num == PCI_ROM_SLOT) {
> @@ -1174,21 +1174,23 @@ static void pci_update_vga(PCIDevice *pci_dev)
> void pci_register_vga(PCIDevice *pci_dev, MemoryRegion *mem,
> MemoryRegion *io_lo, MemoryRegion *io_hi)
> {
> + PCIBus *bus = pci_get_bus(pci_dev);
> +
> assert(!pci_dev->has_vga);
>
> assert(memory_region_size(mem) == QEMU_PCI_VGA_MEM_SIZE);
> pci_dev->vga_regions[QEMU_PCI_VGA_MEM] = mem;
> - memory_region_add_subregion_overlap(pci_dev->bus->address_space_mem,
> + memory_region_add_subregion_overlap(bus->address_space_mem,
> QEMU_PCI_VGA_MEM_BASE, mem, 1);
>
> assert(memory_region_size(io_lo) == QEMU_PCI_VGA_IO_LO_SIZE);
> pci_dev->vga_regions[QEMU_PCI_VGA_IO_LO] = io_lo;
> - memory_region_add_subregion_overlap(pci_dev->bus->address_space_io,
> + memory_region_add_subregion_overlap(bus->address_space_io,
> QEMU_PCI_VGA_IO_LO_BASE, io_lo, 1);
>
> assert(memory_region_size(io_hi) == QEMU_PCI_VGA_IO_HI_SIZE);
> pci_dev->vga_regions[QEMU_PCI_VGA_IO_HI] = io_hi;
> - memory_region_add_subregion_overlap(pci_dev->bus->address_space_io,
> + memory_region_add_subregion_overlap(bus->address_space_io,
> QEMU_PCI_VGA_IO_HI_BASE, io_hi, 1);
> pci_dev->has_vga = true;
>
> @@ -1197,15 +1199,17 @@ void pci_register_vga(PCIDevice *pci_dev, MemoryRegion *mem,
>
> void pci_unregister_vga(PCIDevice *pci_dev)
> {
> + PCIBus *bus = pci_get_bus(pci_dev);
> +
> if (!pci_dev->has_vga) {
> return;
> }
>
> - memory_region_del_subregion(pci_dev->bus->address_space_mem,
> + memory_region_del_subregion(bus->address_space_mem,
> pci_dev->vga_regions[QEMU_PCI_VGA_MEM]);
> - memory_region_del_subregion(pci_dev->bus->address_space_io,
> + memory_region_del_subregion(bus->address_space_io,
> pci_dev->vga_regions[QEMU_PCI_VGA_IO_LO]);
> - memory_region_del_subregion(pci_dev->bus->address_space_io,
> + memory_region_del_subregion(bus->address_space_io,
> pci_dev->vga_regions[QEMU_PCI_VGA_IO_HI]);
> pci_dev->has_vga = false;
> }
> @@ -1308,7 +1312,7 @@ static void pci_update_mappings(PCIDevice *d)
>
> /* now do the real mapping */
> if (r->addr != PCI_BAR_UNMAPPED) {
> - trace_pci_update_mappings_del(d, pci_bus_num(d->bus),
> + trace_pci_update_mappings_del(d, pci_dev_bus_num(d),
> PCI_SLOT(d->devfn),
> PCI_FUNC(d->devfn),
> i, r->addr, r->size);
> @@ -1316,7 +1320,7 @@ static void pci_update_mappings(PCIDevice *d)
> }
> r->addr = new_addr;
> if (r->addr != PCI_BAR_UNMAPPED) {
> - trace_pci_update_mappings_add(d, pci_bus_num(d->bus),
> + trace_pci_update_mappings_add(d, pci_dev_bus_num(d),
> PCI_SLOT(d->devfn),
> PCI_FUNC(d->devfn),
> i, r->addr, r->size);
> @@ -1435,9 +1439,9 @@ PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin)
> PCIBus *bus;
>
> do {
> - bus = dev->bus;
> - pin = bus->map_irq(dev, pin);
> - dev = bus->parent_dev;
> + bus = pci_get_bus(dev);
> + pin = bus->map_irq(dev, pin);
> + dev = bus->parent_dev;
> } while (dev);
>
> if (!bus->route_intx_to_irq) {
> @@ -2007,7 +2011,6 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)
> PCIDevice *pci_dev = (PCIDevice *)qdev;
> PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(pci_dev);
> Error *local_err = NULL;
> - PCIBus *bus;
> bool is_default_rom;
>
> /* initialize cap_present for pci_is_express() and pci_config_size() */
> @@ -2015,8 +2018,7 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)
> pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
> }
>
> - bus = PCI_BUS(qdev_get_parent_bus(qdev));
> - pci_dev = do_pci_register_device(pci_dev, bus,
> + pci_dev = do_pci_register_device(pci_dev,
> object_get_typename(OBJECT(qdev)),
> pci_dev->devfn, errp);
> if (pci_dev == NULL)
> @@ -2309,7 +2311,7 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
> error_setg(errp, "%s:%02x:%02x.%x "
> "Attempt to add PCI capability %x at offset "
> "%x overlaps existing capability %x at offset %x",
> - pci_root_bus_path(pdev), pci_bus_num(pdev->bus),
> + pci_root_bus_path(pdev), pci_dev_bus_num(pdev),
> PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
> cap_id, offset, overlapping_cap, i);
> return -EINVAL;
> @@ -2373,7 +2375,7 @@ static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent)
>
> monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, "
> "pci id %04x:%04x (sub %04x:%04x)\n",
> - indent, "", ctxt, pci_bus_num(d->bus),
> + indent, "", ctxt, pci_dev_bus_num(d),
> PCI_SLOT(d->devfn), PCI_FUNC(d->devfn),
> pci_get_word(d->config + PCI_VENDOR_ID),
> pci_get_word(d->config + PCI_DEVICE_ID),
> @@ -2456,7 +2458,7 @@ static char *pcibus_get_dev_path(DeviceState *dev)
>
> /* Calculate # of slots on path between device and root. */;
> slot_depth = 0;
> - for (t = d; t; t = t->bus->parent_dev) {
> + for (t = d; t; t = pci_get_bus(t)->parent_dev) {
> ++slot_depth;
> }
>
> @@ -2471,7 +2473,7 @@ static char *pcibus_get_dev_path(DeviceState *dev)
> /* Fill in slot numbers. We walk up from device to root, so need to print
> * them in the reverse order, last to first. */
> p = path + path_len;
> - for (t = d; t; t = t->bus->parent_dev) {
> + for (t = d; t; t = pci_get_bus(t)->parent_dev) {
> p -= slot_len;
> s = snprintf(slot, sizeof slot, ":%02x.%x",
> PCI_SLOT(t->devfn), PCI_FUNC(t->devfn));
> @@ -2519,12 +2521,12 @@ int pci_qdev_find_device(const char *id, PCIDevice **pdev)
>
> MemoryRegion *pci_address_space(PCIDevice *dev)
> {
> - return dev->bus->address_space_mem;
> + return pci_get_bus(dev)->address_space_mem;
> }
>
> MemoryRegion *pci_address_space_io(PCIDevice *dev)
> {
> - return dev->bus->address_space_io;
> + return pci_get_bus(dev)->address_space_io;
> }
>
> static void pci_device_class_init(ObjectClass *klass, void *data)
> @@ -2552,11 +2554,11 @@ static void pci_device_class_base_init(ObjectClass *klass, void *data)
>
> AddressSpace *pci_device_iommu_address_space(PCIDevice *dev)
> {
> - PCIBus *bus = PCI_BUS(dev->bus);
> + PCIBus *bus = pci_get_bus(dev);
> PCIBus *iommu_bus = bus;
>
> while(iommu_bus && !iommu_bus->iommu_fn && iommu_bus->parent_dev) {
> - iommu_bus = PCI_BUS(iommu_bus->parent_dev->bus);
> + iommu_bus = pci_get_bus(iommu_bus->parent_dev);
> }
> if (iommu_bus && iommu_bus->iommu_fn) {
> return iommu_bus->iommu_fn(bus, iommu_bus->iommu_opaque, dev->devfn);
> @@ -2627,7 +2629,7 @@ void pci_bus_get_w64_range(PCIBus *bus, Range *range)
>
> static bool pcie_has_upstream_port(PCIDevice *dev)
> {
> - PCIDevice *parent_dev = pci_bridge_get_device(dev->bus);
> + PCIDevice *parent_dev = pci_bridge_get_device(pci_get_bus(dev));
>
> /* Device associated with an upstream port.
> * As there are several types of these, it's easier to check the
> @@ -2643,12 +2645,14 @@ static bool pcie_has_upstream_port(PCIDevice *dev)
>
> PCIDevice *pci_get_function_0(PCIDevice *pci_dev)
> {
> + PCIBus *bus = pci_get_bus(pci_dev);
> +
> if(pcie_has_upstream_port(pci_dev)) {
> /* With an upstream PCIe port, we only support 1 device at slot 0 */
> - return pci_dev->bus->devices[0];
> + return bus->devices[0];
> } else {
> /* Other bus types might support multiple devices at slots 0-31 */
> - return pci_dev->bus->devices[PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 0)];
> + return bus->devices[PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 0)];
> }
> }
>
> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
> index 6a5072fcc6..f88c33e0e5 100644
> --- a/hw/pci/pci_bridge.c
> +++ b/hw/pci/pci_bridge.c
> @@ -182,7 +182,7 @@ static void pci_bridge_init_vga_aliases(PCIBridge *br, PCIBus *parent,
> static PCIBridgeWindows *pci_bridge_region_init(PCIBridge *br)
> {
> PCIDevice *pd = PCI_DEVICE(br);
> - PCIBus *parent = pd->bus;
> + PCIBus *parent = pci_get_bus(pd);
> PCIBridgeWindows *w = g_new(PCIBridgeWindows, 1);
> uint16_t cmd = pci_get_word(pd->config + PCI_COMMAND);
>
> @@ -213,7 +213,7 @@ static PCIBridgeWindows *pci_bridge_region_init(PCIBridge *br)
> static void pci_bridge_region_del(PCIBridge *br, PCIBridgeWindows *w)
> {
> PCIDevice *pd = PCI_DEVICE(br);
> - PCIBus *parent = pd->bus;
> + PCIBus *parent = pci_get_bus(pd);
>
> memory_region_del_subregion(parent->address_space_io, &w->alias_io);
> memory_region_del_subregion(parent->address_space_mem, &w->alias_mem);
> @@ -338,7 +338,7 @@ void pci_bridge_reset(DeviceState *qdev)
> /* default qdev initialization function for PCI-to-PCI bridge */
> void pci_bridge_initfn(PCIDevice *dev, const char *typename)
> {
> - PCIBus *parent = dev->bus;
> + PCIBus *parent = pci_get_bus(dev);
> PCIBridge *br = PCI_BRIDGE(dev);
> PCIBus *sec_bus = &br->sec_bus;
>
> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
> index 28ba4a0a72..424d2f7a64 100644
> --- a/hw/pci/pcie.c
> +++ b/hw/pci/pcie.c
> @@ -154,7 +154,8 @@ pcie_endpoint_cap_common_init(PCIDevice *dev, uint8_t offset, uint8_t cap_size)
> * a regular Endpoint type is exposed on a root complex. These
> * should instead be Root Complex Integrated Endpoints.
> */
> - if (pci_bus_is_express(dev->bus) && pci_bus_is_root(dev->bus)) {
> + if (pci_bus_is_express(pci_get_bus(dev))
> + && pci_bus_is_root(pci_get_bus(dev))) {
> type = PCI_EXP_TYPE_RC_END;
> }
>
> @@ -368,7 +369,7 @@ void pcie_cap_slot_hot_unplug_request_cb(HotplugHandler *hotplug_dev,
> {
> uint8_t *exp_cap;
> PCIDevice *pci_dev = PCI_DEVICE(dev);
> - PCIBus *bus = pci_dev->bus;
> + PCIBus *bus = pci_get_bus(pci_dev);
>
> pcie_cap_slot_hotplug_common(PCI_DEVICE(hotplug_dev), dev, &exp_cap, errp);
>
> diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> index 7688293edc..5553e614af 100644
> --- a/hw/pci/pcie_aer.c
> +++ b/hw/pci/pcie_aer.c
> @@ -408,7 +408,7 @@ static void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg)
> */
> return;
> }
> - dev = pci_bridge_get_device(dev->bus);
> + dev = pci_bridge_get_device(pci_get_bus(dev));
> }
> }
>
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 4742cad64c..13d7404693 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -504,7 +504,7 @@ static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu,
> goto param_error_exit;
> }
>
> - rtas_st(rets, 1, (pci_bus_num(pdev->bus) << 16) + 1);
> + rtas_st(rets, 1, (pci_bus_num(pci_get_bus(pdev)) << 16) + 1);
> break;
> case RTAS_GET_PE_MODE:
> rtas_st(rets, 1, RTAS_PE_MODE_SHARED);
> diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
> index 1aecada271..721755ded3 100644
> --- a/hw/s390x/s390-pci-bus.c
> +++ b/hw/s390x/s390-pci-bus.c
> @@ -679,10 +679,10 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
> s->bus_no += 1;
> pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
> do {
> - pdev = pdev->bus->parent_dev;
> + pdev = pci_get_bus(pdev)->parent_dev;
> pci_default_write_config(pdev, PCI_SUBORDINATE_BUS,
> s->bus_no, 1);
> - } while (pdev->bus && pci_bus_num(pdev->bus));
> + } while (pci_get_bus(pdev) && pci_dev_bus_num(pdev));
> }
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> pdev = PCI_DEVICE(dev);
> @@ -712,7 +712,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
> }
>
> pbdev->pdev = pdev;
> - pbdev->iommu = s390_pci_get_iommu(s, pdev->bus, pdev->devfn);
> + pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn);
> pbdev->iommu->pbdev = pbdev;
> pbdev->state = ZPCI_FS_DISABLED;
>
> @@ -806,7 +806,7 @@ static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev,
>
> s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
> pbdev->fh, pbdev->fid);
> - bus = pci_dev->bus;
> + bus = pci_get_bus(pci_dev);
> devfn = pci_dev->devfn;
> object_unparent(OBJECT(pci_dev));
> s390_pci_msix_free(pbdev);
> diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
> index d564e5caff..27749c0e42 100644
> --- a/hw/scsi/vmw_pvscsi.c
> +++ b/hw/scsi/vmw_pvscsi.c
> @@ -1133,7 +1133,7 @@ pvscsi_realizefn(PCIDevice *pci_dev, Error **errp)
>
> pvscsi_init_msi(s);
>
> - if (pci_is_express(pci_dev) && pci_bus_is_express(pci_dev->bus)) {
> + if (pci_is_express(pci_dev) && pci_bus_is_express(pci_get_bus(pci_dev))) {
> pcie_endpoint_cap_init(pci_dev, PVSCSI_EXP_EP_OFFSET);
> }
>
> diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
> index af3a9d88de..228e82b3fb 100644
> --- a/hw/usb/hcd-xhci.c
> +++ b/hw/usb/hcd-xhci.c
> @@ -3416,7 +3416,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, Error **errp)
> PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64,
> &xhci->mem);
>
> - if (pci_bus_is_express(dev->bus) ||
> + if (pci_bus_is_express(pci_get_bus(dev)) ||
> xhci_get_flag(xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) {
> ret = pcie_endpoint_cap_init(dev, 0xa0);
> assert(ret > 0);
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index c977ee327f..2c71295125 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -1654,8 +1654,8 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
> return -EINVAL;
> }
>
> - if (!pci_bus_is_express(vdev->pdev.bus)) {
> - PCIBus *bus = vdev->pdev.bus;
> + if (!pci_bus_is_express(pci_get_bus(&vdev->pdev))) {
> + PCIBus *bus = pci_get_bus(&vdev->pdev);
> PCIDevice *bridge;
>
> /*
> @@ -1680,14 +1680,14 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
> */
> while (!pci_bus_is_root(bus)) {
> bridge = pci_bridge_get_device(bus);
> - bus = bridge->bus;
> + bus = pci_get_bus(bridge);
> }
>
> if (pci_bus_is_express(bus)) {
> return 0;
> }
>
> - } else if (pci_bus_is_root(vdev->pdev.bus)) {
> + } else if (pci_bus_is_root(pci_get_bus(&vdev->pdev))) {
> /*
> * On a Root Complex bus Endpoints become Root Complex Integrated
> * Endpoints, which changes the type and clears the LNK & LNK2 fields.
> @@ -1890,7 +1890,7 @@ static void vfio_add_ext_cap(VFIOPCIDevice *vdev)
> uint8_t *config;
>
> /* Only add extended caps if we have them and the guest can see them */
> - if (!pci_is_express(pdev) || !pci_bus_is_express(pdev->bus) ||
> + if (!pci_is_express(pdev) || !pci_bus_is_express(pci_get_bus(pdev)) ||
> !pci_get_long(pdev->config + PCI_CONFIG_SPACE_SIZE)) {
> return;
> }
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index e92837c42b..42b31fbcf8 100644
> --- a/hw/virtio/virtio-pci.c
> +++ b/hw/virtio/virtio-pci.c
> @@ -1708,8 +1708,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
> {
> VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
> VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
> - bool pcie_port = pci_bus_is_express(pci_dev->bus) &&
> - !pci_bus_is_root(pci_dev->bus);
> + bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
> + !pci_bus_is_root(pci_get_bus(pci_dev));
>
> if (kvm_enabled() && !kvm_has_many_ioeventfds()) {
> proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
> diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
> index 6236f0c391..752b6f6d5c 100644
> --- a/hw/xen/xen_pt.c
> +++ b/hw/xen/xen_pt.c
> @@ -602,7 +602,7 @@ static void xen_pt_region_update(XenPCIPassthroughState *s,
> }
>
> args.type = d->io_regions[bar].type;
> - pci_for_each_device(d->bus, pci_bus_num(d->bus),
> + pci_for_each_device(pci_get_bus(d), pci_dev_bus_num(d),
> xen_pt_check_bar_overlap, &args);
> if (args.rc) {
> XEN_PT_WARN(d, "Region: %d (addr: %#"FMT_PCIBUS
> @@ -695,7 +695,7 @@ xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
> PCIDevice *d = &s->dev;
>
> gpu_dev_id = dev->device_id;
> - igd_passthrough_isa_bridge_create(d->bus, gpu_dev_id);
> + igd_passthrough_isa_bridge_create(pci_get_bus(d), gpu_dev_id);
> }
>
> /* destroy. */
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index a490a2c7d4..50034157fd 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -285,7 +285,6 @@ struct PCIDevice {
> uint8_t *used;
>
> /* the following fields are read only */
> - PCIBus *bus;
> int32_t devfn;
> /* Cached device to fetch requester ID from, to avoid the PCI
> * tree walking every time we invoke PCI request (e.g.,
> @@ -487,10 +486,14 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
>
> PCIDevice *pci_vga_init(PCIBus *bus);
>
> +static inline PCIBus *pci_get_bus(const PCIDevice *dev)
> +{
> + return PCI_BUS(qdev_get_parent_bus(DEVICE(dev)));
> +}
> int pci_bus_num(PCIBus *s);
> static inline int pci_dev_bus_num(const PCIDevice *dev)
> {
> - return pci_bus_num(dev->bus);
> + return pci_bus_num(pci_get_bus(dev));
> }
>
> int pci_bus_numa_node(PCIBus *bus);
> @@ -795,7 +798,7 @@ static inline uint32_t pci_config_size(const PCIDevice *d)
>
> static inline uint16_t pci_get_bdf(PCIDevice *dev)
> {
> - return PCI_BUILD_BDF(pci_bus_num(dev->bus), dev->devfn);
> + return PCI_BUILD_BDF(pci_bus_num(pci_get_bus(dev)), dev->devfn);
> }
>
> uint16_t pci_requester_id(PCIDevice *dev);
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus()
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus() David Gibson
@ 2017-11-29 10:56 ` Marcel Apfelbaum
2017-11-30 6:39 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 10:56 UTC (permalink / raw)
To: David Gibson, Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov
Cc: qemu-devel
On 29/11/2017 10:46, David Gibson wrote:
> pci_find_primary_bus() only has one user, in pc_xen_hvm_init(). That's
> inside the machine construction code, so it already has easy access to the
> machine's primary PCI bus.
>
> Get it directly, and thereby remove pci_find_primary_bus(). This removes
> one of only a handful of users of the ugly pci_host_bridges global.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/i386/pc_piix.c | 8 ++------
> hw/pci/pci.c | 16 ----------------
> include/hw/pci/pci.h | 1 -
> 3 files changed, 2 insertions(+), 23 deletions(-)
>
> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> index 5e47528993..2febd0e136 100644
> --- a/hw/i386/pc_piix.c
> +++ b/hw/i386/pc_piix.c
> @@ -394,7 +394,7 @@ static void pc_xen_hvm_init_pci(MachineState *machine)
>
> static void pc_xen_hvm_init(MachineState *machine)
> {
> - PCIBus *bus;
> + PCMachineState *pcms = PC_MACHINE(machine);
>
> if (!xen_enabled()) {
> error_report("xenfv machine requires the xen accelerator");
> @@ -402,11 +402,7 @@ static void pc_xen_hvm_init(MachineState *machine)
> }
>
> pc_xen_hvm_init_pci(machine);
> -
> - bus = pci_find_primary_bus();
> - if (bus != NULL) {
> - pci_create_simple(bus, -1, "xen-platform");
> - }
> + pci_create_simple(pcms->bus, -1, "xen-platform");
> }
> #endif
>
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index cd4d9d7ecd..ab76c4f3f1 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -324,22 +324,6 @@ static void pci_host_bus_register(DeviceState *host)
> QLIST_INSERT_HEAD(&pci_host_bridges, host_bridge, next);
> }
>
> -PCIBus *pci_find_primary_bus(void)
> -{
> - PCIBus *primary_bus = NULL;
> - PCIHostState *host;
> -
> - QLIST_FOREACH(host, &pci_host_bridges, next) {
> - if (primary_bus) {
> - /* We have multiple root buses, refuse to select a primary */
> - return NULL;
> - }
> - primary_bus = host->bus;
> - }
> -
> - return primary_bus;
> -}
> -
> PCIBus *pci_device_root_bus(const PCIDevice *d)
> {
> PCIBus *bus = pci_get_bus(d);
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 50034157fd..867b1ee175 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -519,7 +519,6 @@ void pci_for_each_bus(PCIBus *bus,
> pci_for_each_bus_depth_first(bus, NULL, fn, opaque);
> }
>
> -PCIBus *pci_find_primary_bus(void);
> PCIBus *pci_device_root_bus(const PCIDevice *d);
> const char *pci_root_bus_path(PCIDevice *dev);
> PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Thanks,
Marcel
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer
2017-11-29 10:54 ` Marcel Apfelbaum
@ 2017-11-29 11:41 ` Eduardo Habkost
2017-11-29 13:15 ` David Gibson
2017-11-29 14:43 ` Marcel Apfelbaum
0 siblings, 2 replies; 47+ messages in thread
From: Eduardo Habkost @ 2017-11-29 11:41 UTC (permalink / raw)
To: Marcel Apfelbaum
Cc: David Gibson, Michael S . Tsirkin, Igor Mammedov, qemu-devel
On Wed, Nov 29, 2017 at 12:54:04PM +0200, Marcel Apfelbaum wrote:
> On 29/11/2017 10:46, David Gibson wrote:
> > The bus pointer in PCIDevice is basically redundant with QOM information.
> > It's always initialized to the qdev_get_parent_bus(), the only difference
> > is the type.
> >
> > Therefore this patch eliminates the field, instead creating a pci_get_bus()
> > helper to do the type mangling to derive it conveniently from the QOM
> > Device object underneath.
> >
>
>
> Hi David,
>
> I personally don't see why the caching of the bus bothers you.
> It makes the code a little easier to read, but indeed is a duplication
> of data; let's see what Michael has to say, is a matter of
> taste I suppose.
I'm all for removing duplication of data because it makes the
code less fragile. We don't even take care of clearing
pci_dev->bus when the device is removed from the bus, so there's
a window between unplugging a device and actually freeing the
object where pci_dev->bus can become a dangling pointer.
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root()
2017-11-29 10:45 ` Marcel Apfelbaum
@ 2017-11-29 13:12 ` David Gibson
2017-11-29 14:42 ` Marcel Apfelbaum
0 siblings, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-11-29 13:12 UTC (permalink / raw)
To: Marcel Apfelbaum
Cc: Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 5358 bytes --]
On Wed, Nov 29, 2017 at 12:45:28PM +0200, Marcel Apfelbaum wrote:
> On 29/11/2017 10:46, David Gibson wrote:
> > pci_bus_is_root() currently relies on a method in the PCIBusClass.
> > But it's always known if a PCI bus is a root bus when we create it, so
> > using a dynamic method is overkill.
> >
> > This replaces it with an IS_ROOT bit in a new flags field, which is set on
> > root buses and otherwise clear. As a bonus this removes the special
> > is_root logic from pci_expander_bridge, since it already creates its bus
> > as a root bus.
> >
>
> I agree it makes the code simpler, I am not sure about
> the enum. Why not make it a boolean field and when will need
> more flags just convert it to an enum (or not)?
Well, I have some patches I'm working on (rather slowly) which add a
second flag.
>
> Thanks,
> Marcel
>
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > ---
> > hw/pci-bridge/pci_expander_bridge.c | 6 ------
> > hw/pci/pci.c | 14 ++------------
> > include/hw/pci/pci.h | 12 +++++++++++-
> > 3 files changed, 13 insertions(+), 19 deletions(-)
> >
> > diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> > index 5652cf06e9..11dfa9258e 100644
> > --- a/hw/pci-bridge/pci_expander_bridge.c
> > +++ b/hw/pci-bridge/pci_expander_bridge.c
> > @@ -65,11 +65,6 @@ static int pxb_bus_num(PCIBus *bus)
> > return pxb->bus_nr;
> > }
> > -static bool pxb_is_root(PCIBus *bus)
> > -{
> > - return true; /* by definition */
> > -}
> > -
> > static uint16_t pxb_bus_numa_node(PCIBus *bus)
> > {
> > PXBDev *pxb = convert_to_pxb(bus->parent_dev);
> > @@ -82,7 +77,6 @@ static void pxb_bus_class_init(ObjectClass *class, void *data)
> > PCIBusClass *pbc = PCI_BUS_CLASS(class);
> > pbc->bus_num = pxb_bus_num;
> > - pbc->is_root = pxb_is_root;
> > pbc->numa_node = pxb_bus_numa_node;
> > }
> > diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> > index 6e11dc2fec..5fab7f23b3 100644
> > --- a/hw/pci/pci.c
> > +++ b/hw/pci/pci.c
> > @@ -126,14 +126,9 @@ static void pci_bus_unrealize(BusState *qbus, Error **errp)
> > vmstate_unregister(NULL, &vmstate_pcibus, bus);
> > }
> > -static bool pcibus_is_root(PCIBus *bus)
> > -{
> > - return !bus->parent_dev;
> > -}
> > -
> > static int pcibus_num(PCIBus *bus)
> > {
> > - if (pcibus_is_root(bus)) {
> > + if (pci_bus_is_root(bus)) {
> > return 0; /* pci host bridge */
> > }
> > return bus->parent_dev->config[PCI_SECONDARY_BUS];
> > @@ -156,7 +151,6 @@ static void pci_bus_class_init(ObjectClass *klass, void *data)
> > k->unrealize = pci_bus_unrealize;
> > k->reset = pcibus_reset;
> > - pbc->is_root = pcibus_is_root;
> > pbc->bus_num = pcibus_num;
> > pbc->numa_node = pcibus_numa_node;
> > }
> > @@ -385,6 +379,7 @@ static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
> > bus->slot_reserved_mask = 0x0;
> > bus->address_space_mem = address_space_mem;
> > bus->address_space_io = address_space_io;
> > + bus->flags |= PCI_BUS_IS_ROOT;
> > /* host bridge */
> > QLIST_INIT(&bus->child);
> > @@ -397,11 +392,6 @@ bool pci_bus_is_express(PCIBus *bus)
> > return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS);
> > }
> > -bool pci_bus_is_root(PCIBus *bus)
> > -{
> > - return PCI_BUS_GET_CLASS(bus)->is_root(bus);
> > -}
> > -
> > void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> > const char *name,
> > MemoryRegion *address_space_mem,
> > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> > index 77d92a3dc4..cbb3386207 100644
> > --- a/include/hw/pci/pci.h
> > +++ b/include/hw/pci/pci.h
> > @@ -404,6 +404,11 @@ typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
> > #define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS)
> > #define TYPE_PCIE_BUS "PCIE"
> > +enum PCIBusFlags {
> > + /* This bus is the root of a PCI domain */
> > + PCI_BUS_IS_ROOT = 0x0001,
> > +};
> > +
> > typedef struct PCIBusClass {
> > /*< private >*/
> > BusClass parent_class;
> > @@ -416,6 +421,7 @@ typedef struct PCIBusClass {
> > struct PCIBus {
> > BusState qbus;
> > + enum PCIBusFlags flags;
> > PCIIOMMUFunc iommu_fn;
> > void *iommu_opaque;
> > uint8_t devfn_min;
> > @@ -440,8 +446,12 @@ struct PCIBus {
> > Notifier machine_done;
> > };
> > +static inline bool pci_bus_is_root(PCIBus *bus)
> > +{
> > + return !!(bus->flags & PCI_BUS_IS_ROOT);
> > +}
> > +
> > bool pci_bus_is_express(PCIBus *bus);
> > -bool pci_bus_is_root(PCIBus *bus);
> > void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> > const char *name,
> > MemoryRegion *address_space_mem,
> >
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer
2017-11-29 11:41 ` Eduardo Habkost
@ 2017-11-29 13:15 ` David Gibson
2017-11-29 14:43 ` Marcel Apfelbaum
1 sibling, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-11-29 13:15 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Marcel Apfelbaum, Michael S . Tsirkin, Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1783 bytes --]
On Wed, Nov 29, 2017 at 09:41:09AM -0200, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 12:54:04PM +0200, Marcel Apfelbaum wrote:
> > On 29/11/2017 10:46, David Gibson wrote:
> > > The bus pointer in PCIDevice is basically redundant with QOM information.
> > > It's always initialized to the qdev_get_parent_bus(), the only difference
> > > is the type.
> > >
> > > Therefore this patch eliminates the field, instead creating a pci_get_bus()
> > > helper to do the type mangling to derive it conveniently from the QOM
> > > Device object underneath.
> > >
> >
> >
> > Hi David,
> >
> > I personally don't see why the caching of the bus bothers you.
> > It makes the code a little easier to read, but indeed is a duplication
> > of data; let's see what Michael has to say, is a matter of
> > taste I suppose.
>
> I'm all for removing duplication of data because it makes the
> code less fragile. We don't even take care of clearing
> pci_dev->bus when the device is removed from the bus, so there's
> a window between unplugging a device and actually freeing the
> object where pci_dev->bus can become a dangling pointer.
Right. In some other things I'm working on I also got bitten by the
fact that the PCI parent pointer wasn't initialized until realize()
time, when I needed to get to the bus before that.
As a rule I like to keep data normalized, because it's harder for
things to get out of sync confusingly. The fact that on modern
hardware recalculating things is generally faster than the the extra
cache footprint is just a bonus.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root()
2017-11-29 13:12 ` David Gibson
@ 2017-11-29 14:42 ` Marcel Apfelbaum
0 siblings, 0 replies; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 14:42 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov, qemu-devel
On 29/11/2017 15:12, David Gibson wrote:
> On Wed, Nov 29, 2017 at 12:45:28PM +0200, Marcel Apfelbaum wrote:
>> On 29/11/2017 10:46, David Gibson wrote:
>>> pci_bus_is_root() currently relies on a method in the PCIBusClass.
>>> But it's always known if a PCI bus is a root bus when we create it, so
>>> using a dynamic method is overkill.
>>>
>>> This replaces it with an IS_ROOT bit in a new flags field, which is set on
>>> root buses and otherwise clear. As a bonus this removes the special
>>> is_root logic from pci_expander_bridge, since it already creates its bus
>>> as a root bus.
>>>
>>
>> I agree it makes the code simpler, I am not sure about
>> the enum. Why not make it a boolean field and when will need
>> more flags just convert it to an enum (or not)?
>
> Well, I have some patches I'm working on (rather slowly) which add a
> second flag.
>
OK
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Thanks,
Marcel
>>
>> Thanks,
>> Marcel
>>
>>> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
>>> ---
>>> hw/pci-bridge/pci_expander_bridge.c | 6 ------
>>> hw/pci/pci.c | 14 ++------------
>>> include/hw/pci/pci.h | 12 +++++++++++-
>>> 3 files changed, 13 insertions(+), 19 deletions(-)
>>>
>>> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
>>> index 5652cf06e9..11dfa9258e 100644
>>> --- a/hw/pci-bridge/pci_expander_bridge.c
>>> +++ b/hw/pci-bridge/pci_expander_bridge.c
>>> @@ -65,11 +65,6 @@ static int pxb_bus_num(PCIBus *bus)
>>> return pxb->bus_nr;
>>> }
>>> -static bool pxb_is_root(PCIBus *bus)
>>> -{
>>> - return true; /* by definition */
>>> -}
>>> -
>>> static uint16_t pxb_bus_numa_node(PCIBus *bus)
>>> {
>>> PXBDev *pxb = convert_to_pxb(bus->parent_dev);
>>> @@ -82,7 +77,6 @@ static void pxb_bus_class_init(ObjectClass *class, void *data)
>>> PCIBusClass *pbc = PCI_BUS_CLASS(class);
>>> pbc->bus_num = pxb_bus_num;
>>> - pbc->is_root = pxb_is_root;
>>> pbc->numa_node = pxb_bus_numa_node;
>>> }
>>> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
>>> index 6e11dc2fec..5fab7f23b3 100644
>>> --- a/hw/pci/pci.c
>>> +++ b/hw/pci/pci.c
>>> @@ -126,14 +126,9 @@ static void pci_bus_unrealize(BusState *qbus, Error **errp)
>>> vmstate_unregister(NULL, &vmstate_pcibus, bus);
>>> }
>>> -static bool pcibus_is_root(PCIBus *bus)
>>> -{
>>> - return !bus->parent_dev;
>>> -}
>>> -
>>> static int pcibus_num(PCIBus *bus)
>>> {
>>> - if (pcibus_is_root(bus)) {
>>> + if (pci_bus_is_root(bus)) {
>>> return 0; /* pci host bridge */
>>> }
>>> return bus->parent_dev->config[PCI_SECONDARY_BUS];
>>> @@ -156,7 +151,6 @@ static void pci_bus_class_init(ObjectClass *klass, void *data)
>>> k->unrealize = pci_bus_unrealize;
>>> k->reset = pcibus_reset;
>>> - pbc->is_root = pcibus_is_root;
>>> pbc->bus_num = pcibus_num;
>>> pbc->numa_node = pcibus_numa_node;
>>> }
>>> @@ -385,6 +379,7 @@ static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
>>> bus->slot_reserved_mask = 0x0;
>>> bus->address_space_mem = address_space_mem;
>>> bus->address_space_io = address_space_io;
>>> + bus->flags |= PCI_BUS_IS_ROOT;
>>> /* host bridge */
>>> QLIST_INIT(&bus->child);
>>> @@ -397,11 +392,6 @@ bool pci_bus_is_express(PCIBus *bus)
>>> return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS);
>>> }
>>> -bool pci_bus_is_root(PCIBus *bus)
>>> -{
>>> - return PCI_BUS_GET_CLASS(bus)->is_root(bus);
>>> -}
>>> -
>>> void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
>>> const char *name,
>>> MemoryRegion *address_space_mem,
>>> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
>>> index 77d92a3dc4..cbb3386207 100644
>>> --- a/include/hw/pci/pci.h
>>> +++ b/include/hw/pci/pci.h
>>> @@ -404,6 +404,11 @@ typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
>>> #define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS)
>>> #define TYPE_PCIE_BUS "PCIE"
>>> +enum PCIBusFlags {
>>> + /* This bus is the root of a PCI domain */
>>> + PCI_BUS_IS_ROOT = 0x0001,
>>> +};
>>> +
>>> typedef struct PCIBusClass {
>>> /*< private >*/
>>> BusClass parent_class;
>>> @@ -416,6 +421,7 @@ typedef struct PCIBusClass {
>>> struct PCIBus {
>>> BusState qbus;
>>> + enum PCIBusFlags flags;
>>> PCIIOMMUFunc iommu_fn;
>>> void *iommu_opaque;
>>> uint8_t devfn_min;
>>> @@ -440,8 +446,12 @@ struct PCIBus {
>>> Notifier machine_done;
>>> };
>>> +static inline bool pci_bus_is_root(PCIBus *bus)
>>> +{
>>> + return !!(bus->flags & PCI_BUS_IS_ROOT);
>>> +}
>>> +
>>> bool pci_bus_is_express(PCIBus *bus);
>>> -bool pci_bus_is_root(PCIBus *bus);
>>> void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
>>> const char *name,
>>> MemoryRegion *address_space_mem,
>>>
>>
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer
2017-11-29 11:41 ` Eduardo Habkost
2017-11-29 13:15 ` David Gibson
@ 2017-11-29 14:43 ` Marcel Apfelbaum
1 sibling, 0 replies; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-29 14:43 UTC (permalink / raw)
To: Eduardo Habkost
Cc: David Gibson, Michael S . Tsirkin, Igor Mammedov, qemu-devel
On 29/11/2017 13:41, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 12:54:04PM +0200, Marcel Apfelbaum wrote:
>> On 29/11/2017 10:46, David Gibson wrote:
>>> The bus pointer in PCIDevice is basically redundant with QOM information.
>>> It's always initialized to the qdev_get_parent_bus(), the only difference
>>> is the type.
>>>
>>> Therefore this patch eliminates the field, instead creating a pci_get_bus()
>>> helper to do the type mangling to derive it conveniently from the QOM
>>> Device object underneath.
>>>
>>
>>
>> Hi David,
>>
>> I personally don't see why the caching of the bus bothers you.
>> It makes the code a little easier to read, but indeed is a duplication
>> of data; let's see what Michael has to say, is a matter of
>> taste I suppose.
>
> I'm all for removing duplication of data because it makes the
> code less fragile. We don't even take care of clearing
> pci_dev->bus when the device is removed from the bus, so there's
> a window between unplugging a device and actually freeing the
> object where pci_dev->bus can become a dangling pointer.
>
This is a good point.
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Thanks,
Marcel
> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-11-29 10:38 ` Marcel Apfelbaum
@ 2017-11-30 4:02 ` David Gibson
2017-11-30 5:56 ` Peter Xu
` (2 more replies)
0 siblings, 3 replies; 47+ messages in thread
From: David Gibson @ 2017-11-30 4:02 UTC (permalink / raw)
To: Marcel Apfelbaum
Cc: Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1371 bytes --]
On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
> On 29/11/2017 10:46, David Gibson wrote:
> > include/hw/pci/pci_bus.h is now very small and can only safely be included
> > after hw/pci/pci.h. So, just fold it into pci.h.
> >
>
> I don't get the benefit from merging the header files.
> I would go the other way around and find stuff specific
> to pci_bus and add it there, like the pci_bus_new*
> you touched in the prev patch.
Hrm. Except the point of the earlier patch was that those are
actually spoecific to root buses, so would really belong in say
pci-host.h, rather than pci-bus.h.
A log of PCI stuff deals with interaction between the device and bus
though, so it just seemed like more trouble than it was worth to go
disentangling them properly.
> Maybe if *all* code files requiring pci.h would automatically
> need pci_bus.h would make sense, but I didn't check that.
Yeah, I don't think every user of pci.h needs pci_bus.h, although a
fair few do as you can see from the diff. Well, I guess it's up to
Michael. I'll be tolerably content either way - I'd say this is the
least important patch of the series.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-11-30 4:02 ` David Gibson
@ 2017-11-30 5:56 ` Peter Xu
2017-11-30 10:25 ` Marcel Apfelbaum
2017-12-01 16:29 ` Michael S. Tsirkin
2 siblings, 0 replies; 47+ messages in thread
From: Peter Xu @ 2017-11-30 5:56 UTC (permalink / raw)
To: David Gibson
Cc: Marcel Apfelbaum, qemu-devel, Igor Mammedov, Eduardo Habkost,
Michael S . Tsirkin
On Thu, Nov 30, 2017 at 03:02:48PM +1100, David Gibson wrote:
> On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
> > On 29/11/2017 10:46, David Gibson wrote:
> > > include/hw/pci/pci_bus.h is now very small and can only safely be included
> > > after hw/pci/pci.h. So, just fold it into pci.h.
> > >
> >
> > I don't get the benefit from merging the header files.
> > I would go the other way around and find stuff specific
> > to pci_bus and add it there, like the pci_bus_new*
> > you touched in the prev patch.
>
> Hrm. Except the point of the earlier patch was that those are
> actually spoecific to root buses, so would really belong in say
> pci-host.h, rather than pci-bus.h.
>
> A log of PCI stuff deals with interaction between the device and bus
> though, so it just seemed like more trouble than it was worth to go
> disentangling them properly.
>
> > Maybe if *all* code files requiring pci.h would automatically
> > need pci_bus.h would make sense, but I didn't check that.
>
> Yeah, I don't think every user of pci.h needs pci_bus.h, although a
> fair few do as you can see from the diff. Well, I guess it's up to
> Michael. I'll be tolerably content either way - I'd say this is the
> least important patch of the series.
I would tend to keep pci_bus.h too considering that it's a separate
header file already (though I see that Linux doesn't have that
specific pci_bus.h, but everything is in pci.h).
Or, if we really want to do that, IMHO we can also consider to include
pci_bus.h directly in pci.h to avoid movement within headers. Thanks,
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity David Gibson
2017-11-29 9:43 ` Marcel Apfelbaum
@ 2017-11-30 6:17 ` Peter Xu
2017-12-01 0:02 ` David Gibson
1 sibling, 1 reply; 47+ messages in thread
From: Peter Xu @ 2017-11-30 6:17 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
On Wed, Nov 29, 2017 at 07:46:22PM +1100, David Gibson wrote:
> pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus()
> are misleadingly named. They're not used for initializing *any* PCI bus,
> but only for a root PCI bus.
>
> Non-root buses - i.e. ones under a logical PCI to PCI bridge - are instead
> created with a direct qbus_create_inplace() (see pci_bridge_initfn()).
>
> This patch renames the functions to make it clear they're only used for
> a root bus.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
An optional nit: would it be nice to name the new functions as:
pci_bus_root_*()? Say, I would prefer pci_bus_root_new() than
pci_root_bus_new() since root bus is still a specific type of bus.
Anyways,
Reviewed-by: Peter Xu <peterx@redhat.com>
> ---
> hw/alpha/typhoon.c | 8 +++---
> hw/mips/gt64xxx_pci.c | 12 ++++-----
> hw/pci-bridge/pci_expander_bridge.c | 4 +--
> hw/pci-host/apb.c | 10 ++++----
> hw/pci-host/bonito.c | 8 +++---
> hw/pci-host/gpex.c | 6 ++---
> hw/pci-host/grackle.c | 14 +++++------
> hw/pci-host/piix.c | 4 +--
> hw/pci-host/ppce500.c | 6 ++---
> hw/pci-host/prep.c | 4 +--
> hw/pci-host/q35.c | 7 +++---
> hw/pci-host/uninorth.c | 24 +++++++++---------
> hw/pci-host/versatile.c | 6 ++---
> hw/pci-host/xilinx-pcie.c | 6 ++---
> hw/pci/pci.c | 49 ++++++++++++++++++++-----------------
> hw/ppc/ppc4xx_pci.c | 6 ++---
> hw/ppc/spapr_pci.c | 8 +++---
> hw/s390x/s390-pci-bus.c | 8 +++---
> hw/sh4/sh_pci.c | 12 ++++-----
> include/hw/pci/pci.h | 25 ++++++++++---------
> 20 files changed, 116 insertions(+), 111 deletions(-)
>
> diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
> index ae11e012c7..6a40869488 100644
> --- a/hw/alpha/typhoon.c
> +++ b/hw/alpha/typhoon.c
> @@ -881,10 +881,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
> memory_region_add_subregion(addr_space, 0x801fc000000ULL,
> &s->pchip.reg_io);
>
> - b = pci_register_bus(dev, "pci",
> - typhoon_set_irq, sys_map_irq, s,
> - &s->pchip.reg_mem, &s->pchip.reg_io,
> - 0, 64, TYPE_PCI_BUS);
> + b = pci_register_root_bus(dev, "pci",
> + typhoon_set_irq, sys_map_irq, s,
> + &s->pchip.reg_mem, &s->pchip.reg_io,
> + 0, 64, TYPE_PCI_BUS);
> phb->bus = b;
> qdev_init_nofail(dev);
>
> diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
> index 5a9dad9aae..a9c222a967 100644
> --- a/hw/mips/gt64xxx_pci.c
> +++ b/hw/mips/gt64xxx_pci.c
> @@ -1171,12 +1171,12 @@ PCIBus *gt64120_register(qemu_irq *pic)
> phb = PCI_HOST_BRIDGE(dev);
> memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX);
> address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem");
> - phb->bus = pci_register_bus(dev, "pci",
> - gt64120_pci_set_irq, gt64120_pci_map_irq,
> - pic,
> - &d->pci0_mem,
> - get_system_io(),
> - PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(dev, "pci",
> + gt64120_pci_set_irq, gt64120_pci_map_irq,
> + pic,
> + &d->pci0_mem,
> + get_system_io(),
> + PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
> qdev_init_nofail(dev);
> memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000);
>
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index 8c8ac737ad..b2fa829e29 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -230,9 +230,9 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
>
> ds = qdev_create(NULL, TYPE_PXB_HOST);
> if (pcie) {
> - bus = pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> + bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> } else {
> - bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
> + bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
> bds = qdev_create(BUS(bus), "pci-bridge");
> bds->id = dev_name;
> qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
> diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
> index 64025cd8cc..1df998443d 100644
> --- a/hw/pci-host/apb.c
> +++ b/hw/pci-host/apb.c
> @@ -714,11 +714,11 @@ PCIBus *pci_apb_init(hwaddr special_base,
> dev = qdev_create(NULL, TYPE_APB);
> d = APB_DEVICE(dev);
> phb = PCI_HOST_BRIDGE(dev);
> - phb->bus = pci_register_bus(DEVICE(phb), "pci",
> - pci_apb_set_irq, pci_apb_map_irq, d,
> - &d->pci_mmio,
> - &d->pci_ioport,
> - 0, 32, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(DEVICE(phb), "pci",
> + pci_apb_set_irq, pci_apb_map_irq, d,
> + &d->pci_mmio,
> + &d->pci_ioport,
> + 0, 32, TYPE_PCI_BUS);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> /* apb_config */
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 9f61e27edc..f08593feab 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -714,10 +714,10 @@ static int bonito_pcihost_initfn(SysBusDevice *dev)
> {
> PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>
> - phb->bus = pci_register_bus(DEVICE(dev), "pci",
> - pci_bonito_set_irq, pci_bonito_map_irq, dev,
> - get_system_memory(), get_system_io(),
> - 0x28, 32, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
> + pci_bonito_set_irq, pci_bonito_map_irq,
> + dev, get_system_memory(), get_system_io(),
> + 0x28, 32, TYPE_PCI_BUS);
>
> return 0;
> }
> diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
> index edf305b1fd..2583b151a4 100644
> --- a/hw/pci-host/gpex.c
> +++ b/hw/pci-host/gpex.c
> @@ -89,9 +89,9 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
> s->irq_num[i] = -1;
> }
>
> - pci->bus = pci_register_bus(dev, "pcie.0", gpex_set_irq,
> - pci_swizzle_map_irq_fn, s, &s->io_mmio,
> - &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
> + pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
> + pci_swizzle_map_irq_fn, s, &s->io_mmio,
> + &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
>
> qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
> pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
> diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
> index 38cd279b6b..3caf1ccb37 100644
> --- a/hw/pci-host/grackle.c
> +++ b/hw/pci-host/grackle.c
> @@ -82,13 +82,13 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> &d->pci_hole);
>
> - phb->bus = pci_register_bus(dev, NULL,
> - pci_grackle_set_irq,
> - pci_grackle_map_irq,
> - pic,
> - &d->pci_mmio,
> - address_space_io,
> - 0, 4, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(dev, NULL,
> + pci_grackle_set_irq,
> + pci_grackle_map_irq,
> + pic,
> + &d->pci_mmio,
> + address_space_io,
> + 0, 4, TYPE_PCI_BUS);
>
> pci_create_simple(phb->bus, 0, "grackle");
> qdev_init_nofail(dev);
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index a684a7cca9..cf9070186c 100644
> --- a/hw/pci-host/piix.c
> +++ b/hw/pci-host/piix.c
> @@ -361,8 +361,8 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
>
> dev = qdev_create(NULL, host_type);
> s = PCI_HOST_BRIDGE(dev);
> - b = pci_bus_new(dev, NULL, pci_address_space,
> - address_space_io, 0, TYPE_PCI_BUS);
> + b = pci_root_bus_new(dev, NULL, pci_address_space,
> + address_space_io, 0, TYPE_PCI_BUS);
> s->bus = b;
> object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL);
> qdev_init_nofail(dev);
> diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
> index 39cd24464d..67edbf744c 100644
> --- a/hw/pci-host/ppce500.c
> +++ b/hw/pci-host/ppce500.c
> @@ -465,9 +465,9 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
> /* PIO lives at the bottom of our bus space */
> memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2);
>
> - b = pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
> - mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
> - PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
> + b = pci_register_root_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
> + mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
> + PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
> h->bus = b;
>
> /* Set up PCI view of memory */
> diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
> index 92eed0f3e1..01f67f9db1 100644
> --- a/hw/pci-host/prep.c
> +++ b/hw/pci-host/prep.c
> @@ -269,8 +269,8 @@ static void raven_pcihost_initfn(Object *obj)
> memory_region_add_subregion_overlap(address_space_mem, 0x80000000,
> &s->pci_io_non_contiguous, 1);
> memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory);
> - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
> - &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
> + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
> + &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
>
> /* Bus master address space */
> memory_region_init(&s->bm, obj, "bm-raven", UINT32_MAX);
> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> index 6cb9a8d121..a36a1195e4 100644
> --- a/hw/pci-host/q35.c
> +++ b/hw/pci-host/q35.c
> @@ -51,9 +51,10 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
> sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
> sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
>
> - pci->bus = pci_bus_new(DEVICE(s), "pcie.0",
> - s->mch.pci_address_space, s->mch.address_space_io,
> - 0, TYPE_PCIE_BUS);
> + pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0",
> + s->mch.pci_address_space,
> + s->mch.address_space_io,
> + 0, TYPE_PCIE_BUS);
> PC_MACHINE(qdev_get_machine())->bus = pci->bus;
> qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus));
> qdev_init_nofail(DEVICE(&s->mch));
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index ea5c265718..5d8ccaa711 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -233,12 +233,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> &d->pci_hole);
>
> - h->bus = pci_register_bus(dev, NULL,
> - pci_unin_set_irq, pci_unin_map_irq,
> - pic,
> - &d->pci_mmio,
> - address_space_io,
> - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> + h->bus = pci_register_root_bus(dev, NULL,
> + pci_unin_set_irq, pci_unin_map_irq,
> + pic,
> + &d->pci_mmio,
> + address_space_io,
> + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
>
> #if 0
> pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north");
> @@ -299,12 +299,12 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> &d->pci_hole);
>
> - h->bus = pci_register_bus(dev, NULL,
> - pci_unin_set_irq, pci_unin_map_irq,
> - pic,
> - &d->pci_mmio,
> - address_space_io,
> - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> + h->bus = pci_register_root_bus(dev, NULL,
> + pci_unin_set_irq, pci_unin_map_irq,
> + pic,
> + &d->pci_mmio,
> + address_space_io,
> + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
>
> sysbus_mmio_map(s, 0, 0xf0800000);
> sysbus_mmio_map(s, 1, 0xf0c00000);
> diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
> index 6394a520fc..8803ada925 100644
> --- a/hw/pci-host/versatile.c
> +++ b/hw/pci-host/versatile.c
> @@ -399,9 +399,9 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
> memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32);
> memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32);
>
> - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
> - &s->pci_mem_space, &s->pci_io_space,
> - PCI_DEVFN(11, 0), TYPE_PCI_BUS);
> + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
> + &s->pci_mem_space, &s->pci_io_space,
> + PCI_DEVFN(11, 0), TYPE_PCI_BUS);
> h->bus = &s->pci_bus;
>
> object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST);
> diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
> index 7659253090..d2f88d11dd 100644
> --- a/hw/pci-host/xilinx-pcie.c
> +++ b/hw/pci-host/xilinx-pcie.c
> @@ -129,9 +129,9 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp)
> sysbus_init_mmio(sbd, &pex->mmio);
> sysbus_init_mmio(sbd, &s->mmio);
>
> - pci->bus = pci_register_bus(dev, s->name, xilinx_pcie_set_irq,
> - pci_swizzle_map_irq_fn, s, &s->mmio,
> - &s->io, 0, 4, TYPE_PCIE_BUS);
> + pci->bus = pci_register_root_bus(dev, s->name, xilinx_pcie_set_irq,
> + pci_swizzle_map_irq_fn, s, &s->mmio,
> + &s->io, 0, 4, TYPE_PCIE_BUS);
>
> qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus));
> qdev_init_nofail(DEVICE(&s->root));
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index b2d139bd9a..232e7dacf8 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -376,10 +376,10 @@ const char *pci_root_bus_path(PCIDevice *dev)
> return rootbus->qbus.name;
> }
>
> -static void pci_bus_init(PCIBus *bus, DeviceState *parent,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min)
> +static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min)
> {
> assert(PCI_FUNC(devfn_min) == 0);
> bus->devfn_min = devfn_min;
> @@ -403,25 +403,27 @@ bool pci_bus_is_root(PCIBus *bus)
> return PCI_BUS_GET_CLASS(bus)->is_root(bus);
> }
>
> -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> - const char *name,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, const char *typename)
> +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> + const char *name,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, const char *typename)
> {
> qbus_create_inplace(bus, bus_size, typename, parent, name);
> - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
> + pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
> + devfn_min);
> }
>
> -PCIBus *pci_bus_new(DeviceState *parent, const char *name,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, const char *typename)
> +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, const char *typename)
> {
> PCIBus *bus;
>
> bus = PCI_BUS(qbus_create(typename, parent, name));
> - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
> + pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
> + devfn_min);
> return bus;
> }
>
> @@ -435,17 +437,18 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> bus->irq_count = g_malloc0(nirq * sizeof(bus->irq_count[0]));
> }
>
> -PCIBus *pci_register_bus(DeviceState *parent, const char *name,
> - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> - void *irq_opaque,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, int nirq, const char *typename)
> +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
> + pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> + void *irq_opaque,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, int nirq,
> + const char *typename)
> {
> PCIBus *bus;
>
> - bus = pci_bus_new(parent, name, address_space_mem,
> - address_space_io, devfn_min, typename);
> + bus = pci_root_bus_new(parent, name, address_space_mem,
> + address_space_io, devfn_min, typename);
> pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq);
> return bus;
> }
> diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
> index 4765dcecca..b7642bac01 100644
> --- a/hw/ppc/ppc4xx_pci.c
> +++ b/hw/ppc/ppc4xx_pci.c
> @@ -314,9 +314,9 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev)
> sysbus_init_irq(dev, &s->irq[i]);
> }
>
> - b = pci_register_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
> - ppc4xx_pci_map_irq, s->irq, get_system_memory(),
> - get_system_io(), 0, 4, TYPE_PCI_BUS);
> + b = pci_register_root_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
> + ppc4xx_pci_map_irq, s->irq, get_system_memory(),
> + get_system_io(), 0, 4, TYPE_PCI_BUS);
> h->bus = b;
>
> pci_create_simple(b, 0, "ppc4xx-host-bridge");
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 5a3122a9f9..9262682116 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -1621,10 +1621,10 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
> memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
> &sphb->iowindow);
>
> - bus = pci_register_bus(dev, NULL,
> - pci_spapr_set_irq, pci_spapr_map_irq, sphb,
> - &sphb->memspace, &sphb->iospace,
> - PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
> + bus = pci_register_root_bus(dev, NULL,
> + pci_spapr_set_irq, pci_spapr_map_irq, sphb,
> + &sphb->memspace, &sphb->iospace,
> + PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
> phb->bus = bus;
> qbus_set_hotplug_handler(BUS(phb->bus), DEVICE(sphb), NULL);
>
> diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
> index 2b1e1409bf..347329dd50 100644
> --- a/hw/s390x/s390-pci-bus.c
> +++ b/hw/s390x/s390-pci-bus.c
> @@ -554,10 +554,10 @@ static int s390_pcihost_init(SysBusDevice *dev)
>
> DPRINTF("host_init\n");
>
> - b = pci_register_bus(DEVICE(dev), NULL,
> - s390_pci_set_irq, s390_pci_map_irq, NULL,
> - get_system_memory(), get_system_io(), 0, 64,
> - TYPE_PCI_BUS);
> + b = pci_register_root_bus(DEVICE(dev), NULL,
> + s390_pci_set_irq, s390_pci_map_irq, NULL,
> + get_system_memory(), get_system_io(), 0, 64,
> + TYPE_PCI_BUS);
> pci_setup_iommu(b, s390_pci_dma_iommu, s);
>
> bus = BUS(b);
> diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c
> index cbb01af57f..4ec2e35500 100644
> --- a/hw/sh4/sh_pci.c
> +++ b/hw/sh4/sh_pci.c
> @@ -131,12 +131,12 @@ static int sh_pci_device_init(SysBusDevice *dev)
> for (i = 0; i < 4; i++) {
> sysbus_init_irq(dev, &s->irq[i]);
> }
> - phb->bus = pci_register_bus(DEVICE(dev), "pci",
> - sh_pci_set_irq, sh_pci_map_irq,
> - s->irq,
> - get_system_memory(),
> - get_system_io(),
> - PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
> + phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
> + sh_pci_set_irq, sh_pci_map_irq,
> + s->irq,
> + get_system_memory(),
> + get_system_io(),
> + PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
> memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s,
> "sh_pci", 0x224);
> memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2",
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 8d02a0a383..870ebcfd4b 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -400,26 +400,27 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
>
> bool pci_bus_is_express(PCIBus *bus);
> bool pci_bus_is_root(PCIBus *bus);
> -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> - const char *name,
> +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> + const char *name,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, const char *typename);
> +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
> MemoryRegion *address_space_mem,
> MemoryRegion *address_space_io,
> uint8_t devfn_min, const char *typename);
> -PCIBus *pci_bus_new(DeviceState *parent, const char *name,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, const char *typename);
> void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> void *irq_opaque, int nirq);
> int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
> /* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
> int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin);
> -PCIBus *pci_register_bus(DeviceState *parent, const char *name,
> - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> - void *irq_opaque,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io,
> - uint8_t devfn_min, int nirq, const char *typename);
> +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
> + pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> + void *irq_opaque,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io,
> + uint8_t devfn_min, int nirq,
> + const char *typename);
> void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn);
> PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin);
> bool pci_intx_route_changed(PCIINTxRoute *old, PCIINTxRoute *new);
> --
> 2.14.3
>
>
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root()
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root() David Gibson
2017-11-29 10:45 ` Marcel Apfelbaum
@ 2017-11-30 6:23 ` Peter Xu
2017-12-01 4:25 ` David Gibson
1 sibling, 1 reply; 47+ messages in thread
From: Peter Xu @ 2017-11-30 6:23 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
On Wed, Nov 29, 2017 at 07:46:25PM +1100, David Gibson wrote:
[...]
> struct PCIBus {
> BusState qbus;
> + enum PCIBusFlags flags;
> PCIIOMMUFunc iommu_fn;
> void *iommu_opaque;
> uint8_t devfn_min;
> @@ -440,8 +446,12 @@ struct PCIBus {
> Notifier machine_done;
> };
I would prefer directly defining flags as uint64_t then it's more
clear that it's a bitmask (enum let me think of only one flag will be
set, but I may be wrong), but it's fine too to me.
Reviewed-by: Peter Xu <peterx@redhat.com>
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer David Gibson
2017-11-29 10:54 ` Marcel Apfelbaum
@ 2017-11-30 6:31 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Peter Xu @ 2017-11-30 6:31 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
On Wed, Nov 29, 2017 at 07:46:27PM +1100, David Gibson wrote:
> The bus pointer in PCIDevice is basically redundant with QOM information.
> It's always initialized to the qdev_get_parent_bus(), the only difference
> is the type.
>
> Therefore this patch eliminates the field, instead creating a pci_get_bus()
> helper to do the type mangling to derive it conveniently from the QOM
> Device object underneath.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Xu <peterx@redhat.com>
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus()
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus() David Gibson
2017-11-29 10:56 ` Marcel Apfelbaum
@ 2017-11-30 6:39 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Peter Xu @ 2017-11-30 6:39 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
On Wed, Nov 29, 2017 at 07:46:28PM +1100, David Gibson wrote:
> pci_find_primary_bus() only has one user, in pc_xen_hvm_init(). That's
> inside the machine construction code, so it already has easy access to the
> machine's primary PCI bus.
>
> Get it directly, and thereby remove pci_find_primary_bus(). This removes
> one of only a handful of users of the ugly pci_host_bridges global.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Xu <peterx@redhat.com>
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h David Gibson
2017-11-29 10:33 ` Marcel Apfelbaum
@ 2017-11-30 6:41 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Peter Xu @ 2017-11-30 6:41 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
On Wed, Nov 29, 2017 at 07:46:23PM +1100, David Gibson wrote:
> include/hw/pci/pci_bus.h contains several data structures related to PCI
> bridges that aren't needed by most users of pci_bus.h. We already have
> a pci_bridge.h, so move them there.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Xu <peterx@redhat.com>
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper David Gibson
2017-11-29 10:48 ` Marcel Apfelbaum
@ 2017-11-30 6:42 ` Peter Xu
1 sibling, 0 replies; 47+ messages in thread
From: Peter Xu @ 2017-11-30 6:42 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
On Wed, Nov 29, 2017 at 07:46:26PM +1100, David Gibson wrote:
> A fair proportion of the users of pci_bus_num() want to get the bus
> number on a specific device, so first have to look up the bus from the
> device then call it. This adds a helper to do that (since we're going
> to make looking up the bus slightly more verbose).
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Xu <peterx@redhat.com>
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-11-30 4:02 ` David Gibson
2017-11-30 5:56 ` Peter Xu
@ 2017-11-30 10:25 ` Marcel Apfelbaum
2017-12-01 16:29 ` Michael S. Tsirkin
2 siblings, 0 replies; 47+ messages in thread
From: Marcel Apfelbaum @ 2017-11-30 10:25 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Igor Mammedov, qemu-devel
On 30/11/2017 6:02, David Gibson wrote:
> On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
>> On 29/11/2017 10:46, David Gibson wrote:
>>> include/hw/pci/pci_bus.h is now very small and can only safely be included
>>> after hw/pci/pci.h. So, just fold it into pci.h.
>>>
>>
>> I don't get the benefit from merging the header files.
>> I would go the other way around and find stuff specific
>> to pci_bus and add it there, like the pci_bus_new*
>> you touched in the prev patch.
>
> Hrm. Except the point of the earlier patch was that those are
> actually spoecific to root buses, so would really belong in say
> pci-host.h, rather than pci-bus.h.
>
> A log of PCI stuff deals with interaction between the device and bus
> though, so it just seemed like more trouble than it was worth to go
> disentangling them properly.
>
>> Maybe if *all* code files requiring pci.h would automatically
>> need pci_bus.h would make sense, but I didn't check that.
>
> Yeah, I don't think every user of pci.h needs pci_bus.h, although a
> fair few do as you can see from the diff. Well, I guess it's up to
> Michael. I'll be tolerably content either way - I'd say this is the
> least important patch of the series.
>
Agreed,
Thanks,
Marcel
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity
2017-11-30 6:17 ` Peter Xu
@ 2017-12-01 0:02 ` David Gibson
2017-12-01 4:27 ` Peter Xu
0 siblings, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-12-01 0:02 UTC (permalink / raw)
To: Peter Xu
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 28515 bytes --]
On Thu, Nov 30, 2017 at 02:17:21PM +0800, Peter Xu wrote:
> On Wed, Nov 29, 2017 at 07:46:22PM +1100, David Gibson wrote:
> > pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus()
> > are misleadingly named. They're not used for initializing *any* PCI bus,
> > but only for a root PCI bus.
> >
> > Non-root buses - i.e. ones under a logical PCI to PCI bridge - are instead
> > created with a direct qbus_create_inplace() (see pci_bridge_initfn()).
> >
> > This patch renames the functions to make it clear they're only used for
> > a root bus.
> >
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
>
> An optional nit: would it be nice to name the new functions as:
> pci_bus_root_*()? Say, I would prefer pci_bus_root_new() than
> pci_root_bus_new() since root bus is still a specific type of bus.
Hrm,. *_bus_root_* reads very strangely to me, I find it less clear
than ..._root_bus_...
>
> Anyways,
>
> Reviewed-by: Peter Xu <peterx@redhat.com>
>
> > ---
> > hw/alpha/typhoon.c | 8 +++---
> > hw/mips/gt64xxx_pci.c | 12 ++++-----
> > hw/pci-bridge/pci_expander_bridge.c | 4 +--
> > hw/pci-host/apb.c | 10 ++++----
> > hw/pci-host/bonito.c | 8 +++---
> > hw/pci-host/gpex.c | 6 ++---
> > hw/pci-host/grackle.c | 14 +++++------
> > hw/pci-host/piix.c | 4 +--
> > hw/pci-host/ppce500.c | 6 ++---
> > hw/pci-host/prep.c | 4 +--
> > hw/pci-host/q35.c | 7 +++---
> > hw/pci-host/uninorth.c | 24 +++++++++---------
> > hw/pci-host/versatile.c | 6 ++---
> > hw/pci-host/xilinx-pcie.c | 6 ++---
> > hw/pci/pci.c | 49 ++++++++++++++++++++-----------------
> > hw/ppc/ppc4xx_pci.c | 6 ++---
> > hw/ppc/spapr_pci.c | 8 +++---
> > hw/s390x/s390-pci-bus.c | 8 +++---
> > hw/sh4/sh_pci.c | 12 ++++-----
> > include/hw/pci/pci.h | 25 ++++++++++---------
> > 20 files changed, 116 insertions(+), 111 deletions(-)
> >
> > diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
> > index ae11e012c7..6a40869488 100644
> > --- a/hw/alpha/typhoon.c
> > +++ b/hw/alpha/typhoon.c
> > @@ -881,10 +881,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
> > memory_region_add_subregion(addr_space, 0x801fc000000ULL,
> > &s->pchip.reg_io);
> >
> > - b = pci_register_bus(dev, "pci",
> > - typhoon_set_irq, sys_map_irq, s,
> > - &s->pchip.reg_mem, &s->pchip.reg_io,
> > - 0, 64, TYPE_PCI_BUS);
> > + b = pci_register_root_bus(dev, "pci",
> > + typhoon_set_irq, sys_map_irq, s,
> > + &s->pchip.reg_mem, &s->pchip.reg_io,
> > + 0, 64, TYPE_PCI_BUS);
> > phb->bus = b;
> > qdev_init_nofail(dev);
> >
> > diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
> > index 5a9dad9aae..a9c222a967 100644
> > --- a/hw/mips/gt64xxx_pci.c
> > +++ b/hw/mips/gt64xxx_pci.c
> > @@ -1171,12 +1171,12 @@ PCIBus *gt64120_register(qemu_irq *pic)
> > phb = PCI_HOST_BRIDGE(dev);
> > memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX);
> > address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem");
> > - phb->bus = pci_register_bus(dev, "pci",
> > - gt64120_pci_set_irq, gt64120_pci_map_irq,
> > - pic,
> > - &d->pci0_mem,
> > - get_system_io(),
> > - PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
> > + phb->bus = pci_register_root_bus(dev, "pci",
> > + gt64120_pci_set_irq, gt64120_pci_map_irq,
> > + pic,
> > + &d->pci0_mem,
> > + get_system_io(),
> > + PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
> > qdev_init_nofail(dev);
> > memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000);
> >
> > diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> > index 8c8ac737ad..b2fa829e29 100644
> > --- a/hw/pci-bridge/pci_expander_bridge.c
> > +++ b/hw/pci-bridge/pci_expander_bridge.c
> > @@ -230,9 +230,9 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
> >
> > ds = qdev_create(NULL, TYPE_PXB_HOST);
> > if (pcie) {
> > - bus = pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> > + bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> > } else {
> > - bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
> > + bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
> > bds = qdev_create(BUS(bus), "pci-bridge");
> > bds->id = dev_name;
> > qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
> > diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
> > index 64025cd8cc..1df998443d 100644
> > --- a/hw/pci-host/apb.c
> > +++ b/hw/pci-host/apb.c
> > @@ -714,11 +714,11 @@ PCIBus *pci_apb_init(hwaddr special_base,
> > dev = qdev_create(NULL, TYPE_APB);
> > d = APB_DEVICE(dev);
> > phb = PCI_HOST_BRIDGE(dev);
> > - phb->bus = pci_register_bus(DEVICE(phb), "pci",
> > - pci_apb_set_irq, pci_apb_map_irq, d,
> > - &d->pci_mmio,
> > - &d->pci_ioport,
> > - 0, 32, TYPE_PCI_BUS);
> > + phb->bus = pci_register_root_bus(DEVICE(phb), "pci",
> > + pci_apb_set_irq, pci_apb_map_irq, d,
> > + &d->pci_mmio,
> > + &d->pci_ioport,
> > + 0, 32, TYPE_PCI_BUS);
> > qdev_init_nofail(dev);
> > s = SYS_BUS_DEVICE(dev);
> > /* apb_config */
> > diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> > index 9f61e27edc..f08593feab 100644
> > --- a/hw/pci-host/bonito.c
> > +++ b/hw/pci-host/bonito.c
> > @@ -714,10 +714,10 @@ static int bonito_pcihost_initfn(SysBusDevice *dev)
> > {
> > PCIHostState *phb = PCI_HOST_BRIDGE(dev);
> >
> > - phb->bus = pci_register_bus(DEVICE(dev), "pci",
> > - pci_bonito_set_irq, pci_bonito_map_irq, dev,
> > - get_system_memory(), get_system_io(),
> > - 0x28, 32, TYPE_PCI_BUS);
> > + phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
> > + pci_bonito_set_irq, pci_bonito_map_irq,
> > + dev, get_system_memory(), get_system_io(),
> > + 0x28, 32, TYPE_PCI_BUS);
> >
> > return 0;
> > }
> > diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
> > index edf305b1fd..2583b151a4 100644
> > --- a/hw/pci-host/gpex.c
> > +++ b/hw/pci-host/gpex.c
> > @@ -89,9 +89,9 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
> > s->irq_num[i] = -1;
> > }
> >
> > - pci->bus = pci_register_bus(dev, "pcie.0", gpex_set_irq,
> > - pci_swizzle_map_irq_fn, s, &s->io_mmio,
> > - &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
> > + pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
> > + pci_swizzle_map_irq_fn, s, &s->io_mmio,
> > + &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
> >
> > qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
> > pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
> > diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
> > index 38cd279b6b..3caf1ccb37 100644
> > --- a/hw/pci-host/grackle.c
> > +++ b/hw/pci-host/grackle.c
> > @@ -82,13 +82,13 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
> > memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> > &d->pci_hole);
> >
> > - phb->bus = pci_register_bus(dev, NULL,
> > - pci_grackle_set_irq,
> > - pci_grackle_map_irq,
> > - pic,
> > - &d->pci_mmio,
> > - address_space_io,
> > - 0, 4, TYPE_PCI_BUS);
> > + phb->bus = pci_register_root_bus(dev, NULL,
> > + pci_grackle_set_irq,
> > + pci_grackle_map_irq,
> > + pic,
> > + &d->pci_mmio,
> > + address_space_io,
> > + 0, 4, TYPE_PCI_BUS);
> >
> > pci_create_simple(phb->bus, 0, "grackle");
> > qdev_init_nofail(dev);
> > diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> > index a684a7cca9..cf9070186c 100644
> > --- a/hw/pci-host/piix.c
> > +++ b/hw/pci-host/piix.c
> > @@ -361,8 +361,8 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
> >
> > dev = qdev_create(NULL, host_type);
> > s = PCI_HOST_BRIDGE(dev);
> > - b = pci_bus_new(dev, NULL, pci_address_space,
> > - address_space_io, 0, TYPE_PCI_BUS);
> > + b = pci_root_bus_new(dev, NULL, pci_address_space,
> > + address_space_io, 0, TYPE_PCI_BUS);
> > s->bus = b;
> > object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL);
> > qdev_init_nofail(dev);
> > diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
> > index 39cd24464d..67edbf744c 100644
> > --- a/hw/pci-host/ppce500.c
> > +++ b/hw/pci-host/ppce500.c
> > @@ -465,9 +465,9 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
> > /* PIO lives at the bottom of our bus space */
> > memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2);
> >
> > - b = pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
> > - mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
> > - PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
> > + b = pci_register_root_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
> > + mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
> > + PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
> > h->bus = b;
> >
> > /* Set up PCI view of memory */
> > diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
> > index 92eed0f3e1..01f67f9db1 100644
> > --- a/hw/pci-host/prep.c
> > +++ b/hw/pci-host/prep.c
> > @@ -269,8 +269,8 @@ static void raven_pcihost_initfn(Object *obj)
> > memory_region_add_subregion_overlap(address_space_mem, 0x80000000,
> > &s->pci_io_non_contiguous, 1);
> > memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory);
> > - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
> > - &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
> > + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
> > + &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
> >
> > /* Bus master address space */
> > memory_region_init(&s->bm, obj, "bm-raven", UINT32_MAX);
> > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> > index 6cb9a8d121..a36a1195e4 100644
> > --- a/hw/pci-host/q35.c
> > +++ b/hw/pci-host/q35.c
> > @@ -51,9 +51,10 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
> > sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
> > sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
> >
> > - pci->bus = pci_bus_new(DEVICE(s), "pcie.0",
> > - s->mch.pci_address_space, s->mch.address_space_io,
> > - 0, TYPE_PCIE_BUS);
> > + pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0",
> > + s->mch.pci_address_space,
> > + s->mch.address_space_io,
> > + 0, TYPE_PCIE_BUS);
> > PC_MACHINE(qdev_get_machine())->bus = pci->bus;
> > qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus));
> > qdev_init_nofail(DEVICE(&s->mch));
> > diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> > index ea5c265718..5d8ccaa711 100644
> > --- a/hw/pci-host/uninorth.c
> > +++ b/hw/pci-host/uninorth.c
> > @@ -233,12 +233,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
> > memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> > &d->pci_hole);
> >
> > - h->bus = pci_register_bus(dev, NULL,
> > - pci_unin_set_irq, pci_unin_map_irq,
> > - pic,
> > - &d->pci_mmio,
> > - address_space_io,
> > - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> > + h->bus = pci_register_root_bus(dev, NULL,
> > + pci_unin_set_irq, pci_unin_map_irq,
> > + pic,
> > + &d->pci_mmio,
> > + address_space_io,
> > + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> >
> > #if 0
> > pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north");
> > @@ -299,12 +299,12 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> > memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> > &d->pci_hole);
> >
> > - h->bus = pci_register_bus(dev, NULL,
> > - pci_unin_set_irq, pci_unin_map_irq,
> > - pic,
> > - &d->pci_mmio,
> > - address_space_io,
> > - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> > + h->bus = pci_register_root_bus(dev, NULL,
> > + pci_unin_set_irq, pci_unin_map_irq,
> > + pic,
> > + &d->pci_mmio,
> > + address_space_io,
> > + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> >
> > sysbus_mmio_map(s, 0, 0xf0800000);
> > sysbus_mmio_map(s, 1, 0xf0c00000);
> > diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
> > index 6394a520fc..8803ada925 100644
> > --- a/hw/pci-host/versatile.c
> > +++ b/hw/pci-host/versatile.c
> > @@ -399,9 +399,9 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
> > memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32);
> > memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32);
> >
> > - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
> > - &s->pci_mem_space, &s->pci_io_space,
> > - PCI_DEVFN(11, 0), TYPE_PCI_BUS);
> > + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
> > + &s->pci_mem_space, &s->pci_io_space,
> > + PCI_DEVFN(11, 0), TYPE_PCI_BUS);
> > h->bus = &s->pci_bus;
> >
> > object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST);
> > diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
> > index 7659253090..d2f88d11dd 100644
> > --- a/hw/pci-host/xilinx-pcie.c
> > +++ b/hw/pci-host/xilinx-pcie.c
> > @@ -129,9 +129,9 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp)
> > sysbus_init_mmio(sbd, &pex->mmio);
> > sysbus_init_mmio(sbd, &s->mmio);
> >
> > - pci->bus = pci_register_bus(dev, s->name, xilinx_pcie_set_irq,
> > - pci_swizzle_map_irq_fn, s, &s->mmio,
> > - &s->io, 0, 4, TYPE_PCIE_BUS);
> > + pci->bus = pci_register_root_bus(dev, s->name, xilinx_pcie_set_irq,
> > + pci_swizzle_map_irq_fn, s, &s->mmio,
> > + &s->io, 0, 4, TYPE_PCIE_BUS);
> >
> > qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus));
> > qdev_init_nofail(DEVICE(&s->root));
> > diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> > index b2d139bd9a..232e7dacf8 100644
> > --- a/hw/pci/pci.c
> > +++ b/hw/pci/pci.c
> > @@ -376,10 +376,10 @@ const char *pci_root_bus_path(PCIDevice *dev)
> > return rootbus->qbus.name;
> > }
> >
> > -static void pci_bus_init(PCIBus *bus, DeviceState *parent,
> > - MemoryRegion *address_space_mem,
> > - MemoryRegion *address_space_io,
> > - uint8_t devfn_min)
> > +static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
> > + MemoryRegion *address_space_mem,
> > + MemoryRegion *address_space_io,
> > + uint8_t devfn_min)
> > {
> > assert(PCI_FUNC(devfn_min) == 0);
> > bus->devfn_min = devfn_min;
> > @@ -403,25 +403,27 @@ bool pci_bus_is_root(PCIBus *bus)
> > return PCI_BUS_GET_CLASS(bus)->is_root(bus);
> > }
> >
> > -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> > - const char *name,
> > - MemoryRegion *address_space_mem,
> > - MemoryRegion *address_space_io,
> > - uint8_t devfn_min, const char *typename)
> > +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> > + const char *name,
> > + MemoryRegion *address_space_mem,
> > + MemoryRegion *address_space_io,
> > + uint8_t devfn_min, const char *typename)
> > {
> > qbus_create_inplace(bus, bus_size, typename, parent, name);
> > - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
> > + pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
> > + devfn_min);
> > }
> >
> > -PCIBus *pci_bus_new(DeviceState *parent, const char *name,
> > - MemoryRegion *address_space_mem,
> > - MemoryRegion *address_space_io,
> > - uint8_t devfn_min, const char *typename)
> > +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
> > + MemoryRegion *address_space_mem,
> > + MemoryRegion *address_space_io,
> > + uint8_t devfn_min, const char *typename)
> > {
> > PCIBus *bus;
> >
> > bus = PCI_BUS(qbus_create(typename, parent, name));
> > - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_min);
> > + pci_root_bus_init(bus, parent, address_space_mem, address_space_io,
> > + devfn_min);
> > return bus;
> > }
> >
> > @@ -435,17 +437,18 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> > bus->irq_count = g_malloc0(nirq * sizeof(bus->irq_count[0]));
> > }
> >
> > -PCIBus *pci_register_bus(DeviceState *parent, const char *name,
> > - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> > - void *irq_opaque,
> > - MemoryRegion *address_space_mem,
> > - MemoryRegion *address_space_io,
> > - uint8_t devfn_min, int nirq, const char *typename)
> > +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
> > + pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> > + void *irq_opaque,
> > + MemoryRegion *address_space_mem,
> > + MemoryRegion *address_space_io,
> > + uint8_t devfn_min, int nirq,
> > + const char *typename)
> > {
> > PCIBus *bus;
> >
> > - bus = pci_bus_new(parent, name, address_space_mem,
> > - address_space_io, devfn_min, typename);
> > + bus = pci_root_bus_new(parent, name, address_space_mem,
> > + address_space_io, devfn_min, typename);
> > pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq);
> > return bus;
> > }
> > diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
> > index 4765dcecca..b7642bac01 100644
> > --- a/hw/ppc/ppc4xx_pci.c
> > +++ b/hw/ppc/ppc4xx_pci.c
> > @@ -314,9 +314,9 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev)
> > sysbus_init_irq(dev, &s->irq[i]);
> > }
> >
> > - b = pci_register_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
> > - ppc4xx_pci_map_irq, s->irq, get_system_memory(),
> > - get_system_io(), 0, 4, TYPE_PCI_BUS);
> > + b = pci_register_root_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq,
> > + ppc4xx_pci_map_irq, s->irq, get_system_memory(),
> > + get_system_io(), 0, 4, TYPE_PCI_BUS);
> > h->bus = b;
> >
> > pci_create_simple(b, 0, "ppc4xx-host-bridge");
> > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> > index 5a3122a9f9..9262682116 100644
> > --- a/hw/ppc/spapr_pci.c
> > +++ b/hw/ppc/spapr_pci.c
> > @@ -1621,10 +1621,10 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
> > memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
> > &sphb->iowindow);
> >
> > - bus = pci_register_bus(dev, NULL,
> > - pci_spapr_set_irq, pci_spapr_map_irq, sphb,
> > - &sphb->memspace, &sphb->iospace,
> > - PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
> > + bus = pci_register_root_bus(dev, NULL,
> > + pci_spapr_set_irq, pci_spapr_map_irq, sphb,
> > + &sphb->memspace, &sphb->iospace,
> > + PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
> > phb->bus = bus;
> > qbus_set_hotplug_handler(BUS(phb->bus), DEVICE(sphb), NULL);
> >
> > diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
> > index 2b1e1409bf..347329dd50 100644
> > --- a/hw/s390x/s390-pci-bus.c
> > +++ b/hw/s390x/s390-pci-bus.c
> > @@ -554,10 +554,10 @@ static int s390_pcihost_init(SysBusDevice *dev)
> >
> > DPRINTF("host_init\n");
> >
> > - b = pci_register_bus(DEVICE(dev), NULL,
> > - s390_pci_set_irq, s390_pci_map_irq, NULL,
> > - get_system_memory(), get_system_io(), 0, 64,
> > - TYPE_PCI_BUS);
> > + b = pci_register_root_bus(DEVICE(dev), NULL,
> > + s390_pci_set_irq, s390_pci_map_irq, NULL,
> > + get_system_memory(), get_system_io(), 0, 64,
> > + TYPE_PCI_BUS);
> > pci_setup_iommu(b, s390_pci_dma_iommu, s);
> >
> > bus = BUS(b);
> > diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c
> > index cbb01af57f..4ec2e35500 100644
> > --- a/hw/sh4/sh_pci.c
> > +++ b/hw/sh4/sh_pci.c
> > @@ -131,12 +131,12 @@ static int sh_pci_device_init(SysBusDevice *dev)
> > for (i = 0; i < 4; i++) {
> > sysbus_init_irq(dev, &s->irq[i]);
> > }
> > - phb->bus = pci_register_bus(DEVICE(dev), "pci",
> > - sh_pci_set_irq, sh_pci_map_irq,
> > - s->irq,
> > - get_system_memory(),
> > - get_system_io(),
> > - PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
> > + phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
> > + sh_pci_set_irq, sh_pci_map_irq,
> > + s->irq,
> > + get_system_memory(),
> > + get_system_io(),
> > + PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
> > memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s,
> > "sh_pci", 0x224);
> > memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2",
> > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> > index 8d02a0a383..870ebcfd4b 100644
> > --- a/include/hw/pci/pci.h
> > +++ b/include/hw/pci/pci.h
> > @@ -400,26 +400,27 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
> >
> > bool pci_bus_is_express(PCIBus *bus);
> > bool pci_bus_is_root(PCIBus *bus);
> > -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> > - const char *name,
> > +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
> > + const char *name,
> > + MemoryRegion *address_space_mem,
> > + MemoryRegion *address_space_io,
> > + uint8_t devfn_min, const char *typename);
> > +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
> > MemoryRegion *address_space_mem,
> > MemoryRegion *address_space_io,
> > uint8_t devfn_min, const char *typename);
> > -PCIBus *pci_bus_new(DeviceState *parent, const char *name,
> > - MemoryRegion *address_space_mem,
> > - MemoryRegion *address_space_io,
> > - uint8_t devfn_min, const char *typename);
> > void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> > void *irq_opaque, int nirq);
> > int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
> > /* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
> > int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin);
> > -PCIBus *pci_register_bus(DeviceState *parent, const char *name,
> > - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> > - void *irq_opaque,
> > - MemoryRegion *address_space_mem,
> > - MemoryRegion *address_space_io,
> > - uint8_t devfn_min, int nirq, const char *typename);
> > +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
> > + pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> > + void *irq_opaque,
> > + MemoryRegion *address_space_mem,
> > + MemoryRegion *address_space_io,
> > + uint8_t devfn_min, int nirq,
> > + const char *typename);
> > void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn);
> > PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin);
> > bool pci_intx_route_changed(PCIINTxRoute *old, PCIINTxRoute *new);
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root()
2017-11-30 6:23 ` Peter Xu
@ 2017-12-01 4:25 ` David Gibson
0 siblings, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-12-01 4:25 UTC (permalink / raw)
To: Peter Xu
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1333 bytes --]
On Thu, Nov 30, 2017 at 02:23:45PM +0800, Peter Xu wrote:
> On Wed, Nov 29, 2017 at 07:46:25PM +1100, David Gibson wrote:
>
> [...]
>
> > struct PCIBus {
> > BusState qbus;
> > + enum PCIBusFlags flags;
> > PCIIOMMUFunc iommu_fn;
> > void *iommu_opaque;
> > uint8_t devfn_min;
> > @@ -440,8 +446,12 @@ struct PCIBus {
> > Notifier machine_done;
> > };
>
> I would prefer directly defining flags as uint64_t then it's more
> clear that it's a bitmask (enum let me think of only one flag will be
> set, but I may be wrong), but it's fine too to me.
In most languages an enum would only allow one value to be set, but C
enums are weird - they're basically just a funny way of defining
integer constants.
I'm not particularly bothered either way: using the enum type makes it
clear the right set of constants to use with this field, using an int
makes it clearer that bit flags can be set. So both options are
slightly misleading in different ways.
If there's another vote for uint64_t over using the enum, I'll change
it.
> Reviewed-by: Peter Xu <peterx@redhat.com>
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity
2017-12-01 0:02 ` David Gibson
@ 2017-12-01 4:27 ` Peter Xu
0 siblings, 0 replies; 47+ messages in thread
From: Peter Xu @ 2017-12-01 4:27 UTC (permalink / raw)
To: David Gibson
Cc: Michael S . Tsirkin, Eduardo Habkost, Marcel Apfelbaum,
Igor Mammedov, qemu-devel
On Fri, Dec 01, 2017 at 11:02:50AM +1100, David Gibson wrote:
> On Thu, Nov 30, 2017 at 02:17:21PM +0800, Peter Xu wrote:
> > On Wed, Nov 29, 2017 at 07:46:22PM +1100, David Gibson wrote:
> > > pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus()
> > > are misleadingly named. They're not used for initializing *any* PCI bus,
> > > but only for a root PCI bus.
> > >
> > > Non-root buses - i.e. ones under a logical PCI to PCI bridge - are instead
> > > created with a direct qbus_create_inplace() (see pci_bridge_initfn()).
> > >
> > > This patch renames the functions to make it clear they're only used for
> > > a root bus.
> > >
> > > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> >
> > An optional nit: would it be nice to name the new functions as:
> > pci_bus_root_*()? Say, I would prefer pci_bus_root_new() than
> > pci_root_bus_new() since root bus is still a specific type of bus.
>
> Hrm,. *_bus_root_* reads very strangely to me, I find it less clear
> than ..._root_bus_...
Sure. I'm also fine to keep it the old way. Thanks,
--
Peter Xu
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-11-30 4:02 ` David Gibson
2017-11-30 5:56 ` Peter Xu
2017-11-30 10:25 ` Marcel Apfelbaum
@ 2017-12-01 16:29 ` Michael S. Tsirkin
2017-12-02 0:59 ` David Gibson
2017-12-04 4:40 ` David Gibson
2 siblings, 2 replies; 47+ messages in thread
From: Michael S. Tsirkin @ 2017-12-01 16:29 UTC (permalink / raw)
To: David Gibson; +Cc: Marcel Apfelbaum, Eduardo Habkost, Igor Mammedov, qemu-devel
On Thu, Nov 30, 2017 at 03:02:48PM +1100, David Gibson wrote:
> On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
> > On 29/11/2017 10:46, David Gibson wrote:
> > > include/hw/pci/pci_bus.h is now very small and can only safely be included
> > > after hw/pci/pci.h. So, just fold it into pci.h.
> > >
> >
> > I don't get the benefit from merging the header files.
> > I would go the other way around and find stuff specific
> > to pci_bus and add it there, like the pci_bus_new*
> > you touched in the prev patch.
>
> Hrm. Except the point of the earlier patch was that those are
> actually spoecific to root buses, so would really belong in say
> pci-host.h, rather than pci-bus.h.
>
> A log of PCI stuff deals with interaction between the device and bus
> though, so it just seemed like more trouble than it was worth to go
> disentangling them properly.
>
> > Maybe if *all* code files requiring pci.h would automatically
> > need pci_bus.h would make sense, but I didn't check that.
>
> Yeah, I don't think every user of pci.h needs pci_bus.h, although a
> fair few do as you can see from the diff. Well, I guess it's up to
> Michael. I'll be tolerably content either way - I'd say this is the
> least important patch of the series.
I'm inclined to agree with Marcel also because it's lots of noise for no
real win. The next patch depends on this one. I skipped this and next
one, pls feel free to repost next one.
> --
> David Gibson | I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
> | _way_ _around_!
> http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-12-01 16:29 ` Michael S. Tsirkin
@ 2017-12-02 0:59 ` David Gibson
2017-12-03 5:07 ` Michael S. Tsirkin
2017-12-04 4:40 ` David Gibson
1 sibling, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-12-02 0:59 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Marcel Apfelbaum, Eduardo Habkost, Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1904 bytes --]
On Fri, Dec 01, 2017 at 06:29:39PM +0200, Michael S. Tsirkin wrote:
> On Thu, Nov 30, 2017 at 03:02:48PM +1100, David Gibson wrote:
> > On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
> > > On 29/11/2017 10:46, David Gibson wrote:
> > > > include/hw/pci/pci_bus.h is now very small and can only safely be included
> > > > after hw/pci/pci.h. So, just fold it into pci.h.
> > > >
> > >
> > > I don't get the benefit from merging the header files.
> > > I would go the other way around and find stuff specific
> > > to pci_bus and add it there, like the pci_bus_new*
> > > you touched in the prev patch.
> >
> > Hrm. Except the point of the earlier patch was that those are
> > actually spoecific to root buses, so would really belong in say
> > pci-host.h, rather than pci-bus.h.
> >
> > A log of PCI stuff deals with interaction between the device and bus
> > though, so it just seemed like more trouble than it was worth to go
> > disentangling them properly.
> >
> > > Maybe if *all* code files requiring pci.h would automatically
> > > need pci_bus.h would make sense, but I didn't check that.
> >
> > Yeah, I don't think every user of pci.h needs pci_bus.h, although a
> > fair few do as you can see from the diff. Well, I guess it's up to
> > Michael. I'll be tolerably content either way - I'd say this is the
> > least important patch of the series.
>
> I'm inclined to agree with Marcel also because it's lots of noise for no
> real win. The next patch depends on this one. I skipped this and next
> one, pls feel free to repost next one.
Ok, will do. Is the tree you've merged the others to public
somewhere, so I can rebase on it?
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-12-02 0:59 ` David Gibson
@ 2017-12-03 5:07 ` Michael S. Tsirkin
2017-12-04 4:01 ` David Gibson
0 siblings, 1 reply; 47+ messages in thread
From: Michael S. Tsirkin @ 2017-12-03 5:07 UTC (permalink / raw)
To: David Gibson; +Cc: Marcel Apfelbaum, Eduardo Habkost, Igor Mammedov, qemu-devel
On Sat, Dec 02, 2017 at 11:59:20AM +1100, David Gibson wrote:
> On Fri, Dec 01, 2017 at 06:29:39PM +0200, Michael S. Tsirkin wrote:
> > On Thu, Nov 30, 2017 at 03:02:48PM +1100, David Gibson wrote:
> > > On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
> > > > On 29/11/2017 10:46, David Gibson wrote:
> > > > > include/hw/pci/pci_bus.h is now very small and can only safely be included
> > > > > after hw/pci/pci.h. So, just fold it into pci.h.
> > > > >
> > > >
> > > > I don't get the benefit from merging the header files.
> > > > I would go the other way around and find stuff specific
> > > > to pci_bus and add it there, like the pci_bus_new*
> > > > you touched in the prev patch.
> > >
> > > Hrm. Except the point of the earlier patch was that those are
> > > actually spoecific to root buses, so would really belong in say
> > > pci-host.h, rather than pci-bus.h.
> > >
> > > A log of PCI stuff deals with interaction between the device and bus
> > > though, so it just seemed like more trouble than it was worth to go
> > > disentangling them properly.
> > >
> > > > Maybe if *all* code files requiring pci.h would automatically
> > > > need pci_bus.h would make sense, but I didn't check that.
> > >
> > > Yeah, I don't think every user of pci.h needs pci_bus.h, although a
> > > fair few do as you can see from the diff. Well, I guess it's up to
> > > Michael. I'll be tolerably content either way - I'd say this is the
> > > least important patch of the series.
> >
> > I'm inclined to agree with Marcel also because it's lots of noise for no
> > real win. The next patch depends on this one. I skipped this and next
> > one, pls feel free to repost next one.
>
> Ok, will do. Is the tree you've merged the others to public
> somewhere, so I can rebase on it?
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git branch is named pci
pls note this is a rebased branch, commit IDs won't be stable.
> --
> David Gibson | I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
> | _way_ _around_!
> http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-12-03 5:07 ` Michael S. Tsirkin
@ 2017-12-04 4:01 ` David Gibson
0 siblings, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-12-04 4:01 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Marcel Apfelbaum, Eduardo Habkost, Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 2353 bytes --]
On Sun, Dec 03, 2017 at 07:07:36AM +0200, Michael S. Tsirkin wrote:
> On Sat, Dec 02, 2017 at 11:59:20AM +1100, David Gibson wrote:
> > On Fri, Dec 01, 2017 at 06:29:39PM +0200, Michael S. Tsirkin wrote:
> > > On Thu, Nov 30, 2017 at 03:02:48PM +1100, David Gibson wrote:
> > > > On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
> > > > > On 29/11/2017 10:46, David Gibson wrote:
> > > > > > include/hw/pci/pci_bus.h is now very small and can only safely be included
> > > > > > after hw/pci/pci.h. So, just fold it into pci.h.
> > > > > >
> > > > >
> > > > > I don't get the benefit from merging the header files.
> > > > > I would go the other way around and find stuff specific
> > > > > to pci_bus and add it there, like the pci_bus_new*
> > > > > you touched in the prev patch.
> > > >
> > > > Hrm. Except the point of the earlier patch was that those are
> > > > actually spoecific to root buses, so would really belong in say
> > > > pci-host.h, rather than pci-bus.h.
> > > >
> > > > A log of PCI stuff deals with interaction between the device and bus
> > > > though, so it just seemed like more trouble than it was worth to go
> > > > disentangling them properly.
> > > >
> > > > > Maybe if *all* code files requiring pci.h would automatically
> > > > > need pci_bus.h would make sense, but I didn't check that.
> > > >
> > > > Yeah, I don't think every user of pci.h needs pci_bus.h, although a
> > > > fair few do as you can see from the diff. Well, I guess it's up to
> > > > Michael. I'll be tolerably content either way - I'd say this is the
> > > > least important patch of the series.
> > >
> > > I'm inclined to agree with Marcel also because it's lots of noise for no
> > > real win. The next patch depends on this one. I skipped this and next
> > > one, pls feel free to repost next one.
> >
> > Ok, will do. Is the tree you've merged the others to public
> > somewhere, so I can rebase on it?
>
> git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git branch is named
> pci
Thanks.
> pls note this is a rebased branch, commit IDs won't be stable.
Understood.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h
2017-12-01 16:29 ` Michael S. Tsirkin
2017-12-02 0:59 ` David Gibson
@ 2017-12-04 4:40 ` David Gibson
1 sibling, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-12-04 4:40 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Marcel Apfelbaum, Eduardo Habkost, Igor Mammedov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1916 bytes --]
On Fri, Dec 01, 2017 at 06:29:39PM +0200, Michael S. Tsirkin wrote:
> On Thu, Nov 30, 2017 at 03:02:48PM +1100, David Gibson wrote:
> > On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
> > > On 29/11/2017 10:46, David Gibson wrote:
> > > > include/hw/pci/pci_bus.h is now very small and can only safely be included
> > > > after hw/pci/pci.h. So, just fold it into pci.h.
> > > >
> > >
> > > I don't get the benefit from merging the header files.
> > > I would go the other way around and find stuff specific
> > > to pci_bus and add it there, like the pci_bus_new*
> > > you touched in the prev patch.
> >
> > Hrm. Except the point of the earlier patch was that those are
> > actually spoecific to root buses, so would really belong in say
> > pci-host.h, rather than pci-bus.h.
> >
> > A log of PCI stuff deals with interaction between the device and bus
> > though, so it just seemed like more trouble than it was worth to go
> > disentangling them properly.
> >
> > > Maybe if *all* code files requiring pci.h would automatically
> > > need pci_bus.h would make sense, but I didn't check that.
> >
> > Yeah, I don't think every user of pci.h needs pci_bus.h, although a
> > fair few do as you can see from the diff. Well, I guess it's up to
> > Michael. I'll be tolerably content either way - I'd say this is the
> > least important patch of the series.
>
> I'm inclined to agree with Marcel also because it's lots of noise for no
> real win. The next patch depends on this one. I skipped this and next
> one, pls feel free to repost next one.
Ok, will do. I have some other cleanups in mind, so if I can finish
them time, I'll fold them in as well.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-11-29 9:18 ` Fam Zheng
2017-11-29 10:11 ` David Gibson
@ 2017-12-05 4:49 ` Michael S. Tsirkin
2017-12-05 5:05 ` Fam Zheng
1 sibling, 1 reply; 47+ messages in thread
From: Michael S. Tsirkin @ 2017-12-05 4:49 UTC (permalink / raw)
To: Fam Zheng; +Cc: qemu-devel, david, ehabkost, marcel, imammedo
On Wed, Nov 29, 2017 at 05:18:47PM +0800, Fam Zheng wrote:
> On Wed, 11/29 01:02, no-reply@patchew.org wrote:
> > /tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
>
> Hmm, the host is shared and what I have is a normal user account, so there is no
> control over disk space availability. Anyway this is completely unrelated to
> this series. Sorry for the noise.
>
> Fam
Could you disable this until you have the time to detect disk full
errors? You are training people to ignore this bot, not a good thing.
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-12-05 4:49 ` Michael S. Tsirkin
@ 2017-12-05 5:05 ` Fam Zheng
2017-12-05 5:11 ` David Gibson
0 siblings, 1 reply; 47+ messages in thread
From: Fam Zheng @ 2017-12-05 5:05 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: marcel, imammedo, qemu-devel, ehabkost, david
On Tue, 12/05 06:49, Michael S. Tsirkin wrote:
> On Wed, Nov 29, 2017 at 05:18:47PM +0800, Fam Zheng wrote:
> > On Wed, 11/29 01:02, no-reply@patchew.org wrote:
> > > /tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
> >
> > Hmm, the host is shared and what I have is a normal user account, so there is no
> > control over disk space availability. Anyway this is completely unrelated to
> > this series. Sorry for the noise.
> >
> > Fam
>
> Could you disable this until you have the time to detect disk full
> errors? You are training people to ignore this bot, not a good thing.
>
Thanks for the suggestion. I've added a string match to the notification
condition. The problem is disk is only one factor, I dream of an AI that can be
trained to tell which errors are geniune bugs of the patch and which are
environment failures... :)
Fam
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-12-05 5:05 ` Fam Zheng
@ 2017-12-05 5:11 ` David Gibson
2017-12-05 6:46 ` Fam Zheng
0 siblings, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-12-05 5:11 UTC (permalink / raw)
To: Fam Zheng; +Cc: Michael S. Tsirkin, marcel, imammedo, qemu-devel, ehabkost
[-- Attachment #1: Type: text/plain, Size: 1528 bytes --]
On Tue, Dec 05, 2017 at 01:05:58PM +0800, Fam Zheng wrote:
> On Tue, 12/05 06:49, Michael S. Tsirkin wrote:
> > On Wed, Nov 29, 2017 at 05:18:47PM +0800, Fam Zheng wrote:
> > > On Wed, 11/29 01:02, no-reply@patchew.org wrote:
> > > > /tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
> > >
> > > Hmm, the host is shared and what I have is a normal user account, so there is no
> > > control over disk space availability. Anyway this is completely unrelated to
> > > this series. Sorry for the noise.
> > >
> > > Fam
> >
> > Could you disable this until you have the time to detect disk full
> > errors? You are training people to ignore this bot, not a good thing.
> >
>
> Thanks for the suggestion. I've added a string match to the notification
> condition. The problem is disk is only one factor, I dream of an AI that can be
> trained to tell which errors are geniune bugs of the patch and which are
> environment failures... :)
Another approach would be to have a "known good" build that runs every
so often. If the known good build fails, the bot disables itself (and
tells you to investigate). Obviously there are ways that could not
work as well, but it should catch a fair range of spurious failures.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-12-05 5:11 ` David Gibson
@ 2017-12-05 6:46 ` Fam Zheng
2017-12-05 13:06 ` David Gibson
0 siblings, 1 reply; 47+ messages in thread
From: Fam Zheng @ 2017-12-05 6:46 UTC (permalink / raw)
To: David Gibson; +Cc: Michael S. Tsirkin, marcel, imammedo, qemu-devel, ehabkost
On Tue, 12/05 16:11, David Gibson wrote:
> On Tue, Dec 05, 2017 at 01:05:58PM +0800, Fam Zheng wrote:
> > On Tue, 12/05 06:49, Michael S. Tsirkin wrote:
> > > On Wed, Nov 29, 2017 at 05:18:47PM +0800, Fam Zheng wrote:
> > > > On Wed, 11/29 01:02, no-reply@patchew.org wrote:
> > > > > /tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
> > > >
> > > > Hmm, the host is shared and what I have is a normal user account, so there is no
> > > > control over disk space availability. Anyway this is completely unrelated to
> > > > this series. Sorry for the noise.
> > > >
> > > > Fam
> > >
> > > Could you disable this until you have the time to detect disk full
> > > errors? You are training people to ignore this bot, not a good thing.
> > >
> >
> > Thanks for the suggestion. I've added a string match to the notification
> > condition. The problem is disk is only one factor, I dream of an AI that can be
> > trained to tell which errors are geniune bugs of the patch and which are
> > environment failures... :)
>
> Another approach would be to have a "known good" build that runs every
> so often. If the known good build fails, the bot disables itself (and
> tells you to investigate). Obviously there are ways that could not
> work as well, but it should catch a fair range of spurious failures.
Interesting idea, yes. A slightly simplified way is to test the "base" of the
series and only report errors if the base can pass.
Fam
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-12-05 6:46 ` Fam Zheng
@ 2017-12-05 13:06 ` David Gibson
2017-12-05 13:42 ` Fam Zheng
0 siblings, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-12-05 13:06 UTC (permalink / raw)
To: Fam Zheng; +Cc: Michael S. Tsirkin, marcel, imammedo, qemu-devel, ehabkost
[-- Attachment #1: Type: text/plain, Size: 2017 bytes --]
On Tue, Dec 05, 2017 at 02:46:35PM +0800, Fam Zheng wrote:
> On Tue, 12/05 16:11, David Gibson wrote:
> > On Tue, Dec 05, 2017 at 01:05:58PM +0800, Fam Zheng wrote:
> > > On Tue, 12/05 06:49, Michael S. Tsirkin wrote:
> > > > On Wed, Nov 29, 2017 at 05:18:47PM +0800, Fam Zheng wrote:
> > > > > On Wed, 11/29 01:02, no-reply@patchew.org wrote:
> > > > > > /tmp/cc3Czn0R.s: Fatal error: can't write 3947 bytes to section .debug_str of hw/arm/virt-acpi-build.o because: 'No space left on device'
> > > > >
> > > > > Hmm, the host is shared and what I have is a normal user account, so there is no
> > > > > control over disk space availability. Anyway this is completely unrelated to
> > > > > this series. Sorry for the noise.
> > > > >
> > > > > Fam
> > > >
> > > > Could you disable this until you have the time to detect disk full
> > > > errors? You are training people to ignore this bot, not a good thing.
> > > >
> > >
> > > Thanks for the suggestion. I've added a string match to the notification
> > > condition. The problem is disk is only one factor, I dream of an AI that can be
> > > trained to tell which errors are geniune bugs of the patch and which are
> > > environment failures... :)
> >
> > Another approach would be to have a "known good" build that runs every
> > so often. If the known good build fails, the bot disables itself (and
> > tells you to investigate). Obviously there are ways that could not
> > work as well, but it should catch a fair range of spurious failures.
>
> Interesting idea, yes. A slightly simplified way is to test the "base" of the
> series and only report errors if the base can pass.
Right. I think that would catch even more cases, but means doing the
"base" build every time, which might slow things down significantly.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-12-05 13:06 ` David Gibson
@ 2017-12-05 13:42 ` Fam Zheng
2017-12-05 23:14 ` David Gibson
0 siblings, 1 reply; 47+ messages in thread
From: Fam Zheng @ 2017-12-05 13:42 UTC (permalink / raw)
To: David Gibson; +Cc: Michael S. Tsirkin, marcel, imammedo, qemu-devel, ehabkost
On Wed, 12/06 00:06, David Gibson wrote:
> > > Another approach would be to have a "known good" build that runs every
> > > so often. If the known good build fails, the bot disables itself (and
> > > tells you to investigate). Obviously there are ways that could not
> > > work as well, but it should catch a fair range of spurious failures.
> >
> > Interesting idea, yes. A slightly simplified way is to test the "base" of the
> > series and only report errors if the base can pass.
>
> Right. I think that would catch even more cases, but means doing the
> "base" build every time, which might slow things down significantly.
Every time when a test on topic branch failed, but not necessarily when it
passed, which is not that bad.
Fam
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [for-2.12 0/7] PCI cleanups
2017-12-05 13:42 ` Fam Zheng
@ 2017-12-05 23:14 ` David Gibson
0 siblings, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-12-05 23:14 UTC (permalink / raw)
To: Fam Zheng; +Cc: Michael S. Tsirkin, marcel, imammedo, qemu-devel, ehabkost
[-- Attachment #1: Type: text/plain, Size: 1066 bytes --]
On Tue, Dec 05, 2017 at 09:42:07PM +0800, Fam Zheng wrote:
> On Wed, 12/06 00:06, David Gibson wrote:
> > > > Another approach would be to have a "known good" build that runs every
> > > > so often. If the known good build fails, the bot disables itself (and
> > > > tells you to investigate). Obviously there are ways that could not
> > > > work as well, but it should catch a fair range of spurious failures.
> > >
> > > Interesting idea, yes. A slightly simplified way is to test the "base" of the
> > > series and only report errors if the base can pass.
> >
> > Right. I think that would catch even more cases, but means doing the
> > "base" build every time, which might slow things down significantly.
>
> Every time when a test on topic branch failed, but not necessarily when it
> passed, which is not that bad.
True. Sounds promising.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 47+ messages in thread
end of thread, other threads:[~2017-12-05 23:42 UTC | newest]
Thread overview: 47+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-11-29 8:46 [Qemu-devel] [for-2.12 0/7] PCI cleanups David Gibson
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity David Gibson
2017-11-29 9:43 ` Marcel Apfelbaum
2017-11-30 6:17 ` Peter Xu
2017-12-01 0:02 ` David Gibson
2017-12-01 4:27 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h David Gibson
2017-11-29 10:33 ` Marcel Apfelbaum
2017-11-30 6:41 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h David Gibson
2017-11-29 10:38 ` Marcel Apfelbaum
2017-11-30 4:02 ` David Gibson
2017-11-30 5:56 ` Peter Xu
2017-11-30 10:25 ` Marcel Apfelbaum
2017-12-01 16:29 ` Michael S. Tsirkin
2017-12-02 0:59 ` David Gibson
2017-12-03 5:07 ` Michael S. Tsirkin
2017-12-04 4:01 ` David Gibson
2017-12-04 4:40 ` David Gibson
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root() David Gibson
2017-11-29 10:45 ` Marcel Apfelbaum
2017-11-29 13:12 ` David Gibson
2017-11-29 14:42 ` Marcel Apfelbaum
2017-11-30 6:23 ` Peter Xu
2017-12-01 4:25 ` David Gibson
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper David Gibson
2017-11-29 10:48 ` Marcel Apfelbaum
2017-11-30 6:42 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer David Gibson
2017-11-29 10:54 ` Marcel Apfelbaum
2017-11-29 11:41 ` Eduardo Habkost
2017-11-29 13:15 ` David Gibson
2017-11-29 14:43 ` Marcel Apfelbaum
2017-11-30 6:31 ` Peter Xu
2017-11-29 8:46 ` [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus() David Gibson
2017-11-29 10:56 ` Marcel Apfelbaum
2017-11-30 6:39 ` Peter Xu
2017-11-29 9:02 ` [Qemu-devel] [for-2.12 0/7] PCI cleanups no-reply
2017-11-29 9:18 ` Fam Zheng
2017-11-29 10:11 ` David Gibson
2017-12-05 4:49 ` Michael S. Tsirkin
2017-12-05 5:05 ` Fam Zheng
2017-12-05 5:11 ` David Gibson
2017-12-05 6:46 ` Fam Zheng
2017-12-05 13:06 ` David Gibson
2017-12-05 13:42 ` Fam Zheng
2017-12-05 23:14 ` David Gibson
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