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* [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again
@ 2017-12-06 23:12 Chris Wilson
  2017-12-06 23:50 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2017-12-06 23:12 UTC (permalink / raw)
  To: intel-gfx

Still CI remains obstinate that RC6 is not smoothly incrementing during
the sample period. Tweak the wait_for_rc6() to first wait for the
initial Evaluation Interval before polling.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c         | 15 +++++++++++----
 tests/pm_rc6_residency.c | 15 +++++++++++----
 2 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index ff6568221..917832d1b 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1000,13 +1000,20 @@ static bool wait_for_rc6(int fd)
 	struct timespec tv = {};
 	uint64_t start, now;
 
-	start = pmu_read_single(fd);
+	/* First wait for roughly an RC6 Evaluation Interval */
+	usleep(160 * 1000);
+
+	/* Then poll for RC6 to start ticking */
+	now = pmu_read_single(fd);
 	do {
-		usleep(50);
+		start = now;
+		usleep(5000);
 		now = pmu_read_single(fd);
-	} while (start == now && !igt_seconds_elapsed(&tv));
+		if (now - start > 2e6)
+			return true;
+	} while (!igt_seconds_elapsed(&tv));
 
-	return start != now;
+	return false;
 }
 
 static void
diff --git a/tests/pm_rc6_residency.c b/tests/pm_rc6_residency.c
index 16f4b1421..7cc62dac8 100644
--- a/tests/pm_rc6_residency.c
+++ b/tests/pm_rc6_residency.c
@@ -170,13 +170,20 @@ static bool wait_for_rc6(void)
 	struct timespec tv = {};
 	unsigned long start, now;
 
-	start = read_rc6_residency("rc6");
+	/* First wait for roughly an RC6 Evaluation Interval */
+        usleep(160 * 1000);
+
+        /* Then poll for RC6 to start ticking */
+	now = read_rc6_residency("rc6");
 	do {
-		usleep(50);
+		start = now;
+		usleep(5000);
 		now = read_rc6_residency("rc6");
-	} while (now == start && !igt_seconds_elapsed(&tv));
+		if (now - start > 2)
+			return true;
+	} while (!igt_seconds_elapsed(&tv));
 
-	return now != start;
+	return false;
 }
 
 igt_main
-- 
2.15.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.BAT: success for igt/perf_pmu: Tweak wait_for_rc6, yet again
  2017-12-06 23:12 [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again Chris Wilson
@ 2017-12-06 23:50 ` Patchwork
  2017-12-07  1:04 ` ✓ Fi.CI.IGT: " Patchwork
  2017-12-07 10:25 ` [PATCH igt] " Tvrtko Ursulin
  2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-12-06 23:50 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: igt/perf_pmu: Tweak wait_for_rc6, yet again
URL   : https://patchwork.freedesktop.org/series/34998/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
1db12466cb5ad8483cd469753d2e312a62d717b7 meson: build a full dependency for lib_igt_perf

with latest DRM-Tip kernel build CI_DRM_3468
95f37eb3ebfd drm-tip: 2017y-12m-06d-21h-01m-04s UTC integration manifest

No testlist changes.

Test debugfs_test:
        Subgroup read_all_entries:
                dmesg-fail -> DMESG-WARN (fi-elk-e7500) fdo#103989

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:441s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:383s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:522s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:282s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:511s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:506s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:494s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:480s
fi-elk-e7500     total:224  pass:163  dwarn:15  dfail:0   fail:0   skip:45 
fi-gdg-551       total:288  pass:178  dwarn:1   dfail:0   fail:1   skip:108 time:270s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:549s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:377s
fi-hsw-4770r     total:288  pass:224  dwarn:0   dfail:0   fail:0   skip:64  time:259s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:485s
fi-ivb-3770      total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:449s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:530s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:478s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:537s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:592s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:454s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:544s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:572s
fi-skl-6700k     total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:519s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:499s
fi-snb-2520m     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:549s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:417s
Blacklisted hosts:
fi-cnl-y         total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:622s
fi-glk-dsi       total:288  pass:257  dwarn:0   dfail:0   fail:1   skip:30  time:492s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_606/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.IGT: success for igt/perf_pmu: Tweak wait_for_rc6, yet again
  2017-12-06 23:12 [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again Chris Wilson
  2017-12-06 23:50 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-12-07  1:04 ` Patchwork
  2017-12-07 10:25 ` [PATCH igt] " Tvrtko Ursulin
  2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-12-07  1:04 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: igt/perf_pmu: Tweak wait_for_rc6, yet again
URL   : https://patchwork.freedesktop.org/series/34998/
State : success

== Summary ==

Test kms_cursor_crc:
        Subgroup cursor-64x64-suspend:
                pass       -> SKIP       (shard-snb) fdo#102365
Test pm_rpm:
        Subgroup system-suspend-execbuf:
                pass       -> SKIP       (shard-hsw) fdo#103375
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
                fail       -> PASS       (shard-snb) fdo#101623

fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623

shard-hsw        total:2679 pass:1535 dwarn:1   dfail:0   fail:10  skip:1133 time:9474s
shard-snb        total:2679 pass:1307 dwarn:1   dfail:0   fail:12  skip:1359 time:8054s
Blacklisted hosts:
shard-apl        total:2679 pass:1676 dwarn:3   dfail:0   fail:22  skip:977 time:13656s
shard-kbl        total:2534 pass:1698 dwarn:3   dfail:0   fail:22  skip:808 time:9640s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_606/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again
  2017-12-06 23:12 [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again Chris Wilson
  2017-12-06 23:50 ` ✓ Fi.CI.BAT: success for " Patchwork
  2017-12-07  1:04 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-12-07 10:25 ` Tvrtko Ursulin
  2017-12-07 10:35   ` Chris Wilson
  2 siblings, 1 reply; 6+ messages in thread
From: Tvrtko Ursulin @ 2017-12-07 10:25 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 06/12/2017 23:12, Chris Wilson wrote:
> Still CI remains obstinate that RC6 is not smoothly incrementing during
> the sample period. Tweak the wait_for_rc6() to first wait for the
> initial Evaluation Interval before polling.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   tests/perf_pmu.c         | 15 +++++++++++----
>   tests/pm_rc6_residency.c | 15 +++++++++++----
>   2 files changed, 22 insertions(+), 8 deletions(-)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index ff6568221..917832d1b 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -1000,13 +1000,20 @@ static bool wait_for_rc6(int fd)
>   	struct timespec tv = {};
>   	uint64_t start, now;
>   
> -	start = pmu_read_single(fd);
> +	/* First wait for roughly an RC6 Evaluation Interval */
> +	usleep(160 * 1000);
> +
> +	/* Then poll for RC6 to start ticking */
> +	now = pmu_read_single(fd);
>   	do {
> -		usleep(50);
> +		start = now;
> +		usleep(5000);
>   		now = pmu_read_single(fd);
> -	} while (start == now && !igt_seconds_elapsed(&tv));
> +		if (now - start > 2e6)
> +			return true;

What is the thinking behind the 2ms of RC6 after 5ms of sleep criteria?

Regards,

Tvrtko

> +	} while (!igt_seconds_elapsed(&tv));
>   
> -	return start != now;
> +	return false;
>   }
>   
>   static void
> diff --git a/tests/pm_rc6_residency.c b/tests/pm_rc6_residency.c
> index 16f4b1421..7cc62dac8 100644
> --- a/tests/pm_rc6_residency.c
> +++ b/tests/pm_rc6_residency.c
> @@ -170,13 +170,20 @@ static bool wait_for_rc6(void)
>   	struct timespec tv = {};
>   	unsigned long start, now;
>   
> -	start = read_rc6_residency("rc6");
> +	/* First wait for roughly an RC6 Evaluation Interval */
> +        usleep(160 * 1000);
> +
> +        /* Then poll for RC6 to start ticking */
> +	now = read_rc6_residency("rc6");
>   	do {
> -		usleep(50);
> +		start = now;
> +		usleep(5000);
>   		now = read_rc6_residency("rc6");
> -	} while (now == start && !igt_seconds_elapsed(&tv));
> +		if (now - start > 2)
> +			return true;
> +	} while (!igt_seconds_elapsed(&tv));
>   
> -	return now != start;
> +	return false;
>   }
>   
>   igt_main
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again
  2017-12-07 10:25 ` [PATCH igt] " Tvrtko Ursulin
@ 2017-12-07 10:35   ` Chris Wilson
  2017-12-07 12:43     ` Tvrtko Ursulin
  0 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2017-12-07 10:35 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2017-12-07 10:25:36)
> 
> On 06/12/2017 23:12, Chris Wilson wrote:
> > Still CI remains obstinate that RC6 is not smoothly incrementing during
> > the sample period. Tweak the wait_for_rc6() to first wait for the
> > initial Evaluation Interval before polling.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > ---
> >   tests/perf_pmu.c         | 15 +++++++++++----
> >   tests/pm_rc6_residency.c | 15 +++++++++++----
> >   2 files changed, 22 insertions(+), 8 deletions(-)
> > 
> > diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> > index ff6568221..917832d1b 100644
> > --- a/tests/perf_pmu.c
> > +++ b/tests/perf_pmu.c
> > @@ -1000,13 +1000,20 @@ static bool wait_for_rc6(int fd)
> >       struct timespec tv = {};
> >       uint64_t start, now;
> >   
> > -     start = pmu_read_single(fd);
> > +     /* First wait for roughly an RC6 Evaluation Interval */
> > +     usleep(160 * 1000);
> > +
> > +     /* Then poll for RC6 to start ticking */
> > +     now = pmu_read_single(fd);
> >       do {
> > -             usleep(50);
> > +             start = now;
> > +             usleep(5000);
> >               now = pmu_read_single(fd);
> > -     } while (start == now && !igt_seconds_elapsed(&tv));
> > +             if (now - start > 2e6)
> > +                     return true;
> 
> What is the thinking behind the 2ms of RC6 after 5ms of sleep criteria?

I was being worried about random fluctuations. The sleep before is
probably good enough, basically I'm guessing at what caused it to fail,
with the starting point being that we declared RC6 active before it was.

2ms was trying to guess at what the granularity of the counter was,
which is ~1us, not 1ms. Respin with 2us instead?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again
  2017-12-07 10:35   ` Chris Wilson
@ 2017-12-07 12:43     ` Tvrtko Ursulin
  0 siblings, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2017-12-07 12:43 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 07/12/2017 10:35, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2017-12-07 10:25:36)
>>
>> On 06/12/2017 23:12, Chris Wilson wrote:
>>> Still CI remains obstinate that RC6 is not smoothly incrementing during
>>> the sample period. Tweak the wait_for_rc6() to first wait for the
>>> initial Evaluation Interval before polling.
>>>
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> ---
>>>    tests/perf_pmu.c         | 15 +++++++++++----
>>>    tests/pm_rc6_residency.c | 15 +++++++++++----
>>>    2 files changed, 22 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
>>> index ff6568221..917832d1b 100644
>>> --- a/tests/perf_pmu.c
>>> +++ b/tests/perf_pmu.c
>>> @@ -1000,13 +1000,20 @@ static bool wait_for_rc6(int fd)
>>>        struct timespec tv = {};
>>>        uint64_t start, now;
>>>    
>>> -     start = pmu_read_single(fd);
>>> +     /* First wait for roughly an RC6 Evaluation Interval */
>>> +     usleep(160 * 1000);
>>> +
>>> +     /* Then poll for RC6 to start ticking */
>>> +     now = pmu_read_single(fd);
>>>        do {
>>> -             usleep(50);
>>> +             start = now;
>>> +             usleep(5000);
>>>                now = pmu_read_single(fd);
>>> -     } while (start == now && !igt_seconds_elapsed(&tv));
>>> +             if (now - start > 2e6)
>>> +                     return true;
>>
>> What is the thinking behind the 2ms of RC6 after 5ms of sleep criteria?
> 
> I was being worried about random fluctuations. The sleep before is
> probably good enough, basically I'm guessing at what caused it to fail,
> with the starting point being that we declared RC6 active before it was.
> 
> 2ms was trying to guess at what the granularity of the counter was,
> which is ~1us, not 1ms. Respin with 2us instead?

Hard for me to say since after the last patch I expected that once the 
counter is running that it is running. Now I don't know anything any 
longer. :/

No harm in trying since the current version is unreliable..

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2017-12-07 12:53 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-12-06 23:12 [PATCH igt] igt/perf_pmu: Tweak wait_for_rc6, yet again Chris Wilson
2017-12-06 23:50 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-12-07  1:04 ` ✓ Fi.CI.IGT: " Patchwork
2017-12-07 10:25 ` [PATCH igt] " Tvrtko Ursulin
2017-12-07 10:35   ` Chris Wilson
2017-12-07 12:43     ` Tvrtko Ursulin

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