[PATCH i-g-t] igt/psr: Test vblank continuity with PSR enabled

[PATCH i-g-t] igt/psr: Test vblank continuity with PSR enabled

[Dhinakaran Pandiyan]

PSR allows DMC to put the system to low power states when active, but
this can reset the frame counter on some platforms. The frame counter reset
leads to a negative diff applied to vblank count. This subtest checks
for that.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 tests/kms_psr_sink_crc.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)

diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
index 83a69f0b..f76c3041 100644
--- a/tests/kms_psr_sink_crc.c
+++ b/tests/kms_psr_sink_crc.c
@@ -69,6 +69,7 @@ typedef struct {
 	enum operations op;
 	uint32_t devid;
 	uint32_t crtc_id;
+	enum pipe pipe;
 	igt_display_t display;
 	drm_intel_bufmgr *bufmgr;
 	struct igt_fb fb_green, fb_white;
@@ -107,6 +108,7 @@ static void setup_output(data_t *data)
 		if (c->connector_type != DRM_MODE_CONNECTOR_eDP)
 			continue;
 
+		data->pipe = pipe;
 		igt_output_set_pipe(output, pipe);
 		data->crtc_id = output->config.crtc->crtc_id;
 		data->output = output;
@@ -285,6 +287,68 @@ static void assert_or_manual(bool condition, const char *expected)
 	igt_assert(igt_interactive_debug || condition);
 }
 
+static unsigned int get_vblank(int fd, unsigned int pipe)
+{
+	union drm_wait_vblank vbl;
+
+	memset(&vbl, 0, sizeof(vbl));
+	vbl.request.type = DRM_VBLANK_RELATIVE | kmstest_get_vbl_flag(pipe);
+	igt_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
+
+	return vbl.reply.sequence;
+}
+
+static void dmc_read_counts(unsigned int fd, unsigned int *count)
+{
+	char buf[512];
+
+	igt_debugfs_read(fd, "i915_dmc_info", buf);
+	igt_assert_eq(sscanf(strstr(buf, "DC3 -> DC5"), "DC3 -> DC5 count: %u", &count[0]),
+		      1);
+	igt_assert_eq(sscanf(strstr(buf, "DC5 -> DC6"), "DC5 -> DC6 count: %u", &count[1]),
+		      1);
+	igt_debug("DC3->DC5 count=%d, DC5->DC6 count=%d\n", count[0], count[1]);
+}
+
+static bool has_dmc(unsigned int fd)
+{
+	char buf[512];
+
+	igt_debugfs_read(fd, "i915_dmc_info", buf);
+	return strstr(buf, "fw loaded: yes");
+}
+
+static void check_vblanks(data_t *data)
+{
+	unsigned int first_vblank, second_vblank;
+	int wait = 30; /* Takes about 2.5 seconds for DC_OFF disable */
+
+	first_vblank = get_vblank(data->drm_fd, data->pipe);
+
+	if (has_dmc(data->drm_fd)) {
+		unsigned int new_dc[2], old_dc[2];
+
+		dmc_read_counts(data->drm_fd, new_dc);
+		do {
+			memcpy(old_dc, new_dc, sizeof(new_dc));
+			usleep(100 * 1000);
+			dmc_read_counts(data->drm_fd, new_dc);
+		} while (!memcmp(old_dc, new_dc, sizeof(new_dc)) && --wait);
+
+		igt_assert(wait);
+
+	} else {
+		sleep(3);
+	}
+
+	second_vblank = get_vblank(data->drm_fd, data->pipe);
+	igt_debug("vblank count went from %d to %d in %d ms.\n",
+		  first_vblank, second_vblank,
+		  has_dmc(data->drm_fd) ? (30 - wait) * 100 : 3000);
+
+	igt_assert_lt(first_vblank, second_vblank);
+}
+
 static bool drrs_disabled(data_t *data)
 {
 	char buf[512];
@@ -572,6 +636,13 @@ int main(int argc, char *argv[])
 		}
 	}
 
+	igt_subtest("vblank") {
+		setup_test_plane(&data);
+		igt_assert(wait_psr_entry(&data));
+		check_vblanks(&data);
+		test_cleanup(&data);
+	}
+
 	igt_subtest_f("dpms_off_psr_active") {
 		data.test_plane = DRM_PLANE_TYPE_PRIMARY;
 		data.op = RENDER;
-- 
2.11.0

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[PATCH i-g-t v2] igt/psr: Test vblank continuity with PSR enabled

[Dhinakaran Pandiyan]

PSR allows DMC to put the system to low power states when active, but
this can reset the frame counter on some platforms. The frame counter reset
leads to a negative diff applied to vblank count. This subtest checks
for that.

v2: Some optimizations and data type changes.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 tests/kms_psr_sink_crc.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
index 83a69f0b..831368b2 100644
--- a/tests/kms_psr_sink_crc.c
+++ b/tests/kms_psr_sink_crc.c
@@ -69,6 +69,7 @@ typedef struct {
 	enum operations op;
 	uint32_t devid;
 	uint32_t crtc_id;
+	enum pipe pipe;
 	igt_display_t display;
 	drm_intel_bufmgr *bufmgr;
 	struct igt_fb fb_green, fb_white;
@@ -107,6 +108,7 @@ static void setup_output(data_t *data)
 		if (c->connector_type != DRM_MODE_CONNECTOR_eDP)
 			continue;
 
+		data->pipe = pipe;
 		igt_output_set_pipe(output, pipe);
 		data->crtc_id = output->config.crtc->crtc_id;
 		data->output = output;
@@ -285,6 +287,63 @@ static void assert_or_manual(bool condition, const char *expected)
 	igt_assert(igt_interactive_debug || condition);
 }
 
+static unsigned int get_vblank(int fd, unsigned int pipe)
+{
+	union drm_wait_vblank vbl;
+
+	memset(&vbl, 0, sizeof(vbl));
+	vbl.request.type = DRM_VBLANK_RELATIVE | kmstest_get_vbl_flag(pipe);
+	igt_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
+
+	return vbl.reply.sequence;
+}
+
+static void dmc_read_counts(unsigned int fd, unsigned int *count)
+{
+	char buf[512];
+
+	igt_debugfs_read(fd, "i915_dmc_info", buf);
+	igt_assert_eq(sscanf(strstr(buf, "DC3 -> DC5"), "DC3 -> DC5 count: %u", &count[0]),
+		      1);
+	igt_assert_eq(sscanf(strstr(buf, "DC5 -> DC6"), "DC5 -> DC6 count: %u", &count[1]),
+		      1);
+	igt_debug("DC3->DC5 count=%u, DC5->DC6 count=%u\n", count[0], count[1]);
+}
+
+static void check_vblanks(data_t *data)
+{
+	unsigned int first_vbl, second_vbl;
+	int wait = 30; /* Takes about 2.5 seconds for DC_OFF disable */
+	char buf[512];
+	bool has_dmc;
+
+	first_vbl = get_vblank(data->drm_fd, data->pipe);
+
+	igt_debugfs_read(data->drm_fd, "i915_dmc_info", buf);
+	has_dmc = strstr(buf, "fw loaded: yes");
+
+	if (has_dmc) {
+		unsigned int new_dc[2], old_dc[2];
+
+		dmc_read_counts(data->drm_fd, new_dc);
+		do {
+			memcpy(old_dc, new_dc, sizeof(new_dc));
+			usleep(100 * 1000);
+			dmc_read_counts(data->drm_fd, new_dc);
+		} while (!memcmp(old_dc, new_dc, sizeof(new_dc)) && --wait);
+
+		igt_assert_f(wait, "Timed out waiting for DC state transition 3s.\n");
+	} else {
+		sleep(3);
+	}
+
+	second_vbl = get_vblank(data->drm_fd, data->pipe);
+	igt_debug("vblank count went from %u to %u in %d ms.\n",
+		  first_vbl, second_vbl, has_dmc ? (30 - wait) * 100 : 3000);
+
+	igt_assert_lt(first_vbl, second_vbl);
+}
+
 static bool drrs_disabled(data_t *data)
 {
 	char buf[512];
@@ -572,6 +631,13 @@ int main(int argc, char *argv[])
 		}
 	}
 
+	igt_subtest("vblank") {
+		setup_test_plane(&data);
+		igt_assert(wait_psr_entry(&data));
+		check_vblanks(&data);
+		test_cleanup(&data);
+	}
+
 	igt_subtest_f("dpms_off_psr_active") {
 		data.test_plane = DRM_PLANE_TYPE_PRIMARY;
 		data.op = RENDER;
-- 
2.11.0

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✓ Fi.CI.BAT: success for igt/psr: Test vblank continuity with PSR enabled (rev2)

[Patchwork]

== Series Details ==

Series: igt/psr: Test vblank continuity with PSR enabled (rev2)
URL   : https://patchwork.freedesktop.org/series/35198/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
d0f996c2a8475b87549db9eb7b7783fca058a7f0 igt/kms_vblank: To set a mode requires DRM_MASTER

with latest DRM-Tip kernel build CI_DRM_3499
39419b521a0f drm-tip: 2017y-12m-11d-17h-25m-05s UTC integration manifest

Testlist changes:
+igt@kms_psr_sink_crc@vblank

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_frontbuffer_tracking:
        Subgroup basic:
                incomplete -> SKIP       (fi-elk-e7500) fdo#103989 +1
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-kbl-r) fdo#104172 +1

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:443s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:444s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:383s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:514s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:280s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:508s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:505s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:495s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:483s
fi-elk-e7500     total:229  pass:167  dwarn:15  dfail:0   fail:0   skip:46 
fi-gdg-551       total:288  pass:178  dwarn:1   dfail:0   fail:1   skip:108 time:270s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:540s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:361s
fi-hsw-4770r     total:288  pass:224  dwarn:0   dfail:0   fail:0   skip:64  time:260s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:395s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:482s
fi-ivb-3770      total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:448s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:493s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:523s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:475s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:529s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:597s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:447s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:539s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:567s
fi-skl-6700k     total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:520s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:499s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:449s
fi-snb-2520m     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:550s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:417s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:608s
fi-cnl-y         total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:632s
fi-glk-dsi       total:288  pass:187  dwarn:1   dfail:4   fail:1   skip:95  time:416s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_649/issues.html
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Re: [PATCH i-g-t v2] igt/psr: Test vblank continuity with PSR enabled

[Ville Syrjälä]

On Mon, Dec 11, 2017 at 06:06:57PM -0800, Dhinakaran Pandiyan wrote:
> PSR allows DMC to put the system to low power states when active, but
> this can reset the frame counter on some platforms. The frame counter reset
> leads to a negative diff applied to vblank count. This subtest checks
> for that.

I don't think the frame counter issues are limited to DMC. I expect that
the frame counter would stop (at least when we shut off the main link)
even on HSW. So I think the test should actually sleep for some
suitable long period and make sure the vblank counter has progressed
appropriately during that time.

Checking the DC and PSR counters around the wait does seem like a
good idea.

> 
> v2: Some optimizations and data type changes.
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  tests/kms_psr_sink_crc.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
> 
> diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
> index 83a69f0b..831368b2 100644
> --- a/tests/kms_psr_sink_crc.c
> +++ b/tests/kms_psr_sink_crc.c
> @@ -69,6 +69,7 @@ typedef struct {
>  	enum operations op;
>  	uint32_t devid;
>  	uint32_t crtc_id;
> +	enum pipe pipe;
>  	igt_display_t display;
>  	drm_intel_bufmgr *bufmgr;
>  	struct igt_fb fb_green, fb_white;
> @@ -107,6 +108,7 @@ static void setup_output(data_t *data)
>  		if (c->connector_type != DRM_MODE_CONNECTOR_eDP)
>  			continue;
>  
> +		data->pipe = pipe;
>  		igt_output_set_pipe(output, pipe);
>  		data->crtc_id = output->config.crtc->crtc_id;
>  		data->output = output;
> @@ -285,6 +287,63 @@ static void assert_or_manual(bool condition, const char *expected)
>  	igt_assert(igt_interactive_debug || condition);
>  }
>  
> +static unsigned int get_vblank(int fd, unsigned int pipe)
> +{
> +	union drm_wait_vblank vbl;
> +
> +	memset(&vbl, 0, sizeof(vbl));
> +	vbl.request.type = DRM_VBLANK_RELATIVE | kmstest_get_vbl_flag(pipe);
> +	igt_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
> +
> +	return vbl.reply.sequence;
> +}
> +
> +static void dmc_read_counts(unsigned int fd, unsigned int *count)
> +{
> +	char buf[512];
> +
> +	igt_debugfs_read(fd, "i915_dmc_info", buf);
> +	igt_assert_eq(sscanf(strstr(buf, "DC3 -> DC5"), "DC3 -> DC5 count: %u", &count[0]),
> +		      1);
> +	igt_assert_eq(sscanf(strstr(buf, "DC5 -> DC6"), "DC5 -> DC6 count: %u", &count[1]),
> +		      1);
> +	igt_debug("DC3->DC5 count=%u, DC5->DC6 count=%u\n", count[0], count[1]);
> +}
> +
> +static void check_vblanks(data_t *data)
> +{
> +	unsigned int first_vbl, second_vbl;
> +	int wait = 30; /* Takes about 2.5 seconds for DC_OFF disable */
> +	char buf[512];
> +	bool has_dmc;
> +
> +	first_vbl = get_vblank(data->drm_fd, data->pipe);
> +
> +	igt_debugfs_read(data->drm_fd, "i915_dmc_info", buf);
> +	has_dmc = strstr(buf, "fw loaded: yes");
> +
> +	if (has_dmc) {
> +		unsigned int new_dc[2], old_dc[2];
> +
> +		dmc_read_counts(data->drm_fd, new_dc);
> +		do {
> +			memcpy(old_dc, new_dc, sizeof(new_dc));
> +			usleep(100 * 1000);
> +			dmc_read_counts(data->drm_fd, new_dc);
> +		} while (!memcmp(old_dc, new_dc, sizeof(new_dc)) && --wait);
> +
> +		igt_assert_f(wait, "Timed out waiting for DC state transition 3s.\n");
> +	} else {
> +		sleep(3);
> +	}
> +
> +	second_vbl = get_vblank(data->drm_fd, data->pipe);
> +	igt_debug("vblank count went from %u to %u in %d ms.\n",
> +		  first_vbl, second_vbl, has_dmc ? (30 - wait) * 100 : 3000);
> +
> +	igt_assert_lt(first_vbl, second_vbl);
> +}
> +
>  static bool drrs_disabled(data_t *data)
>  {
>  	char buf[512];
> @@ -572,6 +631,13 @@ int main(int argc, char *argv[])
>  		}
>  	}
>  
> +	igt_subtest("vblank") {
> +		setup_test_plane(&data);
> +		igt_assert(wait_psr_entry(&data));
> +		check_vblanks(&data);
> +		test_cleanup(&data);
> +	}
> +
>  	igt_subtest_f("dpms_off_psr_active") {
>  		data.test_plane = DRM_PLANE_TYPE_PRIMARY;
>  		data.op = RENDER;
> -- 
> 2.11.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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✗ Fi.CI.IGT: failure for igt/psr: Test vblank continuity with PSR enabled (rev2)

[Patchwork]

== Series Details ==

Series: igt/psr: Test vblank continuity with PSR enabled (rev2)
URL   : https://patchwork.freedesktop.org/series/35198/
State : failure

== Summary ==

Test gem_exec_reloc:
        Subgroup basic-gtt-wc:
                pass       -> INCOMPLETE (shard-snb)
Test gem_softpin:
        Subgroup noreloc-s4:
                dmesg-fail -> FAIL       (shard-snb) fdo#103375 +2
Test kms_flip:
        Subgroup wf_vblank-vs-modeset-interruptible:
                dmesg-warn -> PASS       (shard-hsw) fdo#102614
        Subgroup vblank-vs-dpms-suspend:
                pass       -> SKIP       (shard-snb)
        Subgroup dpms-off-confusion:
                pass       -> INCOMPLETE (shard-snb)
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
                fail       -> PASS       (shard-snb) fdo#101623
Test perf_pmu:
        Subgroup render-node-busy-vcs0:
                incomplete -> PASS       (shard-hsw)
Test drv_suspend:
        Subgroup fence-restore-tiled2untiled:
                pass       -> FAIL       (shard-snb)

fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623

shard-hsw        total:2693 pass:1537 dwarn:1   dfail:0   fail:10  skip:1145 time:9476s
shard-snb        total:2605 pass:1261 dwarn:1   dfail:0   fail:12  skip:1329 time:7604s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_649/shards.html
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Re: [PATCH i-g-t v2] igt/psr: Test vblank continuity with PSR enabled

[Pandiyan, Dhinakaran]

On Tue, 2017-12-12 at 09:10 +0200, Ville Syrjälä wrote:
> On Mon, Dec 11, 2017 at 06:06:57PM -0800, Dhinakaran Pandiyan wrote:
> > PSR allows DMC to put the system to low power states when active, but
> > this can reset the frame counter on some platforms. The frame counter reset
> > leads to a negative diff applied to vblank count. This subtest checks
> > for that.
> 
> I don't think the frame counter issues are limited to DMC. I expect that
> the frame counter would stop (at least when we shut off the main link)
> even on HSW. So I think the test should actually sleep for some
> suitable long period and make sure the vblank counter has progressed
> appropriately during that time.

Yeah, I'd guess the frame counter would be stuck on HSW as opposed to
being reset, like on DMC platforms. This patch already tests the vblank
count after a delay of 3 seconds on non-DMC platforms. But, I'm not
entirely sure if that's enough for the link to turn off, will see if I
can find a HSW here.

-DK

> 
> Checking the DC and PSR counters around the wait does seem like a
> good idea.
> 
> > 
> > v2: Some optimizations and data type changes.
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> >  tests/kms_psr_sink_crc.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 66 insertions(+)
> > 
> > diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
> > index 83a69f0b..831368b2 100644
> > --- a/tests/kms_psr_sink_crc.c
> > +++ b/tests/kms_psr_sink_crc.c
> > @@ -69,6 +69,7 @@ typedef struct {
> >  	enum operations op;
> >  	uint32_t devid;
> >  	uint32_t crtc_id;
> > +	enum pipe pipe;
> >  	igt_display_t display;
> >  	drm_intel_bufmgr *bufmgr;
> >  	struct igt_fb fb_green, fb_white;
> > @@ -107,6 +108,7 @@ static void setup_output(data_t *data)
> >  		if (c->connector_type != DRM_MODE_CONNECTOR_eDP)
> >  			continue;
> >  
> > +		data->pipe = pipe;
> >  		igt_output_set_pipe(output, pipe);
> >  		data->crtc_id = output->config.crtc->crtc_id;
> >  		data->output = output;
> > @@ -285,6 +287,63 @@ static void assert_or_manual(bool condition, const char *expected)
> >  	igt_assert(igt_interactive_debug || condition);
> >  }
> >  
> > +static unsigned int get_vblank(int fd, unsigned int pipe)
> > +{
> > +	union drm_wait_vblank vbl;
> > +
> > +	memset(&vbl, 0, sizeof(vbl));
> > +	vbl.request.type = DRM_VBLANK_RELATIVE | kmstest_get_vbl_flag(pipe);
> > +	igt_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
> > +
> > +	return vbl.reply.sequence;
> > +}
> > +
> > +static void dmc_read_counts(unsigned int fd, unsigned int *count)
> > +{
> > +	char buf[512];
> > +
> > +	igt_debugfs_read(fd, "i915_dmc_info", buf);
> > +	igt_assert_eq(sscanf(strstr(buf, "DC3 -> DC5"), "DC3 -> DC5 count: %u", &count[0]),
> > +		      1);
> > +	igt_assert_eq(sscanf(strstr(buf, "DC5 -> DC6"), "DC5 -> DC6 count: %u", &count[1]),
> > +		      1);
> > +	igt_debug("DC3->DC5 count=%u, DC5->DC6 count=%u\n", count[0], count[1]);
> > +}
> > +
> > +static void check_vblanks(data_t *data)
> > +{
> > +	unsigned int first_vbl, second_vbl;
> > +	int wait = 30; /* Takes about 2.5 seconds for DC_OFF disable */
> > +	char buf[512];
> > +	bool has_dmc;
> > +
> > +	first_vbl = get_vblank(data->drm_fd, data->pipe);
> > +
> > +	igt_debugfs_read(data->drm_fd, "i915_dmc_info", buf);
> > +	has_dmc = strstr(buf, "fw loaded: yes");
> > +
> > +	if (has_dmc) {
> > +		unsigned int new_dc[2], old_dc[2];
> > +
> > +		dmc_read_counts(data->drm_fd, new_dc);
> > +		do {
> > +			memcpy(old_dc, new_dc, sizeof(new_dc));
> > +			usleep(100 * 1000);
> > +			dmc_read_counts(data->drm_fd, new_dc);
> > +		} while (!memcmp(old_dc, new_dc, sizeof(new_dc)) && --wait);
> > +
> > +		igt_assert_f(wait, "Timed out waiting for DC state transition 3s.\n");
> > +	} else {
> > +		sleep(3);
> > +	}
> > +
> > +	second_vbl = get_vblank(data->drm_fd, data->pipe);
> > +	igt_debug("vblank count went from %u to %u in %d ms.\n",
> > +		  first_vbl, second_vbl, has_dmc ? (30 - wait) * 100 : 3000);
> > +
> > +	igt_assert_lt(first_vbl, second_vbl);
> > +}
> > +
> >  static bool drrs_disabled(data_t *data)
> >  {
> >  	char buf[512];
> > @@ -572,6 +631,13 @@ int main(int argc, char *argv[])
> >  		}
> >  	}
> >  
> > +	igt_subtest("vblank") {
> > +		setup_test_plane(&data);
> > +		igt_assert(wait_psr_entry(&data));
> > +		check_vblanks(&data);
> > +		test_cleanup(&data);
> > +	}
> > +
> >  	igt_subtest_f("dpms_off_psr_active") {
> >  		data.test_plane = DRM_PLANE_TYPE_PRIMARY;
> >  		data.op = RENDER;
> > -- 
> > 2.11.0
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
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