* [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header @ 2017-12-08 22:06 Lucas De Marchi 2017-12-08 23:34 ` ✗ Fi.CI.BAT: warning for " Patchwork ` (4 more replies) 0 siblings, 5 replies; 14+ messages in thread From: Lucas De Marchi @ 2017-12-08 22:06 UTC (permalink / raw) To: intel-gfx; +Cc: Lucas De Marchi, Paulo Zanoni This copies include/drm/i915_pciids.h from kernel as of drm-tip: drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that was missing there[1]. The goal is to keep track of the PCI IDs in a single place (kernel). Right now a simple copy is done to catch up with latest changes there, although in future it could be more sofisticated pointing the build system to the external header. [1] https://patchwork.freedesktop.org/patch/192410/ Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> --- lib/i915_pciids.h | 178 ++++++++++++++++++++++++++++++++++-------------------- 1 file changed, 111 insertions(+), 67 deletions(-) diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h index 8d6c7270..c65e4489 100644 --- a/lib/i915_pciids.h +++ b/lib/i915_pciids.h @@ -118,92 +118,125 @@ #define INTEL_IRONLAKE_M_IDS(info) \ INTEL_VGA_DEVICE(0x0046, info) -#define INTEL_SNB_D_IDS(info) \ +#define INTEL_SNB_D_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x0102, info), \ - INTEL_VGA_DEVICE(0x0112, info), \ - INTEL_VGA_DEVICE(0x0122, info), \ INTEL_VGA_DEVICE(0x010A, info) -#define INTEL_SNB_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0106, info), \ +#define INTEL_SNB_D_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x0112, info), \ + INTEL_VGA_DEVICE(0x0122, info) + +#define INTEL_SNB_D_IDS(info) \ + INTEL_SNB_D_GT1_IDS(info), \ + INTEL_SNB_D_GT2_IDS(info) + +#define INTEL_SNB_M_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x0106, info) + +#define INTEL_SNB_M_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x0116, info), \ INTEL_VGA_DEVICE(0x0126, info) +#define INTEL_SNB_M_IDS(info) \ + INTEL_SNB_M_GT1_IDS(info), \ + INTEL_SNB_M_GT2_IDS(info) + +#define INTEL_IVB_M_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */ + +#define INTEL_IVB_M_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ + #define INTEL_IVB_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ + INTEL_IVB_M_GT1_IDS(info), \ + INTEL_IVB_M_GT2_IDS(info) -#define INTEL_IVB_D_IDS(info) \ +#define INTEL_IVB_D_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \ + INTEL_VGA_DEVICE(0x015a, info) /* GT1 server */ + +#define INTEL_IVB_D_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \ - INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */ +#define INTEL_IVB_D_IDS(info) \ + INTEL_IVB_D_GT1_IDS(info), \ + INTEL_IVB_D_GT2_IDS(info) + #define INTEL_IVB_Q_IDS(info) \ INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ -#define INTEL_HSW_IDS(info) \ +#define INTEL_HSW_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ - INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ - INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ - INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ - INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ - INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ - INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ - INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ - INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ - INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ - INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ - INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ - INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */ + +#define INTEL_HSW_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ + INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ + INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ + INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ + INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ + INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ + INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ + INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ + INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ + INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ + INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */ + +#define INTEL_HSW_GT3_IDS(info) \ + INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ + INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ + INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ + INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ + INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ + INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ + INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ + INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ + INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ + INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ + INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ + INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ +#define INTEL_HSW_IDS(info) \ + INTEL_HSW_GT1_IDS(info), \ + INTEL_HSW_GT2_IDS(info), \ + INTEL_HSW_GT3_IDS(info) + #define INTEL_VLV_IDS(info) \ INTEL_VGA_DEVICE(0x0f30, info), \ INTEL_VGA_DEVICE(0x0f31, info), \ @@ -212,17 +245,19 @@ INTEL_VGA_DEVICE(0x0157, info), \ INTEL_VGA_DEVICE(0x0155, info) -#define INTEL_BDW_GT12_IDS(info) \ +#define INTEL_BDW_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \ INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \ INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \ INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \ - INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ + INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ + INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */ + +#define INTEL_BDW_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \ INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \ - INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \ - INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ - INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \ + INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \ INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \ INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */ @@ -243,7 +278,8 @@ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ #define INTEL_BDW_IDS(info) \ - INTEL_BDW_GT12_IDS(info), \ + INTEL_BDW_GT1_IDS(info), \ + INTEL_BDW_GT2_IDS(info), \ INTEL_BDW_GT3_IDS(info), \ INTEL_BDW_RSVD_IDS(info) @@ -312,7 +348,7 @@ #define INTEL_KBL_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ - INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ + INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \ INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \ INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ @@ -334,36 +370,44 @@ INTEL_KBL_GT3_IDS(info), \ INTEL_KBL_GT4_IDS(info) -#define INTEL_CFL_S_IDS(info) \ +/* CFL S */ +#define INTEL_CFL_S_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \ - INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \ + INTEL_VGA_DEVICE(0x3E93, info) /* SRV GT1 */ + +#define INTEL_CFL_S_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \ INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \ - INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */ + INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */ -#define INTEL_CFL_H_IDS(info) \ +/* CFL H */ +#define INTEL_CFL_H_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \ - INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */ + INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */ -#define INTEL_CFL_U_IDS(info) \ - INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \ +/* CFL U */ +#define INTEL_CFL_U_GT3_IDS(info) \ INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \ INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \ - INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */ + INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \ + INTEL_VGA_DEVICE(0x3EA5, info) /* ULT GT3 */ #define INTEL_CFL_IDS(info) \ - INTEL_CFL_S_IDS(info), \ - INTEL_CFL_H_IDS(info), \ - INTEL_CFL_U_IDS(info) + INTEL_CFL_S_GT1_IDS(info), \ + INTEL_CFL_S_GT2_IDS(info), \ + INTEL_CFL_H_GT2_IDS(info), \ + INTEL_CFL_U_GT3_IDS(info) +/* CNL U 2+2 */ #define INTEL_CNL_U_GT2_IDS(info) \ - INTEL_VGA_DEVICE(0x5A52, info), \ + INTEL_VGA_DEVICE(0x5A52, info), \ INTEL_VGA_DEVICE(0x5A5A, info), \ INTEL_VGA_DEVICE(0x5A42, info), \ INTEL_VGA_DEVICE(0x5A4A, info) +/* CNL Y 2+2 */ #define INTEL_CNL_Y_GT2_IDS(info) \ - INTEL_VGA_DEVICE(0x5A51, info), \ + INTEL_VGA_DEVICE(0x5A51, info), \ INTEL_VGA_DEVICE(0x5A59, info), \ INTEL_VGA_DEVICE(0x5A41, info), \ INTEL_VGA_DEVICE(0x5A49, info), \ -- 2.14.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 14+ messages in thread
* ✗ Fi.CI.BAT: warning for lib/i915_pciids.h: synchronize with kernel header 2017-12-08 22:06 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi @ 2017-12-08 23:34 ` Patchwork 2017-12-12 14:51 ` ✓ Fi.CI.BAT: success " Patchwork ` (3 subsequent siblings) 4 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2017-12-08 23:34 UTC (permalink / raw) To: Lucas De Marchi; +Cc: intel-gfx == Series Details == Series: lib/i915_pciids.h: synchronize with kernel header URL : https://patchwork.freedesktop.org/series/35121/ State : warning == Summary == IGT patchset tested on top of latest successful build 37339e7171ee0bd6b45abf8cfef593ed9d8bf750 lib: Print other clients when DRM_SET_MASTER fails with latest DRM-Tip kernel build CI_DRM_3487 06dd422e3209 drm-tip: 2017y-12m-08d-21h-06m-35s UTC integration manifest No testlist changes. Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-a: dmesg-warn -> PASS (fi-kbl-r) fdo#104172 Subgroup suspend-read-crc-pipe-b: incomplete -> PASS (fi-snb-2520m) fdo#103713 Subgroup suspend-read-crc-pipe-c: pass -> DMESG-WARN (fi-kbl-r) fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:449s fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:453s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:389s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:527s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:283s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:511s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:515s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:488s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:483s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:179 dwarn:1 dfail:0 fail:0 skip:108 time:270s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:360s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:263s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:394s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:477s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:447s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:486s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:530s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:476s fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:535s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:600s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:454s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:541s fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:570s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:519s fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:504s fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:446s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:552s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:419s Blacklisted hosts: fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:607s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:636s fi-glk-dsi total:288 pass:187 dwarn:1 dfail:4 fail:0 skip:96 time:403s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_636/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for lib/i915_pciids.h: synchronize with kernel header 2017-12-08 22:06 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi 2017-12-08 23:34 ` ✗ Fi.CI.BAT: warning for " Patchwork @ 2017-12-12 14:51 ` Patchwork 2017-12-12 16:56 ` ✗ Fi.CI.IGT: failure " Patchwork ` (2 subsequent siblings) 4 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2017-12-12 14:51 UTC (permalink / raw) To: Lucas De Marchi; +Cc: intel-gfx == Series Details == Series: lib/i915_pciids.h: synchronize with kernel header URL : https://patchwork.freedesktop.org/series/35121/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow very large bo to fail pageflips with E2BIG with latest DRM-Tip kernel build CI_DRM_3501 f49a92217adc drm-tip: 2017y-12m-12d-12h-12m-26s UTC integration manifest No testlist changes. Test gem_exec_suspend: Subgroup basic-s3: incomplete -> PASS (fi-glk-1) fdo#103326 Test gem_mmap_gtt: Subgroup basic-small-bo-tiledx: pass -> FAIL (fi-gdg-551) fdo#102575 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-a: pass -> DMESG-WARN (fi-kbl-r) fdo#104172 +1 fdo#103326 https://bugs.freedesktop.org/show_bug.cgi?id=103326 fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:446s fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:443s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:388s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:522s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:281s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:509s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:512s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:491s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:270s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:382s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:260s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:389s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:474s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:450s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:489s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:523s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:474s fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:527s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:592s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:446s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:539s fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:568s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:516s fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:496s fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:449s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:546s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:416s Blacklisted hosts: fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:599s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:632s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_655/issues.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Fi.CI.IGT: failure for lib/i915_pciids.h: synchronize with kernel header 2017-12-08 22:06 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi 2017-12-08 23:34 ` ✗ Fi.CI.BAT: warning for " Patchwork 2017-12-12 14:51 ` ✓ Fi.CI.BAT: success " Patchwork @ 2017-12-12 16:56 ` Patchwork 2017-12-13 10:38 ` [PATCH i-g-t] " Arkadiusz Hiler 2017-12-19 21:59 ` Rodrigo Vivi 4 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2017-12-12 16:56 UTC (permalink / raw) To: Lucas De Marchi; +Cc: intel-gfx == Series Details == Series: lib/i915_pciids.h: synchronize with kernel header URL : https://patchwork.freedesktop.org/series/35121/ State : failure == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-snb) fdo#104009 Test kms_flip: Subgroup modeset-vs-vblank-race: pass -> FAIL (shard-hsw) fdo#103060 Test kms_plane_multiple: Subgroup legacy-pipe-c-tiling-none: pass -> INCOMPLETE (shard-hsw) fdo#104009 https://bugs.freedesktop.org/show_bug.cgi?id=104009 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 shard-hsw total:2644 pass:1500 dwarn:1 dfail:0 fail:11 skip:1131 time:9022s shard-snb total:2712 pass:1310 dwarn:1 dfail:0 fail:11 skip:1390 time:8038s Blacklisted hosts: shard-apl total:2614 pass:1615 dwarn:1 dfail:0 fail:22 skip:975 time:13298s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_655/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-08 22:06 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi ` (2 preceding siblings ...) 2017-12-12 16:56 ` ✗ Fi.CI.IGT: failure " Patchwork @ 2017-12-13 10:38 ` Arkadiusz Hiler 2017-12-19 21:59 ` Rodrigo Vivi 4 siblings, 0 replies; 14+ messages in thread From: Arkadiusz Hiler @ 2017-12-13 10:38 UTC (permalink / raw) To: Lucas De Marchi; +Cc: intel-gfx, Paulo Zanoni On Fri, Dec 08, 2017 at 02:06:46PM -0800, Lucas De Marchi wrote: > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that > was missing there[1]. The goal is to keep track of the PCI IDs in a > single place (kernel). > > Right now a simple copy is done to catch up with latest changes there, > although in future it could be more sofisticated pointing the build > system to the external header. > > [1] https://patchwork.freedesktop.org/patch/192410/ > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> --------------------------------------------------------------------------- % (cd igt ; git pw apply 35121) % diff -u linux/include/drm/i915_pciids.h igt/lib/i915_pciids.h --- linux/include/drm/i915_pciids.h 2017-11-21 13:24:48.921774670 +0200 +++ igt/lib/i915_pciids.h 2017-12-12 15:33:02.915711190 +0200 @@ -392,6 +392,12 @@ INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \ INTEL_VGA_DEVICE(0x3EA5, info) /* ULT GT3 */ +#define INTEL_CFL_IDS(info) \ + INTEL_CFL_S_GT1_IDS(info), \ + INTEL_CFL_S_GT2_IDS(info), \ + INTEL_CFL_H_GT2_IDS(info), \ + INTEL_CFL_U_GT3_IDS(info) + /* CNL U 2+2 */ #define INTEL_CNL_U_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x5A52, info), \ --------------------------------------------------------------------------- looks good Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> and merged, thanks! _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-08 22:06 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi ` (3 preceding siblings ...) 2017-12-13 10:38 ` [PATCH i-g-t] " Arkadiusz Hiler @ 2017-12-19 21:59 ` Rodrigo Vivi 2017-12-19 22:07 ` Chris Wilson 2017-12-20 20:30 ` De Marchi, Lucas 4 siblings, 2 replies; 14+ messages in thread From: Rodrigo Vivi @ 2017-12-19 21:59 UTC (permalink / raw) To: Lucas De Marchi; +Cc: intel-gfx, Paulo Zanoni On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that > was missing there[1]. Since this tip name is not easily found maybe it would be good to mention latest kernel commit that touched this file. > The goal is to keep track of the PCI IDs in a > single place (kernel). good idea. > > Right now a simple copy is done to catch up with latest changes there, > although in future it could be more sofisticated pointing the build > system to the external header. Yeap, a real single place would be awesome. > > [1] https://patchwork.freedesktop.org/patch/192410/ > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> For the content itself: (with or without modification on commit message) Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > lib/i915_pciids.h | 178 ++++++++++++++++++++++++++++++++++-------------------- > 1 file changed, 111 insertions(+), 67 deletions(-) > > diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h > index 8d6c7270..c65e4489 100644 > --- a/lib/i915_pciids.h > +++ b/lib/i915_pciids.h > @@ -118,92 +118,125 @@ > #define INTEL_IRONLAKE_M_IDS(info) \ > INTEL_VGA_DEVICE(0x0046, info) > > -#define INTEL_SNB_D_IDS(info) \ > +#define INTEL_SNB_D_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x0102, info), \ > - INTEL_VGA_DEVICE(0x0112, info), \ > - INTEL_VGA_DEVICE(0x0122, info), \ > INTEL_VGA_DEVICE(0x010A, info) > > -#define INTEL_SNB_M_IDS(info) \ > - INTEL_VGA_DEVICE(0x0106, info), \ > +#define INTEL_SNB_D_GT2_IDS(info) \ > + INTEL_VGA_DEVICE(0x0112, info), \ > + INTEL_VGA_DEVICE(0x0122, info) > + > +#define INTEL_SNB_D_IDS(info) \ > + INTEL_SNB_D_GT1_IDS(info), \ > + INTEL_SNB_D_GT2_IDS(info) > + > +#define INTEL_SNB_M_GT1_IDS(info) \ > + INTEL_VGA_DEVICE(0x0106, info) > + > +#define INTEL_SNB_M_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x0116, info), \ > INTEL_VGA_DEVICE(0x0126, info) > > +#define INTEL_SNB_M_IDS(info) \ > + INTEL_SNB_M_GT1_IDS(info), \ > + INTEL_SNB_M_GT2_IDS(info) > + > +#define INTEL_IVB_M_GT1_IDS(info) \ > + INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */ > + > +#define INTEL_IVB_M_GT2_IDS(info) \ > + INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ > + > #define INTEL_IVB_M_IDS(info) \ > - INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \ > - INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ > + INTEL_IVB_M_GT1_IDS(info), \ > + INTEL_IVB_M_GT2_IDS(info) > > -#define INTEL_IVB_D_IDS(info) \ > +#define INTEL_IVB_D_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \ > + INTEL_VGA_DEVICE(0x015a, info) /* GT1 server */ > + > +#define INTEL_IVB_D_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \ > - INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \ > INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */ > > +#define INTEL_IVB_D_IDS(info) \ > + INTEL_IVB_D_GT1_IDS(info), \ > + INTEL_IVB_D_GT2_IDS(info) > + > #define INTEL_IVB_Q_IDS(info) \ > INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ > > -#define INTEL_HSW_IDS(info) \ > +#define INTEL_HSW_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ > - INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ > - INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ > INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ > - INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ > - INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ > INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ > INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ > - INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ > - INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ > INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ > - INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ > - INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ > INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ > - INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ > - INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ > INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ > - INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ > - INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ > INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ > - INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ > - INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ > INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ > - INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ > - INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ > INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ > + INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ > + INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ > + INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ > + INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */ > + > +#define INTEL_HSW_GT2_IDS(info) \ > + INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ > + INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ > + INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ > + INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ > + INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ > + INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ > + INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ > + INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ > + INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ > + INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ > + INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ > INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ > INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ > - INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ > INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ > - INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ > - INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ > INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ > - INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ > - INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ > INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ > + INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */ > + > +#define INTEL_HSW_GT3_IDS(info) \ > + INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ > + INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ > + INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ > + INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ > + INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ > + INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ > INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ > - INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ > - INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ > INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ > > +#define INTEL_HSW_IDS(info) \ > + INTEL_HSW_GT1_IDS(info), \ > + INTEL_HSW_GT2_IDS(info), \ > + INTEL_HSW_GT3_IDS(info) > + > #define INTEL_VLV_IDS(info) \ > INTEL_VGA_DEVICE(0x0f30, info), \ > INTEL_VGA_DEVICE(0x0f31, info), \ > @@ -212,17 +245,19 @@ > INTEL_VGA_DEVICE(0x0157, info), \ > INTEL_VGA_DEVICE(0x0155, info) > > -#define INTEL_BDW_GT12_IDS(info) \ > +#define INTEL_BDW_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \ > INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \ > INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \ > INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \ > - INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ > + INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ > + INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */ > + > +#define INTEL_BDW_GT2_IDS(info) \ > + INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ > INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \ > INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \ > - INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \ > - INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ > - INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \ > + INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \ > INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \ > INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */ > > @@ -243,7 +278,8 @@ > INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ > > #define INTEL_BDW_IDS(info) \ > - INTEL_BDW_GT12_IDS(info), \ > + INTEL_BDW_GT1_IDS(info), \ > + INTEL_BDW_GT2_IDS(info), \ > INTEL_BDW_GT3_IDS(info), \ > INTEL_BDW_RSVD_IDS(info) > > @@ -312,7 +348,7 @@ > > #define INTEL_KBL_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ > - INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ > + INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ > INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \ > INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \ > INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ > @@ -334,36 +370,44 @@ > INTEL_KBL_GT3_IDS(info), \ > INTEL_KBL_GT4_IDS(info) > > -#define INTEL_CFL_S_IDS(info) \ > +/* CFL S */ > +#define INTEL_CFL_S_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \ > - INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \ > + INTEL_VGA_DEVICE(0x3E93, info) /* SRV GT1 */ > + > +#define INTEL_CFL_S_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \ > INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \ > - INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */ > + INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */ > > -#define INTEL_CFL_H_IDS(info) \ > +/* CFL H */ > +#define INTEL_CFL_H_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \ > - INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */ > + INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */ > > -#define INTEL_CFL_U_IDS(info) \ > - INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \ > +/* CFL U */ > +#define INTEL_CFL_U_GT3_IDS(info) \ > INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \ > INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \ > - INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */ > + INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \ > + INTEL_VGA_DEVICE(0x3EA5, info) /* ULT GT3 */ > > #define INTEL_CFL_IDS(info) \ > - INTEL_CFL_S_IDS(info), \ > - INTEL_CFL_H_IDS(info), \ > - INTEL_CFL_U_IDS(info) > + INTEL_CFL_S_GT1_IDS(info), \ > + INTEL_CFL_S_GT2_IDS(info), \ > + INTEL_CFL_H_GT2_IDS(info), \ > + INTEL_CFL_U_GT3_IDS(info) > > +/* CNL U 2+2 */ > #define INTEL_CNL_U_GT2_IDS(info) \ > - INTEL_VGA_DEVICE(0x5A52, info), \ > + INTEL_VGA_DEVICE(0x5A52, info), \ > INTEL_VGA_DEVICE(0x5A5A, info), \ > INTEL_VGA_DEVICE(0x5A42, info), \ > INTEL_VGA_DEVICE(0x5A4A, info) > > +/* CNL Y 2+2 */ > #define INTEL_CNL_Y_GT2_IDS(info) \ > - INTEL_VGA_DEVICE(0x5A51, info), \ > + INTEL_VGA_DEVICE(0x5A51, info), \ > INTEL_VGA_DEVICE(0x5A59, info), \ > INTEL_VGA_DEVICE(0x5A41, info), \ > INTEL_VGA_DEVICE(0x5A49, info), \ > -- > 2.14.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-19 21:59 ` Rodrigo Vivi @ 2017-12-19 22:07 ` Chris Wilson 2017-12-19 23:28 ` Rodrigo Vivi 2017-12-20 20:30 ` De Marchi, Lucas 1 sibling, 1 reply; 14+ messages in thread From: Chris Wilson @ 2017-12-19 22:07 UTC (permalink / raw) To: Rodrigo Vivi, Lucas De Marchi; +Cc: intel-gfx, Paulo Zanoni Quoting Rodrigo Vivi (2017-12-19 21:59:43) > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that > > was missing there[1]. > > Since this tip name is not easily found maybe it would be good to > mention latest kernel commit that touched this file. > > > The goal is to keep track of the PCI IDs in a > > single place (kernel). > > good idea. > > > > > Right now a simple copy is done to catch up with latest changes there, > > although in future it could be more sofisticated pointing the build > > system to the external header. > > Yeap, a real single place would be awesome. Whilst maintaining independence of the igt build itself? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-19 22:07 ` Chris Wilson @ 2017-12-19 23:28 ` Rodrigo Vivi 2017-12-20 20:06 ` De Marchi, Lucas 0 siblings, 1 reply; 14+ messages in thread From: Rodrigo Vivi @ 2017-12-19 23:28 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx, Lucas De Marchi, Paulo Zanoni On Tue, Dec 19, 2017 at 10:07:30PM +0000, Chris Wilson wrote: > Quoting Rodrigo Vivi (2017-12-19 21:59:43) > > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that > > > was missing there[1]. > > > > Since this tip name is not easily found maybe it would be good to > > mention latest kernel commit that touched this file. > > > > > The goal is to keep track of the PCI IDs in a > > > single place (kernel). > > > > good idea. > > > > > > > > Right now a simple copy is done to catch up with latest changes there, > > > although in future it could be more sofisticated pointing the build > > > system to the external header. > > > > Yeap, a real single place would be awesome. > > Whilst maintaining independence of the igt build itself? yeap... nevermind... I was just in another discussion about detection of cnl on vaapi driver and I realized that the userspace individual detection has its advantages... > -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-19 23:28 ` Rodrigo Vivi @ 2017-12-20 20:06 ` De Marchi, Lucas 2017-12-20 20:10 ` Chris Wilson ` (2 more replies) 0 siblings, 3 replies; 14+ messages in thread From: De Marchi, Lucas @ 2017-12-20 20:06 UTC (permalink / raw) To: Vivi, Rodrigo, chris; +Cc: intel-gfx, Zanoni, Paulo R On Tue, 2017-12-19 at 15:28 -0800, Rodrigo Vivi wrote: > On Tue, Dec 19, 2017 at 10:07:30PM +0000, Chris Wilson wrote: > > Quoting Rodrigo Vivi (2017-12-19 21:59:43) > > > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS > > > > that > > > > was missing there[1]. > > > > > > Since this tip name is not easily found maybe it would be good to > > > mention latest kernel commit that touched this file. > > > > > > > The goal is to keep track of the PCI IDs in a > > > > single place (kernel). > > > > > > good idea. > > > > > > > > > > > Right now a simple copy is done to catch up with latest changes there, > > > > although in future it could be more sofisticated pointing the build > > > > system to the external header. > > > > > > Yeap, a real single place would be awesome. > > > > Whilst maintaining independence of the igt build itself? > > yeap... nevermind... > I was just in another discussion about detection of cnl on vaapi driver > and I realized that the userspace individual detection has its advantages... I get the benefit of not tying i-g-t to particular kernel versions, but we may need to think in a way to alleviate the tedious work of updating the IDs across the projects. Some alternatives: 1) Move header to e.g. include/external/i915_pciids.h and add a scripts/i915-update-ids that receives the kernel directory as argument. The script does whateve is needed to update the header, which may or may not include adding a verbiage on top of the header /* This header is automatically generated, do not edit it */ 2) Just create a policy that changes to this header needs to actually be a copy from the kernel header with the commit hash in the commit message 3) A mix or partial implementation of (1) and (2). What do you think? Lucas De Marchi _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-20 20:06 ` De Marchi, Lucas @ 2017-12-20 20:10 ` Chris Wilson 2017-12-20 21:46 ` Rodrigo Vivi 2019-02-05 23:32 ` [igt-dev] [Intel-gfx] " Rodrigo Vivi 2 siblings, 0 replies; 14+ messages in thread From: Chris Wilson @ 2017-12-20 20:10 UTC (permalink / raw) To: De Marchi, Lucas, Vivi, Rodrigo; +Cc: intel-gfx, Zanoni, Paulo R Quoting De Marchi, Lucas (2017-12-20 20:06:24) > On Tue, 2017-12-19 at 15:28 -0800, Rodrigo Vivi wrote: > > On Tue, Dec 19, 2017 at 10:07:30PM +0000, Chris Wilson wrote: > > > Quoting Rodrigo Vivi (2017-12-19 21:59:43) > > > > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > > > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > > > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS > > > > > that > > > > > was missing there[1]. > > > > > > > > Since this tip name is not easily found maybe it would be good to > > > > mention latest kernel commit that touched this file. > > > > > > > > > The goal is to keep track of the PCI IDs in a > > > > > single place (kernel). > > > > > > > > good idea. > > > > > > > > > > > > > > Right now a simple copy is done to catch up with latest changes there, > > > > > although in future it could be more sofisticated pointing the build > > > > > system to the external header. > > > > > > > > Yeap, a real single place would be awesome. > > > > > > Whilst maintaining independence of the igt build itself? > > > > yeap... nevermind... > > I was just in another discussion about detection of cnl on vaapi driver > > and I realized that the userspace individual detection has its advantages... > > I get the benefit of not tying i-g-t to particular kernel versions, but we may > need to think in a way to alleviate the tedious work of updating the IDs > across the projects. We did that, it's called i915_pciids.h. We said we would put all the ids into a single header in a format that both userspace and the kernel could digest, then copy it wherever required. It's just a cp; git commit. The difficult part is then tying the pci-id to the internal db of the project, and our proposal to share that was shot down. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-20 20:06 ` De Marchi, Lucas 2017-12-20 20:10 ` Chris Wilson @ 2017-12-20 21:46 ` Rodrigo Vivi 2019-02-05 23:32 ` [igt-dev] [Intel-gfx] " Rodrigo Vivi 2 siblings, 0 replies; 14+ messages in thread From: Rodrigo Vivi @ 2017-12-20 21:46 UTC (permalink / raw) To: De Marchi, Lucas; +Cc: intel-gfx, Zanoni, Paulo R On Wed, Dec 20, 2017 at 08:06:24PM +0000, De Marchi, Lucas wrote: > On Tue, 2017-12-19 at 15:28 -0800, Rodrigo Vivi wrote: > > On Tue, Dec 19, 2017 at 10:07:30PM +0000, Chris Wilson wrote: > > > Quoting Rodrigo Vivi (2017-12-19 21:59:43) > > > > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > > > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > > > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS > > > > > that > > > > > was missing there[1]. > > > > > > > > Since this tip name is not easily found maybe it would be good to > > > > mention latest kernel commit that touched this file. > > > > > > > > > The goal is to keep track of the PCI IDs in a > > > > > single place (kernel). > > > > > > > > good idea. > > > > > > > > > > > > > > Right now a simple copy is done to catch up with latest changes there, > > > > > although in future it could be more sofisticated pointing the build > > > > > system to the external header. > > > > > > > > Yeap, a real single place would be awesome. > > > > > > Whilst maintaining independence of the igt build itself? > > > > yeap... nevermind... > > I was just in another discussion about detection of cnl on vaapi driver > > and I realized that the userspace individual detection has its advantages... > > I get the benefit of not tying i-g-t to particular kernel versions, but we may > need to think in a way to alleviate the tedious work of updating the IDs > across the projects. > > Some alternatives: > > 1) Move header to e.g. include/external/i915_pciids.h and add a > scripts/i915-update-ids that receives the kernel directory as argument. The > script does whateve is needed to update the header, which may or may not > include adding a verbiage on top of the header > > /* This header is automatically generated, do not edit it */ > +1. An igt/tools/<tool> that could use some sort of curl https://cgit.freedesktop.org/drm-tip/tree/include/drm/i915_pciids.h and generate the igt out of it. possibly the libdrm as well? or maybe a git instead the curl so we could get the last commit id touching this file and add to the new auto-generated commit as reference. > 2) Just create a policy that changes to this header needs to actually be a > copy from the kernel header with the commit hash in the commit message > > 3) A mix or partial implementation of (1) and (2). > > What do you think? > > Lucas De Marchi _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-20 20:06 ` De Marchi, Lucas @ 2019-02-05 23:32 ` Rodrigo Vivi 2017-12-20 21:46 ` Rodrigo Vivi 2019-02-05 23:32 ` [igt-dev] [Intel-gfx] " Rodrigo Vivi 2 siblings, 0 replies; 14+ messages in thread From: Rodrigo Vivi @ 2019-02-05 23:32 UTC (permalink / raw) To: De Marchi, Lucas, Rogozhkin, Dmitry V Cc: igt-dev, mesa-dev, intel-gfx, Zanoni, Paulo R Hi all, restarting a very old thread since Dmitry is interested in tackle the issue that we have to propagate and keep all IDs in sync across the stack. He has few ideas of i915 ioctls in a way that it wouldn't necessarily tie build dependencies etc.. Since I believe this place is the best one to discuss ideas like that let me invite him for the discussion in a way he can explain his ideas here. Also cc'ing some relevant mailing lists. Thanks, Rodrigo. On Wed, Dec 20, 2017 at 12:06:24PM -0800, De Marchi, Lucas wrote: > On Tue, 2017-12-19 at 15:28 -0800, Rodrigo Vivi wrote: > > On Tue, Dec 19, 2017 at 10:07:30PM +0000, Chris Wilson wrote: > > > Quoting Rodrigo Vivi (2017-12-19 21:59:43) > > > > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > > > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > > > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS > > > > > that > > > > > was missing there[1]. > > > > > > > > Since this tip name is not easily found maybe it would be good to > > > > mention latest kernel commit that touched this file. > > > > > > > > > The goal is to keep track of the PCI IDs in a > > > > > single place (kernel). > > > > > > > > good idea. > > > > > > > > > > > > > > Right now a simple copy is done to catch up with latest changes there, > > > > > although in future it could be more sofisticated pointing the build > > > > > system to the external header. > > > > > > > > Yeap, a real single place would be awesome. > > > > > > Whilst maintaining independence of the igt build itself? > > > > yeap... nevermind... > > I was just in another discussion about detection of cnl on vaapi driver > > and I realized that the userspace individual detection has its advantages... > > I get the benefit of not tying i-g-t to particular kernel versions, but we may > need to think in a way to alleviate the tedious work of updating the IDs > across the projects. > > Some alternatives: > > 1) Move header to e.g. include/external/i915_pciids.h and add a > scripts/i915-update-ids that receives the kernel directory as argument. The > script does whateve is needed to update the header, which may or may not > include adding a verbiage on top of the header > > /* This header is automatically generated, do not edit it */ > > 2) Just create a policy that changes to this header needs to actually be a > copy from the kernel header with the commit hash in the commit message > > 3) A mix or partial implementation of (1) and (2). > > What do you think? > > Lucas De Marchi _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header @ 2019-02-05 23:32 ` Rodrigo Vivi 0 siblings, 0 replies; 14+ messages in thread From: Rodrigo Vivi @ 2019-02-05 23:32 UTC (permalink / raw) To: De Marchi, Lucas, Rogozhkin, Dmitry V; +Cc: igt-dev, mesa-dev, intel-gfx Hi all, restarting a very old thread since Dmitry is interested in tackle the issue that we have to propagate and keep all IDs in sync across the stack. He has few ideas of i915 ioctls in a way that it wouldn't necessarily tie build dependencies etc.. Since I believe this place is the best one to discuss ideas like that let me invite him for the discussion in a way he can explain his ideas here. Also cc'ing some relevant mailing lists. Thanks, Rodrigo. On Wed, Dec 20, 2017 at 12:06:24PM -0800, De Marchi, Lucas wrote: > On Tue, 2017-12-19 at 15:28 -0800, Rodrigo Vivi wrote: > > On Tue, Dec 19, 2017 at 10:07:30PM +0000, Chris Wilson wrote: > > > Quoting Rodrigo Vivi (2017-12-19 21:59:43) > > > > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > > > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > > > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS > > > > > that > > > > > was missing there[1]. > > > > > > > > Since this tip name is not easily found maybe it would be good to > > > > mention latest kernel commit that touched this file. > > > > > > > > > The goal is to keep track of the PCI IDs in a > > > > > single place (kernel). > > > > > > > > good idea. > > > > > > > > > > > > > > Right now a simple copy is done to catch up with latest changes there, > > > > > although in future it could be more sofisticated pointing the build > > > > > system to the external header. > > > > > > > > Yeap, a real single place would be awesome. > > > > > > Whilst maintaining independence of the igt build itself? > > > > yeap... nevermind... > > I was just in another discussion about detection of cnl on vaapi driver > > and I realized that the userspace individual detection has its advantages... > > I get the benefit of not tying i-g-t to particular kernel versions, but we may > need to think in a way to alleviate the tedious work of updating the IDs > across the projects. > > Some alternatives: > > 1) Move header to e.g. include/external/i915_pciids.h and add a > scripts/i915-update-ids that receives the kernel directory as argument. The > script does whateve is needed to update the header, which may or may not > include adding a verbiage on top of the header > > /* This header is automatically generated, do not edit it */ > > 2) Just create a policy that changes to this header needs to actually be a > copy from the kernel header with the commit hash in the commit message > > 3) A mix or partial implementation of (1) and (2). > > What do you think? > > Lucas De Marchi _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header 2017-12-19 21:59 ` Rodrigo Vivi 2017-12-19 22:07 ` Chris Wilson @ 2017-12-20 20:30 ` De Marchi, Lucas 1 sibling, 0 replies; 14+ messages in thread From: De Marchi, Lucas @ 2017-12-20 20:30 UTC (permalink / raw) To: Vivi, Rodrigo; +Cc: intel-gfx, Zanoni, Paulo R On Tue, 2017-12-19 at 13:59 -0800, Rodrigo Vivi wrote: > On Fri, Dec 08, 2017 at 10:06:46PM +0000, Lucas De Marchi wrote: > > This copies include/drm/i915_pciids.h from kernel as of drm-tip: > > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that > > was missing there[1]. > > Since this tip name is not easily found maybe it would be good to > mention latest kernel commit that touched this file. At the time I sent this the additional kernel patch with CFL IDs were not applied yet. I was already expecting to have to change this message, but I forgot to tell here. I will send a v2. thanks Lucas De Marchi _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-02-05 23:32 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-12-08 22:06 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi 2017-12-08 23:34 ` ✗ Fi.CI.BAT: warning for " Patchwork 2017-12-12 14:51 ` ✓ Fi.CI.BAT: success " Patchwork 2017-12-12 16:56 ` ✗ Fi.CI.IGT: failure " Patchwork 2017-12-13 10:38 ` [PATCH i-g-t] " Arkadiusz Hiler 2017-12-19 21:59 ` Rodrigo Vivi 2017-12-19 22:07 ` Chris Wilson 2017-12-19 23:28 ` Rodrigo Vivi 2017-12-20 20:06 ` De Marchi, Lucas 2017-12-20 20:10 ` Chris Wilson 2017-12-20 21:46 ` Rodrigo Vivi 2019-02-05 23:32 ` Rodrigo Vivi 2019-02-05 23:32 ` [igt-dev] [Intel-gfx] " Rodrigo Vivi 2017-12-20 20:30 ` De Marchi, Lucas
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