* [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
Hi,
Here is an attempt at supporting the LVDS output in our DRM driver. This
has been tested on the A83T (with DE2), but since everything is basically
in the TCON, it should also be usable on the older SoCs with minor
modifications.
This was the occasion to refactor a bunch of things. The most notable ones
would be the documentation, and split of the UI layers in the mixer code,
and the switch to kfifo for our endpoint parsing code in the driver that
fixes an issue introduced by the switch to BFS.
Let me know what you think,
Maxime
Changes from v3:
- Collect the tags
- Use SPDX headers when possible
- Added the new mixer configuration options
- Changed the LVDS clock for lvds-alt instead of lvds-pll
- Removed the MIPI PLL from the A31s
- Changed the LVDS_ANA0 macros name to reflect the generation they were
introduced in, and added a comment to mention the changes needed to
support the older SoCs
Changes from v2:
- Move the module clock rate to the mixer structure
- Adjusted the simple-panel documentation for power-supply
- Changed the compatible for the first A83t mixer to mixer 0
- Rebased on top of current drm-misc
- Split out the A83t bindings in its separate patch
Changes from v1:
- Added a fix for the error path handling in the TCON
- Enable the TCON by default
- Removed the patch that changes the channels offset but kept most of the
modifications as a cleanup
- Deal with the LVDS clock being able to have another PLL parent on some
SoCs
- Renamed the TCON compatible to TCON-TV, following the convention used
on newer SoCs
- Removed the hardcoded timings
- Moved LVDS enable quirks to a separate function
- Used clock indices define in the DT
- Removed the hardcoded clock rate in the DT and moved it to the driver
- Changed sun8i_mixer_planes to sun8i_mixer_ui_planes to be consistent
- Added the various tags collected
- Rebased on top of 4.15
Maxime Ripard (15):
dt-bindings: panel: lvds: Document power-supply property
drm/panel: lvds: Add support for the power-supply property
dt-bindings: display: sun4i-drm: Add LVDS properties
dt-bindings: display: sun4i-drm: Add A83T pipeline
drm/sun4i: Fix error path handling
drm/sun4i: Force the mixer rate at 150MHz
drm/sun4i: Create minimal multipliers and dividers
drm/sun4i: Add LVDS support
drm/sun4i: Add A83T support
ARM: dts: sun8i: a83t: Add display pipeline
ARM: dts: sun8i: a83t: Enable the PWM
ARM: dts: sun8i: a83t: Add LVDS pins group
ARM: dts: sun8i: a83t: Add the PWM pin group
ARM: dts: sun8i: a711: Reinstate the PMIC compatible
ARM: dts: sun8i: a711: Enable the LCD
Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++-
Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +-
Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 12 +++-
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 62 ++++++++++++++++++-
arch/arm/boot/dts/sun8i-a83t.dtsi | 99 ++++++++++++++++++++++++++++-
drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++-
drivers/gpu/drm/sun4i/Makefile | 1 +-
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 ++-
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +-
drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 +++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 +++++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 251 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 31 +++++++++-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 20 ++++++-
drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +-
16 files changed, 710 insertions(+), 7 deletions(-)
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
base-commit: 3b71239181e5429702387666f1ac70a9e6856cce
--
git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
Hi,
Here is an attempt at supporting the LVDS output in our DRM driver. This
has been tested on the A83T (with DE2), but since everything is basically
in the TCON, it should also be usable on the older SoCs with minor
modifications.
This was the occasion to refactor a bunch of things. The most notable ones
would be the documentation, and split of the UI layers in the mixer code,
and the switch to kfifo for our endpoint parsing code in the driver that
fixes an issue introduced by the switch to BFS.
Let me know what you think,
Maxime
Changes from v3:
- Collect the tags
- Use SPDX headers when possible
- Added the new mixer configuration options
- Changed the LVDS clock for lvds-alt instead of lvds-pll
- Removed the MIPI PLL from the A31s
- Changed the LVDS_ANA0 macros name to reflect the generation they were
introduced in, and added a comment to mention the changes needed to
support the older SoCs
Changes from v2:
- Move the module clock rate to the mixer structure
- Adjusted the simple-panel documentation for power-supply
- Changed the compatible for the first A83t mixer to mixer 0
- Rebased on top of current drm-misc
- Split out the A83t bindings in its separate patch
Changes from v1:
- Added a fix for the error path handling in the TCON
- Enable the TCON by default
- Removed the patch that changes the channels offset but kept most of the
modifications as a cleanup
- Deal with the LVDS clock being able to have another PLL parent on some
SoCs
- Renamed the TCON compatible to TCON-TV, following the convention used
on newer SoCs
- Removed the hardcoded timings
- Moved LVDS enable quirks to a separate function
- Used clock indices define in the DT
- Removed the hardcoded clock rate in the DT and moved it to the driver
- Changed sun8i_mixer_planes to sun8i_mixer_ui_planes to be consistent
- Added the various tags collected
- Rebased on top of 4.15
Maxime Ripard (15):
dt-bindings: panel: lvds: Document power-supply property
drm/panel: lvds: Add support for the power-supply property
dt-bindings: display: sun4i-drm: Add LVDS properties
dt-bindings: display: sun4i-drm: Add A83T pipeline
drm/sun4i: Fix error path handling
drm/sun4i: Force the mixer rate at 150MHz
drm/sun4i: Create minimal multipliers and dividers
drm/sun4i: Add LVDS support
drm/sun4i: Add A83T support
ARM: dts: sun8i: a83t: Add display pipeline
ARM: dts: sun8i: a83t: Enable the PWM
ARM: dts: sun8i: a83t: Add LVDS pins group
ARM: dts: sun8i: a83t: Add the PWM pin group
ARM: dts: sun8i: a711: Reinstate the PMIC compatible
ARM: dts: sun8i: a711: Enable the LCD
Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++-
Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +-
Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 12 +++-
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 62 ++++++++++++++++++-
arch/arm/boot/dts/sun8i-a83t.dtsi | 99 ++++++++++++++++++++++++++++-
drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++-
drivers/gpu/drm/sun4i/Makefile | 1 +-
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 ++-
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +-
drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 +++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 +++++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 251 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 31 +++++++++-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 20 ++++++-
drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +-
16 files changed, 710 insertions(+), 7 deletions(-)
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
base-commit: 3b71239181e5429702387666f1ac70a9e6856cce
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Here is an attempt at supporting the LVDS output in our DRM driver. This
has been tested on the A83T (with DE2), but since everything is basically
in the TCON, it should also be usable on the older SoCs with minor
modifications.
This was the occasion to refactor a bunch of things. The most notable ones
would be the documentation, and split of the UI layers in the mixer code,
and the switch to kfifo for our endpoint parsing code in the driver that
fixes an issue introduced by the switch to BFS.
Let me know what you think,
Maxime
Changes from v3:
- Collect the tags
- Use SPDX headers when possible
- Added the new mixer configuration options
- Changed the LVDS clock for lvds-alt instead of lvds-pll
- Removed the MIPI PLL from the A31s
- Changed the LVDS_ANA0 macros name to reflect the generation they were
introduced in, and added a comment to mention the changes needed to
support the older SoCs
Changes from v2:
- Move the module clock rate to the mixer structure
- Adjusted the simple-panel documentation for power-supply
- Changed the compatible for the first A83t mixer to mixer 0
- Rebased on top of current drm-misc
- Split out the A83t bindings in its separate patch
Changes from v1:
- Added a fix for the error path handling in the TCON
- Enable the TCON by default
- Removed the patch that changes the channels offset but kept most of the
modifications as a cleanup
- Deal with the LVDS clock being able to have another PLL parent on some
SoCs
- Renamed the TCON compatible to TCON-TV, following the convention used
on newer SoCs
- Removed the hardcoded timings
- Moved LVDS enable quirks to a separate function
- Used clock indices define in the DT
- Removed the hardcoded clock rate in the DT and moved it to the driver
- Changed sun8i_mixer_planes to sun8i_mixer_ui_planes to be consistent
- Added the various tags collected
- Rebased on top of 4.15
Maxime Ripard (15):
dt-bindings: panel: lvds: Document power-supply property
drm/panel: lvds: Add support for the power-supply property
dt-bindings: display: sun4i-drm: Add LVDS properties
dt-bindings: display: sun4i-drm: Add A83T pipeline
drm/sun4i: Fix error path handling
drm/sun4i: Force the mixer rate at 150MHz
drm/sun4i: Create minimal multipliers and dividers
drm/sun4i: Add LVDS support
drm/sun4i: Add A83T support
ARM: dts: sun8i: a83t: Add display pipeline
ARM: dts: sun8i: a83t: Enable the PWM
ARM: dts: sun8i: a83t: Add LVDS pins group
ARM: dts: sun8i: a83t: Add the PWM pin group
ARM: dts: sun8i: a711: Reinstate the PMIC compatible
ARM: dts: sun8i: a711: Enable the LCD
Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++-
Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +-
Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 12 +++-
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 62 ++++++++++++++++++-
arch/arm/boot/dts/sun8i-a83t.dtsi | 99 ++++++++++++++++++++++++++++-
drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++-
drivers/gpu/drm/sun4i/Makefile | 1 +-
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 ++-
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +-
drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 +++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 +++++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 251 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 31 +++++++++-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 20 ++++++-
drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +-
16 files changed, 710 insertions(+), 7 deletions(-)
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
base-commit: 3b71239181e5429702387666f1ac70a9e6856cce
--
git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 01/15] dt-bindings: panel: lvds: Document power-supply property
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The power-supply property is used by a vast majority of panels, including
panel-simple. Let's document it as a common property
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++
Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +
Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt
index ec52c472c845..125ea68052af 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-common.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt
@@ -78,6 +78,12 @@ used for panels that implement compatible control signals.
while active. Active high reset signals can be supported by inverting the
GPIO specifier polarity flag.
+Power
+-----
+
+- power-supply: many display panels need an additional power supply in
+ order to be fully powered-up. For such panels, power-supply contains
+ a phandle to the regulator powering the panel.
Backlight
---------
diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
index b938269f841e..250850a2150b 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
@@ -32,6 +32,7 @@ Optional properties:
- label: See panel-common.txt.
- gpios: See panel-common.txt.
- backlight: See panel-common.txt.
+- power-supply: See panel-common.txt.
- data-mirror: If set, reverse the bit order described in the data mappings
below on all data lanes, transmitting bits for slots 6 to 0 instead of
0 to 6.
diff --git a/Documentation/devicetree/bindings/display/panel/simple-panel.txt b/Documentation/devicetree/bindings/display/panel/simple-panel.txt
index 1341bbf4aa3d..16d8ff088b7d 100644
--- a/Documentation/devicetree/bindings/display/panel/simple-panel.txt
+++ b/Documentation/devicetree/bindings/display/panel/simple-panel.txt
@@ -1,7 +1,7 @@
Simple display panel
Required properties:
-- power-supply: regulator to provide the supply voltage
+- power-supply: See panel-common.txt
Optional properties:
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 01/15] dt-bindings: panel: lvds: Document power-supply property
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
The power-supply property is used by a vast majority of panels, including
panel-simple. Let's document it as a common property
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++
Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +
Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt
index ec52c472c845..125ea68052af 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-common.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt
@@ -78,6 +78,12 @@ used for panels that implement compatible control signals.
while active. Active high reset signals can be supported by inverting the
GPIO specifier polarity flag.
+Power
+-----
+
+- power-supply: many display panels need an additional power supply in
+ order to be fully powered-up. For such panels, power-supply contains
+ a phandle to the regulator powering the panel.
Backlight
---------
diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
index b938269f841e..250850a2150b 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
@@ -32,6 +32,7 @@ Optional properties:
- label: See panel-common.txt.
- gpios: See panel-common.txt.
- backlight: See panel-common.txt.
+- power-supply: See panel-common.txt.
- data-mirror: If set, reverse the bit order described in the data mappings
below on all data lanes, transmitting bits for slots 6 to 0 instead of
0 to 6.
diff --git a/Documentation/devicetree/bindings/display/panel/simple-panel.txt b/Documentation/devicetree/bindings/display/panel/simple-panel.txt
index 1341bbf4aa3d..16d8ff088b7d 100644
--- a/Documentation/devicetree/bindings/display/panel/simple-panel.txt
+++ b/Documentation/devicetree/bindings/display/panel/simple-panel.txt
@@ -1,7 +1,7 @@
Simple display panel
Required properties:
-- power-supply: regulator to provide the supply voltage
+- power-supply: See panel-common.txt
Optional properties:
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 01/15] dt-bindings: panel: lvds: Document power-supply property
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The power-supply property is used by a vast majority of panels, including
panel-simple. Let's document it as a common property
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++
Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +
Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt
index ec52c472c845..125ea68052af 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-common.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt
@@ -78,6 +78,12 @@ used for panels that implement compatible control signals.
while active. Active high reset signals can be supported by inverting the
GPIO specifier polarity flag.
+Power
+-----
+
+- power-supply: many display panels need an additional power supply in
+ order to be fully powered-up. For such panels, power-supply contains
+ a phandle to the regulator powering the panel.
Backlight
---------
diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
index b938269f841e..250850a2150b 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
@@ -32,6 +32,7 @@ Optional properties:
- label: See panel-common.txt.
- gpios: See panel-common.txt.
- backlight: See panel-common.txt.
+- power-supply: See panel-common.txt.
- data-mirror: If set, reverse the bit order described in the data mappings
below on all data lanes, transmitting bits for slots 6 to 0 instead of
0 to 6.
diff --git a/Documentation/devicetree/bindings/display/panel/simple-panel.txt b/Documentation/devicetree/bindings/display/panel/simple-panel.txt
index 1341bbf4aa3d..16d8ff088b7d 100644
--- a/Documentation/devicetree/bindings/display/panel/simple-panel.txt
+++ b/Documentation/devicetree/bindings/display/panel/simple-panel.txt
@@ -1,7 +1,7 @@
Simple display panel
Required properties:
-- power-supply: regulator to provide the supply voltage
+- power-supply: See panel-common.txt
Optional properties:
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 02/15] drm/panel: lvds: Add support for the power-supply property
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
A significant number of panels need to power up a regulator in order to
operate properly. Add support for the power-supply property to enable and
disable such a regulator whenever needed.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-lvds.c b/drivers/gpu/drm/panel/panel-lvds.c
index e2d57c01200b..57e38a9e7ab4 100644
--- a/drivers/gpu/drm/panel/panel-lvds.c
+++ b/drivers/gpu/drm/panel/panel-lvds.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <drm/drmP.h>
@@ -39,6 +40,7 @@ struct panel_lvds {
bool data_mirror;
struct backlight_device *backlight;
+ struct regulator *supply;
struct gpio_desc *enable_gpio;
struct gpio_desc *reset_gpio;
@@ -69,6 +71,9 @@ static int panel_lvds_unprepare(struct drm_panel *panel)
if (lvds->enable_gpio)
gpiod_set_value_cansleep(lvds->enable_gpio, 0);
+ if (lvds->supply)
+ regulator_disable(lvds->supply);
+
return 0;
}
@@ -76,6 +81,17 @@ static int panel_lvds_prepare(struct drm_panel *panel)
{
struct panel_lvds *lvds = to_panel_lvds(panel);
+ if (lvds->supply) {
+ int err;
+
+ err = regulator_enable(lvds->supply);
+ if (err < 0) {
+ dev_err(lvds->dev, "failed to enable supply: %d\n",
+ err);
+ return err;
+ }
+ }
+
if (lvds->enable_gpio)
gpiod_set_value_cansleep(lvds->enable_gpio, 1);
@@ -196,6 +212,13 @@ static int panel_lvds_probe(struct platform_device *pdev)
if (ret < 0)
return ret;
+ lvds->supply = devm_regulator_get_optional(lvds->dev, "power");
+ if (IS_ERR(lvds->supply)) {
+ ret = PTR_ERR(lvds->supply);
+ dev_err(lvds->dev, "failed to request regulator: %d\n", ret);
+ return ret;
+ }
+
/* Get GPIOs and backlight controller. */
lvds->enable_gpio = devm_gpiod_get_optional(lvds->dev, "enable",
GPIOD_OUT_LOW);
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 02/15] drm/panel: lvds: Add support for the power-supply property
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
A significant number of panels need to power up a regulator in order to
operate properly. Add support for the power-supply property to enable and
disable such a regulator whenever needed.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-lvds.c b/drivers/gpu/drm/panel/panel-lvds.c
index e2d57c01200b..57e38a9e7ab4 100644
--- a/drivers/gpu/drm/panel/panel-lvds.c
+++ b/drivers/gpu/drm/panel/panel-lvds.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <drm/drmP.h>
@@ -39,6 +40,7 @@ struct panel_lvds {
bool data_mirror;
struct backlight_device *backlight;
+ struct regulator *supply;
struct gpio_desc *enable_gpio;
struct gpio_desc *reset_gpio;
@@ -69,6 +71,9 @@ static int panel_lvds_unprepare(struct drm_panel *panel)
if (lvds->enable_gpio)
gpiod_set_value_cansleep(lvds->enable_gpio, 0);
+ if (lvds->supply)
+ regulator_disable(lvds->supply);
+
return 0;
}
@@ -76,6 +81,17 @@ static int panel_lvds_prepare(struct drm_panel *panel)
{
struct panel_lvds *lvds = to_panel_lvds(panel);
+ if (lvds->supply) {
+ int err;
+
+ err = regulator_enable(lvds->supply);
+ if (err < 0) {
+ dev_err(lvds->dev, "failed to enable supply: %d\n",
+ err);
+ return err;
+ }
+ }
+
if (lvds->enable_gpio)
gpiod_set_value_cansleep(lvds->enable_gpio, 1);
@@ -196,6 +212,13 @@ static int panel_lvds_probe(struct platform_device *pdev)
if (ret < 0)
return ret;
+ lvds->supply = devm_regulator_get_optional(lvds->dev, "power");
+ if (IS_ERR(lvds->supply)) {
+ ret = PTR_ERR(lvds->supply);
+ dev_err(lvds->dev, "failed to request regulator: %d\n", ret);
+ return ret;
+ }
+
/* Get GPIOs and backlight controller. */
lvds->enable_gpio = devm_gpiod_get_optional(lvds->dev, "enable",
GPIOD_OUT_LOW);
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 02/15] drm/panel: lvds: Add support for the power-supply property
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
A significant number of panels need to power up a regulator in order to
operate properly. Add support for the power-supply property to enable and
disable such a regulator whenever needed.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-lvds.c b/drivers/gpu/drm/panel/panel-lvds.c
index e2d57c01200b..57e38a9e7ab4 100644
--- a/drivers/gpu/drm/panel/panel-lvds.c
+++ b/drivers/gpu/drm/panel/panel-lvds.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <drm/drmP.h>
@@ -39,6 +40,7 @@ struct panel_lvds {
bool data_mirror;
struct backlight_device *backlight;
+ struct regulator *supply;
struct gpio_desc *enable_gpio;
struct gpio_desc *reset_gpio;
@@ -69,6 +71,9 @@ static int panel_lvds_unprepare(struct drm_panel *panel)
if (lvds->enable_gpio)
gpiod_set_value_cansleep(lvds->enable_gpio, 0);
+ if (lvds->supply)
+ regulator_disable(lvds->supply);
+
return 0;
}
@@ -76,6 +81,17 @@ static int panel_lvds_prepare(struct drm_panel *panel)
{
struct panel_lvds *lvds = to_panel_lvds(panel);
+ if (lvds->supply) {
+ int err;
+
+ err = regulator_enable(lvds->supply);
+ if (err < 0) {
+ dev_err(lvds->dev, "failed to enable supply: %d\n",
+ err);
+ return err;
+ }
+ }
+
if (lvds->enable_gpio)
gpiod_set_value_cansleep(lvds->enable_gpio, 1);
@@ -196,6 +212,13 @@ static int panel_lvds_probe(struct platform_device *pdev)
if (ret < 0)
return ret;
+ lvds->supply = devm_regulator_get_optional(lvds->dev, "power");
+ if (IS_ERR(lvds->supply)) {
+ ret = PTR_ERR(lvds->supply);
+ dev_err(lvds->dev, "failed to request regulator: %d\n", ret);
+ return ret;
+ }
+
/* Get GPIOs and backlight controller. */
lvds->enable_gpio = devm_gpiod_get_optional(lvds->dev, "enable",
GPIOD_OUT_LOW);
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
2017-12-07 15:58 ` Maxime Ripard
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.
Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 9 +++++++-
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 50cc72ee1168..1e21cfaac9e2 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -121,6 +121,15 @@ Required properties:
On SoCs other than the A33 and V3s, there is one more clock required:
- 'tcon-ch1': The clock driving the TCON channel 1
+On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
+need one more reset line:
+ - 'lvds': The reset line driving the LVDS logic
+
+And on the SoCs newer than the A31 (sun6i and sun8i families), you
+need one more clock line:
+ - 'lvds-alt': An alternative clock source, separate from the TCON channel 0
+ clock, that can be used to drive the LVDS clock
+
DRC
---
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.
Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 9 +++++++-
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 50cc72ee1168..1e21cfaac9e2 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -121,6 +121,15 @@ Required properties:
On SoCs other than the A33 and V3s, there is one more clock required:
- 'tcon-ch1': The clock driving the TCON channel 1
+On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
+need one more reset line:
+ - 'lvds': The reset line driving the LVDS logic
+
+And on the SoCs newer than the A31 (sun6i and sun8i families), you
+need one more clock line:
+ - 'lvds-alt': An alternative clock source, separate from the TCON channel 0
+ clock, that can be used to drive the LVDS clock
+
DRC
---
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 04/15] dt-bindings: display: sun4i-drm: Add A83T pipeline
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The A83T has two video pipelines in parallel that looks quite similar to
the other SoCs.
The video planes are handled through a controller called the mixer, and the
video signal is then passed to the timing controller (TCON).
And while there is two instances of the mixers and TCONs, they have a
significant number of differences. The TCONs are quite easy to deal with,
one is supposed to generate TV (in the broader term, so including things
like HDMI) signals, the other one LCD (so RGB, LVDS, DSI) signals. And
while they are called TCON0 and TCON1 in the A83t datasheet, newer SoCs
call them TCON-TV and TCON-LCD, which seems more appropriate.
However, the mixers differ mostly by their capabilities, with some features
being available only in the first one, or the number of planes they expose,
but also through their register layout. And while the capabilities could be
represented as properties, the register layout differences would need to
express all the registers offsets as properties, which is usually quite
bad. Especially since documentation on that hardware block is close to
non-existant and we don't even have the list of all those registers in the
first place.
So let's call them mixer 0 and 1 in our compatibles, even though the name
is pretty bad...
At the moment, we only have tested the code on a board that has a single
display output, so we're leaving the tcon-tv and mixer1 out.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 1e21cfaac9e2..9f073af4c711 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -93,6 +93,7 @@ Required properties:
* allwinner,sun6i-a31s-tcon
* allwinner,sun7i-a20-tcon
* allwinner,sun8i-a33-tcon
+ * allwinner,sun8i-a83t-tcon-lcd
* allwinner,sun8i-v3s-tcon
- reg: base address and size of memory-mapped region
- interrupts: interrupt associated to this IP
@@ -225,6 +226,7 @@ supported.
Required properties:
- compatible: value must be one of:
+ * allwinner,sun8i-a83t-de2-mixer-0
* allwinner,sun8i-v3s-de2-mixer
- reg: base address and size of the memory-mapped region.
- clocks: phandles to the clocks feeding the mixer
@@ -254,6 +256,7 @@ Required properties:
* allwinner,sun6i-a31s-display-engine
* allwinner,sun7i-a20-display-engine
* allwinner,sun8i-a33-display-engine
+ * allwinner,sun8i-a83t-display-engine
* allwinner,sun8i-v3s-display-engine
- allwinner,pipelines: list of phandle to the display engine
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 04/15] dt-bindings: display: sun4i-drm: Add A83T pipeline
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
The A83T has two video pipelines in parallel that looks quite similar to
the other SoCs.
The video planes are handled through a controller called the mixer, and the
video signal is then passed to the timing controller (TCON).
And while there is two instances of the mixers and TCONs, they have a
significant number of differences. The TCONs are quite easy to deal with,
one is supposed to generate TV (in the broader term, so including things
like HDMI) signals, the other one LCD (so RGB, LVDS, DSI) signals. And
while they are called TCON0 and TCON1 in the A83t datasheet, newer SoCs
call them TCON-TV and TCON-LCD, which seems more appropriate.
However, the mixers differ mostly by their capabilities, with some features
being available only in the first one, or the number of planes they expose,
but also through their register layout. And while the capabilities could be
represented as properties, the register layout differences would need to
express all the registers offsets as properties, which is usually quite
bad. Especially since documentation on that hardware block is close to
non-existant and we don't even have the list of all those registers in the
first place.
So let's call them mixer 0 and 1 in our compatibles, even though the name
is pretty bad...
At the moment, we only have tested the code on a board that has a single
display output, so we're leaving the tcon-tv and mixer1 out.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 1e21cfaac9e2..9f073af4c711 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -93,6 +93,7 @@ Required properties:
* allwinner,sun6i-a31s-tcon
* allwinner,sun7i-a20-tcon
* allwinner,sun8i-a33-tcon
+ * allwinner,sun8i-a83t-tcon-lcd
* allwinner,sun8i-v3s-tcon
- reg: base address and size of memory-mapped region
- interrupts: interrupt associated to this IP
@@ -225,6 +226,7 @@ supported.
Required properties:
- compatible: value must be one of:
+ * allwinner,sun8i-a83t-de2-mixer-0
* allwinner,sun8i-v3s-de2-mixer
- reg: base address and size of the memory-mapped region.
- clocks: phandles to the clocks feeding the mixer
@@ -254,6 +256,7 @@ Required properties:
* allwinner,sun6i-a31s-display-engine
* allwinner,sun7i-a20-display-engine
* allwinner,sun8i-a33-display-engine
+ * allwinner,sun8i-a83t-display-engine
* allwinner,sun8i-v3s-display-engine
- allwinner,pipelines: list of phandle to the display engine
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 04/15] dt-bindings: display: sun4i-drm: Add A83T pipeline
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The A83T has two video pipelines in parallel that looks quite similar to
the other SoCs.
The video planes are handled through a controller called the mixer, and the
video signal is then passed to the timing controller (TCON).
And while there is two instances of the mixers and TCONs, they have a
significant number of differences. The TCONs are quite easy to deal with,
one is supposed to generate TV (in the broader term, so including things
like HDMI) signals, the other one LCD (so RGB, LVDS, DSI) signals. And
while they are called TCON0 and TCON1 in the A83t datasheet, newer SoCs
call them TCON-TV and TCON-LCD, which seems more appropriate.
However, the mixers differ mostly by their capabilities, with some features
being available only in the first one, or the number of planes they expose,
but also through their register layout. And while the capabilities could be
represented as properties, the register layout differences would need to
express all the registers offsets as properties, which is usually quite
bad. Especially since documentation on that hardware block is close to
non-existant and we don't even have the list of all those registers in the
first place.
So let's call them mixer 0 and 1 in our compatibles, even though the name
is pretty bad...
At the moment, we only have tested the code on a board that has a single
display output, so we're leaving the tcon-tv and mixer1 out.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 1e21cfaac9e2..9f073af4c711 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -93,6 +93,7 @@ Required properties:
* allwinner,sun6i-a31s-tcon
* allwinner,sun7i-a20-tcon
* allwinner,sun8i-a33-tcon
+ * allwinner,sun8i-a83t-tcon-lcd
* allwinner,sun8i-v3s-tcon
- reg: base address and size of memory-mapped region
- interrupts: interrupt associated to this IP
@@ -225,6 +226,7 @@ supported.
Required properties:
- compatible: value must be one of:
+ * allwinner,sun8i-a83t-de2-mixer-0
* allwinner,sun8i-v3s-de2-mixer
- reg: base address and size of the memory-mapped region.
- clocks: phandles to the clocks feeding the mixer
@@ -254,6 +256,7 @@ Required properties:
* allwinner,sun6i-a31s-display-engine
* allwinner,sun7i-a20-display-engine
* allwinner,sun8i-a33-display-engine
+ * allwinner,sun8i-a83t-display-engine
* allwinner,sun8i-v3s-display-engine
- allwinner,pipelines: list of phandle to the display engine
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 05/15] drm/sun4i: Fix error path handling
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding, stable
The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap
initialization sequence") moved a bunch of logic around, but forgot to
update the gotos after the introduction of the err_free_dotclock label.
It means that if we fail later that the one introduced in that commit,
we'll just to the old label which isn't free the clock we created. This
will result in a breakage as soon as someone tries to do something with
that clock, since its resources will have been long reclaimed.
Cc: <stable@vger.kernel.org>
Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index a1ed462c2430..ea056a3d2131 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -724,12 +724,12 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
if (IS_ERR(tcon->crtc)) {
dev_err(dev, "Couldn't create our CRTC\n");
ret = PTR_ERR(tcon->crtc);
- goto err_free_clocks;
+ goto err_free_dotclock;
}
ret = sun4i_rgb_init(drm, tcon);
if (ret < 0)
- goto err_free_clocks;
+ goto err_free_dotclock;
if (tcon->quirks->needs_de_be_mux) {
/*
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 05/15] drm/sun4i: Fix error path handling
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
stable, linux-arm-kernel, icenowy
The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap
initialization sequence") moved a bunch of logic around, but forgot to
update the gotos after the introduction of the err_free_dotclock label.
It means that if we fail later that the one introduced in that commit,
we'll just to the old label which isn't free the clock we created. This
will result in a breakage as soon as someone tries to do something with
that clock, since its resources will have been long reclaimed.
Cc: <stable@vger.kernel.org>
Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index a1ed462c2430..ea056a3d2131 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -724,12 +724,12 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
if (IS_ERR(tcon->crtc)) {
dev_err(dev, "Couldn't create our CRTC\n");
ret = PTR_ERR(tcon->crtc);
- goto err_free_clocks;
+ goto err_free_dotclock;
}
ret = sun4i_rgb_init(drm, tcon);
if (ret < 0)
- goto err_free_clocks;
+ goto err_free_dotclock;
if (tcon->quirks->needs_de_be_mux) {
/*
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 05/15] drm/sun4i: Fix error path handling
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap
initialization sequence") moved a bunch of logic around, but forgot to
update the gotos after the introduction of the err_free_dotclock label.
It means that if we fail later that the one introduced in that commit,
we'll just to the old label which isn't free the clock we created. This
will result in a breakage as soon as someone tries to do something with
that clock, since its resources will have been long reclaimed.
Cc: <stable@vger.kernel.org>
Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index a1ed462c2430..ea056a3d2131 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -724,12 +724,12 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
if (IS_ERR(tcon->crtc)) {
dev_err(dev, "Couldn't create our CRTC\n");
ret = PTR_ERR(tcon->crtc);
- goto err_free_clocks;
+ goto err_free_dotclock;
}
ret = sun4i_rgb_init(drm, tcon);
if (ret < 0)
- goto err_free_clocks;
+ goto err_free_dotclock;
if (tcon->quirks->needs_de_be_mux) {
/*
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 06/15] drm/sun4i: Force the mixer rate at 150MHz
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
It seems like the mixer can only run properly when clocked at 150MHz. In
order to have something more robust than simply a fire-and-forget
assigned-clocks-rate, let's put that in the code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 9 +++++++++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 29ceeb016d72..ff235e3228ce 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -400,6 +400,14 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
}
clk_prepare_enable(mixer->mod_clk);
+ /*
+ * It seems that we need to enforce that rate for whatever
+ * reason for the mixer to be functional. Make sure it's the
+ * case.
+ */
+ if (mixer->cfg->mod_rate)
+ clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
+
list_add_tail(&mixer->engine.list, &drv->engine_list);
/* Reset the registers */
@@ -474,6 +482,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
.ui_num = 1,
.scaler_mask = 0x3,
.ccsc = 0,
+ .mod_rate = 150000000,
};
static const struct of_device_id sun8i_mixer_of_table[] = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index bc58040a88f9..f34e70c42adf 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -121,12 +121,15 @@ struct de2_fmt_info {
* Set value to 0 if this is first mixer or second mixer with VEP support.
* Set value to 1 if this is second mixer without VEP support. Other values
* are invalid.
+ * @mod_rate: module clock rate that needs to be set in order to have
+ * a functional block.
*/
struct sun8i_mixer_cfg {
int vi_num;
int ui_num;
int scaler_mask;
int ccsc;
+ unsigned long mod_rate;
};
struct sun8i_mixer {
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 06/15] drm/sun4i: Force the mixer rate at 150MHz
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
It seems like the mixer can only run properly when clocked at 150MHz. In
order to have something more robust than simply a fire-and-forget
assigned-clocks-rate, let's put that in the code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 9 +++++++++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 29ceeb016d72..ff235e3228ce 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -400,6 +400,14 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
}
clk_prepare_enable(mixer->mod_clk);
+ /*
+ * It seems that we need to enforce that rate for whatever
+ * reason for the mixer to be functional. Make sure it's the
+ * case.
+ */
+ if (mixer->cfg->mod_rate)
+ clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
+
list_add_tail(&mixer->engine.list, &drv->engine_list);
/* Reset the registers */
@@ -474,6 +482,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
.ui_num = 1,
.scaler_mask = 0x3,
.ccsc = 0,
+ .mod_rate = 150000000,
};
static const struct of_device_id sun8i_mixer_of_table[] = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index bc58040a88f9..f34e70c42adf 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -121,12 +121,15 @@ struct de2_fmt_info {
* Set value to 0 if this is first mixer or second mixer with VEP support.
* Set value to 1 if this is second mixer without VEP support. Other values
* are invalid.
+ * @mod_rate: module clock rate that needs to be set in order to have
+ * a functional block.
*/
struct sun8i_mixer_cfg {
int vi_num;
int ui_num;
int scaler_mask;
int ccsc;
+ unsigned long mod_rate;
};
struct sun8i_mixer {
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 06/15] drm/sun4i: Force the mixer rate at 150MHz
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
It seems like the mixer can only run properly when clocked at 150MHz. In
order to have something more robust than simply a fire-and-forget
assigned-clocks-rate, let's put that in the code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 9 +++++++++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 29ceeb016d72..ff235e3228ce 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -400,6 +400,14 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
}
clk_prepare_enable(mixer->mod_clk);
+ /*
+ * It seems that we need to enforce that rate for whatever
+ * reason for the mixer to be functional. Make sure it's the
+ * case.
+ */
+ if (mixer->cfg->mod_rate)
+ clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
+
list_add_tail(&mixer->engine.list, &drv->engine_list);
/* Reset the registers */
@@ -474,6 +482,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
.ui_num = 1,
.scaler_mask = 0x3,
.ccsc = 0,
+ .mod_rate = 150000000,
};
static const struct of_device_id sun8i_mixer_of_table[] = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index bc58040a88f9..f34e70c42adf 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -121,12 +121,15 @@ struct de2_fmt_info {
* Set value to 0 if this is first mixer or second mixer with VEP support.
* Set value to 1 if this is second mixer without VEP support. Other values
* are invalid.
+ * @mod_rate: module clock rate that needs to be set in order to have
+ * a functional block.
*/
struct sun8i_mixer_cfg {
int vi_num;
int ui_num;
int scaler_mask;
int ccsc;
+ unsigned long mod_rate;
};
struct sun8i_mixer {
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 07/15] drm/sun4i: Create minimal multipliers and dividers
2017-12-07 15:58 ` Maxime Ripard
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The various outputs the TCON can provide have different constraints on the
dotclock divider. Let's make them configurable by the various mode_set
functions.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 +++++++---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 ++
drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
index d401156490f3..023f39bda633 100644
--- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c
+++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
@@ -17,8 +17,9 @@
#include "sun4i_dotclock.h"
struct sun4i_dclk {
- struct clk_hw hw;
- struct regmap *regmap;
+ struct clk_hw hw;
+ struct regmap *regmap;
+ struct sun4i_tcon *tcon;
};
static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw)
@@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw,
static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
+ struct sun4i_dclk *dclk = hw_to_dclk(hw);
+ struct sun4i_tcon *tcon = dclk->tcon;
unsigned long best_parent = 0;
u8 best_div = 1;
int i;
- for (i = 6; i <= 127; i++) {
+ for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) {
unsigned long ideal = rate * i;
unsigned long rounded;
@@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon)
dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL);
if (!dclk)
return -ENOMEM;
+ dclk->tcon = tcon;
init.name = clk_name;
init.ops = &sun4i_dclk_ops;
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index ea056a3d2131..46e28ca1f676 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
u8 clk_delay;
u32 val = 0;
+ tcon->dclk_min_div = 6;
+ tcon->dclk_max_div = 127;
sun4i_tcon0_mode_set_common(tcon, mode);
/* Adjust clock delay */
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index 839266a38505..bd3ad7684870 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -169,6 +169,8 @@ struct sun4i_tcon {
/* Pixel clock */
struct clk *dclk;
+ u8 dclk_max_div;
+ u8 dclk_min_div;
/* Reset control */
struct reset_control *lcd_rst;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 07/15] drm/sun4i: Create minimal multipliers and dividers
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The various outputs the TCON can provide have different constraints on the
dotclock divider. Let's make them configurable by the various mode_set
functions.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 +++++++---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 ++
drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
index d401156490f3..023f39bda633 100644
--- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c
+++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
@@ -17,8 +17,9 @@
#include "sun4i_dotclock.h"
struct sun4i_dclk {
- struct clk_hw hw;
- struct regmap *regmap;
+ struct clk_hw hw;
+ struct regmap *regmap;
+ struct sun4i_tcon *tcon;
};
static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw)
@@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw,
static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
+ struct sun4i_dclk *dclk = hw_to_dclk(hw);
+ struct sun4i_tcon *tcon = dclk->tcon;
unsigned long best_parent = 0;
u8 best_div = 1;
int i;
- for (i = 6; i <= 127; i++) {
+ for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) {
unsigned long ideal = rate * i;
unsigned long rounded;
@@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon)
dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL);
if (!dclk)
return -ENOMEM;
+ dclk->tcon = tcon;
init.name = clk_name;
init.ops = &sun4i_dclk_ops;
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index ea056a3d2131..46e28ca1f676 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
u8 clk_delay;
u32 val = 0;
+ tcon->dclk_min_div = 6;
+ tcon->dclk_max_div = 127;
sun4i_tcon0_mode_set_common(tcon, mode);
/* Adjust clock delay */
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index 839266a38505..bd3ad7684870 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -169,6 +169,8 @@ struct sun4i_tcon {
/* Pixel clock */
struct clk *dclk;
+ u8 dclk_max_div;
+ u8 dclk_min_div;
/* Reset control */
struct reset_control *lcd_rst;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 08/15] drm/sun4i: Add LVDS support
2017-12-07 15:58 ` Maxime Ripard
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The TCON supports the LVDS interface to output to a panel or a bridge.
Let's add support for it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/Makefile | 1 +-
drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 ++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 242 +++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 29 ++++-
5 files changed, 465 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 82a6ac57fbe3..2b37a6abbb1d 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -15,6 +15,7 @@ sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \
sun4i-tcon-y += sun4i_crtc.o
sun4i-tcon-y += sun4i_dotclock.o
+sun4i-tcon-y += sun4i_lvds.o
sun4i-tcon-y += sun4i_tcon.o
sun4i-tcon-y += sun4i_rgb.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.c b/drivers/gpu/drm/sun4i/sun4i_lvds.c
new file mode 100644
index 000000000000..be3f14d7746d
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_lvds.c
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Free Electrons
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ */
+
+#include <linux/clk.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_of.h>
+#include <drm/drm_panel.h>
+
+#include "sun4i_crtc.h"
+#include "sun4i_tcon.h"
+#include "sun4i_lvds.h"
+
+struct sun4i_lvds {
+ struct drm_connector connector;
+ struct drm_encoder encoder;
+
+ struct sun4i_tcon *tcon;
+};
+
+static inline struct sun4i_lvds *
+drm_connector_to_sun4i_lvds(struct drm_connector *connector)
+{
+ return container_of(connector, struct sun4i_lvds,
+ connector);
+}
+
+static inline struct sun4i_lvds *
+drm_encoder_to_sun4i_lvds(struct drm_encoder *encoder)
+{
+ return container_of(encoder, struct sun4i_lvds,
+ encoder);
+}
+
+static int sun4i_lvds_get_modes(struct drm_connector *connector)
+{
+ struct sun4i_lvds *lvds =
+ drm_connector_to_sun4i_lvds(connector);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ return drm_panel_get_modes(tcon->panel);
+}
+
+static struct drm_connector_helper_funcs sun4i_lvds_con_helper_funcs = {
+ .get_modes = sun4i_lvds_get_modes,
+};
+
+static void
+sun4i_lvds_connector_destroy(struct drm_connector *connector)
+{
+ struct sun4i_lvds *lvds = drm_connector_to_sun4i_lvds(connector);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ drm_panel_detach(tcon->panel);
+ drm_connector_cleanup(connector);
+}
+
+static const struct drm_connector_funcs sun4i_lvds_con_funcs = {
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = sun4i_lvds_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static void sun4i_lvds_encoder_enable(struct drm_encoder *encoder)
+{
+ struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ DRM_DEBUG_DRIVER("Enabling LVDS output\n");
+
+ if (!IS_ERR(tcon->panel)) {
+ drm_panel_prepare(tcon->panel);
+ drm_panel_enable(tcon->panel);
+ }
+}
+
+static void sun4i_lvds_encoder_disable(struct drm_encoder *encoder)
+{
+ struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ DRM_DEBUG_DRIVER("Disabling LVDS output\n");
+
+ if (!IS_ERR(tcon->panel)) {
+ drm_panel_disable(tcon->panel);
+ drm_panel_unprepare(tcon->panel);
+ }
+}
+
+static const struct drm_encoder_helper_funcs sun4i_lvds_enc_helper_funcs = {
+ .disable = sun4i_lvds_encoder_disable,
+ .enable = sun4i_lvds_encoder_enable,
+};
+
+static const struct drm_encoder_funcs sun4i_lvds_enc_funcs = {
+ .destroy = drm_encoder_cleanup,
+};
+
+int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon)
+{
+ struct drm_encoder *encoder;
+ struct drm_bridge *bridge;
+ struct sun4i_lvds *lvds;
+ int ret;
+
+ lvds = devm_kzalloc(drm->dev, sizeof(*lvds), GFP_KERNEL);
+ if (!lvds)
+ return -ENOMEM;
+ lvds->tcon = tcon;
+ encoder = &lvds->encoder;
+
+ ret = drm_of_find_panel_or_bridge(tcon->dev->of_node, 1, 0,
+ &tcon->panel, &bridge);
+ if (ret) {
+ dev_info(drm->dev, "No panel or bridge found... LVDS output disabled\n");
+ return 0;
+ }
+
+ drm_encoder_helper_add(&lvds->encoder,
+ &sun4i_lvds_enc_helper_funcs);
+ ret = drm_encoder_init(drm,
+ &lvds->encoder,
+ &sun4i_lvds_enc_funcs,
+ DRM_MODE_ENCODER_LVDS,
+ NULL);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't initialise the lvds encoder\n");
+ goto err_out;
+ }
+
+ /* The LVDS encoder can only work with the TCON channel 0 */
+ lvds->encoder.possible_crtcs = BIT(drm_crtc_index(&tcon->crtc->crtc));
+
+ if (tcon->panel) {
+ drm_connector_helper_add(&lvds->connector,
+ &sun4i_lvds_con_helper_funcs);
+ ret = drm_connector_init(drm, &lvds->connector,
+ &sun4i_lvds_con_funcs,
+ DRM_MODE_CONNECTOR_LVDS);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't initialise the lvds connector\n");
+ goto err_cleanup_connector;
+ }
+
+ drm_mode_connector_attach_encoder(&lvds->connector,
+ &lvds->encoder);
+
+ ret = drm_panel_attach(tcon->panel, &lvds->connector);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't attach our panel\n");
+ goto err_cleanup_connector;
+ }
+ }
+
+ if (bridge) {
+ ret = drm_bridge_attach(encoder, bridge, NULL);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't attach our bridge\n");
+ goto err_cleanup_connector;
+ }
+ }
+
+ return 0;
+
+err_cleanup_connector:
+ drm_encoder_cleanup(&lvds->encoder);
+err_out:
+ return ret;
+}
+EXPORT_SYMBOL(sun4i_lvds_init);
diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h
new file mode 100644
index 000000000000..1b8fad4b82c3
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2015 NextThing Co
+ * Copyright (C) 2015-2017 Free Electrons
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef _SUN4I_LVDS_H_
+#define _SUN4I_LVDS_H_
+
+int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon);
+
+#endif /* _SUN4I_LVDS_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 46e28ca1f676..777c7348d0cf 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -31,10 +31,52 @@
#include "sun4i_crtc.h"
#include "sun4i_dotclock.h"
#include "sun4i_drv.h"
+#include "sun4i_lvds.h"
#include "sun4i_rgb.h"
#include "sun4i_tcon.h"
#include "sunxi_engine.h"
+static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder)
+{
+ struct drm_connector *connector;
+ struct drm_connector_list_iter iter;
+
+ drm_connector_list_iter_begin(encoder->dev, &iter);
+ drm_for_each_connector_iter(connector, &iter)
+ if (connector->encoder == encoder) {
+ drm_connector_list_iter_end(&iter);
+ return connector;
+ }
+ drm_connector_list_iter_end(&iter);
+
+ return NULL;
+}
+
+static int sun4i_tcon_get_pixel_depth(const struct drm_encoder *encoder)
+{
+ struct drm_connector *connector;
+ struct drm_display_info *info;
+
+ connector = sun4i_tcon_get_connector(encoder);
+ if (!connector)
+ return -EINVAL;
+
+ info = &connector->display_info;
+ if (info->num_bus_formats != 1)
+ return -EINVAL;
+
+ switch (info->bus_formats[0]) {
+ case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+ return 18;
+
+ case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+ case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+ return 24;
+ }
+
+ return -EINVAL;
+}
+
static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
bool enabled)
{
@@ -65,13 +107,63 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
clk_disable_unprepare(clk);
}
+static void sun4i_tcon_lvds_set_status(struct sun4i_tcon *tcon,
+ const struct drm_encoder *encoder,
+ bool enabled)
+{
+ if (enabled) {
+ u8 val;
+
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
+ SUN4I_TCON0_LVDS_IF_EN,
+ SUN4I_TCON0_LVDS_IF_EN);
+
+ /*
+ * As their name suggest, these values only apply to the A31
+ * and later SoCs. We'll have to rework this when merging
+ * support for the older SoCs.
+ */
+ regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_C(2) |
+ SUN6I_TCON0_LVDS_ANA0_V(3) |
+ SUN6I_TCON0_LVDS_ANA0_PD(2) |
+ SUN6I_TCON0_LVDS_ANA0_EN_LDO);
+ udelay(2);
+
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_EN_MB,
+ SUN6I_TCON0_LVDS_ANA0_EN_MB);
+ udelay(2);
+
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVC,
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVC);
+
+ if (sun4i_tcon_get_pixel_depth(encoder) == 18)
+ val = 7;
+ else
+ val = 0xf;
+
+ regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVD(0xf),
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVD(val));
+ } else {
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
+ SUN4I_TCON0_LVDS_IF_EN, 0);
+ }
+}
+
void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
const struct drm_encoder *encoder,
bool enabled)
{
+ bool is_lvds = false;
int channel;
switch (encoder->encoder_type) {
+ case DRM_MODE_ENCODER_LVDS:
+ is_lvds = true;
+ /* Fallthrough */
case DRM_MODE_ENCODER_NONE:
channel = 0;
break;
@@ -84,10 +176,16 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
return;
}
+ if (is_lvds && !enabled)
+ sun4i_tcon_lvds_set_status(tcon, encoder, false);
+
regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
SUN4I_TCON_GCTL_TCON_ENABLE,
enabled ? SUN4I_TCON_GCTL_TCON_ENABLE : 0);
+ if (is_lvds && enabled)
+ sun4i_tcon_lvds_set_status(tcon, encoder, true);
+
sun4i_tcon_channel_set_status(tcon, channel, enabled);
}
@@ -170,6 +268,78 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon,
SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
}
+static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
+ const struct drm_encoder *encoder,
+ const struct drm_display_mode *mode)
+{
+ unsigned int bp;
+ u8 clk_delay;
+ u32 reg, val = 0;
+
+ tcon->dclk_min_div = 7;
+ tcon->dclk_max_div = 7;
+ sun4i_tcon0_mode_set_common(tcon, mode);
+
+ /* Adjust clock delay */
+ clk_delay = sun4i_tcon_get_clk_delay(mode, 0);
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG,
+ SUN4I_TCON0_CTL_CLK_DELAY_MASK,
+ SUN4I_TCON0_CTL_CLK_DELAY(clk_delay));
+
+ /*
+ * This is called a backporch in the register documentation,
+ * but it really is the back porch + hsync
+ */
+ bp = mode->crtc_htotal - mode->crtc_hsync_start;
+ DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n",
+ mode->crtc_htotal, bp);
+
+ /* Set horizontal display timings */
+ regmap_write(tcon->regs, SUN4I_TCON0_BASIC1_REG,
+ SUN4I_TCON0_BASIC1_H_TOTAL(mode->htotal) |
+ SUN4I_TCON0_BASIC1_H_BACKPORCH(bp));
+
+ /*
+ * This is called a backporch in the register documentation,
+ * but it really is the back porch + hsync
+ */
+ bp = mode->crtc_vtotal - mode->crtc_vsync_start;
+ DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n",
+ mode->crtc_vtotal, bp);
+
+ /* Set vertical display timings */
+ regmap_write(tcon->regs, SUN4I_TCON0_BASIC2_REG,
+ SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) |
+ SUN4I_TCON0_BASIC2_V_BACKPORCH(bp));
+
+ reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 |
+ SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL |
+ SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL;
+ if (sun4i_tcon_get_pixel_depth(encoder) == 24)
+ reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS;
+ else
+ reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS;
+
+ regmap_write(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, reg);
+
+ /* Setup the polarity of the various signals */
+ if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+ val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE;
+
+ if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+ val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
+
+ regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, val);
+
+ /* Map output pins to channel 0 */
+ regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
+ SUN4I_TCON_GCTL_IOMAP_MASK,
+ SUN4I_TCON_GCTL_IOMAP_TCON0);
+
+ /* Enable the output on the pins */
+ regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, 0xe0000000);
+}
+
static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
const struct drm_display_mode *mode)
{
@@ -336,6 +506,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon,
const struct drm_display_mode *mode)
{
switch (encoder->encoder_type) {
+ case DRM_MODE_ENCODER_LVDS:
+ sun4i_tcon0_mode_set_lvds(tcon, encoder, mode);
+ break;
case DRM_MODE_ENCODER_NONE:
sun4i_tcon0_mode_set_rgb(tcon, mode);
sun4i_tcon_set_mux(tcon, 0, encoder);
@@ -667,7 +840,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
struct drm_device *drm = data;
struct sun4i_drv *drv = drm->dev_private;
struct sunxi_engine *engine;
+ struct device_node *remote;
struct sun4i_tcon *tcon;
+ bool has_lvds_rst, has_lvds_pll, can_lvds;
int ret;
engine = sun4i_tcon_find_engine(drv, dev->of_node);
@@ -698,6 +873,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
return ret;
}
+ /*
+ * This can only be made optional since we've had DT nodes
+ * without the LVDS reset properties.
+ *
+ * If the property is missing, just disable LVDS, and print a
+ * warning.
+ */
+ tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds");
+ if (IS_ERR(tcon->lvds_rst)) {
+ dev_err(dev, "Couldn't get our reset line\n");
+ return PTR_ERR(tcon->lvds_rst);
+ } else if (tcon->lvds_rst) {
+ has_lvds_rst = true;
+ reset_control_reset(tcon->lvds_rst);
+ } else {
+ has_lvds_rst = false;
+ }
+
+ /*
+ * This can only be made optional since we've had DT nodes
+ * without the LVDS reset properties.
+ *
+ * If the property is missing, just disable LVDS, and print a
+ * warning.
+ */
+ if (tcon->quirks->has_lvds_pll) {
+ tcon->lvds_pll = devm_clk_get(dev, "lvds-alt");
+ if (IS_ERR(tcon->lvds_pll)) {
+ if (PTR_ERR(tcon->lvds_pll) == -ENOENT) {
+ has_lvds_pll = false;
+ } else {
+ dev_err(dev, "Couldn't get the LVDS PLL\n");
+ return PTR_ERR(tcon->lvds_rst);
+ }
+ } else {
+ has_lvds_pll = true;
+ }
+ }
+
+ if (!has_lvds_rst || (tcon->quirks->has_lvds_pll && !has_lvds_pll)) {
+ dev_warn(dev,
+ "Missing LVDS properties, Please upgrade your DT\n");
+ dev_warn(dev, "LVDS output disabled\n");
+ can_lvds = false;
+ } else {
+ can_lvds = true;
+ }
+
ret = sun4i_tcon_init_clocks(dev, tcon);
if (ret) {
dev_err(dev, "Couldn't init our TCON clocks\n");
@@ -729,7 +952,21 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
goto err_free_dotclock;
}
- ret = sun4i_rgb_init(drm, tcon);
+ /*
+ * If we have an LVDS panel connected to the TCON, we should
+ * just probe the LVDS connector. Otherwise, just probe RGB as
+ * we used to.
+ */
+ remote = of_graph_get_remote_node(dev->of_node, 1, 0);
+ if (of_device_is_compatible(remote, "panel-lvds"))
+ if (can_lvds)
+ ret = sun4i_lvds_init(drm, tcon);
+ else
+ ret = -EINVAL;
+ else
+ ret = sun4i_rgb_init(drm, tcon);
+ of_node_put(remote);
+
if (ret < 0)
goto err_free_dotclock;
@@ -879,6 +1116,7 @@ static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
static const struct sun4i_tcon_quirks sun6i_a31_quirks = {
.has_channel_1 = true,
+ .has_lvds_pll = true,
.needs_de_be_mux = true,
.set_mux = sun6i_tcon_set_mux,
};
@@ -895,7 +1133,7 @@ static const struct sun4i_tcon_quirks sun7i_a20_quirks = {
};
static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
- /* nothing is supported */
+ .has_lvds_pll = true,
};
static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index bd3ad7684870..23db06cdc461 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -70,7 +70,21 @@
#define SUN4I_TCON0_TTL2_REG 0x78
#define SUN4I_TCON0_TTL3_REG 0x7c
#define SUN4I_TCON0_TTL4_REG 0x80
+
#define SUN4I_TCON0_LVDS_IF_REG 0x84
+#define SUN4I_TCON0_LVDS_IF_EN BIT(31)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_MASK BIT(26)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS (1 << 26)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS (0 << 26)
+#define SUN4I_TCON0_LVDS_IF_CLK_SEL_MASK BIT(20)
+#define SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 (1 << 20)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_MASK BIT(4)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL (1 << 4)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_INV (0 << 4)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_MASK GENMASK(3, 0)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL (0xf)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_INV (0)
+
#define SUN4I_TCON0_IO_POL_REG 0x88
#define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28)
#define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE BIT(25)
@@ -131,6 +145,16 @@
#define SUN4I_TCON_CEU_RANGE_G_REG 0x144
#define SUN4I_TCON_CEU_RANGE_B_REG 0x148
#define SUN4I_TCON_MUX_CTRL_REG 0x200
+
+#define SUN4I_TCON0_LVDS_ANA0_REG 0x220
+#define SUN6I_TCON0_LVDS_ANA0_EN_MB BIT(31)
+#define SUN6I_TCON0_LVDS_ANA0_EN_LDO BIT(30)
+#define SUN6I_TCON0_LVDS_ANA0_EN_DRVC BIT(24)
+#define SUN6I_TCON0_LVDS_ANA0_EN_DRVD(x) (((x) & 0xf) << 20)
+#define SUN6I_TCON0_LVDS_ANA0_C(x) (((x) & 3) << 17)
+#define SUN6I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8)
+#define SUN6I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4)
+
#define SUN4I_TCON1_FILL_CTL_REG 0x300
#define SUN4I_TCON1_FILL_BEG0_REG 0x304
#define SUN4I_TCON1_FILL_END0_REG 0x308
@@ -149,6 +173,7 @@ struct sun4i_tcon;
struct sun4i_tcon_quirks {
bool has_channel_1; /* a33 does not have channel 1 */
+ bool has_lvds_pll; /* Can we mux the LVDS clock to a PLL? */
bool needs_de_be_mux; /* sun6i needs mux to select backend */
/* callback to handle tcon muxing options */
@@ -167,6 +192,9 @@ struct sun4i_tcon {
struct clk *sclk0;
struct clk *sclk1;
+ /* Possible mux for the LVDS clock */
+ struct clk *lvds_pll;
+
/* Pixel clock */
struct clk *dclk;
u8 dclk_max_div;
@@ -174,6 +202,7 @@ struct sun4i_tcon {
/* Reset control */
struct reset_control *lcd_rst;
+ struct reset_control *lvds_rst;
struct drm_panel *panel;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 08/15] drm/sun4i: Add LVDS support
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The TCON supports the LVDS interface to output to a panel or a bridge.
Let's add support for it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/Makefile | 1 +-
drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 ++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 242 +++++++++++++++++++++++++++++-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 29 ++++-
5 files changed, 465 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 82a6ac57fbe3..2b37a6abbb1d 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -15,6 +15,7 @@ sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \
sun4i-tcon-y += sun4i_crtc.o
sun4i-tcon-y += sun4i_dotclock.o
+sun4i-tcon-y += sun4i_lvds.o
sun4i-tcon-y += sun4i_tcon.o
sun4i-tcon-y += sun4i_rgb.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.c b/drivers/gpu/drm/sun4i/sun4i_lvds.c
new file mode 100644
index 000000000000..be3f14d7746d
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_lvds.c
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Free Electrons
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ */
+
+#include <linux/clk.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_of.h>
+#include <drm/drm_panel.h>
+
+#include "sun4i_crtc.h"
+#include "sun4i_tcon.h"
+#include "sun4i_lvds.h"
+
+struct sun4i_lvds {
+ struct drm_connector connector;
+ struct drm_encoder encoder;
+
+ struct sun4i_tcon *tcon;
+};
+
+static inline struct sun4i_lvds *
+drm_connector_to_sun4i_lvds(struct drm_connector *connector)
+{
+ return container_of(connector, struct sun4i_lvds,
+ connector);
+}
+
+static inline struct sun4i_lvds *
+drm_encoder_to_sun4i_lvds(struct drm_encoder *encoder)
+{
+ return container_of(encoder, struct sun4i_lvds,
+ encoder);
+}
+
+static int sun4i_lvds_get_modes(struct drm_connector *connector)
+{
+ struct sun4i_lvds *lvds =
+ drm_connector_to_sun4i_lvds(connector);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ return drm_panel_get_modes(tcon->panel);
+}
+
+static struct drm_connector_helper_funcs sun4i_lvds_con_helper_funcs = {
+ .get_modes = sun4i_lvds_get_modes,
+};
+
+static void
+sun4i_lvds_connector_destroy(struct drm_connector *connector)
+{
+ struct sun4i_lvds *lvds = drm_connector_to_sun4i_lvds(connector);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ drm_panel_detach(tcon->panel);
+ drm_connector_cleanup(connector);
+}
+
+static const struct drm_connector_funcs sun4i_lvds_con_funcs = {
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = sun4i_lvds_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static void sun4i_lvds_encoder_enable(struct drm_encoder *encoder)
+{
+ struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ DRM_DEBUG_DRIVER("Enabling LVDS output\n");
+
+ if (!IS_ERR(tcon->panel)) {
+ drm_panel_prepare(tcon->panel);
+ drm_panel_enable(tcon->panel);
+ }
+}
+
+static void sun4i_lvds_encoder_disable(struct drm_encoder *encoder)
+{
+ struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
+ struct sun4i_tcon *tcon = lvds->tcon;
+
+ DRM_DEBUG_DRIVER("Disabling LVDS output\n");
+
+ if (!IS_ERR(tcon->panel)) {
+ drm_panel_disable(tcon->panel);
+ drm_panel_unprepare(tcon->panel);
+ }
+}
+
+static const struct drm_encoder_helper_funcs sun4i_lvds_enc_helper_funcs = {
+ .disable = sun4i_lvds_encoder_disable,
+ .enable = sun4i_lvds_encoder_enable,
+};
+
+static const struct drm_encoder_funcs sun4i_lvds_enc_funcs = {
+ .destroy = drm_encoder_cleanup,
+};
+
+int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon)
+{
+ struct drm_encoder *encoder;
+ struct drm_bridge *bridge;
+ struct sun4i_lvds *lvds;
+ int ret;
+
+ lvds = devm_kzalloc(drm->dev, sizeof(*lvds), GFP_KERNEL);
+ if (!lvds)
+ return -ENOMEM;
+ lvds->tcon = tcon;
+ encoder = &lvds->encoder;
+
+ ret = drm_of_find_panel_or_bridge(tcon->dev->of_node, 1, 0,
+ &tcon->panel, &bridge);
+ if (ret) {
+ dev_info(drm->dev, "No panel or bridge found... LVDS output disabled\n");
+ return 0;
+ }
+
+ drm_encoder_helper_add(&lvds->encoder,
+ &sun4i_lvds_enc_helper_funcs);
+ ret = drm_encoder_init(drm,
+ &lvds->encoder,
+ &sun4i_lvds_enc_funcs,
+ DRM_MODE_ENCODER_LVDS,
+ NULL);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't initialise the lvds encoder\n");
+ goto err_out;
+ }
+
+ /* The LVDS encoder can only work with the TCON channel 0 */
+ lvds->encoder.possible_crtcs = BIT(drm_crtc_index(&tcon->crtc->crtc));
+
+ if (tcon->panel) {
+ drm_connector_helper_add(&lvds->connector,
+ &sun4i_lvds_con_helper_funcs);
+ ret = drm_connector_init(drm, &lvds->connector,
+ &sun4i_lvds_con_funcs,
+ DRM_MODE_CONNECTOR_LVDS);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't initialise the lvds connector\n");
+ goto err_cleanup_connector;
+ }
+
+ drm_mode_connector_attach_encoder(&lvds->connector,
+ &lvds->encoder);
+
+ ret = drm_panel_attach(tcon->panel, &lvds->connector);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't attach our panel\n");
+ goto err_cleanup_connector;
+ }
+ }
+
+ if (bridge) {
+ ret = drm_bridge_attach(encoder, bridge, NULL);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't attach our bridge\n");
+ goto err_cleanup_connector;
+ }
+ }
+
+ return 0;
+
+err_cleanup_connector:
+ drm_encoder_cleanup(&lvds->encoder);
+err_out:
+ return ret;
+}
+EXPORT_SYMBOL(sun4i_lvds_init);
diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h
new file mode 100644
index 000000000000..1b8fad4b82c3
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2015 NextThing Co
+ * Copyright (C) 2015-2017 Free Electrons
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef _SUN4I_LVDS_H_
+#define _SUN4I_LVDS_H_
+
+int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon);
+
+#endif /* _SUN4I_LVDS_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 46e28ca1f676..777c7348d0cf 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -31,10 +31,52 @@
#include "sun4i_crtc.h"
#include "sun4i_dotclock.h"
#include "sun4i_drv.h"
+#include "sun4i_lvds.h"
#include "sun4i_rgb.h"
#include "sun4i_tcon.h"
#include "sunxi_engine.h"
+static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder)
+{
+ struct drm_connector *connector;
+ struct drm_connector_list_iter iter;
+
+ drm_connector_list_iter_begin(encoder->dev, &iter);
+ drm_for_each_connector_iter(connector, &iter)
+ if (connector->encoder == encoder) {
+ drm_connector_list_iter_end(&iter);
+ return connector;
+ }
+ drm_connector_list_iter_end(&iter);
+
+ return NULL;
+}
+
+static int sun4i_tcon_get_pixel_depth(const struct drm_encoder *encoder)
+{
+ struct drm_connector *connector;
+ struct drm_display_info *info;
+
+ connector = sun4i_tcon_get_connector(encoder);
+ if (!connector)
+ return -EINVAL;
+
+ info = &connector->display_info;
+ if (info->num_bus_formats != 1)
+ return -EINVAL;
+
+ switch (info->bus_formats[0]) {
+ case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+ return 18;
+
+ case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+ case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+ return 24;
+ }
+
+ return -EINVAL;
+}
+
static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
bool enabled)
{
@@ -65,13 +107,63 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
clk_disable_unprepare(clk);
}
+static void sun4i_tcon_lvds_set_status(struct sun4i_tcon *tcon,
+ const struct drm_encoder *encoder,
+ bool enabled)
+{
+ if (enabled) {
+ u8 val;
+
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
+ SUN4I_TCON0_LVDS_IF_EN,
+ SUN4I_TCON0_LVDS_IF_EN);
+
+ /*
+ * As their name suggest, these values only apply to the A31
+ * and later SoCs. We'll have to rework this when merging
+ * support for the older SoCs.
+ */
+ regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_C(2) |
+ SUN6I_TCON0_LVDS_ANA0_V(3) |
+ SUN6I_TCON0_LVDS_ANA0_PD(2) |
+ SUN6I_TCON0_LVDS_ANA0_EN_LDO);
+ udelay(2);
+
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_EN_MB,
+ SUN6I_TCON0_LVDS_ANA0_EN_MB);
+ udelay(2);
+
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVC,
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVC);
+
+ if (sun4i_tcon_get_pixel_depth(encoder) == 18)
+ val = 7;
+ else
+ val = 0xf;
+
+ regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVD(0xf),
+ SUN6I_TCON0_LVDS_ANA0_EN_DRVD(val));
+ } else {
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
+ SUN4I_TCON0_LVDS_IF_EN, 0);
+ }
+}
+
void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
const struct drm_encoder *encoder,
bool enabled)
{
+ bool is_lvds = false;
int channel;
switch (encoder->encoder_type) {
+ case DRM_MODE_ENCODER_LVDS:
+ is_lvds = true;
+ /* Fallthrough */
case DRM_MODE_ENCODER_NONE:
channel = 0;
break;
@@ -84,10 +176,16 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
return;
}
+ if (is_lvds && !enabled)
+ sun4i_tcon_lvds_set_status(tcon, encoder, false);
+
regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
SUN4I_TCON_GCTL_TCON_ENABLE,
enabled ? SUN4I_TCON_GCTL_TCON_ENABLE : 0);
+ if (is_lvds && enabled)
+ sun4i_tcon_lvds_set_status(tcon, encoder, true);
+
sun4i_tcon_channel_set_status(tcon, channel, enabled);
}
@@ -170,6 +268,78 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon,
SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
}
+static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
+ const struct drm_encoder *encoder,
+ const struct drm_display_mode *mode)
+{
+ unsigned int bp;
+ u8 clk_delay;
+ u32 reg, val = 0;
+
+ tcon->dclk_min_div = 7;
+ tcon->dclk_max_div = 7;
+ sun4i_tcon0_mode_set_common(tcon, mode);
+
+ /* Adjust clock delay */
+ clk_delay = sun4i_tcon_get_clk_delay(mode, 0);
+ regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG,
+ SUN4I_TCON0_CTL_CLK_DELAY_MASK,
+ SUN4I_TCON0_CTL_CLK_DELAY(clk_delay));
+
+ /*
+ * This is called a backporch in the register documentation,
+ * but it really is the back porch + hsync
+ */
+ bp = mode->crtc_htotal - mode->crtc_hsync_start;
+ DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n",
+ mode->crtc_htotal, bp);
+
+ /* Set horizontal display timings */
+ regmap_write(tcon->regs, SUN4I_TCON0_BASIC1_REG,
+ SUN4I_TCON0_BASIC1_H_TOTAL(mode->htotal) |
+ SUN4I_TCON0_BASIC1_H_BACKPORCH(bp));
+
+ /*
+ * This is called a backporch in the register documentation,
+ * but it really is the back porch + hsync
+ */
+ bp = mode->crtc_vtotal - mode->crtc_vsync_start;
+ DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n",
+ mode->crtc_vtotal, bp);
+
+ /* Set vertical display timings */
+ regmap_write(tcon->regs, SUN4I_TCON0_BASIC2_REG,
+ SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) |
+ SUN4I_TCON0_BASIC2_V_BACKPORCH(bp));
+
+ reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 |
+ SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL |
+ SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL;
+ if (sun4i_tcon_get_pixel_depth(encoder) == 24)
+ reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS;
+ else
+ reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS;
+
+ regmap_write(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, reg);
+
+ /* Setup the polarity of the various signals */
+ if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+ val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE;
+
+ if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+ val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
+
+ regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, val);
+
+ /* Map output pins to channel 0 */
+ regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
+ SUN4I_TCON_GCTL_IOMAP_MASK,
+ SUN4I_TCON_GCTL_IOMAP_TCON0);
+
+ /* Enable the output on the pins */
+ regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, 0xe0000000);
+}
+
static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
const struct drm_display_mode *mode)
{
@@ -336,6 +506,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon,
const struct drm_display_mode *mode)
{
switch (encoder->encoder_type) {
+ case DRM_MODE_ENCODER_LVDS:
+ sun4i_tcon0_mode_set_lvds(tcon, encoder, mode);
+ break;
case DRM_MODE_ENCODER_NONE:
sun4i_tcon0_mode_set_rgb(tcon, mode);
sun4i_tcon_set_mux(tcon, 0, encoder);
@@ -667,7 +840,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
struct drm_device *drm = data;
struct sun4i_drv *drv = drm->dev_private;
struct sunxi_engine *engine;
+ struct device_node *remote;
struct sun4i_tcon *tcon;
+ bool has_lvds_rst, has_lvds_pll, can_lvds;
int ret;
engine = sun4i_tcon_find_engine(drv, dev->of_node);
@@ -698,6 +873,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
return ret;
}
+ /*
+ * This can only be made optional since we've had DT nodes
+ * without the LVDS reset properties.
+ *
+ * If the property is missing, just disable LVDS, and print a
+ * warning.
+ */
+ tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds");
+ if (IS_ERR(tcon->lvds_rst)) {
+ dev_err(dev, "Couldn't get our reset line\n");
+ return PTR_ERR(tcon->lvds_rst);
+ } else if (tcon->lvds_rst) {
+ has_lvds_rst = true;
+ reset_control_reset(tcon->lvds_rst);
+ } else {
+ has_lvds_rst = false;
+ }
+
+ /*
+ * This can only be made optional since we've had DT nodes
+ * without the LVDS reset properties.
+ *
+ * If the property is missing, just disable LVDS, and print a
+ * warning.
+ */
+ if (tcon->quirks->has_lvds_pll) {
+ tcon->lvds_pll = devm_clk_get(dev, "lvds-alt");
+ if (IS_ERR(tcon->lvds_pll)) {
+ if (PTR_ERR(tcon->lvds_pll) == -ENOENT) {
+ has_lvds_pll = false;
+ } else {
+ dev_err(dev, "Couldn't get the LVDS PLL\n");
+ return PTR_ERR(tcon->lvds_rst);
+ }
+ } else {
+ has_lvds_pll = true;
+ }
+ }
+
+ if (!has_lvds_rst || (tcon->quirks->has_lvds_pll && !has_lvds_pll)) {
+ dev_warn(dev,
+ "Missing LVDS properties, Please upgrade your DT\n");
+ dev_warn(dev, "LVDS output disabled\n");
+ can_lvds = false;
+ } else {
+ can_lvds = true;
+ }
+
ret = sun4i_tcon_init_clocks(dev, tcon);
if (ret) {
dev_err(dev, "Couldn't init our TCON clocks\n");
@@ -729,7 +952,21 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
goto err_free_dotclock;
}
- ret = sun4i_rgb_init(drm, tcon);
+ /*
+ * If we have an LVDS panel connected to the TCON, we should
+ * just probe the LVDS connector. Otherwise, just probe RGB as
+ * we used to.
+ */
+ remote = of_graph_get_remote_node(dev->of_node, 1, 0);
+ if (of_device_is_compatible(remote, "panel-lvds"))
+ if (can_lvds)
+ ret = sun4i_lvds_init(drm, tcon);
+ else
+ ret = -EINVAL;
+ else
+ ret = sun4i_rgb_init(drm, tcon);
+ of_node_put(remote);
+
if (ret < 0)
goto err_free_dotclock;
@@ -879,6 +1116,7 @@ static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
static const struct sun4i_tcon_quirks sun6i_a31_quirks = {
.has_channel_1 = true,
+ .has_lvds_pll = true,
.needs_de_be_mux = true,
.set_mux = sun6i_tcon_set_mux,
};
@@ -895,7 +1133,7 @@ static const struct sun4i_tcon_quirks sun7i_a20_quirks = {
};
static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
- /* nothing is supported */
+ .has_lvds_pll = true,
};
static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index bd3ad7684870..23db06cdc461 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -70,7 +70,21 @@
#define SUN4I_TCON0_TTL2_REG 0x78
#define SUN4I_TCON0_TTL3_REG 0x7c
#define SUN4I_TCON0_TTL4_REG 0x80
+
#define SUN4I_TCON0_LVDS_IF_REG 0x84
+#define SUN4I_TCON0_LVDS_IF_EN BIT(31)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_MASK BIT(26)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS (1 << 26)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS (0 << 26)
+#define SUN4I_TCON0_LVDS_IF_CLK_SEL_MASK BIT(20)
+#define SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 (1 << 20)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_MASK BIT(4)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL (1 << 4)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_INV (0 << 4)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_MASK GENMASK(3, 0)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL (0xf)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_INV (0)
+
#define SUN4I_TCON0_IO_POL_REG 0x88
#define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28)
#define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE BIT(25)
@@ -131,6 +145,16 @@
#define SUN4I_TCON_CEU_RANGE_G_REG 0x144
#define SUN4I_TCON_CEU_RANGE_B_REG 0x148
#define SUN4I_TCON_MUX_CTRL_REG 0x200
+
+#define SUN4I_TCON0_LVDS_ANA0_REG 0x220
+#define SUN6I_TCON0_LVDS_ANA0_EN_MB BIT(31)
+#define SUN6I_TCON0_LVDS_ANA0_EN_LDO BIT(30)
+#define SUN6I_TCON0_LVDS_ANA0_EN_DRVC BIT(24)
+#define SUN6I_TCON0_LVDS_ANA0_EN_DRVD(x) (((x) & 0xf) << 20)
+#define SUN6I_TCON0_LVDS_ANA0_C(x) (((x) & 3) << 17)
+#define SUN6I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8)
+#define SUN6I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4)
+
#define SUN4I_TCON1_FILL_CTL_REG 0x300
#define SUN4I_TCON1_FILL_BEG0_REG 0x304
#define SUN4I_TCON1_FILL_END0_REG 0x308
@@ -149,6 +173,7 @@ struct sun4i_tcon;
struct sun4i_tcon_quirks {
bool has_channel_1; /* a33 does not have channel 1 */
+ bool has_lvds_pll; /* Can we mux the LVDS clock to a PLL? */
bool needs_de_be_mux; /* sun6i needs mux to select backend */
/* callback to handle tcon muxing options */
@@ -167,6 +192,9 @@ struct sun4i_tcon {
struct clk *sclk0;
struct clk *sclk1;
+ /* Possible mux for the LVDS clock */
+ struct clk *lvds_pll;
+
/* Pixel clock */
struct clk *dclk;
u8 dclk_max_div;
@@ -174,6 +202,7 @@ struct sun4i_tcon {
/* Reset control */
struct reset_control *lcd_rst;
+ struct reset_control *lvds_rst;
struct drm_panel *panel;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 09/15] drm/sun4i: Add A83T support
2017-12-07 15:58 ` Maxime Ripard
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
Add support for the A83T display pipeline.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +++++
drivers/gpu/drm/sun4i/sun8i_mixer.c | 11 +++++++++++
3 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 49215d91c853..6f5e721b545e 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -347,6 +347,7 @@ static const struct of_device_id sun4i_drv_of_table[] = {
{ .compatible = "allwinner,sun6i-a31s-display-engine" },
{ .compatible = "allwinner,sun7i-a20-display-engine" },
{ .compatible = "allwinner,sun8i-a33-display-engine" },
+ { .compatible = "allwinner,sun8i-a83t-display-engine" },
{ .compatible = "allwinner,sun8i-v3s-display-engine" },
{ }
};
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 777c7348d0cf..a0f651d2a495 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -1136,6 +1136,10 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
.has_lvds_pll = true,
};
+static const struct sun4i_tcon_quirks sun8i_a83t_lcd_quirks = {
+ /* nothing is supported */
+};
+
static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
/* nothing is supported */
};
@@ -1148,6 +1152,7 @@ const struct of_device_id sun4i_tcon_of_table[] = {
{ .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks },
{ .compatible = "allwinner,sun7i-a20-tcon", .data = &sun7i_a20_quirks },
{ .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
+ { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_lcd_quirks },
{ .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks },
{ }
};
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index ff235e3228ce..1c963b5af522 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -477,6 +477,13 @@ static int sun8i_mixer_remove(struct platform_device *pdev)
return 0;
}
+static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = {
+ .ccsc = 0,
+ .scaler_mask = 0xf,
+ .ui_num = 3,
+ .vi_num = 1,
+};
+
static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
.vi_num = 2,
.ui_num = 1,
@@ -487,6 +494,10 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
static const struct of_device_id sun8i_mixer_of_table[] = {
{
+ .compatible = "allwinner,sun8i-a83t-de2-mixer-0",
+ .data = &sun8i_a83t_mixer0_cfg,
+ },
+ {
.compatible = "allwinner,sun8i-v3s-de2-mixer",
.data = &sun8i_v3s_mixer_cfg,
},
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 09/15] drm/sun4i: Add A83T support
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
Add support for the A83T display pipeline.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +++++
drivers/gpu/drm/sun4i/sun8i_mixer.c | 11 +++++++++++
3 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 49215d91c853..6f5e721b545e 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -347,6 +347,7 @@ static const struct of_device_id sun4i_drv_of_table[] = {
{ .compatible = "allwinner,sun6i-a31s-display-engine" },
{ .compatible = "allwinner,sun7i-a20-display-engine" },
{ .compatible = "allwinner,sun8i-a33-display-engine" },
+ { .compatible = "allwinner,sun8i-a83t-display-engine" },
{ .compatible = "allwinner,sun8i-v3s-display-engine" },
{ }
};
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 777c7348d0cf..a0f651d2a495 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -1136,6 +1136,10 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
.has_lvds_pll = true,
};
+static const struct sun4i_tcon_quirks sun8i_a83t_lcd_quirks = {
+ /* nothing is supported */
+};
+
static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
/* nothing is supported */
};
@@ -1148,6 +1152,7 @@ const struct of_device_id sun4i_tcon_of_table[] = {
{ .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks },
{ .compatible = "allwinner,sun7i-a20-tcon", .data = &sun7i_a20_quirks },
{ .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
+ { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_lcd_quirks },
{ .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks },
{ }
};
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index ff235e3228ce..1c963b5af522 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -477,6 +477,13 @@ static int sun8i_mixer_remove(struct platform_device *pdev)
return 0;
}
+static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = {
+ .ccsc = 0,
+ .scaler_mask = 0xf,
+ .ui_num = 3,
+ .vi_num = 1,
+};
+
static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
.vi_num = 2,
.ui_num = 1,
@@ -487,6 +494,10 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
static const struct of_device_id sun8i_mixer_of_table[] = {
{
+ .compatible = "allwinner,sun8i-a83t-de2-mixer-0",
+ .data = &sun8i_a83t_mixer0_cfg,
+ },
+ {
.compatible = "allwinner,sun8i-v3s-de2-mixer",
.data = &sun8i_v3s_mixer_cfg,
},
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 10/15] ARM: dts: sun8i: a83t: Add display pipeline
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The display pipeline on the A83T is mainly composed of the mixers and
TCONs, plus various encoders.
Let's add the first mixer and TCON to the DTSI since the only board I have
can use only the LVDS output on the first TCON. The other parts will be
added eventually.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 79 ++++++++++++++++++++++++++++++++-
1 file changed, 79 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 19acae1b4089..e4db38c717d9 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -45,8 +45,10 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun8i-a83t-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>
/ {
@@ -151,6 +153,12 @@
};
};
+ de: display-engine {
+ compatible = "allwinner,sun8i-a83t-display-engine";
+ allwinner,pipelines = <&mixer0>;
+ status = "disabled";
+ };
+
memory {
reg = <0x40000000 0x80000000>;
device_type = "memory";
@@ -162,6 +170,44 @@
#size-cells = <1>;
ranges;
+ display_clocks: clock@1000000 {
+ compatible = "allwinner,sun8i-a83t-de2-clk";
+ reg = <0x01000000 0x100000>;
+ clocks = <&ccu CLK_PLL_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ mixer0: mixer@1100000 {
+ compatible = "allwinner,sun8i-a83t-de2-mixer-0";
+ reg = <0x01100000 0x100000>;
+ clocks = <&display_clocks CLK_BUS_MIXER0>,
+ <&display_clocks CLK_MIXER0>;
+ clock-names = "bus",
+ "mod";
+ resets = <&display_clocks RST_MIXER0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mixer0_out_tcon0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_mixer0>;
+ };
+ };
+ };
+ };
+
syscon: syscon@1c00000 {
compatible = "allwinner,sun8i-a83t-system-controller",
"syscon";
@@ -177,6 +223,39 @@
#dma-cells = <1>;
};
+ tcon0: lcd-controller@1c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon-lcd";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+ clock-names = "ahb", "tcon-ch0";
+ clock-output-names = "tcon-pixel-clock";
+ resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
+ reset-names = "lcd", "lvds";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_mixer0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mixer0_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun8i-a83t-mmc",
"allwinner,sun7i-a20-mmc";
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 10/15] ARM: dts: sun8i: a83t: Add display pipeline
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
The display pipeline on the A83T is mainly composed of the mixers and
TCONs, plus various encoders.
Let's add the first mixer and TCON to the DTSI since the only board I have
can use only the LVDS output on the first TCON. The other parts will be
added eventually.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 79 ++++++++++++++++++++++++++++++++-
1 file changed, 79 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 19acae1b4089..e4db38c717d9 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -45,8 +45,10 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun8i-a83t-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>
/ {
@@ -151,6 +153,12 @@
};
};
+ de: display-engine {
+ compatible = "allwinner,sun8i-a83t-display-engine";
+ allwinner,pipelines = <&mixer0>;
+ status = "disabled";
+ };
+
memory {
reg = <0x40000000 0x80000000>;
device_type = "memory";
@@ -162,6 +170,44 @@
#size-cells = <1>;
ranges;
+ display_clocks: clock@1000000 {
+ compatible = "allwinner,sun8i-a83t-de2-clk";
+ reg = <0x01000000 0x100000>;
+ clocks = <&ccu CLK_PLL_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ mixer0: mixer@1100000 {
+ compatible = "allwinner,sun8i-a83t-de2-mixer-0";
+ reg = <0x01100000 0x100000>;
+ clocks = <&display_clocks CLK_BUS_MIXER0>,
+ <&display_clocks CLK_MIXER0>;
+ clock-names = "bus",
+ "mod";
+ resets = <&display_clocks RST_MIXER0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mixer0_out_tcon0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_mixer0>;
+ };
+ };
+ };
+ };
+
syscon: syscon@1c00000 {
compatible = "allwinner,sun8i-a83t-system-controller",
"syscon";
@@ -177,6 +223,39 @@
#dma-cells = <1>;
};
+ tcon0: lcd-controller@1c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon-lcd";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+ clock-names = "ahb", "tcon-ch0";
+ clock-output-names = "tcon-pixel-clock";
+ resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
+ reset-names = "lcd", "lvds";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_mixer0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mixer0_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun8i-a83t-mmc",
"allwinner,sun7i-a20-mmc";
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 10/15] ARM: dts: sun8i: a83t: Add display pipeline
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The display pipeline on the A83T is mainly composed of the mixers and
TCONs, plus various encoders.
Let's add the first mixer and TCON to the DTSI since the only board I have
can use only the LVDS output on the first TCON. The other parts will be
added eventually.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 79 ++++++++++++++++++++++++++++++++-
1 file changed, 79 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 19acae1b4089..e4db38c717d9 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -45,8 +45,10 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun8i-a83t-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>
/ {
@@ -151,6 +153,12 @@
};
};
+ de: display-engine {
+ compatible = "allwinner,sun8i-a83t-display-engine";
+ allwinner,pipelines = <&mixer0>;
+ status = "disabled";
+ };
+
memory {
reg = <0x40000000 0x80000000>;
device_type = "memory";
@@ -162,6 +170,44 @@
#size-cells = <1>;
ranges;
+ display_clocks: clock at 1000000 {
+ compatible = "allwinner,sun8i-a83t-de2-clk";
+ reg = <0x01000000 0x100000>;
+ clocks = <&ccu CLK_PLL_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ mixer0: mixer at 1100000 {
+ compatible = "allwinner,sun8i-a83t-de2-mixer-0";
+ reg = <0x01100000 0x100000>;
+ clocks = <&display_clocks CLK_BUS_MIXER0>,
+ <&display_clocks CLK_MIXER0>;
+ clock-names = "bus",
+ "mod";
+ resets = <&display_clocks RST_MIXER0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mixer0_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_mixer0>;
+ };
+ };
+ };
+ };
+
syscon: syscon at 1c00000 {
compatible = "allwinner,sun8i-a83t-system-controller",
"syscon";
@@ -177,6 +223,39 @@
#dma-cells = <1>;
};
+ tcon0: lcd-controller at 1c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon-lcd";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+ clock-names = "ahb", "tcon-ch0";
+ clock-output-names = "tcon-pixel-clock";
+ resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
+ reset-names = "lcd", "lvds";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_mixer0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&mixer0_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+
mmc0: mmc at 1c0f000 {
compatible = "allwinner,sun8i-a83t-mmc",
"allwinner,sun7i-a20-mmc";
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 11/15] ARM: dts: sun8i: a83t: Enable the PWM
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The A83T has the same PWM block than the H3. Add it to our DT.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index e4db38c717d9..7a49b9f085eb 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -497,6 +497,15 @@
status = "disabled";
};
+ pwm: pwm@1c21400 {
+ compatible = "allwinner,sun8i-a83t-pwm",
+ "allwinner,sun8i-h3-pwm";
+ reg = <0x01c21400 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 11/15] ARM: dts: sun8i: a83t: Enable the PWM
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
The A83T has the same PWM block than the H3. Add it to our DT.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index e4db38c717d9..7a49b9f085eb 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -497,6 +497,15 @@
status = "disabled";
};
+ pwm: pwm@1c21400 {
+ compatible = "allwinner,sun8i-a83t-pwm",
+ "allwinner,sun8i-h3-pwm";
+ reg = <0x01c21400 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 11/15] ARM: dts: sun8i: a83t: Enable the PWM
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The A83T has the same PWM block than the H3. Add it to our DT.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index e4db38c717d9..7a49b9f085eb 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -497,6 +497,15 @@
status = "disabled";
};
+ pwm: pwm at 1c21400 {
+ compatible = "allwinner,sun8i-a83t-pwm",
+ "allwinner,sun8i-h3-pwm";
+ reg = <0x01c21400 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 12/15] ARM: dts: sun8i: a83t: Add LVDS pins group
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The A83T has an LVDS bus that can be connected to a panel or a bridge. Add
the pinctrl group for it.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a49b9f085eb..e200df5a9058 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -415,6 +415,12 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ lcd_lvds_pins: lcd-lvds-pins {
+ pins = "PD18", "PD19", "PD20", "PD21", "PD22",
+ "PD23", "PD24", "PD25", "PD26", "PD27";
+ function = "lvds0";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 12/15] ARM: dts: sun8i: a83t: Add LVDS pins group
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
The A83T has an LVDS bus that can be connected to a panel or a bridge. Add
the pinctrl group for it.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a49b9f085eb..e200df5a9058 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -415,6 +415,12 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ lcd_lvds_pins: lcd-lvds-pins {
+ pins = "PD18", "PD19", "PD20", "PD21", "PD22",
+ "PD23", "PD24", "PD25", "PD26", "PD27";
+ function = "lvds0";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 12/15] ARM: dts: sun8i: a83t: Add LVDS pins group
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The A83T has an LVDS bus that can be connected to a panel or a bridge. Add
the pinctrl group for it.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a49b9f085eb..e200df5a9058 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -415,6 +415,12 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ lcd_lvds_pins: lcd-lvds-pins {
+ pins = "PD18", "PD19", "PD20", "PD21", "PD22",
+ "PD23", "PD24", "PD25", "PD26", "PD27";
+ function = "lvds0";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 13/15] ARM: dts: sun8i: a83t: Add the PWM pin group
2017-12-07 15:58 ` Maxime Ripard
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The A83T has a PWM that can be output from the SoC. Let's add a pinctrl
group for it.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index e200df5a9058..a37517d4472a 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -446,6 +446,11 @@
bias-pull-up;
};
+ pwm_pin: pwm-pin {
+ pins = "PD28";
+ function = "pwm";
+ };
+
spdif_tx_pin: spdif-tx-pin {
pins = "PE18";
function = "spdif";
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 13/15] ARM: dts: sun8i: a83t: Add the PWM pin group
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
The A83T has a PWM that can be output from the SoC. Let's add a pinctrl
group for it.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index e200df5a9058..a37517d4472a 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -446,6 +446,11 @@
bias-pull-up;
};
+ pwm_pin: pwm-pin {
+ pins = "PD28";
+ function = "pwm";
+ };
+
spdif_tx_pin: spdif-tx-pin {
pins = "PE18";
function = "spdif";
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:58 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts:
sun8i: a711: Add regulator support"), we also dropped the PMIC's
compatible. Since it's not in the PMIC DTSI, unlike most other PMIC
DTSI, it obviously wasn't probing anymore.
Re-add it so that everything works again.
Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 98715538932f..a021ee6da396 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -146,6 +146,7 @@
status = "okay";
axp81x: pmic@3a3 {
+ compatible = "x-powers,axp813";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts:
sun8i: a711: Add regulator support"), we also dropped the PMIC's
compatible. Since it's not in the PMIC DTSI, unlike most other PMIC
DTSI, it obviously wasn't probing anymore.
Re-add it so that everything works again.
Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 98715538932f..a021ee6da396 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -146,6 +146,7 @@
status = "okay";
axp81x: pmic@3a3 {
+ compatible = "x-powers,axp813";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible
@ 2017-12-07 15:58 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:58 UTC (permalink / raw)
To: linux-arm-kernel
When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts:
sun8i: a711: Add regulator support"), we also dropped the PMIC's
compatible. Since it's not in the PMIC DTSI, unlike most other PMIC
DTSI, it obviously wasn't probing anymore.
Re-add it so that everything works again.
Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 98715538932f..a021ee6da396 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -146,6 +146,7 @@
status = "okay";
axp81x: pmic at 3a3 {
+ compatible = "x-powers,axp813";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 15/15] ARM: dts: sun8i: a711: Enable the LCD
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-07 15:59 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:59 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our
DT.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 61 ++++++++++++++++++++++++-
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index a021ee6da396..511fca491fe8 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -45,6 +45,7 @@
#include "sun8i-a83t.dtsi"
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "TBS A711 Tablet";
@@ -59,6 +60,44 @@
stdout-path = "serial0:115200n8";
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>;
+
+ brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
+ default-brightness-level = <9>;
+ };
+
+ panel {
+ compatible = "tbs,a711-panel", "panel-lvds";
+ backlight = <&backlight>;
+ power-supply = <®_sw>;
+
+ width-mm = <153>;
+ height-mm = <90>;
+ data-mapping = "vesa-24";
+
+ panel-timing {
+ /* 1024x600 @60Hz */
+ clock-frequency = <52000000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hsync-len = <20>;
+ hfront-porch = <180>;
+ hback-porch = <160>;
+ vfront-porch = <12>;
+ vback-porch = <23>;
+ vsync-len = <5>;
+ };
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+ };
+
reg_vbat: reg-vbat {
compatible = "regulator-fixed";
regulator-name = "vbat";
@@ -89,6 +128,10 @@
};
};
+&de {
+ status = "okay";
+};
+
/*
* An USB-2 hub is connected here, which also means we don't need to
* enable the OHCI controller.
@@ -142,6 +185,12 @@
status = "okay";
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+};
+
&r_rsb {
status = "okay";
@@ -323,6 +372,18 @@
regulator-name = "vcc-lcd";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_lvds_pins>;
+};
+
+&tcon0_out {
+ tcon0_out_lcd: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 15/15] ARM: dts: sun8i: a711: Enable the LCD
@ 2017-12-07 15:59 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:59 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai, Maxime Ripard
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our
DT.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 61 ++++++++++++++++++++++++-
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index a021ee6da396..511fca491fe8 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -45,6 +45,7 @@
#include "sun8i-a83t.dtsi"
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "TBS A711 Tablet";
@@ -59,6 +60,44 @@
stdout-path = "serial0:115200n8";
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>;
+
+ brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
+ default-brightness-level = <9>;
+ };
+
+ panel {
+ compatible = "tbs,a711-panel", "panel-lvds";
+ backlight = <&backlight>;
+ power-supply = <®_sw>;
+
+ width-mm = <153>;
+ height-mm = <90>;
+ data-mapping = "vesa-24";
+
+ panel-timing {
+ /* 1024x600 @60Hz */
+ clock-frequency = <52000000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hsync-len = <20>;
+ hfront-porch = <180>;
+ hback-porch = <160>;
+ vfront-porch = <12>;
+ vback-porch = <23>;
+ vsync-len = <5>;
+ };
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+ };
+
reg_vbat: reg-vbat {
compatible = "regulator-fixed";
regulator-name = "vbat";
@@ -89,6 +128,10 @@
};
};
+&de {
+ status = "okay";
+};
+
/*
* An USB-2 hub is connected here, which also means we don't need to
* enable the OHCI controller.
@@ -142,6 +185,12 @@
status = "okay";
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+};
+
&r_rsb {
status = "okay";
@@ -323,6 +372,18 @@
regulator-name = "vcc-lcd";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_lvds_pins>;
+};
+
+&tcon0_out {
+ tcon0_out_lcd: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
--
git-series 0.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH v4 15/15] ARM: dts: sun8i: a711: Enable the LCD
@ 2017-12-07 15:59 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-07 15:59 UTC (permalink / raw)
To: linux-arm-kernel
The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our
DT.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 61 ++++++++++++++++++++++++-
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index a021ee6da396..511fca491fe8 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -45,6 +45,7 @@
#include "sun8i-a83t.dtsi"
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "TBS A711 Tablet";
@@ -59,6 +60,44 @@
stdout-path = "serial0:115200n8";
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>;
+
+ brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
+ default-brightness-level = <9>;
+ };
+
+ panel {
+ compatible = "tbs,a711-panel", "panel-lvds";
+ backlight = <&backlight>;
+ power-supply = <®_sw>;
+
+ width-mm = <153>;
+ height-mm = <90>;
+ data-mapping = "vesa-24";
+
+ panel-timing {
+ /* 1024x600 @60Hz */
+ clock-frequency = <52000000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hsync-len = <20>;
+ hfront-porch = <180>;
+ hback-porch = <160>;
+ vfront-porch = <12>;
+ vback-porch = <23>;
+ vsync-len = <5>;
+ };
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+ };
+
reg_vbat: reg-vbat {
compatible = "regulator-fixed";
regulator-name = "vbat";
@@ -89,6 +128,10 @@
};
};
+&de {
+ status = "okay";
+};
+
/*
* An USB-2 hub is connected here, which also means we don't need to
* enable the OHCI controller.
@@ -142,6 +185,12 @@
status = "okay";
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+};
+
&r_rsb {
status = "okay";
@@ -323,6 +372,18 @@
regulator-name = "vcc-lcd";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_lvds_pins>;
+};
+
+&tcon0_out {
+ tcon0_out_lcd: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
--
git-series 0.9.1
^ permalink raw reply related [flat|nested] 66+ messages in thread
* Re: [PATCH v4 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
@ 2017-12-14 3:22 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:22 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Some clocks and resets supposed to drive the LVDS logic in the display
> engine have been overlooked when the driver was first introduced.
>
> Add those additional resources to the binding, and we'll deal with the ABI
> stability in the code.
>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
@ 2017-12-14 3:22 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:22 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Some clocks and resets supposed to drive the LVDS logic in the display
> engine have been overlooked when the driver was first introduced.
>
> Add those additional resources to the binding, and we'll deal with the ABI
> stability in the code.
>
> Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
@ 2017-12-14 3:22 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:22 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Some clocks and resets supposed to drive the LVDS logic in the display
> engine have been overlooked when the driver was first introduced.
>
> Add those additional resources to the binding, and we'll deal with the ABI
> stability in the code.
>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 06/15] drm/sun4i: Force the mixer rate at 150MHz
@ 2017-12-14 3:28 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:28 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> It seems like the mixer can only run properly when clocked at 150MHz. In
> order to have something more robust than simply a fire-and-forget
> assigned-clocks-rate, let's put that in the code.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 9 +++++++++
> drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +++
> 2 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> index 29ceeb016d72..ff235e3228ce 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> @@ -400,6 +400,14 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
> }
> clk_prepare_enable(mixer->mod_clk);
>
> + /*
> + * It seems that we need to enforce that rate for whatever
> + * reason for the mixer to be functional. Make sure it's the
> + * case.
> + */
> + if (mixer->cfg->mod_rate)
> + clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
> +
I think it might be better to set the rate first, then enable the clock.
This is sort of implied by the user manual saying "PLLs other than CPU
do not support DVFS". And it fits better with CLK_SET_RATE_GATE semantics,
if we ever adopt it.
Otherwise,
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> list_add_tail(&mixer->engine.list, &drv->engine_list);
>
> /* Reset the registers */
> @@ -474,6 +482,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
> .ui_num = 1,
> .scaler_mask = 0x3,
> .ccsc = 0,
> + .mod_rate = 150000000,
> };
>
> static const struct of_device_id sun8i_mixer_of_table[] = {
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
> index bc58040a88f9..f34e70c42adf 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
> @@ -121,12 +121,15 @@ struct de2_fmt_info {
> * Set value to 0 if this is first mixer or second mixer with VEP support.
> * Set value to 1 if this is second mixer without VEP support. Other values
> * are invalid.
> + * @mod_rate: module clock rate that needs to be set in order to have
> + * a functional block.
> */
> struct sun8i_mixer_cfg {
> int vi_num;
> int ui_num;
> int scaler_mask;
> int ccsc;
> + unsigned long mod_rate;
> };
>
> struct sun8i_mixer {
> --
> git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 06/15] drm/sun4i: Force the mixer rate at 150MHz
@ 2017-12-14 3:28 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:28 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> It seems like the mixer can only run properly when clocked at 150MHz. In
> order to have something more robust than simply a fire-and-forget
> assigned-clocks-rate, let's put that in the code.
>
> Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 9 +++++++++
> drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +++
> 2 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> index 29ceeb016d72..ff235e3228ce 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> @@ -400,6 +400,14 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
> }
> clk_prepare_enable(mixer->mod_clk);
>
> + /*
> + * It seems that we need to enforce that rate for whatever
> + * reason for the mixer to be functional. Make sure it's the
> + * case.
> + */
> + if (mixer->cfg->mod_rate)
> + clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
> +
I think it might be better to set the rate first, then enable the clock.
This is sort of implied by the user manual saying "PLLs other than CPU
do not support DVFS". And it fits better with CLK_SET_RATE_GATE semantics,
if we ever adopt it.
Otherwise,
Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> list_add_tail(&mixer->engine.list, &drv->engine_list);
>
> /* Reset the registers */
> @@ -474,6 +482,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
> .ui_num = 1,
> .scaler_mask = 0x3,
> .ccsc = 0,
> + .mod_rate = 150000000,
> };
>
> static const struct of_device_id sun8i_mixer_of_table[] = {
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
> index bc58040a88f9..f34e70c42adf 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
> @@ -121,12 +121,15 @@ struct de2_fmt_info {
> * Set value to 0 if this is first mixer or second mixer with VEP support.
> * Set value to 1 if this is second mixer without VEP support. Other values
> * are invalid.
> + * @mod_rate: module clock rate that needs to be set in order to have
> + * a functional block.
> */
> struct sun8i_mixer_cfg {
> int vi_num;
> int ui_num;
> int scaler_mask;
> int ccsc;
> + unsigned long mod_rate;
> };
>
> struct sun8i_mixer {
> --
> git-series 0.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 06/15] drm/sun4i: Force the mixer rate at 150MHz
@ 2017-12-14 3:28 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:28 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> It seems like the mixer can only run properly when clocked at 150MHz. In
> order to have something more robust than simply a fire-and-forget
> assigned-clocks-rate, let's put that in the code.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 9 +++++++++
> drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +++
> 2 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> index 29ceeb016d72..ff235e3228ce 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> @@ -400,6 +400,14 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
> }
> clk_prepare_enable(mixer->mod_clk);
>
> + /*
> + * It seems that we need to enforce that rate for whatever
> + * reason for the mixer to be functional. Make sure it's the
> + * case.
> + */
> + if (mixer->cfg->mod_rate)
> + clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
> +
I think it might be better to set the rate first, then enable the clock.
This is sort of implied by the user manual saying "PLLs other than CPU
do not support DVFS". And it fits better with CLK_SET_RATE_GATE semantics,
if we ever adopt it.
Otherwise,
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> list_add_tail(&mixer->engine.list, &drv->engine_list);
>
> /* Reset the registers */
> @@ -474,6 +482,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
> .ui_num = 1,
> .scaler_mask = 0x3,
> .ccsc = 0,
> + .mod_rate = 150000000,
> };
>
> static const struct of_device_id sun8i_mixer_of_table[] = {
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
> index bc58040a88f9..f34e70c42adf 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
> @@ -121,12 +121,15 @@ struct de2_fmt_info {
> * Set value to 0 if this is first mixer or second mixer with VEP support.
> * Set value to 1 if this is second mixer without VEP support. Other values
> * are invalid.
> + * @mod_rate: module clock rate that needs to be set in order to have
> + * a functional block.
> */
> struct sun8i_mixer_cfg {
> int vi_num;
> int ui_num;
> int scaler_mask;
> int ccsc;
> + unsigned long mod_rate;
> };
>
> struct sun8i_mixer {
> --
> git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 08/15] drm/sun4i: Add LVDS support
@ 2017-12-14 3:42 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:42 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The TCON supports the LVDS interface to output to a panel or a bridge.
> Let's add support for it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/gpu/drm/sun4i/Makefile | 1 +-
> drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 ++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 ++-
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 242 +++++++++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_tcon.h | 29 ++++-
> 5 files changed, 465 insertions(+), 2 deletions(-)
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
>
[...]
> diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h
> new file mode 100644
> index 000000000000..1b8fad4b82c3
> --- /dev/null
> +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h
> @@ -0,0 +1,18 @@
> +/*
> + * Copyright (C) 2015 NextThing Co
> + * Copyright (C) 2015-2017 Free Electrons
> + *
> + * Maxime Ripard <maxime.ripard@free-electrons.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
SPDX?
> +
> +#ifndef _SUN4I_LVDS_H_
> +#define _SUN4I_LVDS_H_
> +
> +int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon);
> +
> +#endif /* _SUN4I_LVDS_H_ */
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index 46e28ca1f676..777c7348d0cf 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
[...]
> @@ -698,6 +873,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
> return ret;
> }
>
> + /*
> + * This can only be made optional since we've had DT nodes
> + * without the LVDS reset properties.
> + *
> + * If the property is missing, just disable LVDS, and print a
> + * warning.
> + */
> + tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds");
> + if (IS_ERR(tcon->lvds_rst)) {
> + dev_err(dev, "Couldn't get our reset line\n");
> + return PTR_ERR(tcon->lvds_rst);
> + } else if (tcon->lvds_rst) {
> + has_lvds_rst = true;
> + reset_control_reset(tcon->lvds_rst);
> + } else {
> + has_lvds_rst = false;
> + }
> +
> + /*
> + * This can only be made optional since we've had DT nodes
> + * without the LVDS reset properties.
> + *
> + * If the property is missing, just disable LVDS, and print a
> + * warning.
> + */
> + if (tcon->quirks->has_lvds_pll) {
Care to change these names to match the DT property as well?
[...]
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
> index bd3ad7684870..23db06cdc461 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
[...]
> @@ -149,6 +173,7 @@ struct sun4i_tcon;
>
> struct sun4i_tcon_quirks {
> bool has_channel_1; /* a33 does not have channel 1 */
> + bool has_lvds_pll; /* Can we mux the LVDS clock to a PLL? */
This could then read "Does LVDS clock have parent other than TCON clock?"
Otherwise,
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Also see my other (late) reply to the previous version.
> bool needs_de_be_mux; /* sun6i needs mux to select backend */
>
> /* callback to handle tcon muxing options */
> @@ -167,6 +192,9 @@ struct sun4i_tcon {
> struct clk *sclk0;
> struct clk *sclk1;
>
> + /* Possible mux for the LVDS clock */
> + struct clk *lvds_pll;
> +
> /* Pixel clock */
> struct clk *dclk;
> u8 dclk_max_div;
> @@ -174,6 +202,7 @@ struct sun4i_tcon {
>
> /* Reset control */
> struct reset_control *lcd_rst;
> + struct reset_control *lvds_rst;
>
> struct drm_panel *panel;
>
> --
> git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 08/15] drm/sun4i: Add LVDS support
@ 2017-12-14 3:42 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:42 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> The TCON supports the LVDS interface to output to a panel or a bridge.
> Let's add support for it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
> drivers/gpu/drm/sun4i/Makefile | 1 +-
> drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 ++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 ++-
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 242 +++++++++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_tcon.h | 29 ++++-
> 5 files changed, 465 insertions(+), 2 deletions(-)
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
>
[...]
> diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h
> new file mode 100644
> index 000000000000..1b8fad4b82c3
> --- /dev/null
> +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h
> @@ -0,0 +1,18 @@
> +/*
> + * Copyright (C) 2015 NextThing Co
> + * Copyright (C) 2015-2017 Free Electrons
> + *
> + * Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
SPDX?
> +
> +#ifndef _SUN4I_LVDS_H_
> +#define _SUN4I_LVDS_H_
> +
> +int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon);
> +
> +#endif /* _SUN4I_LVDS_H_ */
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index 46e28ca1f676..777c7348d0cf 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
[...]
> @@ -698,6 +873,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
> return ret;
> }
>
> + /*
> + * This can only be made optional since we've had DT nodes
> + * without the LVDS reset properties.
> + *
> + * If the property is missing, just disable LVDS, and print a
> + * warning.
> + */
> + tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds");
> + if (IS_ERR(tcon->lvds_rst)) {
> + dev_err(dev, "Couldn't get our reset line\n");
> + return PTR_ERR(tcon->lvds_rst);
> + } else if (tcon->lvds_rst) {
> + has_lvds_rst = true;
> + reset_control_reset(tcon->lvds_rst);
> + } else {
> + has_lvds_rst = false;
> + }
> +
> + /*
> + * This can only be made optional since we've had DT nodes
> + * without the LVDS reset properties.
> + *
> + * If the property is missing, just disable LVDS, and print a
> + * warning.
> + */
> + if (tcon->quirks->has_lvds_pll) {
Care to change these names to match the DT property as well?
[...]
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
> index bd3ad7684870..23db06cdc461 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
[...]
> @@ -149,6 +173,7 @@ struct sun4i_tcon;
>
> struct sun4i_tcon_quirks {
> bool has_channel_1; /* a33 does not have channel 1 */
> + bool has_lvds_pll; /* Can we mux the LVDS clock to a PLL? */
This could then read "Does LVDS clock have parent other than TCON clock?"
Otherwise,
Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Also see my other (late) reply to the previous version.
> bool needs_de_be_mux; /* sun6i needs mux to select backend */
>
> /* callback to handle tcon muxing options */
> @@ -167,6 +192,9 @@ struct sun4i_tcon {
> struct clk *sclk0;
> struct clk *sclk1;
>
> + /* Possible mux for the LVDS clock */
> + struct clk *lvds_pll;
> +
> /* Pixel clock */
> struct clk *dclk;
> u8 dclk_max_div;
> @@ -174,6 +202,7 @@ struct sun4i_tcon {
>
> /* Reset control */
> struct reset_control *lcd_rst;
> + struct reset_control *lvds_rst;
>
> struct drm_panel *panel;
>
> --
> git-series 0.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 08/15] drm/sun4i: Add LVDS support
@ 2017-12-14 3:42 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:42 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The TCON supports the LVDS interface to output to a panel or a bridge.
> Let's add support for it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/gpu/drm/sun4i/Makefile | 1 +-
> drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 ++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 ++-
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 242 +++++++++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_tcon.h | 29 ++++-
> 5 files changed, 465 insertions(+), 2 deletions(-)
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
>
[...]
> diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h
> new file mode 100644
> index 000000000000..1b8fad4b82c3
> --- /dev/null
> +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h
> @@ -0,0 +1,18 @@
> +/*
> + * Copyright (C) 2015 NextThing Co
> + * Copyright (C) 2015-2017 Free Electrons
> + *
> + * Maxime Ripard <maxime.ripard@free-electrons.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
SPDX?
> +
> +#ifndef _SUN4I_LVDS_H_
> +#define _SUN4I_LVDS_H_
> +
> +int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon);
> +
> +#endif /* _SUN4I_LVDS_H_ */
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index 46e28ca1f676..777c7348d0cf 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
[...]
> @@ -698,6 +873,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
> return ret;
> }
>
> + /*
> + * This can only be made optional since we've had DT nodes
> + * without the LVDS reset properties.
> + *
> + * If the property is missing, just disable LVDS, and print a
> + * warning.
> + */
> + tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds");
> + if (IS_ERR(tcon->lvds_rst)) {
> + dev_err(dev, "Couldn't get our reset line\n");
> + return PTR_ERR(tcon->lvds_rst);
> + } else if (tcon->lvds_rst) {
> + has_lvds_rst = true;
> + reset_control_reset(tcon->lvds_rst);
> + } else {
> + has_lvds_rst = false;
> + }
> +
> + /*
> + * This can only be made optional since we've had DT nodes
> + * without the LVDS reset properties.
> + *
> + * If the property is missing, just disable LVDS, and print a
> + * warning.
> + */
> + if (tcon->quirks->has_lvds_pll) {
Care to change these names to match the DT property as well?
[...]
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
> index bd3ad7684870..23db06cdc461 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
[...]
> @@ -149,6 +173,7 @@ struct sun4i_tcon;
>
> struct sun4i_tcon_quirks {
> bool has_channel_1; /* a33 does not have channel 1 */
> + bool has_lvds_pll; /* Can we mux the LVDS clock to a PLL? */
This could then read "Does LVDS clock have parent other than TCON clock?"
Otherwise,
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Also see my other (late) reply to the previous version.
> bool needs_de_be_mux; /* sun6i needs mux to select backend */
>
> /* callback to handle tcon muxing options */
> @@ -167,6 +192,9 @@ struct sun4i_tcon {
> struct clk *sclk0;
> struct clk *sclk1;
>
> + /* Possible mux for the LVDS clock */
> + struct clk *lvds_pll;
> +
> /* Pixel clock */
> struct clk *dclk;
> u8 dclk_max_div;
> @@ -174,6 +202,7 @@ struct sun4i_tcon {
>
> /* Reset control */
> struct reset_control *lcd_rst;
> + struct reset_control *lvds_rst;
>
> struct drm_panel *panel;
>
> --
> git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 13/15] ARM: dts: sun8i: a83t: Add the PWM pin group
@ 2017-12-14 3:44 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:44 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The A83T has a PWM that can be output from the SoC. Let's add a pinctrl
> group for it.
>
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Might as well just squash this with patch 11, and enforce it by default.
ChenYu
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 13/15] ARM: dts: sun8i: a83t: Add the PWM pin group
@ 2017-12-14 3:44 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:44 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
Priit Laes, Icenowy Zheng, Thomas Petazzoni, Jernej Skrabec,
devicetree, Thierry Reding
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> The A83T has a PWM that can be output from the SoC. Let's add a pinctrl
> group for it.
>
> Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Might as well just squash this with patch 11, and enforce it by default.
ChenYu
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 13/15] ARM: dts: sun8i: a83t: Add the PWM pin group
@ 2017-12-14 3:44 ` Chen-Yu Tsai
0 siblings, 0 replies; 66+ messages in thread
From: Chen-Yu Tsai @ 2017-12-14 3:44 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The A83T has a PWM that can be output from the SoC. Let's add a pinctrl
> group for it.
>
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Might as well just squash this with patch 11, and enforce it by default.
ChenYu
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
2017-12-07 15:58 ` Maxime Ripard
@ 2017-12-14 7:01 ` Priit Laes
-1 siblings, 0 replies; 66+ messages in thread
From: Priit Laes @ 2017-12-14 7:01 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
icenowy, Thomas Petazzoni, jernej.skrabec, devicetree,
thierry.reding
On Thu, Dec 07, 2017 at 04:58:45PM +0100, Maxime Ripard wrote:
> Hi,
>
> Here is an attempt at supporting the LVDS output in our DRM driver. This
> has been tested on the A83T (with DE2), but since everything is basically
> in the TCON, it should also be usable on the older SoCs with minor
> modifications.
I managed to get the single-channel LVDS working on an A10 tablet after
doing those minor modifications (although, the colours are off a bit).
So in general this series looks good :)
>
> This was the occasion to refactor a bunch of things. The most notable ones
> would be the documentation, and split of the UI layers in the mixer code,
> and the switch to kfifo for our endpoint parsing code in the driver that
> fixes an issue introduced by the switch to BFS.
>
> Let me know what you think,
> Maxime
>
> Changes from v3:
> - Collect the tags
> - Use SPDX headers when possible
> - Added the new mixer configuration options
> - Changed the LVDS clock for lvds-alt instead of lvds-pll
> - Removed the MIPI PLL from the A31s
> - Changed the LVDS_ANA0 macros name to reflect the generation they were
> introduced in, and added a comment to mention the changes needed to
> support the older SoCs
>
> Changes from v2:
> - Move the module clock rate to the mixer structure
> - Adjusted the simple-panel documentation for power-supply
> - Changed the compatible for the first A83t mixer to mixer 0
> - Rebased on top of current drm-misc
> - Split out the A83t bindings in its separate patch
>
> Changes from v1:
> - Added a fix for the error path handling in the TCON
> - Enable the TCON by default
> - Removed the patch that changes the channels offset but kept most of the
> modifications as a cleanup
> - Deal with the LVDS clock being able to have another PLL parent on some
> SoCs
> - Renamed the TCON compatible to TCON-TV, following the convention used
> on newer SoCs
> - Removed the hardcoded timings
> - Moved LVDS enable quirks to a separate function
> - Used clock indices define in the DT
> - Removed the hardcoded clock rate in the DT and moved it to the driver
> - Changed sun8i_mixer_planes to sun8i_mixer_ui_planes to be consistent
> - Added the various tags collected
> - Rebased on top of 4.15
>
> Maxime Ripard (15):
> dt-bindings: panel: lvds: Document power-supply property
> drm/panel: lvds: Add support for the power-supply property
> dt-bindings: display: sun4i-drm: Add LVDS properties
> dt-bindings: display: sun4i-drm: Add A83T pipeline
> drm/sun4i: Fix error path handling
> drm/sun4i: Force the mixer rate at 150MHz
> drm/sun4i: Create minimal multipliers and dividers
> drm/sun4i: Add LVDS support
> drm/sun4i: Add A83T support
> ARM: dts: sun8i: a83t: Add display pipeline
> ARM: dts: sun8i: a83t: Enable the PWM
> ARM: dts: sun8i: a83t: Add LVDS pins group
> ARM: dts: sun8i: a83t: Add the PWM pin group
> ARM: dts: sun8i: a711: Reinstate the PMIC compatible
> ARM: dts: sun8i: a711: Enable the LCD
>
> Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++-
> Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +-
> Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
> Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 12 +++-
> arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 62 ++++++++++++++++++-
> arch/arm/boot/dts/sun8i-a83t.dtsi | 99 ++++++++++++++++++++++++++++-
> drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++-
> drivers/gpu/drm/sun4i/Makefile | 1 +-
> drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 ++-
> drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +-
> drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 +++++++++++++++++++++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 +++++-
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 251 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_tcon.h | 31 +++++++++-
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 20 ++++++-
> drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +-
> 16 files changed, 710 insertions(+), 7 deletions(-)
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
>
> base-commit: 3b71239181e5429702387666f1ac70a9e6856cce
> --
> git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
@ 2017-12-14 7:01 ` Priit Laes
0 siblings, 0 replies; 66+ messages in thread
From: Priit Laes @ 2017-12-14 7:01 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 07, 2017 at 04:58:45PM +0100, Maxime Ripard wrote:
> Hi,
>
> Here is an attempt at supporting the LVDS output in our DRM driver. This
> has been tested on the A83T (with DE2), but since everything is basically
> in the TCON, it should also be usable on the older SoCs with minor
> modifications.
I managed to get the single-channel LVDS working on an A10 tablet after
doing those minor modifications (although, the colours are off a bit).
So in general this series looks good :)
>
> This was the occasion to refactor a bunch of things. The most notable ones
> would be the documentation, and split of the UI layers in the mixer code,
> and the switch to kfifo for our endpoint parsing code in the driver that
> fixes an issue introduced by the switch to BFS.
>
> Let me know what you think,
> Maxime
>
> Changes from v3:
> - Collect the tags
> - Use SPDX headers when possible
> - Added the new mixer configuration options
> - Changed the LVDS clock for lvds-alt instead of lvds-pll
> - Removed the MIPI PLL from the A31s
> - Changed the LVDS_ANA0 macros name to reflect the generation they were
> introduced in, and added a comment to mention the changes needed to
> support the older SoCs
>
> Changes from v2:
> - Move the module clock rate to the mixer structure
> - Adjusted the simple-panel documentation for power-supply
> - Changed the compatible for the first A83t mixer to mixer 0
> - Rebased on top of current drm-misc
> - Split out the A83t bindings in its separate patch
>
> Changes from v1:
> - Added a fix for the error path handling in the TCON
> - Enable the TCON by default
> - Removed the patch that changes the channels offset but kept most of the
> modifications as a cleanup
> - Deal with the LVDS clock being able to have another PLL parent on some
> SoCs
> - Renamed the TCON compatible to TCON-TV, following the convention used
> on newer SoCs
> - Removed the hardcoded timings
> - Moved LVDS enable quirks to a separate function
> - Used clock indices define in the DT
> - Removed the hardcoded clock rate in the DT and moved it to the driver
> - Changed sun8i_mixer_planes to sun8i_mixer_ui_planes to be consistent
> - Added the various tags collected
> - Rebased on top of 4.15
>
> Maxime Ripard (15):
> dt-bindings: panel: lvds: Document power-supply property
> drm/panel: lvds: Add support for the power-supply property
> dt-bindings: display: sun4i-drm: Add LVDS properties
> dt-bindings: display: sun4i-drm: Add A83T pipeline
> drm/sun4i: Fix error path handling
> drm/sun4i: Force the mixer rate at 150MHz
> drm/sun4i: Create minimal multipliers and dividers
> drm/sun4i: Add LVDS support
> drm/sun4i: Add A83T support
> ARM: dts: sun8i: a83t: Add display pipeline
> ARM: dts: sun8i: a83t: Enable the PWM
> ARM: dts: sun8i: a83t: Add LVDS pins group
> ARM: dts: sun8i: a83t: Add the PWM pin group
> ARM: dts: sun8i: a711: Reinstate the PMIC compatible
> ARM: dts: sun8i: a711: Enable the LCD
>
> Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++-
> Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 +-
> Documentation/devicetree/bindings/display/panel/simple-panel.txt | 2 +-
> Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 12 +++-
> arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 62 ++++++++++++++++++-
> arch/arm/boot/dts/sun8i-a83t.dtsi | 99 ++++++++++++++++++++++++++++-
> drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++-
> drivers/gpu/drm/sun4i/Makefile | 1 +-
> drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 ++-
> drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +-
> drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 +++++++++++++++++++++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 +++++-
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 251 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/sun4i/sun4i_tcon.h | 31 +++++++++-
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 20 ++++++-
> drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 +-
> 16 files changed, 710 insertions(+), 7 deletions(-)
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
> create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
>
> base-commit: 3b71239181e5429702387666f1ac70a9e6856cce
> --
> git-series 0.9.1
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
@ 2017-12-14 8:37 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-14 8:37 UTC (permalink / raw)
To: Priit Laes
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai, dri-devel,
linux-kernel, Mark Rutland, Rob Herring, linux-arm-kernel,
icenowy, Thomas Petazzoni, jernej.skrabec, devicetree,
thierry.reding
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On Thu, Dec 14, 2017 at 07:01:57AM +0000, Priit Laes wrote:
> On Thu, Dec 07, 2017 at 04:58:45PM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > Here is an attempt at supporting the LVDS output in our DRM driver. This
> > has been tested on the A83T (with DE2), but since everything is basically
> > in the TCON, it should also be usable on the older SoCs with minor
> > modifications.
>
> I managed to get the single-channel LVDS working on an A10 tablet after
> doing those minor modifications (although, the colours are off a bit).
> So in general this series looks good :)
Is that a Tested-by? :)
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
@ 2017-12-14 8:37 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-14 8:37 UTC (permalink / raw)
To: Priit Laes
Cc: Daniel Vetter, David Airlie, Chen-Yu Tsai,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Mark Rutland, Rob Herring,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
icenowy-h8G6r0blFSE, Thomas Petazzoni,
jernej.skrabec-gGgVlfcn5nU, devicetree-u79uwXL29TY76Z2rM5mHXA,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w
[-- Attachment #1: Type: text/plain, Size: 728 bytes --]
On Thu, Dec 14, 2017 at 07:01:57AM +0000, Priit Laes wrote:
> On Thu, Dec 07, 2017 at 04:58:45PM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > Here is an attempt at supporting the LVDS output in our DRM driver. This
> > has been tested on the A83T (with DE2), but since everything is basically
> > in the TCON, it should also be usable on the older SoCs with minor
> > modifications.
>
> I managed to get the single-channel LVDS working on an A10 tablet after
> doing those minor modifications (although, the colours are off a bit).
> So in general this series looks good :)
Is that a Tested-by? :)
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support
@ 2017-12-14 8:37 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-14 8:37 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 14, 2017 at 07:01:57AM +0000, Priit Laes wrote:
> On Thu, Dec 07, 2017 at 04:58:45PM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > Here is an attempt at supporting the LVDS output in our DRM driver. This
> > has been tested on the A83T (with DE2), but since everything is basically
> > in the TCON, it should also be usable on the older SoCs with minor
> > modifications.
>
> I managed to get the single-channel LVDS working on an A10 tablet after
> doing those minor modifications (although, the colours are off a bit).
> So in general this series looks good :)
Is that a Tested-by? :)
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-19 8:57 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-19 8:57 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding
[-- Attachment #1: Type: text/plain, Size: 704 bytes --]
On Thu, Dec 07, 2017 at 04:58:59PM +0100, Maxime Ripard wrote:
> When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts:
> sun8i: a711: Add regulator support"), we also dropped the PMIC's
> compatible. Since it's not in the PMIC DTSI, unlike most other PMIC
> DTSI, it obviously wasn't probing anymore.
>
> Re-add it so that everything works again.
>
> Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support")
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied this one as a fix.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible
@ 2017-12-19 8:57 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-19 8:57 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
linux-arm-kernel, icenowy
[-- Attachment #1.1: Type: text/plain, Size: 704 bytes --]
On Thu, Dec 07, 2017 at 04:58:59PM +0100, Maxime Ripard wrote:
> When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts:
> sun8i: a711: Add regulator support"), we also dropped the PMIC's
> compatible. Since it's not in the PMIC DTSI, unlike most other PMIC
> DTSI, it obviously wasn't probing anymore.
>
> Re-add it so that everything works again.
>
> Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support")
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied this one as a fix.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible
@ 2017-12-19 8:57 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-19 8:57 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 07, 2017 at 04:58:59PM +0100, Maxime Ripard wrote:
> When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts:
> sun8i: a711: Add regulator support"), we also dropped the PMIC's
> compatible. Since it's not in the PMIC DTSI, unlike most other PMIC
> DTSI, it obviously wasn't probing anymore.
>
> Re-add it so that everything works again.
>
> Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support")
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied this one as a fix.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 05/15] drm/sun4i: Fix error path handling
2017-12-07 15:58 ` Maxime Ripard
(?)
@ 2017-12-19 8:59 ` Maxime Ripard
-1 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-19 8:59 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai
Cc: dri-devel, linux-kernel, Mark Rutland, Rob Herring,
linux-arm-kernel, plaes, icenowy, Thomas Petazzoni,
jernej.skrabec, devicetree, thierry.reding, stable
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On Thu, Dec 07, 2017 at 04:58:50PM +0100, Maxime Ripard wrote:
> The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap
> initialization sequence") moved a bunch of logic around, but forgot to
> update the gotos after the introduction of the err_free_dotclock label.
>
> It means that if we fail later that the one introduced in that commit,
> we'll just to the old label which isn't free the clock we created. This
> will result in a breakage as soon as someone tries to do something with
> that clock, since its resources will have been long reclaimed.
>
> Cc: <stable@vger.kernel.org>
> Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence")
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied this one as a fix.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH v4 05/15] drm/sun4i: Fix error path handling
@ 2017-12-19 8:59 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-19 8:59 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Chen-Yu Tsai
Cc: Mark Rutland, Thomas Petazzoni, jernej.skrabec, plaes,
devicetree, linux-kernel, dri-devel, Rob Herring, thierry.reding,
stable, linux-arm-kernel, icenowy
[-- Attachment #1.1: Type: text/plain, Size: 951 bytes --]
On Thu, Dec 07, 2017 at 04:58:50PM +0100, Maxime Ripard wrote:
> The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap
> initialization sequence") moved a bunch of logic around, but forgot to
> update the gotos after the introduction of the err_free_dotclock label.
>
> It means that if we fail later that the one introduced in that commit,
> we'll just to the old label which isn't free the clock we created. This
> will result in a breakage as soon as someone tries to do something with
> that clock, since its resources will have been long reclaimed.
>
> Cc: <stable@vger.kernel.org>
> Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence")
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied this one as a fix.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH v4 05/15] drm/sun4i: Fix error path handling
@ 2017-12-19 8:59 ` Maxime Ripard
0 siblings, 0 replies; 66+ messages in thread
From: Maxime Ripard @ 2017-12-19 8:59 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 07, 2017 at 04:58:50PM +0100, Maxime Ripard wrote:
> The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap
> initialization sequence") moved a bunch of logic around, but forgot to
> update the gotos after the introduction of the err_free_dotclock label.
>
> It means that if we fail later that the one introduced in that commit,
> we'll just to the old label which isn't free the clock we created. This
> will result in a breakage as soon as someone tries to do something with
> that clock, since its resources will have been long reclaimed.
>
> Cc: <stable@vger.kernel.org>
> Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence")
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied this one as a fix.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 66+ messages in thread
end of thread, other threads:[~2017-12-19 9:00 UTC | newest]
Thread overview: 66+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-12-07 15:58 [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 01/15] dt-bindings: panel: lvds: Document power-supply property Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 02/15] drm/panel: lvds: Add support for the " Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-14 3:22 ` Chen-Yu Tsai
2017-12-14 3:22 ` Chen-Yu Tsai
2017-12-14 3:22 ` Chen-Yu Tsai
2017-12-07 15:58 ` [PATCH v4 04/15] dt-bindings: display: sun4i-drm: Add A83T pipeline Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 05/15] drm/sun4i: Fix error path handling Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-19 8:59 ` Maxime Ripard
2017-12-19 8:59 ` Maxime Ripard
2017-12-19 8:59 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 06/15] drm/sun4i: Force the mixer rate at 150MHz Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-14 3:28 ` Chen-Yu Tsai
2017-12-14 3:28 ` Chen-Yu Tsai
2017-12-14 3:28 ` Chen-Yu Tsai
2017-12-07 15:58 ` [PATCH v4 07/15] drm/sun4i: Create minimal multipliers and dividers Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 08/15] drm/sun4i: Add LVDS support Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-14 3:42 ` Chen-Yu Tsai
2017-12-14 3:42 ` Chen-Yu Tsai
2017-12-14 3:42 ` Chen-Yu Tsai
2017-12-07 15:58 ` [PATCH v4 09/15] drm/sun4i: Add A83T support Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 10/15] ARM: dts: sun8i: a83t: Add display pipeline Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 11/15] ARM: dts: sun8i: a83t: Enable the PWM Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 12/15] ARM: dts: sun8i: a83t: Add LVDS pins group Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` [PATCH v4 13/15] ARM: dts: sun8i: a83t: Add the PWM pin group Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-14 3:44 ` Chen-Yu Tsai
2017-12-14 3:44 ` Chen-Yu Tsai
2017-12-14 3:44 ` Chen-Yu Tsai
2017-12-07 15:58 ` [PATCH v4 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-07 15:58 ` Maxime Ripard
2017-12-19 8:57 ` Maxime Ripard
2017-12-19 8:57 ` Maxime Ripard
2017-12-19 8:57 ` Maxime Ripard
2017-12-07 15:59 ` [PATCH v4 15/15] ARM: dts: sun8i: a711: Enable the LCD Maxime Ripard
2017-12-07 15:59 ` Maxime Ripard
2017-12-07 15:59 ` Maxime Ripard
2017-12-14 7:01 ` [PATCH v4 00/15] drm/sun4i: Add A83t LVDS support Priit Laes
2017-12-14 7:01 ` Priit Laes
2017-12-14 8:37 ` Maxime Ripard
2017-12-14 8:37 ` Maxime Ripard
2017-12-14 8:37 ` Maxime Ripard
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