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* [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate.
@ 2017-12-16  0:11 Rafael Antognolli
  2017-12-16  0:11 ` [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT Rafael Antognolli
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: Rafael Antognolli @ 2017-12-16  0:11 UTC (permalink / raw)
  To: intel-gfx

This workaround supposedly fixes some hangs in the VF unit.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +++
 drivers/gpu/drm/i915/intel_pm.c | 5 +++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 09bf043c1c2e..a9a6d6698bb1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3875,6 +3875,9 @@ enum {
 #define  SARBUNIT_CLKGATE_DIS		(1 << 5)
 #define  RCCUNIT_CLKGATE_DIS		(1 << 7)
 
+#define UNSLICE_UNIT_LEVEL_CLKGATE	_MMIO(0x9434)
+#define  VFUNIT_CLKGATE_DIS		(1 << 20)
+
 /*
  * Display engine regs
  */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a349c4fd51ff..e33842d6bb14 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8448,6 +8448,11 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
 	if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0))
 		val |= SARBUNIT_CLKGATE_DIS;
 	I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val);
+
+	/* WaDisableVFclkgate:cnl */
+	val = I915_READ(UNSLICE_UNIT_LEVEL_CLKGATE);
+	val |= VFUNIT_CLKGATE_DIS;
+	I915_WRITE(UNSLICE_UNIT_LEVEL_CLKGATE, val);
 }
 
 static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
-- 
2.14.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT.
  2017-12-16  0:11 [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate Rafael Antognolli
@ 2017-12-16  0:11 ` Rafael Antognolli
  2017-12-16  0:54 ` ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Implement WaDisableVFclkgate Patchwork
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: Rafael Antognolli @ 2017-12-16  0:11 UTC (permalink / raw)
  To: intel-gfx

There seems to be another clock gating issue which the workaround is
described as:

   "WA: Set 0xE4F0[1] = 1 to disable Early EOT of thread."

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h        | 1 +
 drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a9a6d6698bb1..8c13d3c89107 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8145,6 +8145,7 @@ enum {
 #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
 #define   STALL_DOP_GATING_DISABLE		(1<<5)
 #define   THROTTLE_12_5				(7<<2)
+#define   DISABLE_EARLY_EOT			(1<<1)
 
 #define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
 #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 510e0bc3a377..8b9892947e39 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1272,6 +1272,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
 	if (ret)
 		return ret;
 
+	/* WaDisableEarlyEOT:cnl */
+	WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, DISABLE_EARLY_EOT);
+
 	return 0;
 }
 
-- 
2.14.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
  2017-12-16  0:11 [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate Rafael Antognolli
  2017-12-16  0:11 ` [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT Rafael Antognolli
@ 2017-12-16  0:54 ` Patchwork
  2017-12-19  0:15 ` ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2017-12-16  0:54 UTC (permalink / raw)
  To: Rafael Antognolli; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
URL   : https://patchwork.freedesktop.org/series/35456/
State : warning

== Summary ==

Series 35456v1 series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
https://patchwork.freedesktop.org/api/1.0/series/35456/revisions/1/mbox/

Test gem_sync:
        Subgroup basic-each:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-many-each:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-store-all:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-store-each:
                pass       -> SKIP       (fi-blb-e6850)
Test gem_tiled_blits:
        Subgroup basic:
                pass       -> SKIP       (fi-blb-e6850)
Test gem_tiled_fence_blits:
        Subgroup basic:
                pass       -> SKIP       (fi-blb-e6850)
Test gem_wait:
        Subgroup basic-busy-all:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-wait-all:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-await-all:
                pass       -> SKIP       (fi-blb-e6850)
Test kms_busy:
        Subgroup basic-flip-a:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-flip-b:
                pass       -> SKIP       (fi-blb-e6850)
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                pass       -> SKIP       (fi-blb-e6850)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                incomplete -> PASS       (fi-snb-2520m) fdo#103713
Test kms_psr_sink_crc:
        Subgroup psr_basic:
                dmesg-warn -> PASS       (fi-skl-6700hq) fdo#101144

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:436s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:442s
fi-blb-e6850     total:288  pass:210  dwarn:1   dfail:1   fail:0   skip:76  time:368s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:501s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:278s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:494s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:493s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:481s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:468s
fi-elk-e7500     total:224  pass:163  dwarn:14  dfail:1   fail:0   skip:45 
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:530s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:404s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:415s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:391s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:477s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:432s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:484s
fi-kbl-7560u     total:288  pass:268  dwarn:1   dfail:0   fail:0   skip:19  time:519s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:466s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:519s
fi-pnv-d510      total:288  pass:221  dwarn:1   dfail:0   fail:1   skip:65  time:588s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:454s
fi-skl-6600u     total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:527s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:549s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:496s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:446s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:546s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:411s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:590s
fi-cnl-y         total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:610s
fi-glk-dsi       total:21   pass:20   dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:503s

e62100b705b3eb079c6acd60c25a8d54d92b7dac drm-tip: 2017y-12m-15d-21h-18m-47s UTC integration manifest
d4a5b1558958 drm/i915: Implement WaDisableEarlyEOT.
ca4bad3d032f drm/i915: Implement WaDisableVFclkgate.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7516/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
  2017-12-16  0:11 [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate Rafael Antognolli
  2017-12-16  0:11 ` [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT Rafael Antognolli
  2017-12-16  0:54 ` ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Implement WaDisableVFclkgate Patchwork
@ 2017-12-19  0:15 ` Patchwork
  2017-12-19  1:57 ` ✓ Fi.CI.IGT: " Patchwork
  2017-12-19 21:48 ` [PATCH 1/2] " Rodrigo Vivi
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2017-12-19  0:15 UTC (permalink / raw)
  To: Rafael Antognolli; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
URL   : https://patchwork.freedesktop.org/series/35456/
State : success

== Summary ==

Series 35456v1 series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
https://patchwork.freedesktop.org/api/1.0/series/35456/revisions/1/mbox/

Test debugfs_test:
        Subgroup read_all_entries:
                dmesg-warn -> DMESG-FAIL (fi-elk-e7500) fdo#103989
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:437s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:435s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:385s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:502s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:277s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:494s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:504s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:487s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:464s
fi-elk-e7500     total:224  pass:163  dwarn:14  dfail:1   fail:0   skip:45 
fi-gdg-551       total:288  pass:178  dwarn:1   dfail:0   fail:1   skip:108 time:261s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:530s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:409s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:415s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:386s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:472s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:429s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:479s
fi-kbl-7560u     total:288  pass:268  dwarn:1   dfail:0   fail:0   skip:19  time:526s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:469s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:531s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:587s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:440s
fi-skl-6600u     total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:527s
fi-skl-6700hq    total:288  pass:261  dwarn:1   dfail:0   fail:0   skip:26  time:557s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:509s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:503s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:440s
fi-snb-2520m     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:408s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:588s
fi-cnl-y         total:246  pass:221  dwarn:0   dfail:0   fail:0   skip:24 
fi-glk-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:480s

3e151c0e41e696892307ea84f9463be01f2f70f7 drm-tip: 2017y-12m-18d-22h-45m-04s UTC integration manifest
b97f81951455 drm/i915: Implement WaDisableEarlyEOT.
8d04ec2a0af0 drm/i915: Implement WaDisableVFclkgate.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7531/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
  2017-12-16  0:11 [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate Rafael Antognolli
                   ` (2 preceding siblings ...)
  2017-12-19  0:15 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2017-12-19  1:57 ` Patchwork
  2017-12-19 21:48 ` [PATCH 1/2] " Rodrigo Vivi
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2017-12-19  1:57 UTC (permalink / raw)
  To: Rafael Antognolli; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Implement WaDisableVFclkgate.
URL   : https://patchwork.freedesktop.org/series/35456/
State : success

== Summary ==

Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
                fail       -> PASS       (shard-snb) fdo#101623 +1
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-atomic:
                skip       -> PASS       (shard-hsw)
Test pm_rpm:
        Subgroup universal-planes:
                skip       -> PASS       (shard-hsw)
Test kms_cursor_crc:
        Subgroup cursor-256x85-sliding:
                skip       -> PASS       (shard-hsw)

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623

shard-hsw        total:2712 pass:1537 dwarn:1   dfail:0   fail:10  skip:1164 time:9354s
shard-snb        total:2712 pass:1309 dwarn:1   dfail:0   fail:11  skip:1391 time:7989s
Blacklisted hosts:
shard-apl        total:2690 pass:1665 dwarn:1   dfail:0   fail:23  skip:1000 time:13320s
shard-kbl        total:2712 pass:1809 dwarn:1   dfail:0   fail:24  skip:878 time:11150s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7531/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate.
  2017-12-16  0:11 [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate Rafael Antognolli
                   ` (3 preceding siblings ...)
  2017-12-19  1:57 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-12-19 21:48 ` Rodrigo Vivi
  4 siblings, 0 replies; 8+ messages in thread
From: Rodrigo Vivi @ 2017-12-19 21:48 UTC (permalink / raw)
  To: Rafael Antognolli; +Cc: intel-gfx

On Sat, Dec 16, 2017 at 12:11:16AM +0000, Rafael Antognolli wrote:
> This workaround supposedly fixes some hangs in the VF unit.
> 
> Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Both patches merged to dinq. Thanks for patches and reviews.

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 3 +++
>  drivers/gpu/drm/i915/intel_pm.c | 5 +++++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 09bf043c1c2e..a9a6d6698bb1 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3875,6 +3875,9 @@ enum {
>  #define  SARBUNIT_CLKGATE_DIS		(1 << 5)
>  #define  RCCUNIT_CLKGATE_DIS		(1 << 7)
>  
> +#define UNSLICE_UNIT_LEVEL_CLKGATE	_MMIO(0x9434)
> +#define  VFUNIT_CLKGATE_DIS		(1 << 20)
> +
>  /*
>   * Display engine regs
>   */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a349c4fd51ff..e33842d6bb14 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8448,6 +8448,11 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
>  	if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0))
>  		val |= SARBUNIT_CLKGATE_DIS;
>  	I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val);
> +
> +	/* WaDisableVFclkgate:cnl */
> +	val = I915_READ(UNSLICE_UNIT_LEVEL_CLKGATE);
> +	val |= VFUNIT_CLKGATE_DIS;
> +	I915_WRITE(UNSLICE_UNIT_LEVEL_CLKGATE, val);
>  }
>  
>  static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
> -- 
> 2.14.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT.
  2017-12-01 23:40 ` [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT Rafael Antognolli
@ 2017-12-04 20:54   ` Lucas De Marchi
  0 siblings, 0 replies; 8+ messages in thread
From: Lucas De Marchi @ 2017-12-04 20:54 UTC (permalink / raw)
  To: Rafael Antognolli; +Cc: intel-gfx

On Fri, Dec 1, 2017 at 3:40 PM, Rafael Antognolli
<rafael.antognolli@intel.com> wrote:
> There seems to be another clock gating issue which the workaround is
> described as:
>
>    "WA: Set 0xE4F0[1] = 1 to disable Early EOT of thread."
>
> Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

> ---
>  drivers/gpu/drm/i915/i915_reg.h        | 1 +
>  drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
>  2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1358ce1513f6..0f07f5900a6f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8145,6 +8145,7 @@ enum {
>  #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE        (1<<8)
>  #define   STALL_DOP_GATING_DISABLE             (1<<5)
>  #define   THROTTLE_12_5                                (7<<2)
> +#define   DISABLE_EARLY_EOT                    (1<<1)
>
>  #define GEN7_ROW_CHICKEN2              _MMIO(0xe4f4)
>  #define GEN7_ROW_CHICKEN2_GT2          _MMIO(0xf4f4)
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 86d4c85c8725..bf581a0bb789 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1272,6 +1272,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
>         if (ret)
>                 return ret;
>
> +       /* WaDisableEarlyEOT:cnl */
> +       WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, DISABLE_EARLY_EOT);
> +
>         return 0;
>  }
>
> --
> 2.13.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Lucas De Marchi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT.
  2017-12-01 23:40 Rafael Antognolli
@ 2017-12-01 23:40 ` Rafael Antognolli
  2017-12-04 20:54   ` Lucas De Marchi
  0 siblings, 1 reply; 8+ messages in thread
From: Rafael Antognolli @ 2017-12-01 23:40 UTC (permalink / raw)
  To: intel-gfx

There seems to be another clock gating issue which the workaround is
described as:

   "WA: Set 0xE4F0[1] = 1 to disable Early EOT of thread."

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h        | 1 +
 drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1358ce1513f6..0f07f5900a6f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8145,6 +8145,7 @@ enum {
 #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
 #define   STALL_DOP_GATING_DISABLE		(1<<5)
 #define   THROTTLE_12_5				(7<<2)
+#define   DISABLE_EARLY_EOT			(1<<1)
 
 #define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
 #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 86d4c85c8725..bf581a0bb789 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1272,6 +1272,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
 	if (ret)
 		return ret;
 
+	/* WaDisableEarlyEOT:cnl */
+	WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, DISABLE_EARLY_EOT);
+
 	return 0;
 }
 
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2017-12-19 21:48 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-12-16  0:11 [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate Rafael Antognolli
2017-12-16  0:11 ` [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT Rafael Antognolli
2017-12-16  0:54 ` ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Implement WaDisableVFclkgate Patchwork
2017-12-19  0:15 ` ✓ Fi.CI.BAT: success " Patchwork
2017-12-19  1:57 ` ✓ Fi.CI.IGT: " Patchwork
2017-12-19 21:48 ` [PATCH 1/2] " Rodrigo Vivi
  -- strict thread matches above, loose matches on Subject: below --
2017-12-01 23:40 Rafael Antognolli
2017-12-01 23:40 ` [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT Rafael Antognolli
2017-12-04 20:54   ` Lucas De Marchi

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