All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Subhransu S. Prusty" <subhransu.s.prusty@intel.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Sriram Periyasamy <sriramx.periyasamy@intel.com>,
	ALSA ML <alsa-devel@alsa-project.org>,
	Mark Brown <broonie@kernel.org>, Takashi Iwai <tiwai@suse.de>,
	Liam Girdwood <liam.r.girdwood@linux.intel.com>,
	Vinod Koul <vinod.koul@intel.com>,
	Patches Audio <patches.audio@intel.com>,
	mturquette@baylibre.com, linux-clk@vger.kernel.org
Subject: Re: [alsa-devel] [PATCH v5 1/6] ASoC: Intel: Skylake: Add ssp clock driver
Date: Mon, 18 Dec 2017 09:27:16 +0530	[thread overview]
Message-ID: <20171218035710.GA27559@subhransu-desktop> (raw)
In-Reply-To: <20171213223032.GO7997@codeaurora.org>

On Wed, Dec 13, 2017 at 02:30:32PM -0800, Stephen Boyd wrote:
> On 12/11, Sriram Periyasamy wrote:
> > +
> > +static int skl_clk_set_rate(struct clk_hw *hw, unsigned long rate,
> > +					unsigned long parent_rate)
> > +{
> > +	struct skl_clk *clkdev = to_skl_clk(hw);
> > +	struct skl_clk_rate_cfg_table *rcfg;
> > +	int clk_type;
> > +
> > +	if (!clkdev)
> > +		return -ENODEV;
> 
> These checks don't make sense. container_of() on clk_hw
> structures returning NULL wouldn't happen.

Sure. will remove.

> 
> > +
> > +	if (!rate)
> > +		return -EINVAL;
> > +
> > +	if (__clk_is_enabled(hw->clk) && (clkdev->rate != rate))
> 
> Any chance you can directly read the hardware instead of going
> through the framework to find out if the clk is enabled? Seems

No. This involves sending an IPC to DSP to enable clock and interpreting the
return error code. I would like to avoid doing this here in set_rate.

> circular to do it this way.
> 
> > +		return -EBUSY;
> > +
> > +	rcfg = skl_get_rate_cfg(clkdev->pdata->ssp_clks[clkdev->id].rate_cfg,
> > +							rate);
> > +	if (!rcfg)
> > +		return -EINVAL;
> > +
> > +	clk_type = skl_get_clk_type(clkdev->id);
> > +	if (clk_type < 0)
> > +		return clk_type;
> > +
> > +	skl_fill_clk_ipc(rcfg, clk_type);
> > +	clkdev->rate = rate;
> > +
> > +	return 0;
> > +}
> > +
> > +static unsigned long skl_clk_recalc_rate(struct clk_hw *hw,
> > +				unsigned long parent_rate)
> > +{
> > +	struct skl_clk *clkdev = to_skl_clk(hw);
> > +	struct skl_clk_rate_cfg_table *rcfg;
> > +	int clk_type;
> > +
> > +	if (!clkdev)
> > +		return 0;
> > +
> > +	if (clkdev->rate)
> > +		return clkdev->rate;
> 
> Why is the rate being cached? We should always be able to
> calculate the rate based on parent_rate that gets passed to this
> function?

Will check and get back.

Regards,
Subhransu

> 
> > +
> > +	rcfg = skl_get_rate_cfg(clkdev->pdata->ssp_clks[clkdev->id].rate_cfg,
> > +					parent_rate);
> > +	if (!rcfg)
> > +		return 0;
> > +
> > +	clk_type = skl_get_clk_type(clkdev->id);
> > +	if (clk_type < 0)
> > +		return 0;
> > +
> > +	skl_fill_clk_ipc(rcfg, clk_type);
> > +	clkdev->rate = rcfg->rate;
> > +
> > +	return clkdev->rate;
> > +}
> > +
> > +/* Not supported by clk driver. Implemented to satisfy clk fw */
> > +long skl_clk_round_rate(struct clk_hw *hw, unsigned long rate,
> > +				unsigned long *parent_rate)
> > +{
> > +	return rate;
> > +}
> 
> -- 
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project

-- 

  reply	other threads:[~2017-12-18  3:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-11  7:46 [alsa-devel] [PATCH v5 0/6] ASoC: Intel: Skylake: Add a clk driver to enable ssp clks early Sriram Periyasamy
2017-12-11  7:46 ` [alsa-devel] [PATCH v5 1/6] ASoC: Intel: Skylake: Add ssp clock driver Sriram Periyasamy
2017-12-13 22:30   ` Stephen Boyd
2017-12-18  3:57     ` Subhransu S. Prusty [this message]
2017-12-18  5:01       ` Subhransu S. Prusty
2017-12-18 19:10         ` Stephen Boyd
2017-12-19  5:41           ` Subhransu S. Prusty
2017-12-19 19:17             ` Stephen Boyd
2017-12-20  3:33               ` Subhransu S. Prusty
2017-12-22  2:04                 ` Stephen Boyd
2017-12-22  4:52                   ` Subhransu S. Prusty
2017-12-11  7:46 ` [alsa-devel] [PATCH v5 2/6] ASoC: Intel: Skylake: Add extended I2S config blob support in Clock driver Sriram Periyasamy
2018-01-26 12:54   ` Applied "ASoC: Intel: Skylake: Add extended I2S config blob support in Clock driver" to the asoc tree Mark Brown
2018-01-26 12:54     ` Mark Brown
2017-12-11  7:46 ` [alsa-devel] [PATCH v5 3/6] ASoC: Intel: kbl: Enable mclk and ssp sclk early Sriram Periyasamy
2018-01-26 12:53   ` Applied "ASoC: Intel: kbl: Enable mclk and ssp sclk early" to the asoc tree Mark Brown
2018-01-26 12:53     ` Mark Brown
2017-12-11  7:46 ` [alsa-devel] [PATCH v5 4/6] ASoC: Intel: eve: Enable mclk and ssp sclk early Sriram Periyasamy
2017-12-11  7:46 ` [alsa-devel] [PATCH v5 5/6] ASoC: Intel: Skylake: Make DSP replies more human readable Sriram Periyasamy
2017-12-12 18:27   ` Patel, Chintan M
2017-12-12 18:27     ` Patel, Chintan M
2017-12-13  3:25     ` Vinod Koul
2017-12-13  3:25       ` Vinod Koul
2017-12-11  7:46 ` [alsa-devel] [PATCH v5 6/6] ASoC: Intel: Skylake: Add FW reply for MCLK/SCLK IPC Sriram Periyasamy

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171218035710.GA27559@subhransu-desktop \
    --to=subhransu.s.prusty@intel.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=broonie@kernel.org \
    --cc=liam.r.girdwood@linux.intel.com \
    --cc=linux-clk@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=patches.audio@intel.com \
    --cc=sboyd@codeaurora.org \
    --cc=sriramx.periyasamy@intel.com \
    --cc=tiwai@suse.de \
    --cc=vinod.koul@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.