* [PATCH 0/5] drm/i915: promote fixed16_16
@ 2017-12-22 12:25 Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 1/5] drm/i915: Move uint_fixed_16_16_t to its own header Michal Wajdeczko
` (6 more replies)
0 siblings, 7 replies; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 12:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
The ultimate goal of this series is to promote our definition
of fixed16.16 type to include/linux. However, before doing so
we need to do some preparations/cleanups locally.
Note that some helper functions may require additional renames.
Any suggestions are welcomed.
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Michal Wajdeczko (5):
drm/i915: Move uint_fixed_16_16_t to its own header
drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t
drm/i915: Add common fixed16_16 values
drm/i915: Fix overflows in fixed16_16
drm/i915: Tidy up fixed16_16
drivers/gpu/drm/i915/fixed16_16.h | 164 ++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 143 +--------------------------------
drivers/gpu/drm/i915/intel_pm.c | 68 ++++++++--------
3 files changed, 201 insertions(+), 174 deletions(-)
create mode 100644 drivers/gpu/drm/i915/fixed16_16.h
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/5] drm/i915: Move uint_fixed_16_16_t to its own header
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
@ 2017-12-22 12:25 ` Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t Michal Wajdeczko
` (5 subsequent siblings)
6 siblings, 0 replies; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 12:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Our uint_fixed_16_16_t type definition and related helper functions
deserve dedicated header. While here cleanup indent.
v2: avoid too generic filename (Chris)
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/fixed16_16.h | 169 ++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 139 +------------------------------
2 files changed, 170 insertions(+), 138 deletions(-)
create mode 100644 drivers/gpu/drm/i915/fixed16_16.h
diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
new file mode 100644
index 0000000..a6568df
--- /dev/null
+++ b/drivers/gpu/drm/i915/fixed16_16.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright © 2014-2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __I915_FIXED16_16_H
+#define __I915_FIXED16_16_H
+
+#include <linux/kernel.h>
+
+typedef struct {
+ uint32_t val;
+} uint_fixed_16_16_t;
+
+#define FP_16_16_MAX ({ \
+ uint_fixed_16_16_t fp; \
+ fp.val = UINT_MAX; \
+ fp; \
+})
+
+static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
+{
+ if (val.val == 0)
+ return true;
+ return false;
+}
+
+static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
+{
+ uint_fixed_16_16_t fp;
+
+ WARN_ON(val > U16_MAX);
+
+ fp.val = val << 16;
+ return fp;
+}
+
+static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
+{
+ return DIV_ROUND_UP(fp.val, 1 << 16);
+}
+
+static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
+{
+ return fp.val >> 16;
+}
+
+static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
+ uint_fixed_16_16_t min2)
+{
+ uint_fixed_16_16_t min;
+
+ min.val = min(min1.val, min2.val);
+ return min;
+}
+
+static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
+ uint_fixed_16_16_t max2)
+{
+ uint_fixed_16_16_t max;
+
+ max.val = max(max1.val, max2.val);
+ return max;
+}
+
+static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
+{
+ uint_fixed_16_16_t fp;
+
+ WARN_ON(val > U32_MAX);
+ fp.val = (uint32_t) val;
+ return fp;
+}
+
+static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
+ uint_fixed_16_16_t d)
+{
+ return DIV_ROUND_UP(val.val, d.val);
+}
+
+static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
+ uint_fixed_16_16_t mul)
+{
+ uint64_t intermediate_val;
+
+ intermediate_val = (uint64_t) val * mul.val;
+ intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
+ WARN_ON(intermediate_val > U32_MAX);
+ return (uint32_t) intermediate_val;
+}
+
+static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
+ uint_fixed_16_16_t mul)
+{
+ uint64_t intermediate_val;
+
+ intermediate_val = (uint64_t) val.val * mul.val;
+ intermediate_val = intermediate_val >> 16;
+ return clamp_u64_to_fixed16(intermediate_val);
+}
+
+static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
+{
+ uint64_t interm_val;
+
+ interm_val = (uint64_t)val << 16;
+ interm_val = DIV_ROUND_UP_ULL(interm_val, d);
+ return clamp_u64_to_fixed16(interm_val);
+}
+
+static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
+ uint_fixed_16_16_t d)
+{
+ uint64_t interm_val;
+
+ interm_val = (uint64_t)val << 16;
+ interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
+ WARN_ON(interm_val > U32_MAX);
+ return (uint32_t) interm_val;
+}
+
+static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
+ uint_fixed_16_16_t mul)
+{
+ uint64_t intermediate_val;
+
+ intermediate_val = (uint64_t) val * mul.val;
+ return clamp_u64_to_fixed16(intermediate_val);
+}
+
+static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
+ uint_fixed_16_16_t add2)
+{
+ uint64_t interm_sum;
+
+ interm_sum = (uint64_t) add1.val + add2.val;
+ return clamp_u64_to_fixed16(interm_sum);
+}
+
+static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
+ uint32_t add2)
+{
+ uint64_t interm_sum;
+ uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
+
+ interm_sum = (uint64_t) add1.val + interm_add2.val;
+ return clamp_u64_to_fixed16(interm_sum);
+}
+
+#endif
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4b943cd..0a7d094 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -52,6 +52,7 @@
#include <drm/drm_auth.h>
#include <drm/drm_cache.h>
+#include "fixed16_16.h"
#include "i915_params.h"
#include "i915_reg.h"
#include "i915_utils.h"
@@ -108,144 +109,6 @@
#define i915_inject_load_failure() \
__i915_inject_load_failure(__func__, __LINE__)
-typedef struct {
- uint32_t val;
-} uint_fixed_16_16_t;
-
-#define FP_16_16_MAX ({ \
- uint_fixed_16_16_t fp; \
- fp.val = UINT_MAX; \
- fp; \
-})
-
-static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
-{
- if (val.val == 0)
- return true;
- return false;
-}
-
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
-{
- uint_fixed_16_16_t fp;
-
- WARN_ON(val > U16_MAX);
-
- fp.val = val << 16;
- return fp;
-}
-
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
-{
- return DIV_ROUND_UP(fp.val, 1 << 16);
-}
-
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
-{
- return fp.val >> 16;
-}
-
-static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
- uint_fixed_16_16_t min2)
-{
- uint_fixed_16_16_t min;
-
- min.val = min(min1.val, min2.val);
- return min;
-}
-
-static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
- uint_fixed_16_16_t max2)
-{
- uint_fixed_16_16_t max;
-
- max.val = max(max1.val, max2.val);
- return max;
-}
-
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
-{
- uint_fixed_16_16_t fp;
- WARN_ON(val > U32_MAX);
- fp.val = (uint32_t) val;
- return fp;
-}
-
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
- uint_fixed_16_16_t d)
-{
- return DIV_ROUND_UP(val.val, d.val);
-}
-
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t mul)
-{
- uint64_t intermediate_val;
-
- intermediate_val = (uint64_t) val * mul.val;
- intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
- WARN_ON(intermediate_val > U32_MAX);
- return (uint32_t) intermediate_val;
-}
-
-static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
- uint_fixed_16_16_t mul)
-{
- uint64_t intermediate_val;
-
- intermediate_val = (uint64_t) val.val * mul.val;
- intermediate_val = intermediate_val >> 16;
- return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
-{
- uint64_t interm_val;
-
- interm_val = (uint64_t)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d);
- return clamp_u64_to_fixed16(interm_val);
-}
-
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t d)
-{
- uint64_t interm_val;
-
- interm_val = (uint64_t)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
- WARN_ON(interm_val > U32_MAX);
- return (uint32_t) interm_val;
-}
-
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t mul)
-{
- uint64_t intermediate_val;
-
- intermediate_val = (uint64_t) val * mul.val;
- return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
- uint_fixed_16_16_t add2)
-{
- uint64_t interm_sum;
-
- interm_sum = (uint64_t) add1.val + add2.val;
- return clamp_u64_to_fixed16(interm_sum);
-}
-
-static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
- uint32_t add2)
-{
- uint64_t interm_sum;
- uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
-
- interm_sum = (uint64_t) add1.val + interm_add2.val;
- return clamp_u64_to_fixed16(interm_sum);
-}
-
enum hpd_pin {
HPD_NONE = 0,
HPD_TV = HPD_NONE, /* TV is known to be unreliable */
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 1/5] drm/i915: Move uint_fixed_16_16_t to its own header Michal Wajdeczko
@ 2017-12-22 12:25 ` Michal Wajdeczko
2017-12-22 16:08 ` Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 3/5] drm/i915: Add common fixed16_16 values Michal Wajdeczko
` (4 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 12:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Rename uint_fixed_16_16_t to fixed16_16_t to match header name.
Also switch into kernel integer types.
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/fixed16_16.h | 91 ++++++++++++++++++---------------------
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/intel_pm.c | 50 ++++++++++-----------
3 files changed, 68 insertions(+), 77 deletions(-)
diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
index a6568df..ec859c0 100644
--- a/drivers/gpu/drm/i915/fixed16_16.h
+++ b/drivers/gpu/drm/i915/fixed16_16.h
@@ -27,26 +27,26 @@
#include <linux/kernel.h>
-typedef struct {
- uint32_t val;
-} uint_fixed_16_16_t;
+typedef struct fixed16_16 {
+ u32 val;
+} fixed16_16_t;
#define FP_16_16_MAX ({ \
- uint_fixed_16_16_t fp; \
+ fixed16_16_t fp; \
fp.val = UINT_MAX; \
fp; \
})
-static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
+static inline bool is_fixed16_zero(fixed16_16_t val)
{
if (val.val == 0)
return true;
return false;
}
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
+static inline fixed16_16_t u32_to_fixed16(u32 val)
{
- uint_fixed_16_16_t fp;
+ fixed16_16_t fp;
WARN_ON(val > U16_MAX);
@@ -54,115 +54,106 @@ static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
return fp;
}
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
+static inline u32 fixed16_to_u32_round_up(fixed16_16_t fp)
{
return DIV_ROUND_UP(fp.val, 1 << 16);
}
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
+static inline u32 fixed16_to_u32(fixed16_16_t fp)
{
return fp.val >> 16;
}
-static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
- uint_fixed_16_16_t min2)
+static inline fixed16_16_t min_fixed16(fixed16_16_t min1, fixed16_16_t min2)
{
- uint_fixed_16_16_t min;
+ fixed16_16_t min;
min.val = min(min1.val, min2.val);
return min;
}
-static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
- uint_fixed_16_16_t max2)
+static inline fixed16_16_t max_fixed16(fixed16_16_t max1, fixed16_16_t max2)
{
- uint_fixed_16_16_t max;
+ fixed16_16_t max;
max.val = max(max1.val, max2.val);
return max;
}
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
+static inline fixed16_16_t clamp_u64_to_fixed16(u64 val)
{
- uint_fixed_16_16_t fp;
+ fixed16_16_t fp;
WARN_ON(val > U32_MAX);
- fp.val = (uint32_t) val;
+ fp.val = (u32) val;
return fp;
}
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
- uint_fixed_16_16_t d)
+static inline u32 div_round_up_fixed16(fixed16_16_t val, fixed16_16_t d)
{
return DIV_ROUND_UP(val.val, d.val);
}
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t mul)
+static inline u32 mul_round_up_u32_fixed16(u32 val, fixed16_16_t mul)
{
- uint64_t intermediate_val;
+ u64 intermediate_val;
- intermediate_val = (uint64_t) val * mul.val;
+ intermediate_val = (u64) val * mul.val;
intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
WARN_ON(intermediate_val > U32_MAX);
- return (uint32_t) intermediate_val;
+ return (u32) intermediate_val;
}
-static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
- uint_fixed_16_16_t mul)
+static inline fixed16_16_t mul_fixed16(fixed16_16_t val, fixed16_16_t mul)
{
- uint64_t intermediate_val;
+ u64 intermediate_val;
- intermediate_val = (uint64_t) val.val * mul.val;
+ intermediate_val = (u64) val.val * mul.val;
intermediate_val = intermediate_val >> 16;
return clamp_u64_to_fixed16(intermediate_val);
}
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
+static inline fixed16_16_t div_fixed16(u32 val, u32 d)
{
- uint64_t interm_val;
+ u64 interm_val;
- interm_val = (uint64_t)val << 16;
+ interm_val = (u64)val << 16;
interm_val = DIV_ROUND_UP_ULL(interm_val, d);
return clamp_u64_to_fixed16(interm_val);
}
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t d)
+static inline u32 div_round_up_u32_fixed16(u32 val, fixed16_16_t d)
{
- uint64_t interm_val;
+ u64 interm_val;
- interm_val = (uint64_t)val << 16;
+ interm_val = (u64)val << 16;
interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
WARN_ON(interm_val > U32_MAX);
- return (uint32_t) interm_val;
+ return (u32) interm_val;
}
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t mul)
+static inline fixed16_16_t mul_u32_fixed16(u32 val, fixed16_16_t mul)
{
- uint64_t intermediate_val;
+ u64 intermediate_val;
- intermediate_val = (uint64_t) val * mul.val;
+ intermediate_val = (u64) val * mul.val;
return clamp_u64_to_fixed16(intermediate_val);
}
-static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
- uint_fixed_16_16_t add2)
+static inline fixed16_16_t add_fixed16(fixed16_16_t add1, fixed16_16_t add2)
{
- uint64_t interm_sum;
+ u64 interm_sum;
- interm_sum = (uint64_t) add1.val + add2.val;
+ interm_sum = (u64) add1.val + add2.val;
return clamp_u64_to_fixed16(interm_sum);
}
-static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
- uint32_t add2)
+static inline fixed16_16_t add_fixed16_u32(fixed16_16_t add1, u32 add2)
{
- uint64_t interm_sum;
- uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
+ u64 interm_sum;
+ fixed16_16_t interm_add2 = u32_to_fixed16(add2);
- interm_sum = (uint64_t) add1.val + interm_add2.val;
+ interm_sum = (u64)add1.val + interm_add2.val;
return clamp_u64_to_fixed16(interm_sum);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0a7d094..802260c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1320,8 +1320,8 @@ struct skl_wm_params {
uint32_t plane_pixel_rate;
uint32_t y_min_scanlines;
uint32_t plane_bytes_per_line;
- uint_fixed_16_16_t plane_blocks_per_line;
- uint_fixed_16_16_t y_tile_minimum;
+ fixed16_16_t plane_blocks_per_line;
+ fixed16_16_t y_tile_minimum;
uint32_t linetime_us;
};
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1db79a8..5dccbf9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3867,14 +3867,14 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
* Return value is provided in 16.16 fixed point form to retain fractional part.
* Caller should take care of dividing & rounding off the value.
*/
-static uint_fixed_16_16_t
+static fixed16_16_t
skl_plane_downscale_amount(const struct intel_crtc_state *cstate,
const struct intel_plane_state *pstate)
{
struct intel_plane *plane = to_intel_plane(pstate->base.plane);
uint32_t src_w, src_h, dst_w, dst_h;
- uint_fixed_16_16_t fp_w_ratio, fp_h_ratio;
- uint_fixed_16_16_t downscale_h, downscale_w;
+ fixed16_16_t fp_w_ratio, fp_h_ratio;
+ fixed16_16_t downscale_h, downscale_w;
if (WARN_ON(!intel_wm_plane_visible(cstate, pstate)))
return u32_to_fixed16(0);
@@ -3909,10 +3909,10 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
return mul_fixed16(downscale_w, downscale_h);
}
-static uint_fixed_16_16_t
+static fixed16_16_t
skl_pipe_downscale_amount(const struct intel_crtc_state *crtc_state)
{
- uint_fixed_16_16_t pipe_downscale = u32_to_fixed16(1);
+ fixed16_16_t pipe_downscale = u32_to_fixed16(1);
if (!crtc_state->base.enable)
return pipe_downscale;
@@ -3920,8 +3920,8 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
if (crtc_state->pch_pfit.enabled) {
uint32_t src_w, src_h, dst_w, dst_h;
uint32_t pfit_size = crtc_state->pch_pfit.size;
- uint_fixed_16_16_t fp_w_ratio, fp_h_ratio;
- uint_fixed_16_16_t downscale_h, downscale_w;
+ fixed16_16_t fp_w_ratio, fp_h_ratio;
+ fixed16_16_t downscale_h, downscale_w;
src_w = crtc_state->pipe_src_w;
src_h = crtc_state->pipe_src_h;
@@ -3953,15 +3953,15 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
struct intel_plane_state *intel_pstate;
int crtc_clock, dotclk;
uint32_t pipe_max_pixel_rate;
- uint_fixed_16_16_t pipe_downscale;
- uint_fixed_16_16_t max_downscale = u32_to_fixed16(1);
+ fixed16_16_t pipe_downscale;
+ fixed16_16_t max_downscale = u32_to_fixed16(1);
if (!cstate->base.enable)
return 0;
drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {
- uint_fixed_16_16_t plane_downscale;
- uint_fixed_16_16_t fp_9_div_8 = div_fixed16(9, 8);
+ fixed16_16_t plane_downscale;
+ fixed16_16_t fp_9_div_8 = div_fixed16(9, 8);
int bpp;
if (!intel_wm_plane_visible(cstate,
@@ -4012,7 +4012,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
uint32_t width = 0, height = 0;
struct drm_framebuffer *fb;
u32 format;
- uint_fixed_16_16_t down_scale_amount;
+ fixed16_16_t down_scale_amount;
if (!intel_pstate->base.visible)
return 0;
@@ -4309,12 +4309,12 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
* should allow pixel_rate up to ~2 GHz which seems sufficient since max
* 2xcdclk is 1350 MHz and the pixel rate should never exceed that.
*/
-static uint_fixed_16_16_t
+static fixed16_16_t
skl_wm_method1(const struct drm_i915_private *dev_priv, uint32_t pixel_rate,
uint8_t cpp, uint32_t latency)
{
uint32_t wm_intermediate_val;
- uint_fixed_16_16_t ret;
+ fixed16_16_t ret;
if (latency == 0)
return FP_16_16_MAX;
@@ -4328,13 +4328,13 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
return ret;
}
-static uint_fixed_16_16_t skl_wm_method2(uint32_t pixel_rate,
- uint32_t pipe_htotal,
- uint32_t latency,
- uint_fixed_16_16_t plane_blocks_per_line)
+static fixed16_16_t skl_wm_method2(uint32_t pixel_rate,
+ uint32_t pipe_htotal,
+ uint32_t latency,
+ fixed16_16_t plane_blocks_per_line)
{
uint32_t wm_intermediate_val;
- uint_fixed_16_16_t ret;
+ fixed16_16_t ret;
if (latency == 0)
return FP_16_16_MAX;
@@ -4346,12 +4346,12 @@ static uint_fixed_16_16_t skl_wm_method2(uint32_t pixel_rate,
return ret;
}
-static uint_fixed_16_16_t
+static fixed16_16_t
intel_get_linetime_us(struct intel_crtc_state *cstate)
{
uint32_t pixel_rate;
uint32_t crtc_htotal;
- uint_fixed_16_16_t linetime_us;
+ fixed16_16_t linetime_us;
if (!cstate->base.active)
return u32_to_fixed16(0);
@@ -4372,7 +4372,7 @@ static uint_fixed_16_16_t skl_wm_method2(uint32_t pixel_rate,
const struct intel_plane_state *pstate)
{
uint64_t adjusted_pixel_rate;
- uint_fixed_16_16_t downscale_amount;
+ fixed16_16_t downscale_amount;
/* Shouldn't reach here on disabled planes... */
if (WARN_ON(!intel_wm_plane_visible(cstate, pstate)))
@@ -4491,8 +4491,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
{
const struct drm_plane_state *pstate = &intel_pstate->base;
uint32_t latency = dev_priv->wm.skl_latency[level];
- uint_fixed_16_16_t method1, method2;
- uint_fixed_16_16_t selected_result;
+ fixed16_16_t method1, method2;
+ fixed16_16_t selected_result;
uint32_t res_blocks, res_lines;
struct intel_atomic_state *state =
to_intel_atomic_state(cstate->base.state);
@@ -4626,7 +4626,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
{
struct drm_atomic_state *state = cstate->base.state;
struct drm_i915_private *dev_priv = to_i915(state->dev);
- uint_fixed_16_16_t linetime_us;
+ fixed16_16_t linetime_us;
uint32_t linetime_wm;
linetime_us = intel_get_linetime_us(cstate);
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/5] drm/i915: Add common fixed16_16 values
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 1/5] drm/i915: Move uint_fixed_16_16_t to its own header Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t Michal Wajdeczko
@ 2017-12-22 12:25 ` Michal Wajdeczko
2017-12-22 12:34 ` Chris Wilson
2017-12-22 12:25 ` [PATCH 4/5] drm/i915: Fix overflows in fixed16_16 Michal Wajdeczko
` (3 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 12:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Zero and One are additional commonly used values that
can have its own definitions.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/fixed16_16.h | 15 ++++++++++++---
drivers/gpu/drm/i915/intel_pm.c | 22 +++++++++++-----------
2 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
index ec859c0..af23997 100644
--- a/drivers/gpu/drm/i915/fixed16_16.h
+++ b/drivers/gpu/drm/i915/fixed16_16.h
@@ -31,9 +31,18 @@
u32 val;
} fixed16_16_t;
-#define FP_16_16_MAX ({ \
- fixed16_16_t fp; \
- fp.val = UINT_MAX; \
+#define FIXED16_16_ZERO ({ \
+ fixed16_16_t fp = { .val = 0 }; \
+ fp; \
+})
+
+#define FIXED16_16_ONE ({ \
+ fixed16_16_t fp = { .val = 1 << 16 }; \
+ fp; \
+})
+
+#define FIXED16_16_MAX ({ \
+ fixed16_16_t fp = { .val = UINT_MAX }; \
fp; \
})
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5dccbf9..e400672 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3877,7 +3877,7 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
fixed16_16_t downscale_h, downscale_w;
if (WARN_ON(!intel_wm_plane_visible(cstate, pstate)))
- return u32_to_fixed16(0);
+ return FIXED16_16_ZERO;
/* n.b., src is 16.16 fixed point, dst is whole integer */
if (plane->id == PLANE_CURSOR) {
@@ -3903,8 +3903,8 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
fp_w_ratio = div_fixed16(src_w, dst_w);
fp_h_ratio = div_fixed16(src_h, dst_h);
- downscale_w = max_fixed16(fp_w_ratio, u32_to_fixed16(1));
- downscale_h = max_fixed16(fp_h_ratio, u32_to_fixed16(1));
+ downscale_w = max_fixed16(fp_w_ratio, FIXED16_16_ONE);
+ downscale_h = max_fixed16(fp_h_ratio, FIXED16_16_ONE);
return mul_fixed16(downscale_w, downscale_h);
}
@@ -3912,7 +3912,7 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
static fixed16_16_t
skl_pipe_downscale_amount(const struct intel_crtc_state *crtc_state)
{
- fixed16_16_t pipe_downscale = u32_to_fixed16(1);
+ fixed16_16_t pipe_downscale = FIXED16_16_ONE;
if (!crtc_state->base.enable)
return pipe_downscale;
@@ -3933,8 +3933,8 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
fp_w_ratio = div_fixed16(src_w, dst_w);
fp_h_ratio = div_fixed16(src_h, dst_h);
- downscale_w = max_fixed16(fp_w_ratio, u32_to_fixed16(1));
- downscale_h = max_fixed16(fp_h_ratio, u32_to_fixed16(1));
+ downscale_w = max_fixed16(fp_w_ratio, FIXED16_16_ONE);
+ downscale_h = max_fixed16(fp_h_ratio, FIXED16_16_ONE);
pipe_downscale = mul_fixed16(downscale_w, downscale_h);
}
@@ -3954,7 +3954,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
int crtc_clock, dotclk;
uint32_t pipe_max_pixel_rate;
fixed16_16_t pipe_downscale;
- fixed16_16_t max_downscale = u32_to_fixed16(1);
+ fixed16_16_t max_downscale = FIXED16_16_ONE;
if (!cstate->base.enable)
return 0;
@@ -4317,7 +4317,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
fixed16_16_t ret;
if (latency == 0)
- return FP_16_16_MAX;
+ return FIXED16_16_MAX;
wm_intermediate_val = latency * pixel_rate * cpp;
ret = div_fixed16(wm_intermediate_val, 1000 * 512);
@@ -4337,7 +4337,7 @@ static fixed16_16_t skl_wm_method2(uint32_t pixel_rate,
fixed16_16_t ret;
if (latency == 0)
- return FP_16_16_MAX;
+ return FIXED16_16_MAX;
wm_intermediate_val = latency * pixel_rate;
wm_intermediate_val = DIV_ROUND_UP(wm_intermediate_val,
@@ -4354,12 +4354,12 @@ static fixed16_16_t skl_wm_method2(uint32_t pixel_rate,
fixed16_16_t linetime_us;
if (!cstate->base.active)
- return u32_to_fixed16(0);
+ return FIXED16_16_ZERO;
pixel_rate = cstate->pixel_rate;
if (WARN_ON(pixel_rate == 0))
- return u32_to_fixed16(0);
+ return FIXED16_16_ZERO;
crtc_htotal = cstate->base.adjusted_mode.crtc_htotal;
linetime_us = div_fixed16(crtc_htotal * 1000, pixel_rate);
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/5] drm/i915: Fix overflows in fixed16_16
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
` (2 preceding siblings ...)
2017-12-22 12:25 ` [PATCH 3/5] drm/i915: Add common fixed16_16 values Michal Wajdeczko
@ 2017-12-22 12:25 ` Michal Wajdeczko
2017-12-22 12:39 ` Chris Wilson
2017-12-22 12:25 ` [PATCH 5/5] drm/i915: Tidy up fixed16_16 Michal Wajdeczko
` (2 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 12:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
If someone provides too large number for fixed16 type
we will WARN but we will not correctly clamp values
and that may lead to fully wrong calculations.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/fixed16_16.h | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
index af23997..43fe0037 100644
--- a/drivers/gpu/drm/i915/fixed16_16.h
+++ b/drivers/gpu/drm/i915/fixed16_16.h
@@ -57,7 +57,8 @@ static inline fixed16_16_t u32_to_fixed16(u32 val)
{
fixed16_16_t fp;
- WARN_ON(val > U16_MAX);
+ if (WARN_ON(val > U16_MAX))
+ val = U16_MAX;
fp.val = val << 16;
return fp;
@@ -93,7 +94,9 @@ static inline fixed16_16_t clamp_u64_to_fixed16(u64 val)
{
fixed16_16_t fp;
- WARN_ON(val > U32_MAX);
+ if (WARN_ON(val > U32_MAX))
+ val = U32_MAX;
+
fp.val = (u32) val;
return fp;
}
@@ -109,7 +112,8 @@ static inline u32 mul_round_up_u32_fixed16(u32 val, fixed16_16_t mul)
intermediate_val = (u64) val * mul.val;
intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
- WARN_ON(intermediate_val > U32_MAX);
+ if (WARN_ON(intermediate_val > U32_MAX))
+ intermediate_val = U32_MAX;
return (u32) intermediate_val;
}
@@ -137,7 +141,8 @@ static inline u32 div_round_up_u32_fixed16(u32 val, fixed16_16_t d)
interm_val = (u64)val << 16;
interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
- WARN_ON(interm_val > U32_MAX);
+ if (WARN_ON(interm_val > U32_MAX))
+ interm_val = U32_MAX;
return (u32) interm_val;
}
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/5] drm/i915: Tidy up fixed16_16
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
` (3 preceding siblings ...)
2017-12-22 12:25 ` [PATCH 4/5] drm/i915: Fix overflows in fixed16_16 Michal Wajdeczko
@ 2017-12-22 12:25 ` Michal Wajdeczko
2017-12-22 12:43 ` Chris Wilson
2017-12-22 12:52 ` ✓ Fi.CI.BAT: success for drm/i915: promote fixed16_16 Patchwork
2017-12-22 14:23 ` ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 12:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Tidy up fixed16_16 code before promoting it to the include/linux.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/fixed16_16.h | 96 ++++++++++++++++++---------------------
1 file changed, 43 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
index 43fe0037..a2f8736 100644
--- a/drivers/gpu/drm/i915/fixed16_16.h
+++ b/drivers/gpu/drm/i915/fixed16_16.h
@@ -46,21 +46,19 @@
fp; \
})
-static inline bool is_fixed16_zero(fixed16_16_t val)
+static inline bool is_fixed16_zero(fixed16_16_t fp)
{
- if (val.val == 0)
- return true;
- return false;
+ return fp.val == 0;
}
-static inline fixed16_16_t u32_to_fixed16(u32 val)
+static inline fixed16_16_t u32_to_fixed16(u32 value)
{
fixed16_16_t fp;
- if (WARN_ON(val > U16_MAX))
- val = U16_MAX;
+ if (WARN_ON(value > U16_MAX))
+ value = U16_MAX;
- fp.val = val << 16;
+ fp.val = value << 16;
return fp;
}
@@ -76,99 +74,91 @@ static inline u32 fixed16_to_u32(fixed16_16_t fp)
static inline fixed16_16_t min_fixed16(fixed16_16_t min1, fixed16_16_t min2)
{
- fixed16_16_t min;
-
- min.val = min(min1.val, min2.val);
- return min;
+ if (min1.val <= min2.val)
+ return min1;
+ return min2;
}
static inline fixed16_16_t max_fixed16(fixed16_16_t max1, fixed16_16_t max2)
{
- fixed16_16_t max;
-
- max.val = max(max1.val, max2.val);
- return max;
+ if (max1.val >= max2.val)
+ return max1;
+ return max2;
}
-static inline fixed16_16_t clamp_u64_to_fixed16(u64 val)
+static inline fixed16_16_t clamp_u64_to_fixed16(u64 value)
{
fixed16_16_t fp;
- if (WARN_ON(val > U32_MAX))
- val = U32_MAX;
+ if (WARN_ON(value > U32_MAX))
+ value = U32_MAX;
- fp.val = (u32) val;
+ fp.val = value;
return fp;
}
-static inline u32 div_round_up_fixed16(fixed16_16_t val, fixed16_16_t d)
+static inline u32 div_round_up_fixed16(fixed16_16_t fp, fixed16_16_t d)
{
- return DIV_ROUND_UP(val.val, d.val);
+ return DIV_ROUND_UP(fp.val, d.val);
}
static inline u32 mul_round_up_u32_fixed16(u32 val, fixed16_16_t mul)
{
- u64 intermediate_val;
+ u64 tmp;
- intermediate_val = (u64) val * mul.val;
- intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
- if (WARN_ON(intermediate_val > U32_MAX))
- intermediate_val = U32_MAX;
- return (u32) intermediate_val;
+ tmp = (u64) val * mul.val;
+ tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16);
+ if (WARN_ON(tmp > U32_MAX))
+ tmp = U32_MAX;
+ return tmp;
}
static inline fixed16_16_t mul_fixed16(fixed16_16_t val, fixed16_16_t mul)
{
- u64 intermediate_val;
+ u64 tmp;
- intermediate_val = (u64) val.val * mul.val;
- intermediate_val = intermediate_val >> 16;
- return clamp_u64_to_fixed16(intermediate_val);
+ tmp = (u64) val.val * mul.val;
+ tmp = tmp >> 16;
+ return clamp_u64_to_fixed16(tmp);
}
static inline fixed16_16_t div_fixed16(u32 val, u32 d)
{
- u64 interm_val;
+ u64 tmp;
- interm_val = (u64)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d);
- return clamp_u64_to_fixed16(interm_val);
+ tmp = (u64)val << 16;
+ tmp = DIV_ROUND_UP_ULL(tmp, d);
+ return clamp_u64_to_fixed16(tmp);
}
static inline u32 div_round_up_u32_fixed16(u32 val, fixed16_16_t d)
{
- u64 interm_val;
+ u64 tmp;
- interm_val = (u64)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
- if (WARN_ON(interm_val > U32_MAX))
- interm_val = U32_MAX;
- return (u32) interm_val;
+ tmp = (u64)val << 16;
+ tmp = DIV_ROUND_UP_ULL(tmp, d.val);
+ if (WARN_ON(tmp > U32_MAX))
+ tmp = U32_MAX;
+ return tmp;
}
static inline fixed16_16_t mul_u32_fixed16(u32 val, fixed16_16_t mul)
{
- u64 intermediate_val;
+ u64 tmp = (u64) val * mul.val;
- intermediate_val = (u64) val * mul.val;
- return clamp_u64_to_fixed16(intermediate_val);
+ return clamp_u64_to_fixed16(tmp);
}
static inline fixed16_16_t add_fixed16(fixed16_16_t add1, fixed16_16_t add2)
{
- u64 interm_sum;
+ u64 tmp = (u64) add1.val + add2.val;
- interm_sum = (u64) add1.val + add2.val;
- return clamp_u64_to_fixed16(interm_sum);
+ return clamp_u64_to_fixed16(tmp);
}
static inline fixed16_16_t add_fixed16_u32(fixed16_16_t add1, u32 add2)
{
- u64 interm_sum;
- fixed16_16_t interm_add2 = u32_to_fixed16(add2);
-
- interm_sum = (u64)add1.val + interm_add2.val;
- return clamp_u64_to_fixed16(interm_sum);
+ return add_fixed16(add1, u32_to_fixed16(add2));
}
#endif
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 3/5] drm/i915: Add common fixed16_16 values
2017-12-22 12:25 ` [PATCH 3/5] drm/i915: Add common fixed16_16 values Michal Wajdeczko
@ 2017-12-22 12:34 ` Chris Wilson
2017-12-22 15:51 ` Michal Wajdeczko
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2017-12-22 12:34 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: Rodrigo Vivi
Quoting Michal Wajdeczko (2017-12-22 12:25:54)
> Zero and One are additional commonly used values that
> can have its own definitions.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/fixed16_16.h | 15 ++++++++++++---
> drivers/gpu/drm/i915/intel_pm.c | 22 +++++++++++-----------
> 2 files changed, 23 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
> index ec859c0..af23997 100644
> --- a/drivers/gpu/drm/i915/fixed16_16.h
> +++ b/drivers/gpu/drm/i915/fixed16_16.h
> @@ -31,9 +31,18 @@
> u32 val;
> } fixed16_16_t;
>
> -#define FP_16_16_MAX ({ \
> - fixed16_16_t fp; \
> - fp.val = UINT_MAX; \
> +#define FIXED16_16_ZERO ({ \
> + fixed16_16_t fp = { .val = 0 }; \
> + fp; \
> +})
#define TO_FIXED16_16(x) (fixed16_16_t){ .val = (x) }
#define FIXED16_16_ZERO TO_FIXED16_16(0)
#define FIXED16_16_ONE TO_FIXED16_16(1)
#define FIXED16_16_MAX TO_FIXED16_16(U32_MAX)
?
-Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/5] drm/i915: Fix overflows in fixed16_16
2017-12-22 12:25 ` [PATCH 4/5] drm/i915: Fix overflows in fixed16_16 Michal Wajdeczko
@ 2017-12-22 12:39 ` Chris Wilson
2017-12-22 15:56 ` Michal Wajdeczko
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2017-12-22 12:39 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: Rodrigo Vivi
Quoting Michal Wajdeczko (2017-12-22 12:25:55)
> If someone provides too large number for fixed16 type
> we will WARN but we will not correctly clamp values
> and that may lead to fully wrong calculations.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/fixed16_16.h | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
> index af23997..43fe0037 100644
> --- a/drivers/gpu/drm/i915/fixed16_16.h
> +++ b/drivers/gpu/drm/i915/fixed16_16.h
> @@ -57,7 +57,8 @@ static inline fixed16_16_t u32_to_fixed16(u32 val)
> {
> fixed16_16_t fp;
>
> - WARN_ON(val > U16_MAX);
> + if (WARN_ON(val > U16_MAX))
> + val = U16_MAX;
return FIXED16_16_MAX;
If val is too large, the closest we can get to val in our representation
is 16_16_MAX.
>
> fp.val = val << 16;
> return fp;
return TO_FIXED16_16(val << 16);
> @@ -93,7 +94,9 @@ static inline fixed16_16_t clamp_u64_to_fixed16(u64 val)
> {
> fixed16_16_t fp;
>
> - WARN_ON(val > U32_MAX);
> + if (WARN_ON(val > U32_MAX))
> + val = U32_MAX;
I would do the early return. Perhaps check with gcc if prefers returning
a constant than the jump back?
-Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/5] drm/i915: Tidy up fixed16_16
2017-12-22 12:25 ` [PATCH 5/5] drm/i915: Tidy up fixed16_16 Michal Wajdeczko
@ 2017-12-22 12:43 ` Chris Wilson
0 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2017-12-22 12:43 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: Rodrigo Vivi
Quoting Michal Wajdeczko (2017-12-22 12:25:56)
> Tidy up fixed16_16 code before promoting it to the include/linux.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/fixed16_16.h | 96 ++++++++++++++++++---------------------
> 1 file changed, 43 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/fixed16_16.h b/drivers/gpu/drm/i915/fixed16_16.h
> index 43fe0037..a2f8736 100644
> --- a/drivers/gpu/drm/i915/fixed16_16.h
> +++ b/drivers/gpu/drm/i915/fixed16_16.h
> @@ -46,21 +46,19 @@
> fp; \
> })
>
> -static inline bool is_fixed16_zero(fixed16_16_t val)
> +static inline bool is_fixed16_zero(fixed16_16_t fp)
> {
> - if (val.val == 0)
> - return true;
> - return false;
> + return fp.val == 0;
> }
>
> -static inline fixed16_16_t u32_to_fixed16(u32 val)
> +static inline fixed16_16_t u32_to_fixed16(u32 value)
> {
> fixed16_16_t fp;
>
> - if (WARN_ON(val > U16_MAX))
> - val = U16_MAX;
> + if (WARN_ON(value > U16_MAX))
> + value = U16_MAX;
>
> - fp.val = val << 16;
> + fp.val = value << 16;
> return fp;
> }
>
> @@ -76,99 +74,91 @@ static inline u32 fixed16_to_u32(fixed16_16_t fp)
>
> static inline fixed16_16_t min_fixed16(fixed16_16_t min1, fixed16_16_t min2)
> {
> - fixed16_16_t min;
> -
> - min.val = min(min1.val, min2.val);
> - return min;
> + if (min1.val <= min2.val)
> + return min1;
> + return min2;
> }
>
> static inline fixed16_16_t max_fixed16(fixed16_16_t max1, fixed16_16_t max2)
> {
> - fixed16_16_t max;
> -
> - max.val = max(max1.val, max2.val);
> - return max;
> + if (max1.val >= max2.val)
> + return max1;
> + return max2;
> }
>
> -static inline fixed16_16_t clamp_u64_to_fixed16(u64 val)
> +static inline fixed16_16_t clamp_u64_to_fixed16(u64 value)
> {
> fixed16_16_t fp;
>
> - if (WARN_ON(val > U32_MAX))
> - val = U32_MAX;
> + if (WARN_ON(value > U32_MAX))
> + value = U32_MAX;
>
> - fp.val = (u32) val;
> + fp.val = value;
> return fp;
> }
>
> -static inline u32 div_round_up_fixed16(fixed16_16_t val, fixed16_16_t d)
> +static inline u32 div_round_up_fixed16(fixed16_16_t fp, fixed16_16_t d)
> {
> - return DIV_ROUND_UP(val.val, d.val);
> + return DIV_ROUND_UP(fp.val, d.val);
> }
>
> static inline u32 mul_round_up_u32_fixed16(u32 val, fixed16_16_t mul)
> {
> - u64 intermediate_val;
> + u64 tmp;
>
> - intermediate_val = (u64) val * mul.val;
> - intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
DIV_ROUND_UP_ULL with a known constant power-of-two. We can do better.
> - if (WARN_ON(intermediate_val > U32_MAX))
> - intermediate_val = U32_MAX;
> - return (u32) intermediate_val;
> + tmp = (u64) val * mul.val;
> + tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16);
> + if (WARN_ON(tmp > U32_MAX))
> + tmp = U32_MAX;
> + return tmp;
> }
>
> static inline fixed16_16_t mul_fixed16(fixed16_16_t val, fixed16_16_t mul)
> {
> - u64 intermediate_val;
> + u64 tmp;
>
> - intermediate_val = (u64) val.val * mul.val;
> - intermediate_val = intermediate_val >> 16;
> - return clamp_u64_to_fixed16(intermediate_val);
> + tmp = (u64) val.val * mul.val;
Use mul_u32_u32(u32, u32) -> u64
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^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: promote fixed16_16
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
` (4 preceding siblings ...)
2017-12-22 12:25 ` [PATCH 5/5] drm/i915: Tidy up fixed16_16 Michal Wajdeczko
@ 2017-12-22 12:52 ` Patchwork
2017-12-22 14:23 ` ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-12-22 12:52 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: promote fixed16_16
URL : https://patchwork.freedesktop.org/series/35717/
State : success
== Summary ==
Series 35717v1 drm/i915: promote fixed16_16
https://patchwork.freedesktop.org/api/1.0/series/35717/revisions/1/mbox/
Test debugfs_test:
Subgroup read_all_entries:
dmesg-fail -> DMESG-WARN (fi-elk-e7500) fdo#103989
incomplete -> PASS (fi-snb-2520m) fdo#103713
Test kms_psr_sink_crc:
Subgroup psr_basic:
pass -> DMESG-WARN (fi-skl-6700hq) fdo#101144
fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:440s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:450s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:385s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:499s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:277s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:502s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:501s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:481s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:470s
fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:260s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:541s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:406s
fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:419s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:424s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:469s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:439s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:483s
fi-kbl-7560u total:288 pass:268 dwarn:1 dfail:0 fail:0 skip:19 time:526s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:472s
fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:526s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:437s
fi-skl-6600u total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:530s
fi-skl-6700hq total:288 pass:261 dwarn:1 dfail:0 fail:0 skip:26 time:556s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:507s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:505s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:449s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:548s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:413s
Blacklisted hosts:
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:586s
fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:634s
fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:486s
fi-pnv-d510 failed to collect. IGT log at Patchwork_7564/fi-pnv-d510/igt.log
e9f603bfd61b4f42c971762f9716e8dde87a33ae drm-tip: 2017y-12m-22d-11h-13m-33s UTC integration manifest
39f93b497427 drm/i915: Tidy up fixed16_16
bef063054935 drm/i915: Fix overflows in fixed16_16
f3473bd446b9 drm/i915: Add common fixed16_16 values
8c4ed2f34481 drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t
96d94cbb3254 drm/i915: Move uint_fixed_16_16_t to its own header
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7564/issues.html
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^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915: promote fixed16_16
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
` (5 preceding siblings ...)
2017-12-22 12:52 ` ✓ Fi.CI.BAT: success for drm/i915: promote fixed16_16 Patchwork
@ 2017-12-22 14:23 ` Patchwork
6 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-12-22 14:23 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: promote fixed16_16
URL : https://patchwork.freedesktop.org/series/35717/
State : failure
== Summary ==
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252
Test gem_tiled_swapping:
Subgroup non-threaded:
pass -> DMESG-FAIL (shard-snb) fdo#104218
Test kms_draw_crc:
Subgroup draw-method-xrgb2101010-mmap-gtt-untiled:
pass -> INCOMPLETE (shard-snb)
incomplete -> PASS (shard-hsw)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
fail -> PASS (shard-snb) fdo#101623 +1
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#104218 https://bugs.freedesktop.org/show_bug.cgi?id=104218
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
shard-hsw total:2635 pass:1489 dwarn:1 dfail:0 fail:10 skip:1135 time:9128s
shard-snb total:2641 pass:1283 dwarn:1 dfail:1 fail:10 skip:1345 time:7843s
Blacklisted hosts:
shard-apl total:2712 pass:1684 dwarn:1 dfail:0 fail:25 skip:1001 time:13847s
shard-kbl total:2635 pass:1746 dwarn:1 dfail:0 fail:22 skip:864 time:10391s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7564/shards.html
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/5] drm/i915: Add common fixed16_16 values
2017-12-22 12:34 ` Chris Wilson
@ 2017-12-22 15:51 ` Michal Wajdeczko
2017-12-22 16:03 ` Chris Wilson
0 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 15:51 UTC (permalink / raw)
To: intel-gfx, Chris Wilson; +Cc: Rodrigo Vivi
On Fri, 22 Dec 2017 13:34:58 +0100, Chris Wilson
<chris@chris-wilson.co.uk> wrote:
> Quoting Michal Wajdeczko (2017-12-22 12:25:54)
>> Zero and One are additional commonly used values that
>> can have its own definitions.
>>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/fixed16_16.h | 15 ++++++++++++---
>> drivers/gpu/drm/i915/intel_pm.c | 22 +++++++++++-----------
>> 2 files changed, 23 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/fixed16_16.h
>> b/drivers/gpu/drm/i915/fixed16_16.h
>> index ec859c0..af23997 100644
>> --- a/drivers/gpu/drm/i915/fixed16_16.h
>> +++ b/drivers/gpu/drm/i915/fixed16_16.h
>> @@ -31,9 +31,18 @@
>> u32 val;
>> } fixed16_16_t;
>>
>> -#define FP_16_16_MAX ({ \
>> - fixed16_16_t fp; \
>> - fp.val = UINT_MAX; \
>> +#define FIXED16_16_ZERO ({ \
>> + fixed16_16_t fp = { .val = 0 }; \
>> + fp; \
>> +})
>
> #define TO_FIXED16_16(x) (fixed16_16_t){ .val = (x) }
Earlier I was thinking about __FIXED16_16_INITIALIZER(v)
but decided to not introduce it due potential abuse ;)
> #define FIXED16_16_ZERO TO_FIXED16_16(0)
> #define FIXED16_16_ONE TO_FIXED16_16(1)
Gotcha! It should be 1 << 16
> #define FIXED16_16_MAX TO_FIXED16_16(U32_MAX)
>
> ?
> -Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/5] drm/i915: Fix overflows in fixed16_16
2017-12-22 12:39 ` Chris Wilson
@ 2017-12-22 15:56 ` Michal Wajdeczko
0 siblings, 0 replies; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 15:56 UTC (permalink / raw)
To: intel-gfx, Chris Wilson; +Cc: Rodrigo Vivi
On Fri, 22 Dec 2017 13:39:11 +0100, Chris Wilson
<chris@chris-wilson.co.uk> wrote:
> Quoting Michal Wajdeczko (2017-12-22 12:25:55)
>> If someone provides too large number for fixed16 type
>> we will WARN but we will not correctly clamp values
>> and that may lead to fully wrong calculations.
>>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/fixed16_16.h | 13 +++++++++----
>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/fixed16_16.h
>> b/drivers/gpu/drm/i915/fixed16_16.h
>> index af23997..43fe0037 100644
>> --- a/drivers/gpu/drm/i915/fixed16_16.h
>> +++ b/drivers/gpu/drm/i915/fixed16_16.h
>> @@ -57,7 +57,8 @@ static inline fixed16_16_t u32_to_fixed16(u32 val)
>> {
>> fixed16_16_t fp;
>>
>> - WARN_ON(val > U16_MAX);
>> + if (WARN_ON(val > U16_MAX))
>> + val = U16_MAX;
>
> return FIXED16_16_MAX;
>
> If val is too large, the closest we can get to val in our representation
> is 16_16_MAX.
hmm, true, but then our fixed representation will include fractional
part...
but I guess it is still ok
>
>>
>> fp.val = val << 16;
>> return fp;
>
> return TO_FIXED16_16(val << 16);
>
>> @@ -93,7 +94,9 @@ static inline fixed16_16_t clamp_u64_to_fixed16(u64
>> val)
>> {
>> fixed16_16_t fp;
>>
>> - WARN_ON(val > U32_MAX);
>> + if (WARN_ON(val > U32_MAX))
>> + val = U32_MAX;
>
> I would do the early return. Perhaps check with gcc if prefers returning
> a constant than the jump back?
> -Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/5] drm/i915: Add common fixed16_16 values
2017-12-22 15:51 ` Michal Wajdeczko
@ 2017-12-22 16:03 ` Chris Wilson
0 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2017-12-22 16:03 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: Rodrigo Vivi
Quoting Michal Wajdeczko (2017-12-22 15:51:49)
> On Fri, 22 Dec 2017 13:34:58 +0100, Chris Wilson
> <chris@chris-wilson.co.uk> wrote:
>
> > Quoting Michal Wajdeczko (2017-12-22 12:25:54)
> >> Zero and One are additional commonly used values that
> >> can have its own definitions.
> >>
> >> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >> ---
> >> drivers/gpu/drm/i915/fixed16_16.h | 15 ++++++++++++---
> >> drivers/gpu/drm/i915/intel_pm.c | 22 +++++++++++-----------
> >> 2 files changed, 23 insertions(+), 14 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/fixed16_16.h
> >> b/drivers/gpu/drm/i915/fixed16_16.h
> >> index ec859c0..af23997 100644
> >> --- a/drivers/gpu/drm/i915/fixed16_16.h
> >> +++ b/drivers/gpu/drm/i915/fixed16_16.h
> >> @@ -31,9 +31,18 @@
> >> u32 val;
> >> } fixed16_16_t;
> >>
> >> -#define FP_16_16_MAX ({ \
> >> - fixed16_16_t fp; \
> >> - fp.val = UINT_MAX; \
> >> +#define FIXED16_16_ZERO ({ \
> >> + fixed16_16_t fp = { .val = 0 }; \
> >> + fp; \
> >> +})
> >
> > #define TO_FIXED16_16(x) (fixed16_16_t){ .val = (x) }
>
> Earlier I was thinking about __FIXED16_16_INITIALIZER(v)
> but decided to not introduce it due potential abuse ;)
>
> > #define FIXED16_16_ZERO TO_FIXED16_16(0)
> > #define FIXED16_16_ONE TO_FIXED16_16(1)
>
> Gotcha! It should be 1 << 16
Oops. I obviously meant FIXED16_16_E. ;)
-Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t
2017-12-22 12:25 ` [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t Michal Wajdeczko
@ 2017-12-22 16:08 ` Michal Wajdeczko
2017-12-22 17:11 ` Chris Wilson
0 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2017-12-22 16:08 UTC (permalink / raw)
To: intel-gfx, Michal Wajdeczko; +Cc: Rodrigo Vivi
On Fri, 22 Dec 2017 13:25:53 +0100, Michal Wajdeczko
<michal.wajdeczko@intel.com> wrote:
> Rename uint_fixed_16_16_t to fixed16_16_t to match header name.
> Also switch into kernel integer types.
>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/fixed16_16.h | 91
> ++++++++++++++++++---------------------
> drivers/gpu/drm/i915/i915_drv.h | 4 +-
> drivers/gpu/drm/i915/intel_pm.c | 50 ++++++++++-----------
> 3 files changed, 68 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/fixed16_16.h
> b/drivers/gpu/drm/i915/fixed16_16.h
> index a6568df..ec859c0 100644
> --- a/drivers/gpu/drm/i915/fixed16_16.h
> +++ b/drivers/gpu/drm/i915/fixed16_16.h
> @@ -27,26 +27,26 @@
> #include <linux/kernel.h>
> -typedef struct {
> - uint32_t val;
> -} uint_fixed_16_16_t;
> +typedef struct fixed16_16 {
> + u32 val;
> +} fixed16_16_t;
> #define FP_16_16_MAX ({ \
> - uint_fixed_16_16_t fp; \
> + fixed16_16_t fp; \
> fp.val = UINT_MAX; \
> fp; \
> })
> -static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
> +static inline bool is_fixed16_zero(fixed16_16_t val)
> {
> if (val.val == 0)
> return true;
> return false;
> }
> -static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
> +static inline fixed16_16_t u32_to_fixed16(u32 val)
Hmm, as we only supports unsigned values, maybe correct new name for
the type should be prefixed with "u" ?
Michal
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t
2017-12-22 16:08 ` Michal Wajdeczko
@ 2017-12-22 17:11 ` Chris Wilson
2017-12-22 17:11 ` Chris Wilson
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2017-12-22 17:11 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: Rodrigo Vivi
Quoting Michal Wajdeczko (2017-12-22 16:08:51)
> On Fri, 22 Dec 2017 13:25:53 +0100, Michal Wajdeczko
> <michal.wajdeczko@intel.com> wrote:
>
> > Rename uint_fixed_16_16_t to fixed16_16_t to match header name.
> > Also switch into kernel integer types.
> >
> > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/fixed16_16.h | 91
> > ++++++++++++++++++---------------------
> > drivers/gpu/drm/i915/i915_drv.h | 4 +-
> > drivers/gpu/drm/i915/intel_pm.c | 50 ++++++++++-----------
> > 3 files changed, 68 insertions(+), 77 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/fixed16_16.h
> > b/drivers/gpu/drm/i915/fixed16_16.h
> > index a6568df..ec859c0 100644
> > --- a/drivers/gpu/drm/i915/fixed16_16.h
> > +++ b/drivers/gpu/drm/i915/fixed16_16.h
> > @@ -27,26 +27,26 @@
> > #include <linux/kernel.h>
> > -typedef struct {
> > - uint32_t val;
> > -} uint_fixed_16_16_t;
> > +typedef struct fixed16_16 {
> > + u32 val;
> > +} fixed16_16_t;
> > #define FP_16_16_MAX ({ \
> > - uint_fixed_16_16_t fp; \
> > + fixed16_16_t fp; \
> > fp.val = UINT_MAX; \
> > fp; \
> > })
> > -static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
> > +static inline bool is_fixed16_zero(fixed16_16_t val)
> > {
> > if (val.val == 0)
> > return true;
> > return false;
> > }
> > -static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
> > +static inline fixed16_16_t u32_to_fixed16(u32 val)
>
> Hmm, as we only supports unsigned values, maybe correct new name for
> the type should be prefixed with "u" ?
One of the options was u16_16, but amdgpu used fixed32_32 and
fixed31_32, so conforming to that pattern is easier than demanding they
change :) Eventually I think that header should wind up next to ours
(and perhaps we might need u24_8, u20_12 etc).
-Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t
2017-12-22 17:11 ` Chris Wilson
@ 2017-12-22 17:11 ` Chris Wilson
0 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2017-12-22 17:11 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: Rodrigo Vivi
Quoting Chris Wilson (2017-12-22 17:11:00)
> Quoting Michal Wajdeczko (2017-12-22 16:08:51)
> > On Fri, 22 Dec 2017 13:25:53 +0100, Michal Wajdeczko
> > <michal.wajdeczko@intel.com> wrote:
> >
> > > Rename uint_fixed_16_16_t to fixed16_16_t to match header name.
> > > Also switch into kernel integer types.
> > >
> > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/fixed16_16.h | 91
> > > ++++++++++++++++++---------------------
> > > drivers/gpu/drm/i915/i915_drv.h | 4 +-
> > > drivers/gpu/drm/i915/intel_pm.c | 50 ++++++++++-----------
> > > 3 files changed, 68 insertions(+), 77 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/fixed16_16.h
> > > b/drivers/gpu/drm/i915/fixed16_16.h
> > > index a6568df..ec859c0 100644
> > > --- a/drivers/gpu/drm/i915/fixed16_16.h
> > > +++ b/drivers/gpu/drm/i915/fixed16_16.h
> > > @@ -27,26 +27,26 @@
> > > #include <linux/kernel.h>
> > > -typedef struct {
> > > - uint32_t val;
> > > -} uint_fixed_16_16_t;
> > > +typedef struct fixed16_16 {
> > > + u32 val;
> > > +} fixed16_16_t;
> > > #define FP_16_16_MAX ({ \
> > > - uint_fixed_16_16_t fp; \
> > > + fixed16_16_t fp; \
> > > fp.val = UINT_MAX; \
> > > fp; \
> > > })
> > > -static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
> > > +static inline bool is_fixed16_zero(fixed16_16_t val)
> > > {
> > > if (val.val == 0)
> > > return true;
> > > return false;
> > > }
> > > -static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
> > > +static inline fixed16_16_t u32_to_fixed16(u32 val)
> >
> > Hmm, as we only supports unsigned values, maybe correct new name for
> > the type should be prefixed with "u" ?
>
> One of the options was u16_16, but amdgpu used fixed32_32 and
> fixed31_32, so conforming to that pattern is easier than demanding they
> change :) Eventually I think that header should wind up next to ours
> (and perhaps we might need u24_8, u20_12 etc).
On the other hand if you think u16_16 is much better long term, I'll
support that :)
-Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2017-12-22 17:12 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-12-22 12:25 [PATCH 0/5] drm/i915: promote fixed16_16 Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 1/5] drm/i915: Move uint_fixed_16_16_t to its own header Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t Michal Wajdeczko
2017-12-22 16:08 ` Michal Wajdeczko
2017-12-22 17:11 ` Chris Wilson
2017-12-22 17:11 ` Chris Wilson
2017-12-22 12:25 ` [PATCH 3/5] drm/i915: Add common fixed16_16 values Michal Wajdeczko
2017-12-22 12:34 ` Chris Wilson
2017-12-22 15:51 ` Michal Wajdeczko
2017-12-22 16:03 ` Chris Wilson
2017-12-22 12:25 ` [PATCH 4/5] drm/i915: Fix overflows in fixed16_16 Michal Wajdeczko
2017-12-22 12:39 ` Chris Wilson
2017-12-22 15:56 ` Michal Wajdeczko
2017-12-22 12:25 ` [PATCH 5/5] drm/i915: Tidy up fixed16_16 Michal Wajdeczko
2017-12-22 12:43 ` Chris Wilson
2017-12-22 12:52 ` ✓ Fi.CI.BAT: success for drm/i915: promote fixed16_16 Patchwork
2017-12-22 14:23 ` ✗ Fi.CI.IGT: failure " Patchwork
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