[PATCH v1 0/3] x86/cpu/AMD: Make LFENCE a serializing instruction on AMD

From: Tom Lendacky <thomas.lendacky@amd.com>
To: x86@kernel.org, linux-kernel@vger.kernel.org
Cc: Peter Zijlstra <peterz@infradead.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Dave Hansen <dave.hansen@intel.com>,
	Borislav Petkov <bp@alien8.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Tim Chen <tim.c.chen@linux.intel.com>,
	Greg Kroah-Hartman <gregkh@linux-foundation.org>,
	David Woodhouse <dwmw@amazon.co.uk>, Paul Turner <pjt@google.com>
Subject: [PATCH v1 0/3] x86/cpu/AMD: Make LFENCE a serializing instruction on AMD
Date: Fri, 05 Jan 2018 10:07:36 -0600	[thread overview]
Message-ID: <20180105160736.23786.45026.stgit@tlendack-t1.amdoffice.net> (raw)

To aid in speculation control, the LFENCE instruction will be turned into
a serializing instruction. There is less performance impact using LFENCE
in this way compared to MFENCE.

With LFENCE now being a serializing instruction, it can be used in
rdtsc_ordered() in place of MFENCE_RDTSC.  The other two patches in this
series make this change and remove the MFENCE_RDTSC feature.

The following patches are included in this series:
- Make LFENCE a serializing instruction on AMD
- Change over to LFENCE_RDTSC from MFENCE_RDTSC on AMD
- Remove the MFENCE_RDTSC feature

This patch series is based on tip:x86/pti.

---

Tom Lendacky (3):
      x86/cpu/AMD: Make LFENCE a serializing instruction
      x86/cpu/AMD: Use LFENCE_RDTSC instead of MFENCE_RDTSC
      x86/msr: Remove now unused definition of MFENCE_RDTSC feature

 arch/x86/include/asm/cpufeatures.h |    2 +-
 arch/x86/include/asm/msr-index.h   |    2 ++
 arch/x86/include/asm/msr.h         |    3 +--
 arch/x86/kernel/cpu/amd.c          |   13 +++++++++++--
 4 files changed, 15 insertions(+), 5 deletions(-)

-- 
Tom Lendacky