[U-Boot] [PATCH v5 0/5] spi: cadence_spi: Adopt Linux DT bindings

[U-Boot] [PATCH v5 0/5] spi: cadence_spi: Adopt Linux DT bindings

[Jason Rush]

Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>

Jason Rush (5):
  spi: cadence_spi: Sync DT bindings with Linux
  dts: cadence_spi: Sync DT bindings with Linux
  config: cadence_spi: Remove defines read from DT
  dts: k2g: Clean-up indentation
  dts: cadence_spi: Update documentation for DT bindings

 arch/arm/dts/keystone-k2g-evm.dts             | 75 +++++++++++++--------------
 arch/arm/dts/keystone-k2g.dtsi                |  5 +-
 arch/arm/dts/socfpga.dtsi                     |  5 +-
 arch/arm/dts/socfpga_arria10.dtsi             |  4 +-
 arch/arm/dts/socfpga_arria5_socdk.dts         |  9 ++--
 arch/arm/dts/socfpga_cyclone5_is1.dts         |  9 ++--
 arch/arm/dts/socfpga_cyclone5_socdk.dts       |  9 ++--
 arch/arm/dts/socfpga_cyclone5_sockit.dts      |  9 ++--
 arch/arm/dts/socfpga_cyclone5_socrates.dts    |  9 ++--
 arch/arm/dts/socfpga_cyclone5_sr1500.dts      |  9 ++--
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts | 18 +++----
 arch/arm/dts/stv0991.dts                      | 12 +++--
 doc/device-tree-bindings/spi/spi-cadence.txt  | 13 +++--
 drivers/spi/cadence_qspi.c                    | 20 ++++---
 drivers/spi/cadence_qspi.h                    |  6 ++-
 drivers/spi/cadence_qspi_apb.c                | 15 ++----
 include/configs/k2g_evm.h                     |  1 -
 include/configs/socfpga_common.h              |  1 -
 include/configs/stv0991.h                     |  1 -
 19 files changed, 113 insertions(+), 117 deletions(-)

-- 
2.11.0

[U-Boot] [PATCH v5 1/5] spi: cadence_spi: Sync DT bindings with Linux

[Jason Rush]

Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Cc: Marek Vasut <marex@denx.de>
---
Changes for v5:
   - Rebased
Changes for v4:
   - Rebased
Changes for v3:
   - None

 drivers/spi/cadence_qspi.c     | 20 ++++++++++++--------
 drivers/spi/cadence_qspi.h     |  6 +++++-
 drivers/spi/cadence_qspi_apb.c | 15 ++++-----------
 3 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 9a6e41f330..991a7160bd 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -212,7 +212,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
 	/* Set Chip select */
 	cadence_qspi_apb_chipselect(base, spi_chip_select(dev),
-				    CONFIG_CQSPI_DECODER);
+				    plat->is_decoded_cs);
 
 	if ((flags & SPI_XFER_END) || (flags == 0)) {
 		if (priv->cmd_len == 0) {
@@ -296,7 +296,11 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 
 	plat->regbase = (void *)data[0];
 	plat->ahbbase = (void *)data[2];
-	plat->sram_size = fdtdec_get_int(blob, node, "sram-size", 128);
+	plat->is_decoded_cs = fdtdec_get_bool(blob, node, "cdns,is-decoded-cs");
+	plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128);
+	plat->fifo_width = fdtdec_get_uint(blob, node, "cdns,fifo-width", 4);
+	plat->trigger_address = fdtdec_get_uint(blob, node,
+		"cdns,trigger-address", 0);
 
 	/* All other paramters are embedded in the child node */
 	subnode = fdt_first_subnode(blob, node);
@@ -310,12 +314,12 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 				       500000);
 
 	/* Read other parameters from DT */
-	plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256);
-	plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16);
-	plat->tshsl_ns = fdtdec_get_int(blob, subnode, "tshsl-ns", 200);
-	plat->tsd2d_ns = fdtdec_get_int(blob, subnode, "tsd2d-ns", 255);
-	plat->tchsh_ns = fdtdec_get_int(blob, subnode, "tchsh-ns", 20);
-	plat->tslch_ns = fdtdec_get_int(blob, subnode, "tslch-ns", 20);
+	plat->page_size = fdtdec_get_uint(blob, subnode, "page-size", 256);
+	plat->block_size = fdtdec_get_uint(blob, subnode, "block-size", 16);
+	plat->tshsl_ns = fdtdec_get_uint(blob, subnode, "cdns,tshsl-ns", 200);
+	plat->tsd2d_ns = fdtdec_get_uint(blob, subnode, "cdns,tsd2d-ns", 255);
+	plat->tchsh_ns = fdtdec_get_uint(blob, subnode, "cdns,tchsh-ns", 20);
+	plat->tslch_ns = fdtdec_get_uint(blob, subnode, "cdns,tslch-ns", 20);
 
 	debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n",
 	      __func__, plat->regbase, plat->ahbbase, plat->max_hz,
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
index d1927a4003..83154210bd 100644
--- a/drivers/spi/cadence_qspi.h
+++ b/drivers/spi/cadence_qspi.h
@@ -18,14 +18,18 @@ struct cadence_spi_platdata {
 	unsigned int	max_hz;
 	void		*regbase;
 	void		*ahbbase;
+	bool		is_decoded_cs;
+	u32		fifo_depth;
+	u32		fifo_width;
+	u32		trigger_address;
 
+	// Flash parameters
 	u32		page_size;
 	u32		block_size;
 	u32		tshsl_ns;
 	u32		tsd2d_ns;
 	u32		tchsh_ns;
 	u32		tslch_ns;
-	u32		sram_size;
 };
 
 struct cadence_spi_priv {
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index e02f2217f4..8309ab8794 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -37,10 +37,6 @@
 #define CQSPI_REG_RETRY				10000
 #define CQSPI_POLL_IDLE_RETRY			3
 
-#define CQSPI_FIFO_WIDTH			4
-
-#define CQSPI_REG_SRAM_THRESHOLD_WORDS		50
-
 /* Transfer mode */
 #define CQSPI_INST_TYPE_SINGLE			0
 #define CQSPI_INST_TYPE_DUAL			1
@@ -51,9 +47,6 @@
 #define CQSPI_DUMMY_CLKS_PER_BYTE		8
 #define CQSPI_DUMMY_BYTES_MAX			4
 
-#define CQSPI_REG_SRAM_FILL_THRESHOLD	\
-	((CQSPI_REG_SRAM_SIZE_WORD / 2) * CQSPI_FIFO_WIDTH)
-
 /****************************************************************************
  * Controller's configuration and status register (offset from QSPI_BASE)
  ****************************************************************************/
@@ -400,7 +393,7 @@ void cadence_qspi_apb_controller_init(struct cadence_spi_platdata *plat)
 	writel(0, plat->regbase + CQSPI_REG_REMAP);
 
 	/* Indirect mode configurations */
-	writel((plat->sram_size/2), plat->regbase + CQSPI_REG_SRAMPARTITION);
+	writel((plat->fifo_depth/2), plat->regbase + CQSPI_REG_SRAMPARTITION);
 
 	/* Disable all interrupts */
 	writel(0, plat->regbase + CQSPI_REG_IRQMASK);
@@ -560,7 +553,7 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat,
 		addr_bytes = cmdlen - 1;
 
 	/* Setup the indirect trigger address */
-	writel((u32)plat->ahbbase,
+	writel(plat->trigger_address,
 	       plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
 	/* Configure the opcode */
@@ -659,7 +652,7 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
 		bytes_to_read = ret;
 
 		while (bytes_to_read != 0) {
-			bytes_to_read *= CQSPI_FIFO_WIDTH;
+			bytes_to_read *= plat->fifo_width;
 			bytes_to_read = bytes_to_read > remaining ?
 					remaining : bytes_to_read;
 			readsl(plat->ahbbase, bb_rxbuf, bytes_to_read >> 2);
@@ -710,7 +703,7 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,
 		return -EINVAL;
 	}
 	/* Setup the indirect trigger address */
-	writel((u32)plat->ahbbase,
+	writel(plat->trigger_address,
 	       plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
 	/* Configure the opcode */
-- 
2.11.0

[U-Boot] [PATCH v5 2/5] dts: cadence_spi: Sync DT bindings with Linux

[Jason Rush]

Adopt the Linux DT bindings and clean-up duplicate
and unused values.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Cc: Marek Vasut <marex@denx.de>
---
Changes for v5:
   - Rebased
Changes for v4:
   - Rebased
Changes for v3:
   - Update the DT bindings in keystone-k2g-evm.dts

 arch/arm/dts/keystone-k2g-evm.dts             |  8 ++++----
 arch/arm/dts/keystone-k2g.dtsi                |  5 +++--
 arch/arm/dts/socfpga.dtsi                     |  5 +++--
 arch/arm/dts/socfpga_arria10.dtsi             |  4 ++--
 arch/arm/dts/socfpga_arria5_socdk.dts         |  9 ++++-----
 arch/arm/dts/socfpga_cyclone5_is1.dts         |  9 ++++-----
 arch/arm/dts/socfpga_cyclone5_socdk.dts       |  9 ++++-----
 arch/arm/dts/socfpga_cyclone5_sockit.dts      |  9 ++++-----
 arch/arm/dts/socfpga_cyclone5_socrates.dts    |  9 ++++-----
 arch/arm/dts/socfpga_cyclone5_sr1500.dts      |  9 ++++-----
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts | 18 ++++++++----------
 arch/arm/dts/stv0991.dts                      | 12 +++++++-----
 12 files changed, 51 insertions(+), 55 deletions(-)

diff --git a/arch/arm/dts/keystone-k2g-evm.dts b/arch/arm/dts/keystone-k2g-evm.dts
index de208b3613..ba566a4328 100644
--- a/arch/arm/dts/keystone-k2g-evm.dts
+++ b/arch/arm/dts/keystone-k2g-evm.dts
@@ -76,10 +76,10 @@
                 spi-max-frequency = <96000000>;
                 #address-cells = <1>;
                 #size-cells = <1>;
-                tshsl-ns = <392>;
-                tsd2d-ns = <392>;
-                tchsh-ns = <100>;
-                tslch-ns = <100>;
+                cdns,tshsl-ns = <392>;
+                cdns,tsd2d-ns = <392>;
+                cdns,tchsh-ns = <100>;
+                cdns,tslch-ns = <100>;
 		block-size = <18>;
 
 
diff --git a/arch/arm/dts/keystone-k2g.dtsi b/arch/arm/dts/keystone-k2g.dtsi
index 7b2fae6860..9bcfea6d86 100644
--- a/arch/arm/dts/keystone-k2g.dtsi
+++ b/arch/arm/dts/keystone-k2g.dtsi
@@ -92,8 +92,9 @@
 			      <0x24000000 0x4000000>;
 			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
 			num-cs = <4>;
-			fifo-depth = <256>;
-			sram-size = <256>;
+			cdns,fifo-depth = <256>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x24000000>;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index 8588221e57..7557aa01e5 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -644,8 +644,9 @@
 			clocks = <&qspi_clk>;
 			ext-decoder = <0>;  /* external decoder */
 			num-cs = <4>;
-			fifo-depth = <128>;
-			sram-size = <128>;
+			cdns,fifo-depth = <128>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x00000000>;
 			bus-num = <2>;
 			status = "disabled";
 		};
diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
index 377700df11..abfd0bc4f8 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -734,8 +734,8 @@
 			clocks = <&l4_main_clk>;
 			ext-decoder = <0>;  /* external decoder */
 			num-chipselect = <4>;
-			fifo-depth = <128>;
-			sram-size = <512>;
+			cdns,fifo-depth = <128>;
+			cdns,fifo-width = <4>;
 			bus-num = <2>;
 			status = "disabled";
 		};
diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts
index 726505821f..1e91a65af6 100644
--- a/arch/arm/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/dts/socfpga_arria5_socdk.dts
@@ -94,10 +94,9 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts
index 16a3283710..2e2b71fefb 100644
--- a/arch/arm/dts/socfpga_cyclone5_is1.dts
+++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
@@ -93,11 +93,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 
diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index f175ef2ead..95a8e653d7 100644
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -104,11 +104,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 
diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts
index e45c2abbc2..6f42b88130 100644
--- a/arch/arm/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts
@@ -84,11 +84,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index bdd93248fb..e3ae8a8207 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -74,11 +74,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 
diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts b/arch/arm/dts/socfpga_cyclone5_sr1500.dts
index 739bbb7f3d..e24830af57 100644
--- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts
+++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts
@@ -92,10 +92,9 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
index f168e4ff99..a0febe91b0 100644
--- a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
+++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
@@ -79,11 +79,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 
 	flash1: n25q00 at 1 {
@@ -96,11 +95,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 
diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.dts
index fa3fd641b2..bceac09154 100644
--- a/arch/arm/dts/stv0991.dts
+++ b/arch/arm/dts/stv0991.dts
@@ -32,7 +32,9 @@
 			reg = <0x80203000 0x100>,
 				<0x40000000 0x1000000>;
 			clocks = <3750000>;
-			sram-size = <256>;
+			cdns,fifo-depth = <256>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x40000000>;
 			status = "okay";
 
 			flash0: n25q32 at 0 {
@@ -44,10 +46,10 @@
 				m25p,fast-read;
 				page-size = <256>;
 				block-size = <16>; 	/* 2^16, 64KB */
-				tshsl-ns = <50>;
-				tsd2d-ns = <50>;
-				tchsh-ns = <4>;
-				tslch-ns = <4>;
+				cdns,tshsl-ns = <50>;
+				cdns,tsd2d-ns = <50>;
+				cdns,tchsh-ns = <4>;
+				cdns,tslch-ns = <4>;
 			};
 	};
 };
-- 
2.11.0

[U-Boot] [PATCH v5 3/5] config: cadence_spi: Remove defines read from DT

[Jason Rush]

Cleanup unused #define values that are read from the DT.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Cc: Marek Vasut <marex@denx.de>
---
Changes for v5:
   - Rebased
Changes for v4:
   - Rebased
Changes for v3:
   - None

 include/configs/k2g_evm.h        | 1 -
 include/configs/socfpga_common.h | 1 -
 include/configs/stv0991.h        | 1 -
 3 files changed, 3 deletions(-)

diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h
index df81c09d86..535e7124fc 100644
--- a/include/configs/k2g_evm.h
+++ b/include/configs/k2g_evm.h
@@ -93,7 +93,6 @@
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_CADENCE_QSPI
 #define CONFIG_CQSPI_REF_CLK 384000000
-#define CONFIG_CQSPI_DECODER 0x0
 #define CONFIG_BOUNCE_BUFFER
 #endif
 
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 66e7c4fc8b..ec8bb50050 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -184,7 +184,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
 unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_CQSPI_REF_CLK		cm_get_qspi_controller_clk_hz()
 #endif
-#define CONFIG_CQSPI_DECODER		0
 #define CONFIG_BOUNCE_BUFFER
 
 /*
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index c99fb676cb..fd96979bf8 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -63,7 +63,6 @@
 + * QSPI support
 + */
 #ifdef CONFIG_OF_CONTROL		/* QSPI is controlled via DT */
-#define CONFIG_CQSPI_DECODER		0
 #define CONFIG_CQSPI_REF_CLK		((30/4)/2)*1000*1000
 #define CONFIG_BOUNCE_BUFFER
 
-- 
2.11.0

[U-Boot] [PATCH v5 4/5] dts: k2g: Clean-up indentation

[Jason Rush]

Fix indentation of the QSPI node.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Cc: Marek Vasut <marex@denx.de>
---
Changes for v5:
   - Rebased
Changes for v4:
   - Rebased
Changes for v3:
   - Additional patch for clean-up

 arch/arm/dts/keystone-k2g-evm.dts | 75 +++++++++++++++++++--------------------
 1 file changed, 37 insertions(+), 38 deletions(-)

diff --git a/arch/arm/dts/keystone-k2g-evm.dts b/arch/arm/dts/keystone-k2g-evm.dts
index ba566a4328..ad746c7311 100644
--- a/arch/arm/dts/keystone-k2g-evm.dts
+++ b/arch/arm/dts/keystone-k2g-evm.dts
@@ -68,46 +68,45 @@
 &qspi {
 	status = "okay";
 
-        flash0: m25p80 at 0 {
-                compatible = "s25fl512s","spi-flash";
-                reg = <0>;
-                spi-tx-bus-width = <1>;
-                spi-rx-bus-width = <4>;
-                spi-max-frequency = <96000000>;
-                #address-cells = <1>;
-                #size-cells = <1>;
-                cdns,tshsl-ns = <392>;
-                cdns,tsd2d-ns = <392>;
-                cdns,tchsh-ns = <100>;
-                cdns,tslch-ns = <100>;
+	flash0: m25p80 at 0 {
+		compatible = "s25fl512s","spi-flash";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		cdns,tshsl-ns = <392>;
+		cdns,tsd2d-ns = <392>;
+		cdns,tchsh-ns = <100>;
+		cdns,tslch-ns = <100>;
 		block-size = <18>;
 
-
-                partition at 0 {
-                        label = "QSPI.u-boot-spl-os";
-                        reg = <0x00000000 0x00100000>;
-                };
-                partition at 1 {
-                        label = "QSPI.u-boot-env";
-                        reg = <0x00100000 0x00040000>;
-                };
-                partition at 2 {
-                        label = "QSPI.skern";
-                        reg = <0x00140000 0x0040000>;
-                };
-                partition at 3 {
-                        label = "QSPI.pmmc-firmware";
-                        reg = <0x00180000 0x0040000>;
-                };
-                partition at 4 {
-                        label = "QSPI.kernel";
-                        reg = <0x001C0000 0x0800000>;
-                };
-                partition at 5 {
-                        label = "QSPI.file-system";
-                        reg = <0x009C0000 0x3640000>;
-                };
-        };
+		partition at 0 {
+			label = "QSPI.u-boot-spl-os";
+			reg = <0x00000000 0x00100000>;
+		};
+		partition at 1 {
+			label = "QSPI.u-boot-env";
+			reg = <0x00100000 0x00040000>;
+		};
+		partition at 2 {
+			label = "QSPI.skern";
+			reg = <0x00140000 0x0040000>;
+		};
+		partition at 3 {
+			label = "QSPI.pmmc-firmware";
+			reg = <0x00180000 0x0040000>;
+		};
+		partition at 4 {
+			label = "QSPI.kernel";
+			reg = <0x001C0000 0x0800000>;
+		};
+		partition at 5 {
+			label = "QSPI.file-system";
+			reg = <0x009C0000 0x3640000>;
+		};
+	};
 };
 
 &mmc0 {
-- 
2.11.0

[U-Boot] [PATCH v5 5/5] dts: cadence_spi: Update documentation for DT bindings

[Jason Rush]

Update documentation to reflect adopting the Linux DT bindings.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Cc: Marek Vasut <marex@denx.de>
---
Changes for v5:
   - Rebased
Changes for v4:
   - Updated documentation

 doc/device-tree-bindings/spi/spi-cadence.txt | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/doc/device-tree-bindings/spi/spi-cadence.txt b/doc/device-tree-bindings/spi/spi-cadence.txt
index c1e2233d7c..74c82080fc 100644
--- a/doc/device-tree-bindings/spi/spi-cadence.txt
+++ b/doc/device-tree-bindings/spi/spi-cadence.txt
@@ -6,7 +6,10 @@ Required properties:
 - reg			: 1.Physical base address and size of SPI registers map.
 			  2. Physical base address & size of NOR Flash.
 - clocks		: Clock phandles (see clock bindings for details).
-- sram-size		: spi controller sram size.
+- cdns,fifo-depth	: Size of the data FIFO in words.
+- cdns,fifo-width	: Bus width of the data FIFO in bytes.
+- cdns,trigger-address	: 32-bit indirect AHB trigger address.
+- cdns,is-decoded-cs	: Flag to indicate whether decoder is used or not.
 - status		: enable in requried dts.
 
 connected flash properties
@@ -15,14 +18,14 @@ connected flash properties
 - spi-max-frequency	: Max supported spi frequency.
 - page-size		: Flash page size.
 - block-size		: Flash memory block size.
-- tshsl-ns		: Added delay in master reference clocks (ref_clk) for
+- cdns,tshsl-ns		: Added delay in master reference clocks (ref_clk) for
 			  the length that the master mode chip select outputs
 			  are de-asserted between transactions.
-- tsd2d-ns		: Delay in master reference clocks (ref_clk) between one
+- cdns,tsd2d-ns		: Delay in master reference clocks (ref_clk) between one
 			  chip select being de-activated and the activation of
 			  another.
-- tchsh-ns		: Delay in master reference clocks between last bit of
+- cdns,tchsh-ns		: Delay in master reference clocks between last bit of
 			  current transaction and de-asserting the device chip
 			  select (n_ss_out).
-- tslch-ns		: Delay in master reference clocks between setting
+- cdns,tslch-ns		: Delay in master reference clocks between setting
 			  n_ss_out low and first bit transfer
-- 
2.11.0

[U-Boot] [PATCH v5 0/5] spi: cadence_spi: Adopt Linux DT bindings

[Marek Vasut]

On 01/06/2018 07:17 PM, Jason Rush wrote:
> Adopt the Linux DT bindings. This also fixes an issue
> with the indaddrtrig register on the Cadence QSPI
> device being programmed with the wrong value for the
> socfpga arch.
> 
> Tested on TI K2G platform:
> Tested-by: Vignesh R <vigneshr@ti.com>
> 
> Tested on a socfpga-cyclonev board:
> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
> 
> Signed-off-by: Jason Rush <jarush@gmail.com>
> 
> Jason Rush (5):
>   spi: cadence_spi: Sync DT bindings with Linux
>   dts: cadence_spi: Sync DT bindings with Linux
>   config: cadence_spi: Remove defines read from DT
>   dts: k2g: Clean-up indentation
>   dts: cadence_spi: Update documentation for DT bindings
> 
>  arch/arm/dts/keystone-k2g-evm.dts             | 75 +++++++++++++--------------
>  arch/arm/dts/keystone-k2g.dtsi                |  5 +-
>  arch/arm/dts/socfpga.dtsi                     |  5 +-
>  arch/arm/dts/socfpga_arria10.dtsi             |  4 +-
>  arch/arm/dts/socfpga_arria5_socdk.dts         |  9 ++--
>  arch/arm/dts/socfpga_cyclone5_is1.dts         |  9 ++--
>  arch/arm/dts/socfpga_cyclone5_socdk.dts       |  9 ++--
>  arch/arm/dts/socfpga_cyclone5_sockit.dts      |  9 ++--
>  arch/arm/dts/socfpga_cyclone5_socrates.dts    |  9 ++--
>  arch/arm/dts/socfpga_cyclone5_sr1500.dts      |  9 ++--
>  arch/arm/dts/socfpga_cyclone5_vining_fpga.dts | 18 +++----
>  arch/arm/dts/stv0991.dts                      | 12 +++--
>  doc/device-tree-bindings/spi/spi-cadence.txt  | 13 +++--
>  drivers/spi/cadence_qspi.c                    | 20 ++++---
>  drivers/spi/cadence_qspi.h                    |  6 ++-
>  drivers/spi/cadence_qspi_apb.c                | 15 ++----
>  include/configs/k2g_evm.h                     |  1 -
>  include/configs/socfpga_common.h              |  1 -
>  include/configs/stv0991.h                     |  1 -
>  19 files changed, 113 insertions(+), 117 deletions(-)
> 

Whole series

Acked-by: Marek Vasut <marex@denx.de>

So please apply after 2018.01 is out .
Thanks

-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH v5 0/5] spi: cadence_spi: Adopt Linux DT bindings

[Simon Goldschmidt]

On 07.01.2018 12:41, Marek Vasut wrote:
> On 01/06/2018 07:17 PM, Jason Rush wrote:
>> Adopt the Linux DT bindings. This also fixes an issue
>> with the indaddrtrig register on the Cadence QSPI
>> device being programmed with the wrong value for the
>> socfpga arch.
>>
>> Tested on TI K2G platform:
>> Tested-by: Vignesh R <vigneshr@ti.com>
>>
>> Tested on a socfpga-cyclonev board:
>> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>>
>> Signed-off-by: Jason Rush <jarush@gmail.com>
>>
>> Jason Rush (5):
>>    spi: cadence_spi: Sync DT bindings with Linux
>>    dts: cadence_spi: Sync DT bindings with Linux
>>    config: cadence_spi: Remove defines read from DT
>>    dts: k2g: Clean-up indentation
>>    dts: cadence_spi: Update documentation for DT bindings
>>
>>   arch/arm/dts/keystone-k2g-evm.dts             | 75 +++++++++++++--------------
>>   arch/arm/dts/keystone-k2g.dtsi                |  5 +-
>>   arch/arm/dts/socfpga.dtsi                     |  5 +-
>>   arch/arm/dts/socfpga_arria10.dtsi             |  4 +-
>>   arch/arm/dts/socfpga_arria5_socdk.dts         |  9 ++--
>>   arch/arm/dts/socfpga_cyclone5_is1.dts         |  9 ++--
>>   arch/arm/dts/socfpga_cyclone5_socdk.dts       |  9 ++--
>>   arch/arm/dts/socfpga_cyclone5_sockit.dts      |  9 ++--
>>   arch/arm/dts/socfpga_cyclone5_socrates.dts    |  9 ++--
>>   arch/arm/dts/socfpga_cyclone5_sr1500.dts      |  9 ++--
>>   arch/arm/dts/socfpga_cyclone5_vining_fpga.dts | 18 +++----
>>   arch/arm/dts/stv0991.dts                      | 12 +++--
>>   doc/device-tree-bindings/spi/spi-cadence.txt  | 13 +++--
>>   drivers/spi/cadence_qspi.c                    | 20 ++++---
>>   drivers/spi/cadence_qspi.h                    |  6 ++-
>>   drivers/spi/cadence_qspi_apb.c                | 15 ++----
>>   include/configs/k2g_evm.h                     |  1 -
>>   include/configs/socfpga_common.h              |  1 -
>>   include/configs/stv0991.h                     |  1 -
>>   19 files changed, 113 insertions(+), 117 deletions(-)
>>
> Whole series
>
> Acked-by: Marek Vasut <marex@denx.de>
>
> So please apply after 2018.01 is out .
> Thanks

Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Can this be applied now?

Thanks,
Simon

[U-Boot] [PATCH v5 0/5] spi: cadence_spi: Adopt Linux DT bindings

[Simon Goldschmidt]

On 15.01.2018 13:03, Simon Goldschmidt wrote:
> On 07.01.2018 12:41, Marek Vasut wrote:
>> On 01/06/2018 07:17 PM, Jason Rush wrote:
>>> Adopt the Linux DT bindings. This also fixes an issue
>>> with the indaddrtrig register on the Cadence QSPI
>>> device being programmed with the wrong value for the
>>> socfpga arch.
>>>
>>> Tested on TI K2G platform:
>>> Tested-by: Vignesh R <vigneshr@ti.com>
>>>
>>> Tested on a socfpga-cyclonev board:
>>> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>>>
>>> Signed-off-by: Jason Rush <jarush@gmail.com>
>>>
>>> Jason Rush (5):
>>>    spi: cadence_spi: Sync DT bindings with Linux
>>>    dts: cadence_spi: Sync DT bindings with Linux
>>>    config: cadence_spi: Remove defines read from DT
>>>    dts: k2g: Clean-up indentation
>>>    dts: cadence_spi: Update documentation for DT bindings
>>>
>>>   arch/arm/dts/keystone-k2g-evm.dts             | 75 
>>> +++++++++++++--------------
>>>   arch/arm/dts/keystone-k2g.dtsi                |  5 +-
>>>   arch/arm/dts/socfpga.dtsi                     |  5 +-
>>>   arch/arm/dts/socfpga_arria10.dtsi             |  4 +-
>>>   arch/arm/dts/socfpga_arria5_socdk.dts         |  9 ++--
>>>   arch/arm/dts/socfpga_cyclone5_is1.dts         |  9 ++--
>>>   arch/arm/dts/socfpga_cyclone5_socdk.dts       |  9 ++--
>>>   arch/arm/dts/socfpga_cyclone5_sockit.dts      |  9 ++--
>>>   arch/arm/dts/socfpga_cyclone5_socrates.dts    |  9 ++--
>>>   arch/arm/dts/socfpga_cyclone5_sr1500.dts      |  9 ++--
>>>   arch/arm/dts/socfpga_cyclone5_vining_fpga.dts | 18 +++----
>>>   arch/arm/dts/stv0991.dts                      | 12 +++--
>>>   doc/device-tree-bindings/spi/spi-cadence.txt  | 13 +++--
>>>   drivers/spi/cadence_qspi.c                    | 20 ++++---
>>>   drivers/spi/cadence_qspi.h                    |  6 ++-
>>>   drivers/spi/cadence_qspi_apb.c                | 15 ++----
>>>   include/configs/k2g_evm.h                     |  1 -
>>>   include/configs/socfpga_common.h              |  1 -
>>>   include/configs/stv0991.h                     |  1 -
>>>   19 files changed, 113 insertions(+), 117 deletions(-)
>>>
>> Whole series
>>
>> Acked-by: Marek Vasut <marex@denx.de>
>>
>> So please apply after 2018.01 is out .
>> Thanks
>
> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>
> Can this be applied now?

Ping?
The merge window is now less than 1 week for 2018.03 if I'm not 
mistaken. Can you apply this, please?


Thanks,

Simon

[U-Boot] [PATCH v5 1/5] spi: cadence_spi: Sync DT bindings with Linux

[Jagan Teki]

On Sat, Jan 6, 2018 at 11:47 PM, Jason Rush <jarush@gmail.com> wrote:
> Adopt the Linux DT bindings. This also fixes an issue
> with the indaddrtrig register on the Cadence QSPI
> device being programmed with the wrong value for the
> socfpga arch.
>
> Tested on TI K2G platform:
> Tested-by: Vignesh R <vigneshr@ti.com>
>
> Tested on a socfpga-cyclonev board:
> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>
> Signed-off-by: Jason Rush <jarush@gmail.com>
> Cc: Marek Vasut <marex@denx.de>
> ---
> Changes for v5:
>    - Rebased
> Changes for v4:
>    - Rebased
> Changes for v3:
>    - None
>
>  drivers/spi/cadence_qspi.c     | 20 ++++++++++++--------
>  drivers/spi/cadence_qspi.h     |  6 +++++-
>  drivers/spi/cadence_qspi_apb.c | 15 ++++-----------
>  3 files changed, 21 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index 9a6e41f330..991a7160bd 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -212,7 +212,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen,
>
>         /* Set Chip select */
>         cadence_qspi_apb_chipselect(base, spi_chip_select(dev),
> -                                   CONFIG_CQSPI_DECODER);
> +                                   plat->is_decoded_cs);
>
>         if ((flags & SPI_XFER_END) || (flags == 0)) {
>                 if (priv->cmd_len == 0) {
> @@ -296,7 +296,11 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
>
>         plat->regbase = (void *)data[0];
>         plat->ahbbase = (void *)data[2];
> -       plat->sram_size = fdtdec_get_int(blob, node, "sram-size", 128);
> +       plat->is_decoded_cs = fdtdec_get_bool(blob, node, "cdns,is-decoded-cs");
> +       plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128);
> +       plat->fifo_width = fdtdec_get_uint(blob, node, "cdns,fifo-width", 4);
> +       plat->trigger_address = fdtdec_get_uint(blob, node,
> +               "cdns,trigger-address", 0);

fix these checkpatch warnings.

>
>         /* All other paramters are embedded in the child node */
>         subnode = fdt_first_subnode(blob, node);
> @@ -310,12 +314,12 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
>                                        500000);
>
>         /* Read other parameters from DT */
> -       plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256);
> -       plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16);
> -       plat->tshsl_ns = fdtdec_get_int(blob, subnode, "tshsl-ns", 200);
> -       plat->tsd2d_ns = fdtdec_get_int(blob, subnode, "tsd2d-ns", 255);
> -       plat->tchsh_ns = fdtdec_get_int(blob, subnode, "tchsh-ns", 20);
> -       plat->tslch_ns = fdtdec_get_int(blob, subnode, "tslch-ns", 20);
> +       plat->page_size = fdtdec_get_uint(blob, subnode, "page-size", 256);
> +       plat->block_size = fdtdec_get_uint(blob, subnode, "block-size", 16);
> +       plat->tshsl_ns = fdtdec_get_uint(blob, subnode, "cdns,tshsl-ns", 200);
> +       plat->tsd2d_ns = fdtdec_get_uint(blob, subnode, "cdns,tsd2d-ns", 255);
> +       plat->tchsh_ns = fdtdec_get_uint(blob, subnode, "cdns,tchsh-ns", 20);
> +       plat->tslch_ns = fdtdec_get_uint(blob, subnode, "cdns,tslch-ns", 20);
>
>         debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n",
>               __func__, plat->regbase, plat->ahbbase, plat->max_hz,
> diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
> index d1927a4003..83154210bd 100644
> --- a/drivers/spi/cadence_qspi.h
> +++ b/drivers/spi/cadence_qspi.h
> @@ -18,14 +18,18 @@ struct cadence_spi_platdata {
>         unsigned int    max_hz;
>         void            *regbase;
>         void            *ahbbase;
> +       bool            is_decoded_cs;
> +       u32             fifo_depth;
> +       u32             fifo_width;
> +       u32             trigger_address;
>
> +       // Flash parameters

fix with proper single line comment /* ... */

except these,

Reviewed-by: Jagan Teki <jagan@openedev.com>

[U-Boot] [PATCH v5 3/5] config: cadence_spi: Remove defines read from DT

[Jagan Teki]

On Sat, Jan 6, 2018 at 11:48 PM, Jason Rush <jarush@gmail.com> wrote:
> Cleanup unused #define values that are read from the DT.
>
> Tested on TI K2G platform:
> Tested-by: Vignesh R <vigneshr@ti.com>
>
> Tested on a socfpga-cyclonev board:
> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>
> Signed-off-by: Jason Rush <jarush@gmail.com>
> Cc: Marek Vasut <marex@denx.de>
> ---

Reviewed-by: Jagan Teki <jagan@openedev.com>

[U-Boot] [PATCH v5 2/5] dts: cadence_spi: Sync DT bindings with Linux

[Jagan Teki]

On Sat, Jan 6, 2018 at 11:47 PM, Jason Rush <jarush@gmail.com> wrote:
> Adopt the Linux DT bindings and clean-up duplicate
> and unused values.
>
> Tested on TI K2G platform:
> Tested-by: Vignesh R <vigneshr@ti.com>
>
> Tested on a socfpga-cyclonev board:
> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>
> Signed-off-by: Jason Rush <jarush@gmail.com>
> Cc: Marek Vasut <marex@denx.de>
> ---

checkpatch errors/warnings?

[U-Boot] [PATCH v5 4/5] dts: k2g: Clean-up indentation

[Jagan Teki]

On Sat, Jan 6, 2018 at 11:48 PM, Jason Rush <jarush@gmail.com> wrote:
> Fix indentation of the QSPI node.
>
> Tested on TI K2G platform:
> Tested-by: Vignesh R <vigneshr@ti.com>
>
> Tested on a socfpga-cyclonev board:
> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>
> Signed-off-by: Jason Rush <jarush@gmail.com>
> Cc: Marek Vasut <marex@denx.de>
> ---

Reviewed-by: Jagan Teki <jagan@openedev.com>

[U-Boot] [PATCH v5 5/5] dts: cadence_spi: Update documentation for DT bindings

[Jagan Teki]

On Sat, Jan 6, 2018 at 11:48 PM, Jason Rush <jarush@gmail.com> wrote:
> Update documentation to reflect adopting the Linux DT bindings.
>
> Tested on TI K2G platform:
> Tested-by: Vignesh R <vigneshr@ti.com>
>
> Tested on a socfpga-cyclonev board:
> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>
> Signed-off-by: Jason Rush <jarush@gmail.com>
> Cc: Marek Vasut <marex@denx.de>
> ---

Reviewed-by: Jagan Teki <jagan@openedev.com>

[U-Boot] [PATCH v5 2/5] dts: cadence_spi: Sync DT bindings with Linux

[Jason Rush]

On 1/23/2018 3:16 AM, Jagan Teki wrote:
> On Sat, Jan 6, 2018 at 11:47 PM, Jason Rush <jarush@gmail.com> wrote:
>> Adopt the Linux DT bindings and clean-up duplicate
>> and unused values.
>>
>> Tested on TI K2G platform:
>> Tested-by: Vignesh R <vigneshr@ti.com>
>>
>> Tested on a socfpga-cyclonev board:
>> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>>
>> Signed-off-by: Jason Rush <jarush@gmail.com>
>> Cc: Marek Vasut <marex@denx.de>
>> ---
> checkpatch errors/warnings?

checkpatch complains about using spaces for indentation in the
arch/arm/dts/keystone-k2g-evm.dts file.  The entire flash node
was originally indented using spaces in this file before this patch,
so I kept the indentation as it was originally when I updated this
file in patch (2/5).  I then fixed all the indentation in this file in
commit 4/5 in this series.  Is this okay?

-- Jason

[U-Boot] [PATCH v5 2/5] dts: cadence_spi: Sync DT bindings with Linux

[Jagan Teki]

On Tue, Jan 23, 2018 at 7:45 PM, Jason Rush <jarush@gmail.com> wrote:
> On 1/23/2018 3:16 AM, Jagan Teki wrote:
>> On Sat, Jan 6, 2018 at 11:47 PM, Jason Rush <jarush@gmail.com> wrote:
>>> Adopt the Linux DT bindings and clean-up duplicate
>>> and unused values.
>>>
>>> Tested on TI K2G platform:
>>> Tested-by: Vignesh R <vigneshr@ti.com>
>>>
>>> Tested on a socfpga-cyclonev board:
>>> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>>>
>>> Signed-off-by: Jason Rush <jarush@gmail.com>
>>> Cc: Marek Vasut <marex@denx.de>
>>> ---
>> checkpatch errors/warnings?
>
> checkpatch complains about using spaces for indentation in the
> arch/arm/dts/keystone-k2g-evm.dts file.  The entire flash node
> was originally indented using spaces in this file before this patch,
> so I kept the indentation as it was originally when I updated this
> file in patch (2/5).  I then fixed all the indentation in this file in
> commit 4/5 in this series.  Is this okay?

Better to squash and update commit message.

[U-Boot] [PATCH v5 2/5] dts: cadence_spi: Sync DT bindings with Linux

[Jason Rush]

On 1/23/2018 8:25 AM, Jagan Teki wrote:
> On Tue, Jan 23, 2018 at 7:45 PM, Jason Rush <jarush@gmail.com> wrote:
>> On 1/23/2018 3:16 AM, Jagan Teki wrote:
>>> On Sat, Jan 6, 2018 at 11:47 PM, Jason Rush <jarush@gmail.com> wrote:
>>>> Adopt the Linux DT bindings and clean-up duplicate
>>>> and unused values.
>>>>
>>>> Tested on TI K2G platform:
>>>> Tested-by: Vignesh R <vigneshr@ti.com>
>>>>
>>>> Tested on a socfpga-cyclonev board:
>>>> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>>>>
>>>> Signed-off-by: Jason Rush <jarush@gmail.com>
>>>> Cc: Marek Vasut <marex@denx.de>
>>>> ---
>>> checkpatch errors/warnings?
>> checkpatch complains about using spaces for indentation in the
>> arch/arm/dts/keystone-k2g-evm.dts file.  The entire flash node
>> was originally indented using spaces in this file before this patch,
>> so I kept the indentation as it was originally when I updated this
>> file in patch (2/5).  I then fixed all the indentation in this file in
>> commit 4/5 in this series.  Is this okay?
> Better to squash and update commit message.

Will do.  Do you want me to add your reviewed-by tag to the
commit messages?

[U-Boot] [PATCH v5 2/5] dts: cadence_spi: Sync DT bindings with Linux

[Jagan Teki]

On Tue, Jan 23, 2018 at 8:42 PM, Jason Rush <jarush@gmail.com> wrote:
> On 1/23/2018 8:25 AM, Jagan Teki wrote:
>> On Tue, Jan 23, 2018 at 7:45 PM, Jason Rush <jarush@gmail.com> wrote:
>>> On 1/23/2018 3:16 AM, Jagan Teki wrote:
>>>> On Sat, Jan 6, 2018 at 11:47 PM, Jason Rush <jarush@gmail.com> wrote:
>>>>> Adopt the Linux DT bindings and clean-up duplicate
>>>>> and unused values.
>>>>>
>>>>> Tested on TI K2G platform:
>>>>> Tested-by: Vignesh R <vigneshr@ti.com>
>>>>>
>>>>> Tested on a socfpga-cyclonev board:
>>>>> Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
>>>>>
>>>>> Signed-off-by: Jason Rush <jarush@gmail.com>
>>>>> Cc: Marek Vasut <marex@denx.de>
>>>>> ---
>>>> checkpatch errors/warnings?
>>> checkpatch complains about using spaces for indentation in the
>>> arch/arm/dts/keystone-k2g-evm.dts file.  The entire flash node
>>> was originally indented using spaces in this file before this patch,
>>> so I kept the indentation as it was originally when I updated this
>>> file in patch (2/5).  I then fixed all the indentation in this file in
>>> commit 4/5 in this series.  Is this okay?
>> Better to squash and update commit message.
>
> Will do.  Do you want me to add your reviewed-by tag to the
> commit messages?

yes along with tags from cover-letter patch because patchwork didn't pick those.