* [PATCH 1/2] powerpc/xive: Move definition of ESB bits
@ 2018-01-12 2:39 Benjamin Herrenschmidt
2018-01-12 2:39 ` [PATCH 2/2] powerpc/xive: Add interrupt flag to disable automatic EOI Benjamin Herrenschmidt
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Benjamin Herrenschmidt @ 2018-01-12 2:39 UTC (permalink / raw)
To: linuxppc-dev
>From xive.h to xive-regs.h since it's a HW register definition
and it can be used from assembly
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/xive-regs.h | 35 +++++++++++++++++++++++++++++++++++
arch/powerpc/include/asm/xive.h | 35 -----------------------------------
2 files changed, 35 insertions(+), 35 deletions(-)
diff --git a/arch/powerpc/include/asm/xive-regs.h b/arch/powerpc/include/asm/xive-regs.h
index 1d3f2be5ae39..fa4288822b68 100644
--- a/arch/powerpc/include/asm/xive-regs.h
+++ b/arch/powerpc/include/asm/xive-regs.h
@@ -9,6 +9,41 @@
#ifndef _ASM_POWERPC_XIVE_REGS_H
#define _ASM_POWERPC_XIVE_REGS_H
+/*
+ * "magic" Event State Buffer (ESB) MMIO offsets.
+ *
+ * Each interrupt source has a 2-bit state machine called ESB
+ * which can be controlled by MMIO. It's made of 2 bits, P and
+ * Q. P indicates that an interrupt is pending (has been sent
+ * to a queue and is waiting for an EOI). Q indicates that the
+ * interrupt has been triggered while pending.
+ *
+ * This acts as a coalescing mechanism in order to guarantee
+ * that a given interrupt only occurs at most once in a queue.
+ *
+ * When doing an EOI, the Q bit will indicate if the interrupt
+ * needs to be re-triggered.
+ *
+ * The following offsets into the ESB MMIO allow to read or
+ * manipulate the PQ bits. They must be used with an 8-bytes
+ * load instruction. They all return the previous state of the
+ * interrupt (atomically).
+ *
+ * Additionally, some ESB pages support doing an EOI via a
+ * store at 0 and some ESBs support doing a trigger via a
+ * separate trigger page.
+ */
+#define XIVE_ESB_STORE_EOI 0x400 /* Store */
+#define XIVE_ESB_LOAD_EOI 0x000 /* Load */
+#define XIVE_ESB_GET 0x800 /* Load */
+#define XIVE_ESB_SET_PQ_00 0xc00 /* Load */
+#define XIVE_ESB_SET_PQ_01 0xd00 /* Load */
+#define XIVE_ESB_SET_PQ_10 0xe00 /* Load */
+#define XIVE_ESB_SET_PQ_11 0xf00 /* Load */
+
+#define XIVE_ESB_VAL_P 0x2
+#define XIVE_ESB_VAL_Q 0x1
+
/*
* Thread Management (aka "TM") registers
*/
diff --git a/arch/powerpc/include/asm/xive.h b/arch/powerpc/include/asm/xive.h
index 371fbebf1ec9..0e77005cf021 100644
--- a/arch/powerpc/include/asm/xive.h
+++ b/arch/powerpc/include/asm/xive.h
@@ -72,41 +72,6 @@ struct xive_q {
atomic_t pending_count;
};
-/*
- * "magic" Event State Buffer (ESB) MMIO offsets.
- *
- * Each interrupt source has a 2-bit state machine called ESB
- * which can be controlled by MMIO. It's made of 2 bits, P and
- * Q. P indicates that an interrupt is pending (has been sent
- * to a queue and is waiting for an EOI). Q indicates that the
- * interrupt has been triggered while pending.
- *
- * This acts as a coalescing mechanism in order to guarantee
- * that a given interrupt only occurs at most once in a queue.
- *
- * When doing an EOI, the Q bit will indicate if the interrupt
- * needs to be re-triggered.
- *
- * The following offsets into the ESB MMIO allow to read or
- * manipulate the PQ bits. They must be used with an 8-bytes
- * load instruction. They all return the previous state of the
- * interrupt (atomically).
- *
- * Additionally, some ESB pages support doing an EOI via a
- * store at 0 and some ESBs support doing a trigger via a
- * separate trigger page.
- */
-#define XIVE_ESB_STORE_EOI 0x400 /* Store */
-#define XIVE_ESB_LOAD_EOI 0x000 /* Load */
-#define XIVE_ESB_GET 0x800 /* Load */
-#define XIVE_ESB_SET_PQ_00 0xc00 /* Load */
-#define XIVE_ESB_SET_PQ_01 0xd00 /* Load */
-#define XIVE_ESB_SET_PQ_10 0xe00 /* Load */
-#define XIVE_ESB_SET_PQ_11 0xf00 /* Load */
-
-#define XIVE_ESB_VAL_P 0x2
-#define XIVE_ESB_VAL_Q 0x1
-
/* Global enable flags for the XIVE support */
extern bool __xive_enabled;
--
2.14.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] powerpc/xive: Add interrupt flag to disable automatic EOI
2018-01-12 2:39 [PATCH 1/2] powerpc/xive: Move definition of ESB bits Benjamin Herrenschmidt
@ 2018-01-12 2:39 ` Benjamin Herrenschmidt
2018-01-15 10:10 ` [1/2] powerpc/xive: Move definition of ESB bits Michael Ellerman
2018-01-22 3:34 ` Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Benjamin Herrenschmidt @ 2018-01-12 2:39 UTC (permalink / raw)
To: linuxppc-dev
This will be used by KVM in order to keep escalation interrupts
in the non-EOI (masked) state after they fire. They will be
re-enabled directly in HW by KVM when needed.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/xive.h | 3 +++
arch/powerpc/sysdev/xive/common.c | 3 ++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/xive.h b/arch/powerpc/include/asm/xive.h
index 0e77005cf021..b619a5585cd6 100644
--- a/arch/powerpc/include/asm/xive.h
+++ b/arch/powerpc/include/asm/xive.h
@@ -58,6 +58,9 @@ struct xive_irq_data {
#define XIVE_IRQ_FLAG_EOI_FW 0x10
#define XIVE_IRQ_FLAG_H_INT_ESB 0x20
+/* Special flag set by KVM for excalation interrupts */
+#define XIVE_IRQ_NO_EOI 0x80
+
#define XIVE_INVALID_CHIP_ID -1
/* A queue tracking structure in a CPU */
diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c
index 838ebdbfe4c5..40c06110821c 100644
--- a/arch/powerpc/sysdev/xive/common.c
+++ b/arch/powerpc/sysdev/xive/common.c
@@ -367,7 +367,8 @@ static void xive_irq_eoi(struct irq_data *d)
* EOI the source if it hasn't been disabled and hasn't
* been passed-through to a KVM guest
*/
- if (!irqd_irq_disabled(d) && !irqd_is_forwarded_to_vcpu(d))
+ if (!irqd_irq_disabled(d) && !irqd_is_forwarded_to_vcpu(d) &&
+ !(xd->flags & XIVE_IRQ_NO_EOI))
xive_do_source_eoi(irqd_to_hwirq(d), xd);
/*
--
2.14.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [1/2] powerpc/xive: Move definition of ESB bits
2018-01-12 2:39 [PATCH 1/2] powerpc/xive: Move definition of ESB bits Benjamin Herrenschmidt
2018-01-12 2:39 ` [PATCH 2/2] powerpc/xive: Add interrupt flag to disable automatic EOI Benjamin Herrenschmidt
@ 2018-01-15 10:10 ` Michael Ellerman
2018-01-22 3:34 ` Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Michael Ellerman @ 2018-01-15 10:10 UTC (permalink / raw)
To: Benjamin Herrenschmidt, linuxppc-dev
On Fri, 2018-01-12 at 02:39:27 UTC, Benjamin Herrenschmidt wrote:
> >From xive.h to xive-regs.h since it's a HW register definition
> and it can be used from assembly
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Series applied to topics/ppc-kvm, thanks.
https://git.kernel.org/powerpc/c/12c1f339cd49119e39063ae67f02d9
cheers
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [1/2] powerpc/xive: Move definition of ESB bits
2018-01-12 2:39 [PATCH 1/2] powerpc/xive: Move definition of ESB bits Benjamin Herrenschmidt
2018-01-12 2:39 ` [PATCH 2/2] powerpc/xive: Add interrupt flag to disable automatic EOI Benjamin Herrenschmidt
2018-01-15 10:10 ` [1/2] powerpc/xive: Move definition of ESB bits Michael Ellerman
@ 2018-01-22 3:34 ` Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Michael Ellerman @ 2018-01-22 3:34 UTC (permalink / raw)
To: Benjamin Herrenschmidt, linuxppc-dev
On Fri, 2018-01-12 at 02:39:27 UTC, Benjamin Herrenschmidt wrote:
> >From xive.h to xive-regs.h since it's a HW register definition
> and it can be used from assembly
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/12c1f339cd49119e39063ae67f02d9
cheers
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-01-22 3:34 UTC | newest]
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2018-01-12 2:39 [PATCH 1/2] powerpc/xive: Move definition of ESB bits Benjamin Herrenschmidt
2018-01-12 2:39 ` [PATCH 2/2] powerpc/xive: Add interrupt flag to disable automatic EOI Benjamin Herrenschmidt
2018-01-15 10:10 ` [1/2] powerpc/xive: Move definition of ESB bits Michael Ellerman
2018-01-22 3:34 ` Michael Ellerman
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