From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Cc: Maxime Ripard
<maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v2 2/6] pinctrl: sunxi: add support for the Allwinner H6 main pin controller
Date: Thu, 8 Feb 2018 14:16:43 -0600 [thread overview]
Message-ID: <20180208201643.vqj7o5v5rzlwsoch@rob-hp-laptop> (raw)
In-Reply-To: <20180203154942.63566-3-icenowy-h8G6r0blFSE@public.gmane.org>
On Sat, Feb 03, 2018 at 11:49:38PM +0800, Icenowy Zheng wrote:
> The Allwinner H6 SoC has two pin controllers, one main controller
> (called CPUX-PORT in user manual) and one controller in CPUs power
> domain (called CPUS-PORT in user manual).
>
> This commit introduces support for the main pin controller on H6.
>
> The pin bank A and B are not wired out and hidden from the SoC's
> documents, however it's shown that the "ATE" (an AC200 chip
> co-packaged with the H6 die) is connected to the main SoC die via these
> pin banks. The information about these banks is just copied from the BSP
> pinctrl driver, but re-formatted to fit the mainline pinctrl driver
> format.
>
> Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
> ---
> Changes in v2:
> - Dropped without_bus_gate description.
> - Switched to SPDX license identifier.
>
> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> drivers/pinctrl/sunxi/Kconfig | 4 +
> drivers/pinctrl/sunxi/Makefile | 1 +
> drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 676 +++++++++++++++++++++
> 4 files changed, 682 insertions(+)
> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-sunxi@googlegroups.com
Subject: Re: [PATCH v2 2/6] pinctrl: sunxi: add support for the Allwinner H6 main pin controller
Date: Thu, 8 Feb 2018 14:16:43 -0600 [thread overview]
Message-ID: <20180208201643.vqj7o5v5rzlwsoch@rob-hp-laptop> (raw)
In-Reply-To: <20180203154942.63566-3-icenowy@aosc.io>
On Sat, Feb 03, 2018 at 11:49:38PM +0800, Icenowy Zheng wrote:
> The Allwinner H6 SoC has two pin controllers, one main controller
> (called CPUX-PORT in user manual) and one controller in CPUs power
> domain (called CPUS-PORT in user manual).
>
> This commit introduces support for the main pin controller on H6.
>
> The pin bank A and B are not wired out and hidden from the SoC's
> documents, however it's shown that the "ATE" (an AC200 chip
> co-packaged with the H6 die) is connected to the main SoC die via these
> pin banks. The information about these banks is just copied from the BSP
> pinctrl driver, but re-formatted to fit the mainline pinctrl driver
> format.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
> Changes in v2:
> - Dropped without_bus_gate description.
> - Switched to SPDX license identifier.
>
> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
Acked-by: Rob Herring <robh@kernel.org>
> drivers/pinctrl/sunxi/Kconfig | 4 +
> drivers/pinctrl/sunxi/Makefile | 1 +
> drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 676 +++++++++++++++++++++
> 4 files changed, 682 insertions(+)
> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/6] pinctrl: sunxi: add support for the Allwinner H6 main pin controller
Date: Thu, 8 Feb 2018 14:16:43 -0600 [thread overview]
Message-ID: <20180208201643.vqj7o5v5rzlwsoch@rob-hp-laptop> (raw)
In-Reply-To: <20180203154942.63566-3-icenowy@aosc.io>
On Sat, Feb 03, 2018 at 11:49:38PM +0800, Icenowy Zheng wrote:
> The Allwinner H6 SoC has two pin controllers, one main controller
> (called CPUX-PORT in user manual) and one controller in CPUs power
> domain (called CPUS-PORT in user manual).
>
> This commit introduces support for the main pin controller on H6.
>
> The pin bank A and B are not wired out and hidden from the SoC's
> documents, however it's shown that the "ATE" (an AC200 chip
> co-packaged with the H6 die) is connected to the main SoC die via these
> pin banks. The information about these banks is just copied from the BSP
> pinctrl driver, but re-formatted to fit the mainline pinctrl driver
> format.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
> Changes in v2:
> - Dropped without_bus_gate description.
> - Switched to SPDX license identifier.
>
> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
Acked-by: Rob Herring <robh@kernel.org>
> drivers/pinctrl/sunxi/Kconfig | 4 +
> drivers/pinctrl/sunxi/Makefile | 1 +
> drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 676 +++++++++++++++++++++
> 4 files changed, 682 insertions(+)
> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
next prev parent reply other threads:[~2018-02-08 20:16 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-03 15:49 [PATCH v2 0/6] Initial Allwinner H6 support Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` [PATCH v2 3/6] clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
[not found] ` <20180203154942.63566-1-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-03 15:49 ` [PATCH v2 1/6] pinctrl: sunxi: support pin controllers with holes among IRQ banks Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
[not found] ` <20180203154942.63566-2-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-07 8:51 ` Maxime Ripard
2018-02-07 8:51 ` Maxime Ripard
2018-02-07 8:51 ` Maxime Ripard
2018-02-03 15:49 ` [PATCH v2 2/6] pinctrl: sunxi: add support for the Allwinner H6 main pin controller Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
[not found] ` <20180203154942.63566-3-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-08 20:16 ` Rob Herring [this message]
2018-02-08 20:16 ` Rob Herring
2018-02-08 20:16 ` Rob Herring
2018-02-13 0:38 ` [linux-sunxi] " André Przywara
2018-02-13 0:38 ` André Przywara
2018-02-13 0:38 ` André Przywara
2018-02-03 15:49 ` [PATCH v2 4/6] clk: sunxi-ng: add support for the Allwinner H6 CCU Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-07 9:02 ` Maxime Ripard
2018-02-07 9:02 ` Maxime Ripard
2018-02-07 9:11 ` Icenowy Zheng
2018-02-07 9:11 ` Icenowy Zheng
2018-02-07 9:11 ` Icenowy Zheng
2018-02-07 18:49 ` Maxime Ripard
2018-02-07 18:49 ` Maxime Ripard
2018-02-08 20:18 ` Rob Herring
2018-02-08 20:18 ` Rob Herring
2018-02-03 15:49 ` [PATCH v2 5/6] arm64: allwinner: h6: add the basical Allwinner H6 DTSI file Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-11 23:26 ` [linux-sunxi] " André Przywara
2018-02-11 23:26 ` André Przywara
2018-02-12 9:16 ` Philippe Ombredanne
2018-02-12 9:16 ` Philippe Ombredanne
2018-02-12 9:16 ` Philippe Ombredanne
2018-02-03 15:49 ` [PATCH v2 6/6] arm64: allwinner: h6: add support for Pine H64 board Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
2018-02-03 15:49 ` Icenowy Zheng
[not found] ` <20180203154942.63566-7-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-11 23:26 ` André Przywara
2018-02-11 23:26 ` [linux-sunxi] " André Przywara
2018-02-11 23:26 ` André Przywara
2018-02-22 12:43 ` [PATCH v2 0/6] Initial Allwinner H6 support Linus Walleij
2018-02-22 12:43 ` Linus Walleij
2018-02-22 12:43 ` Linus Walleij
2018-02-22 12:43 ` Linus Walleij
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