From: Rajendra Nayak <rnayak@codeaurora.org> To: andy.gross@linaro.org Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, sboyd@codeaurora.org, evgreen@chromium.org, bjorn.andersson@linaro.org, dianders@chromium.org, Rajendra Nayak <rnayak@codeaurora.org> Subject: [PATCH v4 4/4] arm64: dts: sdm845: Add serial console support Date: Fri, 16 Feb 2018 11:35:03 +0530 [thread overview] Message-ID: <20180216060503.22006-5-rnayak@codeaurora.org> (raw) In-Reply-To: <20180216060503.22006-1-rnayak@codeaurora.org> Add the qup uart node and geni se instance needed to support the serial console on the MTP. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 39 +++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 39 +++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 979ab49913f1..2a1ed55b703e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -12,4 +12,43 @@ / { model = "Qualcomm Technologies, Inc. SDM845 MTP"; compatible = "qcom,sdm845-mtp"; + + aliases { + serial0 = &qup_uart2; + }; + + chosen { + stdout-path = "serial0"; + }; +}; + +&soc { + geni-se@ac0000 { + serial@a84000 { + status = "okay"; + }; + }; + + pinctrl@3400000 { + qup-uart2-default { + pinconf_tx { + pins = "gpio4"; + drive-strength = <2>; + bias-disable; + }; + + pinconf_rx { + pins = "gpio5"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + qup-uart2-sleep { + pinconf { + pins = "gpio4", "gpio5"; + bias-pull-down; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c46e726af621..7b5c16eb63b7 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -6,6 +6,7 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/qcom,gcc-sdm845.h> / { interrupt-parent = <&intc>; @@ -195,6 +196,20 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + + qup_uart2_default: qup-uart2-default { + pinmux { + function = "qup9"; + pins = "gpio4", "gpio5"; + }; + }; + + qup_uart2_sleep: qup-uart2-sleep { + pinmux { + function = "gpio"; + pins = "gpio4", "gpio5"; + }; + }; }; timer@17c90000 { @@ -273,5 +288,29 @@ #interrupt-cells = <4>; cell-index = <0>; }; + + geni-se@ac0000 { + compatible = "qcom,geni-se-qup"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0xac0000 0x6000>; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + clock-names = "m-ahb", "s-ahb"; + + qup_uart2: serial@a84000 { + compatible = "qcom,geni-debug-uart"; + reg = <0xa84000 0x4000>; + reg-names = "se-phys"; + clock-names = "se-clk"; + clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qup_uart2_default>; + pinctrl-1 = <&qup_uart2_sleep>; + interrupts = <GIC_SPI 354 IRQ_TYPE_NONE>; + status = "disabled"; + }; + }; }; }; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: rnayak@codeaurora.org (Rajendra Nayak) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 4/4] arm64: dts: sdm845: Add serial console support Date: Fri, 16 Feb 2018 11:35:03 +0530 [thread overview] Message-ID: <20180216060503.22006-5-rnayak@codeaurora.org> (raw) In-Reply-To: <20180216060503.22006-1-rnayak@codeaurora.org> Add the qup uart node and geni se instance needed to support the serial console on the MTP. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 39 +++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 39 +++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 979ab49913f1..2a1ed55b703e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -12,4 +12,43 @@ / { model = "Qualcomm Technologies, Inc. SDM845 MTP"; compatible = "qcom,sdm845-mtp"; + + aliases { + serial0 = &qup_uart2; + }; + + chosen { + stdout-path = "serial0"; + }; +}; + +&soc { + geni-se at ac0000 { + serial at a84000 { + status = "okay"; + }; + }; + + pinctrl at 3400000 { + qup-uart2-default { + pinconf_tx { + pins = "gpio4"; + drive-strength = <2>; + bias-disable; + }; + + pinconf_rx { + pins = "gpio5"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + qup-uart2-sleep { + pinconf { + pins = "gpio4", "gpio5"; + bias-pull-down; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c46e726af621..7b5c16eb63b7 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -6,6 +6,7 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/qcom,gcc-sdm845.h> / { interrupt-parent = <&intc>; @@ -195,6 +196,20 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + + qup_uart2_default: qup-uart2-default { + pinmux { + function = "qup9"; + pins = "gpio4", "gpio5"; + }; + }; + + qup_uart2_sleep: qup-uart2-sleep { + pinmux { + function = "gpio"; + pins = "gpio4", "gpio5"; + }; + }; }; timer at 17c90000 { @@ -273,5 +288,29 @@ #interrupt-cells = <4>; cell-index = <0>; }; + + geni-se at ac0000 { + compatible = "qcom,geni-se-qup"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0xac0000 0x6000>; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + clock-names = "m-ahb", "s-ahb"; + + qup_uart2: serial at a84000 { + compatible = "qcom,geni-debug-uart"; + reg = <0xa84000 0x4000>; + reg-names = "se-phys"; + clock-names = "se-clk"; + clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qup_uart2_default>; + pinctrl-1 = <&qup_uart2_sleep>; + interrupts = <GIC_SPI 354 IRQ_TYPE_NONE>; + status = "disabled"; + }; + }; }; }; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2018-02-16 6:05 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-02-16 6:04 [PATCH v4 0/4] Add DTS for SDM845 SoC and MTP Rajendra Nayak 2018-02-16 6:04 ` Rajendra Nayak 2018-02-16 6:05 ` [PATCH v4 1/4] dt-bindings: arm: Document kryo385 cpu Rajendra Nayak 2018-02-16 6:05 ` Rajendra Nayak 2018-02-16 19:27 ` Doug Anderson 2018-02-16 19:27 ` Doug Anderson 2018-02-16 6:05 ` [PATCH v4 2/4] dt-bindings: qcom: Add SDM845 bindings Rajendra Nayak 2018-02-16 6:05 ` Rajendra Nayak 2018-02-16 19:27 ` Doug Anderson 2018-02-16 19:27 ` Doug Anderson 2018-02-19 19:34 ` Rob Herring 2018-02-19 19:34 ` Rob Herring 2018-02-19 19:34 ` Rob Herring 2018-02-21 16:51 ` Doug Anderson 2018-02-21 16:51 ` Doug Anderson 2018-02-21 16:51 ` Doug Anderson 2018-02-21 23:58 ` Rob Herring 2018-02-21 23:58 ` Rob Herring 2018-02-21 23:58 ` Rob Herring 2018-02-16 6:05 ` [PATCH v4 3/4] arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP Rajendra Nayak 2018-02-16 6:05 ` Rajendra Nayak 2018-02-16 19:28 ` Doug Anderson 2018-02-16 19:28 ` Doug Anderson 2018-02-19 16:36 ` Marc Zyngier 2018-02-19 16:36 ` Marc Zyngier 2018-02-19 16:36 ` Marc Zyngier 2018-02-21 23:23 ` Doug Anderson 2018-02-21 23:23 ` Doug Anderson 2018-02-21 23:23 ` Doug Anderson 2018-02-22 7:57 ` Rajendra Nayak 2018-02-22 7:57 ` Rajendra Nayak 2018-02-22 6:20 ` Rajendra Nayak 2018-02-22 6:20 ` Rajendra Nayak 2018-02-22 6:20 ` Rajendra Nayak 2018-02-16 6:05 ` Rajendra Nayak [this message] 2018-02-16 6:05 ` [PATCH v4 4/4] arm64: dts: sdm845: Add serial console support Rajendra Nayak 2018-02-16 19:28 ` Doug Anderson 2018-02-16 19:28 ` Doug Anderson
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