* [CI] drm/i915/cnl: New power domain for AUX IO.
@ 2018-02-16 23:25 Dhinakaran Pandiyan
2018-02-16 23:57 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Dhinakaran Pandiyan @ 2018-02-16 23:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan
PSR requires AUX IO well to be kept on and the existing AUX domain
enables other wells too.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
drivers/gpu/drm/i915/intel_display.h | 5 +++++
drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 4 ++++
drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
5 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
index c4042e342f50..9857b60a7e0f 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -175,6 +175,11 @@ enum intel_display_power_domain {
POWER_DOMAIN_AUX_C,
POWER_DOMAIN_AUX_D,
POWER_DOMAIN_AUX_F,
+ POWER_DOMAIN_AUX_IO_A,
+ POWER_DOMAIN_AUX_IO_B,
+ POWER_DOMAIN_AUX_IO_C,
+ POWER_DOMAIN_AUX_IO_D,
+ POWER_DOMAIN_AUX_IO_F,
POWER_DOMAIN_GMBUS,
POWER_DOMAIN_MODESET,
POWER_DOMAIN_GT_IRQ,
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f20b25f98e5a..aa90f6a70689 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
switch (encoder->port) {
case PORT_A:
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
+ intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
break;
case PORT_B:
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
+ intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
break;
case PORT_C:
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
+ intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
break;
case PORT_D:
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
+ intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
break;
case PORT_E:
/* FIXME: Check VBT for actual wiring of PORT E */
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
+ intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
break;
case PORT_F:
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
+ intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
break;
default:
MISSING_CASE(encoder->port);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 898064e8bea7..c7c4180e41d8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1071,6 +1071,7 @@ struct intel_dp {
struct drm_dp_desc desc;
struct drm_dp_aux aux;
enum intel_display_power_domain aux_power_domain;
+ enum intel_display_power_domain aux_io_power_domain;
uint8_t train_set[4];
int panel_power_up_delay;
int panel_power_down_delay;
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2ef374f936b9..62de8f0632b0 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
EDP_PSR_DEBUG_MASK_HPD |
EDP_PSR_DEBUG_MASK_LPSP);
}
+
+ intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
}
/**
@@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
else
WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
}
+
+ intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
}
/**
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 16790f2576ec..323c1babb0a0 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "AUX_D";
case POWER_DOMAIN_AUX_F:
return "AUX_F";
+ case POWER_DOMAIN_AUX_IO_A:
+ return "AUX_IO_A";
+ case POWER_DOMAIN_AUX_IO_B:
+ return "AUX_IO_B";
+ case POWER_DOMAIN_AUX_IO_C:
+ return "AUX_IO_C";
+ case POWER_DOMAIN_AUX_IO_D:
+ return "AUX_IO_D";
+ case POWER_DOMAIN_AUX_IO_F:
+ return "AUX_IO_F";
case POWER_DOMAIN_GMBUS:
return "GMBUS";
case POWER_DOMAIN_INIT:
@@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_B) | \
+ BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_C) | \
+ BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_D) | \
+ BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_F) | \
+ BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/cnl: New power domain for AUX IO.
2018-02-16 23:25 [CI] drm/i915/cnl: New power domain for AUX IO Dhinakaran Pandiyan
@ 2018-02-16 23:57 ` Patchwork
2018-02-17 0:27 ` [CI] " Rodrigo Vivi
2018-02-17 0:45 ` ✗ Fi.CI.IGT: failure for " Patchwork
2 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-02-16 23:57 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/cnl: New power domain for AUX IO.
URL : https://patchwork.freedesktop.org/series/38467/
State : success
== Summary ==
Series 38467v1 drm/i915/cnl: New power domain for AUX IO.
https://patchwork.freedesktop.org/api/1.0/series/38467/revisions/1/mbox/
Test gem_ctx_switch:
Subgroup basic-default-heavy:
incomplete -> PASS (fi-cnl-y3)
Test prime_vgem:
Subgroup basic-fence-flip:
fail -> PASS (fi-ilk-650) fdo#104008
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:424s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:428s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:377s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:494s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:288s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:480s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:488s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:475s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:461s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:571s
fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:581s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:415s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:287s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:516s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:391s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:411s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:455s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:414s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:459s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:496s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:455s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:501s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:594s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:429s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:508s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:529s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:494s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:478s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:415s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:435s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:527s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:400s
76724e6ea332e757bf12e3716ea9747cc302d4e6 drm-tip: 2018y-02m-16d-21h-43m-36s UTC integration manifest
0ad88aa1708a drm/i915/cnl: New power domain for AUX IO.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8061/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [CI] drm/i915/cnl: New power domain for AUX IO.
2018-02-16 23:25 [CI] drm/i915/cnl: New power domain for AUX IO Dhinakaran Pandiyan
2018-02-16 23:57 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-02-17 0:27 ` Rodrigo Vivi
2018-02-19 14:47 ` Imre Deak
2018-02-17 0:45 ` ✗ Fi.CI.IGT: failure for " Patchwork
2 siblings, 1 reply; 10+ messages in thread
From: Rodrigo Vivi @ 2018-02-17 0:27 UTC (permalink / raw)
To: Dhinakaran Pandiyan, imre.deak; +Cc: intel-gfx
On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> PSR requires AUX IO well to be kept on and the existing AUX domain
> enables other wells too.
>
Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.h | 5 +++++
> drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_psr.c | 4 ++++
> drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
> 5 files changed, 31 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> index c4042e342f50..9857b60a7e0f 100644
> --- a/drivers/gpu/drm/i915/intel_display.h
> +++ b/drivers/gpu/drm/i915/intel_display.h
> @@ -175,6 +175,11 @@ enum intel_display_power_domain {
> POWER_DOMAIN_AUX_C,
> POWER_DOMAIN_AUX_D,
> POWER_DOMAIN_AUX_F,
> + POWER_DOMAIN_AUX_IO_A,
> + POWER_DOMAIN_AUX_IO_B,
> + POWER_DOMAIN_AUX_IO_C,
> + POWER_DOMAIN_AUX_IO_D,
> + POWER_DOMAIN_AUX_IO_F,
I know that I had suggested something very similar, but looking now
to the code it seems a big duplication of all other aux..
I mean, on CNL
POWER_DOMAIN_AUX_{B,C,D,F} are exactly the same as
POWER_DOMAIN_AUX__IO_{B,C,D,F}
Only the AUX_IO A is different from the AUX_A because AUX_A
disables DMC.
So, question is: What about removing the AUX_A domain from DC_OFF
and just using AUX doamins... Well, on this case calling get/put
only for INTEL_GEN <= 10...
So, yeap, not beautiful anyways.
I'd like to hear from Imre what he had in mind for handling
AUX IOs and to know if he has any better idea for this case.
> POWER_DOMAIN_GMBUS,
> POWER_DOMAIN_MODESET,
> POWER_DOMAIN_GT_IRQ,
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index f20b25f98e5a..aa90f6a70689 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
> switch (encoder->port) {
> case PORT_A:
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
> break;
> case PORT_B:
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
> break;
> case PORT_C:
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
> break;
> case PORT_D:
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> break;
> case PORT_E:
> /* FIXME: Check VBT for actual wiring of PORT E */
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> break;
> case PORT_F:
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
> + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
> break;
> default:
> MISSING_CASE(encoder->port);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 898064e8bea7..c7c4180e41d8 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1071,6 +1071,7 @@ struct intel_dp {
> struct drm_dp_desc desc;
> struct drm_dp_aux aux;
> enum intel_display_power_domain aux_power_domain;
> + enum intel_display_power_domain aux_io_power_domain;
> uint8_t train_set[4];
> int panel_power_up_delay;
> int panel_power_down_delay;
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 2ef374f936b9..62de8f0632b0 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> EDP_PSR_DEBUG_MASK_HPD |
> EDP_PSR_DEBUG_MASK_LPSP);
> }
> +
> + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
> }
>
> /**
> @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
> else
> WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> }
> +
> + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 16790f2576ec..323c1babb0a0 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> return "AUX_D";
> case POWER_DOMAIN_AUX_F:
> return "AUX_F";
> + case POWER_DOMAIN_AUX_IO_A:
> + return "AUX_IO_A";
> + case POWER_DOMAIN_AUX_IO_B:
> + return "AUX_IO_B";
> + case POWER_DOMAIN_AUX_IO_C:
> + return "AUX_IO_C";
> + case POWER_DOMAIN_AUX_IO_D:
> + return "AUX_IO_D";
> + case POWER_DOMAIN_AUX_IO_F:
> + return "AUX_IO_F";
> case POWER_DOMAIN_GMBUS:
> return "GMBUS";
> case POWER_DOMAIN_INIT:
> @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> BIT_ULL(POWER_DOMAIN_INIT))
> #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_AUX_A) | \
> + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> BIT_ULL(POWER_DOMAIN_INIT))
> #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_AUX_B) | \
> + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
> BIT_ULL(POWER_DOMAIN_INIT))
> #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_AUX_C) | \
> + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
> BIT_ULL(POWER_DOMAIN_INIT))
> #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_AUX_D) | \
> + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
> BIT_ULL(POWER_DOMAIN_INIT))
> #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_AUX_F) | \
> + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
> BIT_ULL(POWER_DOMAIN_INIT))
> #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> --
> 2.14.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/cnl: New power domain for AUX IO.
2018-02-16 23:25 [CI] drm/i915/cnl: New power domain for AUX IO Dhinakaran Pandiyan
2018-02-16 23:57 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-02-17 0:27 ` [CI] " Rodrigo Vivi
@ 2018-02-17 0:45 ` Patchwork
2 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-02-17 0:45 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/cnl: New power domain for AUX IO.
URL : https://patchwork.freedesktop.org/series/38467/
State : failure
== Summary ==
Test drv_selftest:
Subgroup mock_sanitycheck:
pass -> DMESG-FAIL (shard-snb)
Subgroup mock_fence:
pass -> INCOMPLETE (shard-snb)
Test kms_vblank:
Subgroup pipe-a-ts-continuation-suspend:
skip -> PASS (shard-snb)
Test gem_eio:
Subgroup in-flight:
fail -> PASS (shard-hsw) fdo#104676
Test kms_cursor_crc:
Subgroup cursor-256x256-suspend:
incomplete -> PASS (shard-hsw) fdo#103375
Test kms_flip:
Subgroup modeset-vs-vblank-race:
pass -> FAIL (shard-hsw) fdo#103060 +1
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-indfb-fliptrack:
skip -> PASS (shard-snb) fdo#103167
Subgroup fbc-rgb565-draw-mmap-cpu:
fail -> PASS (shard-apl) fdo#101623
fdo#104676 https://bugs.freedesktop.org/show_bug.cgi?id=104676
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
shard-apl total:3371 pass:1755 dwarn:1 dfail:0 fail:15 skip:1599 time:12377s
shard-hsw total:3430 pass:1758 dwarn:1 dfail:0 fail:5 skip:1665 time:11900s
shard-snb total:3389 pass:1305 dwarn:0 dfail:1 fail:5 skip:2077 time:6464s
Blacklisted hosts:
shard-kbl total:3356 pass:1881 dwarn:1 dfail:0 fail:16 skip:1457 time:9457s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8061/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [CI] drm/i915/cnl: New power domain for AUX IO.
2018-02-17 0:27 ` [CI] " Rodrigo Vivi
@ 2018-02-19 14:47 ` Imre Deak
2018-02-19 15:49 ` Ville Syrjälä
0 siblings, 1 reply; 10+ messages in thread
From: Imre Deak @ 2018-02-19 14:47 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx, Dhinakaran Pandiyan
On Fri, Feb 16, 2018 at 04:27:04PM -0800, Rodrigo Vivi wrote:
> On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> > PSR requires AUX IO well to be kept on and the existing AUX domain
> > enables other wells too.
> >
>
> Cc: Imre Deak <imre.deak@intel.com>
>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_display.h | 5 +++++
> > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_psr.c | 4 ++++
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
> > 5 files changed, 31 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> > index c4042e342f50..9857b60a7e0f 100644
> > --- a/drivers/gpu/drm/i915/intel_display.h
> > +++ b/drivers/gpu/drm/i915/intel_display.h
> > @@ -175,6 +175,11 @@ enum intel_display_power_domain {
> > POWER_DOMAIN_AUX_C,
> > POWER_DOMAIN_AUX_D,
> > POWER_DOMAIN_AUX_F,
> > + POWER_DOMAIN_AUX_IO_A,
> > + POWER_DOMAIN_AUX_IO_B,
> > + POWER_DOMAIN_AUX_IO_C,
> > + POWER_DOMAIN_AUX_IO_D,
> > + POWER_DOMAIN_AUX_IO_F,
>
> I know that I had suggested something very similar, but looking now
> to the code it seems a big duplication of all other aux..
>
> I mean, on CNL
>
> POWER_DOMAIN_AUX_{B,C,D,F} are exactly the same as
> POWER_DOMAIN_AUX__IO_{B,C,D,F}
>
> Only the AUX_IO A is different from the AUX_A because AUX_A
> disables DMC.
> So, question is: What about removing the AUX_A domain from DC_OFF
> and just using AUX doamins... Well, on this case calling get/put
> only for INTEL_GEN <= 10...
>
> So, yeap, not beautiful anyways.
>
> I'd like to hear from Imre what he had in mind for handling
> AUX IOs and to know if he has any better idea for this case.
Hm, so in general (for AUX transfers) to enable AUX-A we first need to
disable DC states _except_ if we enable AUX-A for PSR where we want
DC5/6 to stay enabled. Nice. Also not sure why the FW/HW can't have its
own request bit..
I don't have a better idea, but since on DDI where this matters PSR is
tied to port A, we could have only a POWER_DOMAIN_PSR and map it to the
AUX-A power well where it's needed.
--Imre
>
> > POWER_DOMAIN_GMBUS,
> > POWER_DOMAIN_MODESET,
> > POWER_DOMAIN_GT_IRQ,
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index f20b25f98e5a..aa90f6a70689 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
> > switch (encoder->port) {
> > case PORT_A:
> > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
> > break;
> > case PORT_B:
> > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
> > break;
> > case PORT_C:
> > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
> > break;
> > case PORT_D:
> > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > break;
> > case PORT_E:
> > /* FIXME: Check VBT for actual wiring of PORT E */
> > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > break;
> > case PORT_F:
> > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
> > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
> > break;
> > default:
> > MISSING_CASE(encoder->port);
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index 898064e8bea7..c7c4180e41d8 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1071,6 +1071,7 @@ struct intel_dp {
> > struct drm_dp_desc desc;
> > struct drm_dp_aux aux;
> > enum intel_display_power_domain aux_power_domain;
> > + enum intel_display_power_domain aux_io_power_domain;
> > uint8_t train_set[4];
> > int panel_power_up_delay;
> > int panel_power_down_delay;
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > index 2ef374f936b9..62de8f0632b0 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> > EDP_PSR_DEBUG_MASK_HPD |
> > EDP_PSR_DEBUG_MASK_LPSP);
> > }
> > +
> > + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
> > }
> >
> > /**
> > @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
> > else
> > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> > }
> > +
> > + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
> > }
> >
> > /**
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 16790f2576ec..323c1babb0a0 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > return "AUX_D";
> > case POWER_DOMAIN_AUX_F:
> > return "AUX_F";
> > + case POWER_DOMAIN_AUX_IO_A:
> > + return "AUX_IO_A";
> > + case POWER_DOMAIN_AUX_IO_B:
> > + return "AUX_IO_B";
> > + case POWER_DOMAIN_AUX_IO_C:
> > + return "AUX_IO_C";
> > + case POWER_DOMAIN_AUX_IO_D:
> > + return "AUX_IO_D";
> > + case POWER_DOMAIN_AUX_IO_F:
> > + return "AUX_IO_F";
> > case POWER_DOMAIN_GMBUS:
> > return "GMBUS";
> > case POWER_DOMAIN_INIT:
> > @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_AUX_D) | \
> > + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_AUX_F) | \
> > + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> > --
> > 2.14.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [CI] drm/i915/cnl: New power domain for AUX IO.
2018-02-19 14:47 ` Imre Deak
@ 2018-02-19 15:49 ` Ville Syrjälä
2018-02-20 15:35 ` Imre Deak
0 siblings, 1 reply; 10+ messages in thread
From: Ville Syrjälä @ 2018-02-19 15:49 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, Dhinakaran Pandiyan, Rodrigo Vivi
On Mon, Feb 19, 2018 at 04:47:41PM +0200, Imre Deak wrote:
> On Fri, Feb 16, 2018 at 04:27:04PM -0800, Rodrigo Vivi wrote:
> > On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> > > PSR requires AUX IO well to be kept on and the existing AUX domain
> > > enables other wells too.
> > >
> >
> > Cc: Imre Deak <imre.deak@intel.com>
> >
> > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_display.h | 5 +++++
> > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
> > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > drivers/gpu/drm/i915/intel_psr.c | 4 ++++
> > > drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
> > > 5 files changed, 31 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> > > index c4042e342f50..9857b60a7e0f 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > @@ -175,6 +175,11 @@ enum intel_display_power_domain {
> > > POWER_DOMAIN_AUX_C,
> > > POWER_DOMAIN_AUX_D,
> > > POWER_DOMAIN_AUX_F,
> > > + POWER_DOMAIN_AUX_IO_A,
> > > + POWER_DOMAIN_AUX_IO_B,
> > > + POWER_DOMAIN_AUX_IO_C,
> > > + POWER_DOMAIN_AUX_IO_D,
> > > + POWER_DOMAIN_AUX_IO_F,
> >
> > I know that I had suggested something very similar, but looking now
> > to the code it seems a big duplication of all other aux..
> >
> > I mean, on CNL
> >
> > POWER_DOMAIN_AUX_{B,C,D,F} are exactly the same as
> > POWER_DOMAIN_AUX__IO_{B,C,D,F}
> >
> > Only the AUX_IO A is different from the AUX_A because AUX_A
> > disables DMC.
> > So, question is: What about removing the AUX_A domain from DC_OFF
> > and just using AUX doamins... Well, on this case calling get/put
> > only for INTEL_GEN <= 10...
> >
> > So, yeap, not beautiful anyways.
> >
> > I'd like to hear from Imre what he had in mind for handling
> > AUX IOs and to know if he has any better idea for this case.
>
> Hm, so in general (for AUX transfers) to enable AUX-A we first need to
> disable DC states _except_ if we enable AUX-A for PSR where we want
> DC5/6 to stay enabled. Nice. Also not sure why the FW/HW can't have its
> own request bit..
>
> I don't have a better idea, but since on DDI where this matters PSR is
> tied to port A,
SKL+ (or maybe even BDW?) can do PSR on any port actually. We just don't
make use of that capability currently.
> we could have only a POWER_DOMAIN_PSR and map it to the
> AUX-A power well where it's needed.
>
> --Imre
>
> >
> > > POWER_DOMAIN_GMBUS,
> > > POWER_DOMAIN_MODESET,
> > > POWER_DOMAIN_GT_IRQ,
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > index f20b25f98e5a..aa90f6a70689 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
> > > switch (encoder->port) {
> > > case PORT_A:
> > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
> > > break;
> > > case PORT_B:
> > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
> > > break;
> > > case PORT_C:
> > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
> > > break;
> > > case PORT_D:
> > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > break;
> > > case PORT_E:
> > > /* FIXME: Check VBT for actual wiring of PORT E */
> > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > break;
> > > case PORT_F:
> > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
> > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
> > > break;
> > > default:
> > > MISSING_CASE(encoder->port);
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > > index 898064e8bea7..c7c4180e41d8 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -1071,6 +1071,7 @@ struct intel_dp {
> > > struct drm_dp_desc desc;
> > > struct drm_dp_aux aux;
> > > enum intel_display_power_domain aux_power_domain;
> > > + enum intel_display_power_domain aux_io_power_domain;
> > > uint8_t train_set[4];
> > > int panel_power_up_delay;
> > > int panel_power_down_delay;
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > > index 2ef374f936b9..62de8f0632b0 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> > > EDP_PSR_DEBUG_MASK_HPD |
> > > EDP_PSR_DEBUG_MASK_LPSP);
> > > }
> > > +
> > > + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
> > > }
> > >
> > > /**
> > > @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
> > > else
> > > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> > > }
> > > +
> > > + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
> > > }
> > >
> > > /**
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index 16790f2576ec..323c1babb0a0 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > > return "AUX_D";
> > > case POWER_DOMAIN_AUX_F:
> > > return "AUX_F";
> > > + case POWER_DOMAIN_AUX_IO_A:
> > > + return "AUX_IO_A";
> > > + case POWER_DOMAIN_AUX_IO_B:
> > > + return "AUX_IO_B";
> > > + case POWER_DOMAIN_AUX_IO_C:
> > > + return "AUX_IO_C";
> > > + case POWER_DOMAIN_AUX_IO_D:
> > > + return "AUX_IO_D";
> > > + case POWER_DOMAIN_AUX_IO_F:
> > > + return "AUX_IO_F";
> > > case POWER_DOMAIN_GMBUS:
> > > return "GMBUS";
> > > case POWER_DOMAIN_INIT:
> > > @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
> > > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
> > > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > > + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
> > > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > > + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
> > > BIT_ULL(POWER_DOMAIN_AUX_D) | \
> > > + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> > > BIT_ULL(POWER_DOMAIN_AUX_F) | \
> > > + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> > > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> > > --
> > > 2.14.1
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [CI] drm/i915/cnl: New power domain for AUX IO.
2018-02-19 15:49 ` Ville Syrjälä
@ 2018-02-20 15:35 ` Imre Deak
2018-02-20 16:25 ` Imre Deak
0 siblings, 1 reply; 10+ messages in thread
From: Imre Deak @ 2018-02-20 15:35 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Dhinakaran Pandiyan, Rodrigo Vivi
On Mon, Feb 19, 2018 at 05:49:41PM +0200, Ville Syrjälä wrote:
> On Mon, Feb 19, 2018 at 04:47:41PM +0200, Imre Deak wrote:
> > On Fri, Feb 16, 2018 at 04:27:04PM -0800, Rodrigo Vivi wrote:
> > > On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> > > > PSR requires AUX IO well to be kept on and the existing AUX domain
> > > > enables other wells too.
> > > >
> > >
> > > Cc: Imre Deak <imre.deak@intel.com>
> > >
> > > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/intel_display.h | 5 +++++
> > > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
> > > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > > drivers/gpu/drm/i915/intel_psr.c | 4 ++++
> > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
> > > > 5 files changed, 31 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> > > > index c4042e342f50..9857b60a7e0f 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > > @@ -175,6 +175,11 @@ enum intel_display_power_domain {
> > > > POWER_DOMAIN_AUX_C,
> > > > POWER_DOMAIN_AUX_D,
> > > > POWER_DOMAIN_AUX_F,
> > > > + POWER_DOMAIN_AUX_IO_A,
> > > > + POWER_DOMAIN_AUX_IO_B,
> > > > + POWER_DOMAIN_AUX_IO_C,
> > > > + POWER_DOMAIN_AUX_IO_D,
> > > > + POWER_DOMAIN_AUX_IO_F,
> > >
> > > I know that I had suggested something very similar, but looking now
> > > to the code it seems a big duplication of all other aux..
> > >
> > > I mean, on CNL
> > >
> > > POWER_DOMAIN_AUX_{B,C,D,F} are exactly the same as
> > > POWER_DOMAIN_AUX__IO_{B,C,D,F}
> > >
> > > Only the AUX_IO A is different from the AUX_A because AUX_A
> > > disables DMC.
> > > So, question is: What about removing the AUX_A domain from DC_OFF
> > > and just using AUX doamins... Well, on this case calling get/put
> > > only for INTEL_GEN <= 10...
> > >
> > > So, yeap, not beautiful anyways.
> > >
> > > I'd like to hear from Imre what he had in mind for handling
> > > AUX IOs and to know if he has any better idea for this case.
> >
> > Hm, so in general (for AUX transfers) to enable AUX-A we first need to
> > disable DC states _except_ if we enable AUX-A for PSR where we want
> > DC5/6 to stay enabled. Nice. Also not sure why the FW/HW can't have its
> > own request bit..
> >
> > I don't have a better idea, but since on DDI where this matters PSR is
> > tied to port A,
>
> SKL+ (or maybe even BDW?) can do PSR on any port actually. We just don't
> make use of that capability currently.
Ok. But still, one other idea would be to avoid the duplication Rodrigo
also mentioned is to have:
get_psr_aux_power()
{
if (!HAS_DDI())
return;
intel_display_power_get(port == PORT_A ? POWER_DOMAIN_AUX_IO_A :
intel_dp->aux_power_domain);
}
and a put_psr_aux_power() accordingly. That way we only need to add one
extra power domain for port A.
--Imre
>
> > we could have only a POWER_DOMAIN_PSR and map it to the
> > AUX-A power well where it's needed.
> >
> > --Imre
> >
> > >
> > > > POWER_DOMAIN_GMBUS,
> > > > POWER_DOMAIN_MODESET,
> > > > POWER_DOMAIN_GT_IRQ,
> > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > > index f20b25f98e5a..aa90f6a70689 100644
> > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
> > > > switch (encoder->port) {
> > > > case PORT_A:
> > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
> > > > break;
> > > > case PORT_B:
> > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
> > > > break;
> > > > case PORT_C:
> > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
> > > > break;
> > > > case PORT_D:
> > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > break;
> > > > case PORT_E:
> > > > /* FIXME: Check VBT for actual wiring of PORT E */
> > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > break;
> > > > case PORT_F:
> > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
> > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
> > > > break;
> > > > default:
> > > > MISSING_CASE(encoder->port);
> > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > > > index 898064e8bea7..c7c4180e41d8 100644
> > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > @@ -1071,6 +1071,7 @@ struct intel_dp {
> > > > struct drm_dp_desc desc;
> > > > struct drm_dp_aux aux;
> > > > enum intel_display_power_domain aux_power_domain;
> > > > + enum intel_display_power_domain aux_io_power_domain;
> > > > uint8_t train_set[4];
> > > > int panel_power_up_delay;
> > > > int panel_power_down_delay;
> > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > > > index 2ef374f936b9..62de8f0632b0 100644
> > > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > > @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> > > > EDP_PSR_DEBUG_MASK_HPD |
> > > > EDP_PSR_DEBUG_MASK_LPSP);
> > > > }
> > > > +
> > > > + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
> > > > }
> > > >
> > > > /**
> > > > @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
> > > > else
> > > > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> > > > }
> > > > +
> > > > + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
> > > > }
> > > >
> > > > /**
> > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > index 16790f2576ec..323c1babb0a0 100644
> > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > > > return "AUX_D";
> > > > case POWER_DOMAIN_AUX_F:
> > > > return "AUX_F";
> > > > + case POWER_DOMAIN_AUX_IO_A:
> > > > + return "AUX_IO_A";
> > > > + case POWER_DOMAIN_AUX_IO_B:
> > > > + return "AUX_IO_B";
> > > > + case POWER_DOMAIN_AUX_IO_C:
> > > > + return "AUX_IO_C";
> > > > + case POWER_DOMAIN_AUX_IO_D:
> > > > + return "AUX_IO_D";
> > > > + case POWER_DOMAIN_AUX_IO_F:
> > > > + return "AUX_IO_F";
> > > > case POWER_DOMAIN_GMBUS:
> > > > return "GMBUS";
> > > > case POWER_DOMAIN_INIT:
> > > > @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
> > > > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
> > > > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
> > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
> > > > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
> > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
> > > > BIT_ULL(POWER_DOMAIN_AUX_D) | \
> > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
> > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> > > > BIT_ULL(POWER_DOMAIN_AUX_F) | \
> > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
> > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> > > > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> > > > --
> > > > 2.14.1
> > > >
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [CI] drm/i915/cnl: New power domain for AUX IO.
2018-02-20 15:35 ` Imre Deak
@ 2018-02-20 16:25 ` Imre Deak
2018-02-20 18:44 ` Rodrigo Vivi
0 siblings, 1 reply; 10+ messages in thread
From: Imre Deak @ 2018-02-20 16:25 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Dhinakaran Pandiyan, Rodrigo Vivi
On Tue, Feb 20, 2018 at 05:35:20PM +0200, Imre Deak wrote:
> On Mon, Feb 19, 2018 at 05:49:41PM +0200, Ville Syrjälä wrote:
> > On Mon, Feb 19, 2018 at 04:47:41PM +0200, Imre Deak wrote:
> > > On Fri, Feb 16, 2018 at 04:27:04PM -0800, Rodrigo Vivi wrote:
> > > > On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> > > > > PSR requires AUX IO well to be kept on and the existing AUX domain
> > > > > enables other wells too.
> > > > >
> > > >
> > > > Cc: Imre Deak <imre.deak@intel.com>
> > > >
> > > > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/i915/intel_display.h | 5 +++++
> > > > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
> > > > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > > > drivers/gpu/drm/i915/intel_psr.c | 4 ++++
> > > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
> > > > > 5 files changed, 31 insertions(+)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> > > > > index c4042e342f50..9857b60a7e0f 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > > > @@ -175,6 +175,11 @@ enum intel_display_power_domain {
> > > > > POWER_DOMAIN_AUX_C,
> > > > > POWER_DOMAIN_AUX_D,
> > > > > POWER_DOMAIN_AUX_F,
> > > > > + POWER_DOMAIN_AUX_IO_A,
> > > > > + POWER_DOMAIN_AUX_IO_B,
> > > > > + POWER_DOMAIN_AUX_IO_C,
> > > > > + POWER_DOMAIN_AUX_IO_D,
> > > > > + POWER_DOMAIN_AUX_IO_F,
> > > >
> > > > I know that I had suggested something very similar, but looking now
> > > > to the code it seems a big duplication of all other aux..
> > > >
> > > > I mean, on CNL
> > > >
> > > > POWER_DOMAIN_AUX_{B,C,D,F} are exactly the same as
> > > > POWER_DOMAIN_AUX__IO_{B,C,D,F}
> > > >
> > > > Only the AUX_IO A is different from the AUX_A because AUX_A
> > > > disables DMC.
> > > > So, question is: What about removing the AUX_A domain from DC_OFF
> > > > and just using AUX doamins... Well, on this case calling get/put
> > > > only for INTEL_GEN <= 10...
> > > >
> > > > So, yeap, not beautiful anyways.
> > > >
> > > > I'd like to hear from Imre what he had in mind for handling
> > > > AUX IOs and to know if he has any better idea for this case.
> > >
> > > Hm, so in general (for AUX transfers) to enable AUX-A we first need to
> > > disable DC states _except_ if we enable AUX-A for PSR where we want
> > > DC5/6 to stay enabled. Nice. Also not sure why the FW/HW can't have its
> > > own request bit..
> > >
> > > I don't have a better idea, but since on DDI where this matters PSR is
> > > tied to port A,
> >
> > SKL+ (or maybe even BDW?) can do PSR on any port actually. We just don't
> > make use of that capability currently.
>
> Ok. But still, one other idea would be to avoid the duplication Rodrigo
> also mentioned is to have:
>
> get_psr_aux_power()
> {
> if (!HAS_DDI())
Err, correctly the above would be if (GEN < 10)
> return;
>
> intel_display_power_get(port == PORT_A ? POWER_DOMAIN_AUX_IO_A :
> intel_dp->aux_power_domain);
> }
>
> and a put_psr_aux_power() accordingly. That way we only need to add one
> extra power domain for port A.
>
> --Imre
>
>
>
>
> >
> > > we could have only a POWER_DOMAIN_PSR and map it to the
> > > AUX-A power well where it's needed.
> > >
> > > --Imre
> > >
> > > >
> > > > > POWER_DOMAIN_GMBUS,
> > > > > POWER_DOMAIN_MODESET,
> > > > > POWER_DOMAIN_GT_IRQ,
> > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > > > index f20b25f98e5a..aa90f6a70689 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > > @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
> > > > > switch (encoder->port) {
> > > > > case PORT_A:
> > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
> > > > > break;
> > > > > case PORT_B:
> > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
> > > > > break;
> > > > > case PORT_C:
> > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
> > > > > break;
> > > > > case PORT_D:
> > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > > break;
> > > > > case PORT_E:
> > > > > /* FIXME: Check VBT for actual wiring of PORT E */
> > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > > break;
> > > > > case PORT_F:
> > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
> > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
> > > > > break;
> > > > > default:
> > > > > MISSING_CASE(encoder->port);
> > > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > > > > index 898064e8bea7..c7c4180e41d8 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > > @@ -1071,6 +1071,7 @@ struct intel_dp {
> > > > > struct drm_dp_desc desc;
> > > > > struct drm_dp_aux aux;
> > > > > enum intel_display_power_domain aux_power_domain;
> > > > > + enum intel_display_power_domain aux_io_power_domain;
> > > > > uint8_t train_set[4];
> > > > > int panel_power_up_delay;
> > > > > int panel_power_down_delay;
> > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > > > > index 2ef374f936b9..62de8f0632b0 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > > > @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> > > > > EDP_PSR_DEBUG_MASK_HPD |
> > > > > EDP_PSR_DEBUG_MASK_LPSP);
> > > > > }
> > > > > +
> > > > > + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
> > > > > }
> > > > >
> > > > > /**
> > > > > @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
> > > > > else
> > > > > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> > > > > }
> > > > > +
> > > > > + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
> > > > > }
> > > > >
> > > > > /**
> > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > index 16790f2576ec..323c1babb0a0 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > > > > return "AUX_D";
> > > > > case POWER_DOMAIN_AUX_F:
> > > > > return "AUX_F";
> > > > > + case POWER_DOMAIN_AUX_IO_A:
> > > > > + return "AUX_IO_A";
> > > > > + case POWER_DOMAIN_AUX_IO_B:
> > > > > + return "AUX_IO_B";
> > > > > + case POWER_DOMAIN_AUX_IO_C:
> > > > > + return "AUX_IO_C";
> > > > > + case POWER_DOMAIN_AUX_IO_D:
> > > > > + return "AUX_IO_D";
> > > > > + case POWER_DOMAIN_AUX_IO_F:
> > > > > + return "AUX_IO_F";
> > > > > case POWER_DOMAIN_GMBUS:
> > > > > return "GMBUS";
> > > > > case POWER_DOMAIN_INIT:
> > > > > @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
> > > > > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
> > > > > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
> > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
> > > > > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
> > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
> > > > > BIT_ULL(POWER_DOMAIN_AUX_D) | \
> > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
> > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> > > > > BIT_ULL(POWER_DOMAIN_AUX_F) | \
> > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
> > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> > > > > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> > > > > --
> > > > > 2.14.1
> > > > >
> > > > > _______________________________________________
> > > > > Intel-gfx mailing list
> > > > > Intel-gfx@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> > --
> > Ville Syrjälä
> > Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [CI] drm/i915/cnl: New power domain for AUX IO.
2018-02-20 16:25 ` Imre Deak
@ 2018-02-20 18:44 ` Rodrigo Vivi
2018-02-20 20:04 ` Pandiyan, Dhinakaran
0 siblings, 1 reply; 10+ messages in thread
From: Rodrigo Vivi @ 2018-02-20 18:44 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, Dhinakaran Pandiyan
On Tue, Feb 20, 2018 at 06:25:38PM +0200, Imre Deak wrote:
> On Tue, Feb 20, 2018 at 05:35:20PM +0200, Imre Deak wrote:
> > On Mon, Feb 19, 2018 at 05:49:41PM +0200, Ville Syrjälä wrote:
> > > On Mon, Feb 19, 2018 at 04:47:41PM +0200, Imre Deak wrote:
> > > > On Fri, Feb 16, 2018 at 04:27:04PM -0800, Rodrigo Vivi wrote:
> > > > > On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> > > > > > PSR requires AUX IO well to be kept on and the existing AUX domain
> > > > > > enables other wells too.
> > > > > >
> > > > >
> > > > > Cc: Imre Deak <imre.deak@intel.com>
> > > > >
> > > > > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > > > ---
> > > > > > drivers/gpu/drm/i915/intel_display.h | 5 +++++
> > > > > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
> > > > > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > > > > drivers/gpu/drm/i915/intel_psr.c | 4 ++++
> > > > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
> > > > > > 5 files changed, 31 insertions(+)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> > > > > > index c4042e342f50..9857b60a7e0f 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > > > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > > > > @@ -175,6 +175,11 @@ enum intel_display_power_domain {
> > > > > > POWER_DOMAIN_AUX_C,
> > > > > > POWER_DOMAIN_AUX_D,
> > > > > > POWER_DOMAIN_AUX_F,
> > > > > > + POWER_DOMAIN_AUX_IO_A,
> > > > > > + POWER_DOMAIN_AUX_IO_B,
> > > > > > + POWER_DOMAIN_AUX_IO_C,
> > > > > > + POWER_DOMAIN_AUX_IO_D,
> > > > > > + POWER_DOMAIN_AUX_IO_F,
> > > > >
> > > > > I know that I had suggested something very similar, but looking now
> > > > > to the code it seems a big duplication of all other aux..
> > > > >
> > > > > I mean, on CNL
> > > > >
> > > > > POWER_DOMAIN_AUX_{B,C,D,F} are exactly the same as
> > > > > POWER_DOMAIN_AUX__IO_{B,C,D,F}
> > > > >
> > > > > Only the AUX_IO A is different from the AUX_A because AUX_A
> > > > > disables DMC.
> > > > > So, question is: What about removing the AUX_A domain from DC_OFF
> > > > > and just using AUX doamins... Well, on this case calling get/put
> > > > > only for INTEL_GEN <= 10...
> > > > >
> > > > > So, yeap, not beautiful anyways.
> > > > >
> > > > > I'd like to hear from Imre what he had in mind for handling
> > > > > AUX IOs and to know if he has any better idea for this case.
> > > >
> > > > Hm, so in general (for AUX transfers) to enable AUX-A we first need to
> > > > disable DC states _except_ if we enable AUX-A for PSR where we want
> > > > DC5/6 to stay enabled. Nice. Also not sure why the FW/HW can't have its
> > > > own request bit..
> > > >
> > > > I don't have a better idea, but since on DDI where this matters PSR is
> > > > tied to port A,
> > >
> > > SKL+ (or maybe even BDW?) can do PSR on any port actually. We just don't
> > > make use of that capability currently.
> >
> > Ok. But still, one other idea would be to avoid the duplication Rodrigo
> > also mentioned is to have:
> >
> > get_psr_aux_power()
> > {
> > if (!HAS_DDI())
>
> Err, correctly the above would be if (GEN < 10)
Exactly what I was going to reply here :)
>
> > return;
> >
> > intel_display_power_get(port == PORT_A ? POWER_DOMAIN_AUX_IO_A :
> > intel_dp->aux_power_domain);
good idea. Although as Ville pointed out we don't support PSR on other ports
it is better to do the right thing at least here.
> > }
> >
> > and a put_psr_aux_power() accordingly. That way we only need to add one
> > extra power domain for port A.
Also maybe add a comment explaining the difference and purpose of POWER_DOMAIN_AUX_IO_A
from POWER_DOMAIN_AUX_A along with POWER_DOMAIN_AUX_IO_A definition.
Thanks,
Rodrigo.
> >
> > --Imre
> >
> >
> >
> >
> > >
> > > > we could have only a POWER_DOMAIN_PSR and map it to the
> > > > AUX-A power well where it's needed.
> > > >
> > > > --Imre
> > > >
> > > > >
> > > > > > POWER_DOMAIN_GMBUS,
> > > > > > POWER_DOMAIN_MODESET,
> > > > > > POWER_DOMAIN_GT_IRQ,
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > > > > index f20b25f98e5a..aa90f6a70689 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > > > @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
> > > > > > switch (encoder->port) {
> > > > > > case PORT_A:
> > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
> > > > > > break;
> > > > > > case PORT_B:
> > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
> > > > > > break;
> > > > > > case PORT_C:
> > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
> > > > > > break;
> > > > > > case PORT_D:
> > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > > > break;
> > > > > > case PORT_E:
> > > > > > /* FIXME: Check VBT for actual wiring of PORT E */
> > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > > > break;
> > > > > > case PORT_F:
> > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
> > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
> > > > > > break;
> > > > > > default:
> > > > > > MISSING_CASE(encoder->port);
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > > > > > index 898064e8bea7..c7c4180e41d8 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > > > @@ -1071,6 +1071,7 @@ struct intel_dp {
> > > > > > struct drm_dp_desc desc;
> > > > > > struct drm_dp_aux aux;
> > > > > > enum intel_display_power_domain aux_power_domain;
> > > > > > + enum intel_display_power_domain aux_io_power_domain;
> > > > > > uint8_t train_set[4];
> > > > > > int panel_power_up_delay;
> > > > > > int panel_power_down_delay;
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > > > > > index 2ef374f936b9..62de8f0632b0 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > > > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > > > > @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> > > > > > EDP_PSR_DEBUG_MASK_HPD |
> > > > > > EDP_PSR_DEBUG_MASK_LPSP);
> > > > > > }
> > > > > > +
> > > > > > + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
> > > > > > }
> > > > > >
> > > > > > /**
> > > > > > @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
> > > > > > else
> > > > > > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> > > > > > }
> > > > > > +
> > > > > > + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
> > > > > > }
> > > > > >
> > > > > > /**
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > > index 16790f2576ec..323c1babb0a0 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > > @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > > > > > return "AUX_D";
> > > > > > case POWER_DOMAIN_AUX_F:
> > > > > > return "AUX_F";
> > > > > > + case POWER_DOMAIN_AUX_IO_A:
> > > > > > + return "AUX_IO_A";
> > > > > > + case POWER_DOMAIN_AUX_IO_B:
> > > > > > + return "AUX_IO_B";
> > > > > > + case POWER_DOMAIN_AUX_IO_C:
> > > > > > + return "AUX_IO_C";
> > > > > > + case POWER_DOMAIN_AUX_IO_D:
> > > > > > + return "AUX_IO_D";
> > > > > > + case POWER_DOMAIN_AUX_IO_F:
> > > > > > + return "AUX_IO_F";
> > > > > > case POWER_DOMAIN_GMBUS:
> > > > > > return "GMBUS";
> > > > > > case POWER_DOMAIN_INIT:
> > > > > > @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
> > > > > > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
> > > > > > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
> > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
> > > > > > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
> > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
> > > > > > BIT_ULL(POWER_DOMAIN_AUX_D) | \
> > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
> > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> > > > > > BIT_ULL(POWER_DOMAIN_AUX_F) | \
> > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
> > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> > > > > > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> > > > > > --
> > > > > > 2.14.1
> > > > > >
> > > > > > _______________________________________________
> > > > > > Intel-gfx mailing list
> > > > > > Intel-gfx@lists.freedesktop.org
> > > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > >
> > > --
> > > Ville Syrjälä
> > > Intel OTC
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [CI] drm/i915/cnl: New power domain for AUX IO.
2018-02-20 18:44 ` Rodrigo Vivi
@ 2018-02-20 20:04 ` Pandiyan, Dhinakaran
0 siblings, 0 replies; 10+ messages in thread
From: Pandiyan, Dhinakaran @ 2018-02-20 20:04 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: intel-gfx
On Tue, 2018-02-20 at 10:44 -0800, Rodrigo Vivi wrote:
> On Tue, Feb 20, 2018 at 06:25:38PM +0200, Imre Deak wrote:
> > On Tue, Feb 20, 2018 at 05:35:20PM +0200, Imre Deak wrote:
> > > On Mon, Feb 19, 2018 at 05:49:41PM +0200, Ville Syrjälä wrote:
> > > > On Mon, Feb 19, 2018 at 04:47:41PM +0200, Imre Deak wrote:
> > > > > On Fri, Feb 16, 2018 at 04:27:04PM -0800, Rodrigo Vivi wrote:
> > > > > > On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> > > > > > > PSR requires AUX IO well to be kept on and the existing AUX domain
> > > > > > > enables other wells too.
> > > > > > >
> > > > > >
> > > > > > Cc: Imre Deak <imre.deak@intel.com>
> > > > > >
> > > > > > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > > > > ---
> > > > > > > drivers/gpu/drm/i915/intel_display.h | 5 +++++
> > > > > > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++
> > > > > > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > > > > > drivers/gpu/drm/i915/intel_psr.c | 4 ++++
> > > > > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++
> > > > > > > 5 files changed, 31 insertions(+)
> > > > > > >
> > > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> > > > > > > index c4042e342f50..9857b60a7e0f 100644
> > > > > > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > > > > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > > > > > @@ -175,6 +175,11 @@ enum intel_display_power_domain {
> > > > > > > POWER_DOMAIN_AUX_C,
> > > > > > > POWER_DOMAIN_AUX_D,
> > > > > > > POWER_DOMAIN_AUX_F,
> > > > > > > + POWER_DOMAIN_AUX_IO_A,
> > > > > > > + POWER_DOMAIN_AUX_IO_B,
> > > > > > > + POWER_DOMAIN_AUX_IO_C,
> > > > > > > + POWER_DOMAIN_AUX_IO_D,
> > > > > > > + POWER_DOMAIN_AUX_IO_F,
> > > > > >
> > > > > > I know that I had suggested something very similar, but looking now
> > > > > > to the code it seems a big duplication of all other aux..
> > > > > >
> > > > > > I mean, on CNL
> > > > > >
> > > > > > POWER_DOMAIN_AUX_{B,C,D,F} are exactly the same as
> > > > > > POWER_DOMAIN_AUX__IO_{B,C,D,F}
> > > > > >
> > > > > > Only the AUX_IO A is different from the AUX_A because AUX_A
> > > > > > disables DMC.
> > > > > > So, question is: What about removing the AUX_A domain from DC_OFF
> > > > > > and just using AUX doamins... Well, on this case calling get/put
> > > > > > only for INTEL_GEN <= 10...
> > > > > >
> > > > > > So, yeap, not beautiful anyways.
> > > > > >
> > > > > > I'd like to hear from Imre what he had in mind for handling
> > > > > > AUX IOs and to know if he has any better idea for this case.
> > > > >
> > > > > Hm, so in general (for AUX transfers) to enable AUX-A we first need to
> > > > > disable DC states _except_ if we enable AUX-A for PSR where we want
> > > > > DC5/6 to stay enabled. Nice. Also not sure why the FW/HW can't have its
> > > > > own request bit..
> > > > >
> > > > > I don't have a better idea, but since on DDI where this matters PSR is
> > > > > tied to port A,
> > > >
> > > > SKL+ (or maybe even BDW?) can do PSR on any port actually. We just don't
> > > > make use of that capability currently.
> > >
> > > Ok. But still, one other idea would be to avoid the duplication Rodrigo
> > > also mentioned is to have:
> > >
> > > get_psr_aux_power()
> > > {
> > > if (!HAS_DDI())
> >
> > Err, correctly the above would be if (GEN < 10)
>
> Exactly what I was going to reply here :)
>
> >
> > > return;
> > >
> > > intel_display_power_get(port == PORT_A ? POWER_DOMAIN_AUX_IO_A :
> > > intel_dp->aux_power_domain);
>
> good idea. Although as Ville pointed out we don't support PSR on other ports
> it is better to do the right thing at least here.
>
> > > }
> > >
> > > and a put_psr_aux_power() accordingly. That way we only need to add one
> > > extra power domain for port A.
>
> Also maybe add a comment explaining the difference and purpose of POWER_DOMAIN_AUX_IO_A
> from POWER_DOMAIN_AUX_A along with POWER_DOMAIN_AUX_IO_A definition.
I'd sent this as a test patch to get a CI run but now that there's a
consensus on how we should do this, I'll write this up as proper patch.
Thanks for the feedback.
-DK
>
> Thanks,
> Rodrigo.
>
> > >
> > > --Imre
> > >
> > >
> > >
> > >
> > > >
> > > > > we could have only a POWER_DOMAIN_PSR and map it to the
> > > > > AUX-A power well where it's needed.
> > > > >
> > > > > --Imre
> > > > >
> > > > > >
> > > > > > > POWER_DOMAIN_GMBUS,
> > > > > > > POWER_DOMAIN_MODESET,
> > > > > > > POWER_DOMAIN_GT_IRQ,
> > > > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > > > > > index f20b25f98e5a..aa90f6a70689 100644
> > > > > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > > > > @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
> > > > > > > switch (encoder->port) {
> > > > > > > case PORT_A:
> > > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> > > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A;
> > > > > > > break;
> > > > > > > case PORT_B:
> > > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> > > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B;
> > > > > > > break;
> > > > > > > case PORT_C:
> > > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> > > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C;
> > > > > > > break;
> > > > > > > case PORT_D:
> > > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > > > > break;
> > > > > > > case PORT_E:
> > > > > > > /* FIXME: Check VBT for actual wiring of PORT E */
> > > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> > > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D;
> > > > > > > break;
> > > > > > > case PORT_F:
> > > > > > > intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
> > > > > > > + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F;
> > > > > > > break;
> > > > > > > default:
> > > > > > > MISSING_CASE(encoder->port);
> > > > > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > > > > > > index 898064e8bea7..c7c4180e41d8 100644
> > > > > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > > > > @@ -1071,6 +1071,7 @@ struct intel_dp {
> > > > > > > struct drm_dp_desc desc;
> > > > > > > struct drm_dp_aux aux;
> > > > > > > enum intel_display_power_domain aux_power_domain;
> > > > > > > + enum intel_display_power_domain aux_io_power_domain;
> > > > > > > uint8_t train_set[4];
> > > > > > > int panel_power_up_delay;
> > > > > > > int panel_power_down_delay;
> > > > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > > > > > > index 2ef374f936b9..62de8f0632b0 100644
> > > > > > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > > > > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > > > > > @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> > > > > > > EDP_PSR_DEBUG_MASK_HPD |
> > > > > > > EDP_PSR_DEBUG_MASK_LPSP);
> > > > > > > }
> > > > > > > +
> > > > > > > + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain);
> > > > > > > }
> > > > > > >
> > > > > > > /**
> > > > > > > @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
> > > > > > > else
> > > > > > > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> > > > > > > }
> > > > > > > +
> > > > > > > + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain);
> > > > > > > }
> > > > > > >
> > > > > > > /**
> > > > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > > > index 16790f2576ec..323c1babb0a0 100644
> > > > > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > > > > > @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > > > > > > return "AUX_D";
> > > > > > > case POWER_DOMAIN_AUX_F:
> > > > > > > return "AUX_F";
> > > > > > > + case POWER_DOMAIN_AUX_IO_A:
> > > > > > > + return "AUX_IO_A";
> > > > > > > + case POWER_DOMAIN_AUX_IO_B:
> > > > > > > + return "AUX_IO_B";
> > > > > > > + case POWER_DOMAIN_AUX_IO_C:
> > > > > > > + return "AUX_IO_C";
> > > > > > > + case POWER_DOMAIN_AUX_IO_D:
> > > > > > > + return "AUX_IO_D";
> > > > > > > + case POWER_DOMAIN_AUX_IO_F:
> > > > > > > + return "AUX_IO_F";
> > > > > > > case POWER_DOMAIN_GMBUS:
> > > > > > > return "GMBUS";
> > > > > > > case POWER_DOMAIN_INIT:
> > > > > > > @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \
> > > > > > > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> > > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \
> > > > > > > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \
> > > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > > #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \
> > > > > > > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \
> > > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > > #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \
> > > > > > > BIT_ULL(POWER_DOMAIN_AUX_D) | \
> > > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \
> > > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > > #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> > > > > > > BIT_ULL(POWER_DOMAIN_AUX_F) | \
> > > > > > > + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \
> > > > > > > BIT_ULL(POWER_DOMAIN_INIT))
> > > > > > > #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> > > > > > > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> > > > > > > --
> > > > > > > 2.14.1
> > > > > > >
> > > > > > > _______________________________________________
> > > > > > > Intel-gfx mailing list
> > > > > > > Intel-gfx@lists.freedesktop.org
> > > > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > > > _______________________________________________
> > > > > Intel-gfx mailing list
> > > > > Intel-gfx@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > >
> > > > --
> > > > Ville Syrjälä
> > > > Intel OTC
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2018-02-20 20:04 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-16 23:25 [CI] drm/i915/cnl: New power domain for AUX IO Dhinakaran Pandiyan
2018-02-16 23:57 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-02-17 0:27 ` [CI] " Rodrigo Vivi
2018-02-19 14:47 ` Imre Deak
2018-02-19 15:49 ` Ville Syrjälä
2018-02-20 15:35 ` Imre Deak
2018-02-20 16:25 ` Imre Deak
2018-02-20 18:44 ` Rodrigo Vivi
2018-02-20 20:04 ` Pandiyan, Dhinakaran
2018-02-17 0:45 ` ✗ Fi.CI.IGT: failure for " Patchwork
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