[U-Boot] [PATCH 1/4] i2c: rcar_iic: Allow IIC on RCar Gen2

[U-Boot] [PATCH 1/4] i2c: rcar_iic: Allow IIC on RCar Gen2

[Marek Vasut]

The IIC on Gen2 is compatible with this driver as well, allow it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
 drivers/i2c/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 7dbec775df..9d43690503 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -178,7 +178,7 @@ endif
 
 config SYS_I2C_RCAR_IIC
 	bool "Renesas RCar Gen3 IIC driver"
-	depends on RCAR_GEN3 && DM_I2C
+	depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
 	help
 	  Support for Renesas RCar Gen3 IIC controller.
 
-- 
2.15.1

[U-Boot] [PATCH 2/4] ARM: dts: rmobile: Enable I2C6 on Porter

[Marek Vasut]

Enable I2C6 bus on Porter to access the PMIC , ie. to reset the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
 arch/arm/dts/r8a7791-porter.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/r8a7791-porter.dts b/arch/arm/dts/r8a7791-porter.dts
index bc93bb24e4..0592aa7f49 100644
--- a/arch/arm/dts/r8a7791-porter.dts
+++ b/arch/arm/dts/r8a7791-porter.dts
@@ -351,6 +351,11 @@
 	};
 };
 
+&i2c6 {
+	status = "okay";
+	clock-frequency = <400000>;
+};
+
 &sata0 {
 	status = "okay";
 };
-- 
2.15.1

[U-Boot] [PATCH 3/4] ARM: rmobile: Replace SH I2C with IIC on Porter

[Marek Vasut]

Get rid of the SH I2C driver on Porter and enable the IIC driver
instead . The old SH I2C is completely broken on Porter anyway
and the DM/DT capable IIC driver allows access to the PMIC too.
Use the DM/DT capable driver instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
 configs/porter_defconfig |  3 +++
 include/configs/porter.h | 14 --------------
 2 files changed, 3 insertions(+), 14 deletions(-)

diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index c244a9c221..09776db003 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -50,6 +50,9 @@ CONFIG_SPL_CLK=y
 CONFIG_CLK_RENESAS=y
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_SYS_I2C_RCAR_IIC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_UNIPHIER=y
 CONFIG_SPI_FLASH=y
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 1816f2fd76..eb28d1afcc 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -49,20 +49,6 @@
 
 #define CONFIG_SYS_TMU_CLK_DIV	4
 
-/* i2c */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
-#define CONFIG_SYS_I2C_SH_SPEED0	400000
-#define CONFIG_SYS_I2C_SH_SPEED1	400000
-#define CONFIG_SYS_I2C_SH_SPEED2	400000
-#define CONFIG_SH_I2C_DATA_HIGH		4
-#define CONFIG_SH_I2C_DATA_LOW		5
-#define CONFIG_SH_I2C_CLOCK		10000000
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR	0x58 /* da9063 */
-
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"fdt_high=0xffffffff\0"		\
 	"initrd_high=0xffffffff\0"
-- 
2.15.1

[U-Boot] [PATCH 4/4] ARM: rmobile: Fix broken reset code on Porter

[Marek Vasut]

The 'reset' command did not work on Porter because the reset code
was accessing the wrong PMIC address over broken I2C bus driver.
Replace the code with DM-aware code and fix up the PMIC address.
This makes the 'reset' command work again.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
 board/renesas/porter/porter.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index dfefd7fb71..320841f27b 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -116,12 +116,25 @@ const struct rmobile_sysinfo sysinfo = {
 
 void reset_cpu(ulong addr)
 {
-	u8 val;
+	struct udevice *dev;
+	const u8 pmic_bus = 6;
+	const u8 pmic_addr = 0x5a;
+	u8 data;
+	int ret;
 
-	i2c_set_bus_num(2); /* PowerIC connected to ch2 */
-	i2c_read(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
-	val |= 0x02;
-	i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
+	ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev);
+	if (ret)
+		hang();
+
+	ret = dm_i2c_read(dev, 0x13, &data, 1);
+	if (ret)
+		hang();
+
+	data |= BIT(1);
+
+	ret = dm_i2c_write(dev, 0x13, &data, 1);
+	if (ret)
+		hang();
 }
 
 #ifdef CONFIG_SPL_BUILD
-- 
2.15.1