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* [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup
@ 2018-02-21  2:18 José Roberto de Souza
  2018-02-21  2:18 ` [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm José Roberto de Souza
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: José Roberto de Souza @ 2018-02-21  2:18 UTC (permalink / raw)
  To: intel-gfx

Just share the common code in PSR and PSR2.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2ef374f936b9..71801a25a2b3 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -88,11 +88,12 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
 	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
 	struct edp_vsc_psr psr_vsc;
 
+	memset(&psr_vsc, 0, sizeof(psr_vsc));
+	psr_vsc.sdp_header.HB0 = 0;
+	psr_vsc.sdp_header.HB1 = 0x7;
+
 	if (dev_priv->psr.psr2_support) {
 		/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
-		memset(&psr_vsc, 0, sizeof(psr_vsc));
-		psr_vsc.sdp_header.HB0 = 0;
-		psr_vsc.sdp_header.HB1 = 0x7;
 		if (dev_priv->psr.colorimetry_support &&
 		    dev_priv->psr.y_cord_support) {
 			psr_vsc.sdp_header.HB2 = 0x5;
@@ -106,9 +107,6 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
 		}
 	} else {
 		/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
-		memset(&psr_vsc, 0, sizeof(psr_vsc));
-		psr_vsc.sdp_header.HB0 = 0;
-		psr_vsc.sdp_header.HB1 = 0x7;
 		psr_vsc.sdp_header.HB2 = 0x2;
 		psr_vsc.sdp_header.HB3 = 0x8;
 	}
-- 
2.16.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm
  2018-02-21  2:18 [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup José Roberto de Souza
@ 2018-02-21  2:18 ` José Roberto de Souza
  2018-02-24  1:53   ` Pandiyan, Dhinakaran
  2018-02-21  2:18 ` [PATCH 3/3] drm/i915: Remove unused variable in hsw_write_infoframe() José Roberto de Souza
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 8+ messages in thread
From: José Roberto de Souza @ 2018-02-21  2:18 UTC (permalink / raw)
  To: intel-gfx

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 71801a25a2b3..3fc1bdd65b14 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -90,7 +90,7 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
 
 	memset(&psr_vsc, 0, sizeof(psr_vsc));
 	psr_vsc.sdp_header.HB0 = 0;
-	psr_vsc.sdp_header.HB1 = 0x7;
+	psr_vsc.sdp_header.HB1 = DP_SDP_VSC;
 
 	if (dev_priv->psr.psr2_support) {
 		/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
-- 
2.16.2

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 3/3] drm/i915: Remove unused variable in hsw_write_infoframe()
  2018-02-21  2:18 [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup José Roberto de Souza
  2018-02-21  2:18 ` [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm José Roberto de Souza
@ 2018-02-21  2:18 ` José Roberto de Souza
  2018-02-24  1:49   ` Pandiyan, Dhinakaran
  2018-02-21  2:45 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 8+ messages in thread
From: José Roberto de Souza @ 2018-02-21  2:18 UTC (permalink / raw)
  To: intel-gfx

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_hdmi.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index f5d7bfb43006..fe4bef081dae 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -381,14 +381,11 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder);
-	i915_reg_t data_reg;
 	int data_size = type == DP_SDP_VSC ?
 		VIDEO_DIP_VSC_DATA_SIZE : VIDEO_DIP_DATA_SIZE;
 	int i;
 	u32 val = I915_READ(ctl_reg);
 
-	data_reg = hsw_dip_data_reg(dev_priv, cpu_transcoder, type, 0);
-
 	val &= ~hsw_infoframe_enable(type);
 	I915_WRITE(ctl_reg, val);
 
-- 
2.16.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup
  2018-02-21  2:18 [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup José Roberto de Souza
  2018-02-21  2:18 ` [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm José Roberto de Souza
  2018-02-21  2:18 ` [PATCH 3/3] drm/i915: Remove unused variable in hsw_write_infoframe() José Roberto de Souza
@ 2018-02-21  2:45 ` Patchwork
  2018-02-21  7:25 ` ✗ Fi.CI.IGT: warning " Patchwork
  2018-02-24  1:52 ` [PATCH 1/3] " Pandiyan, Dhinakaran
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-02-21  2:45 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup
URL   : https://patchwork.freedesktop.org/series/38654/
State : success

== Summary ==

Series 38654v1 series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup
https://patchwork.freedesktop.org/api/1.0/series/38654/revisions/1/mbox/

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:421s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:421s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:372s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:480s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:284s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:483s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:479s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:465s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:453s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:561s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:414s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:283s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:509s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:384s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:407s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:455s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:407s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:447s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:489s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:451s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:489s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:591s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:426s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:500s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:516s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:484s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:469s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:405s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:429s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:508s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:397s

f727568c3b37c1349f635efcc67d64ac3cf77108 drm-tip: 2018y-02m-20d-20h-39m-03s UTC integration manifest
a4c1e6321400 drm/i915: Remove unused variable in hsw_write_infoframe()
417b2e90d998 drm/i915: Replace magic number with macro defined by drm
86a1576db299 drm/i915: Share PSR and PSR2 VSC setup

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8093/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* ✗ Fi.CI.IGT: warning for series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup
  2018-02-21  2:18 [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup José Roberto de Souza
                   ` (2 preceding siblings ...)
  2018-02-21  2:45 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup Patchwork
@ 2018-02-21  7:25 ` Patchwork
  2018-02-24  1:52 ` [PATCH 1/3] " Pandiyan, Dhinakaran
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-02-21  7:25 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup
URL   : https://patchwork.freedesktop.org/series/38654/
State : warning

== Summary ==

Test kms_cursor_crc:
        Subgroup cursor-256x256-suspend:
                incomplete -> PASS       (shard-hsw) fdo#103375
Test gem_eio:
        Subgroup in-flight-contexts:
                fail       -> PASS       (shard-hsw) fdo#104676
        Subgroup in-flight:
                pass       -> DMESG-WARN (shard-snb) fdo#104058
Test kms_flip:
        Subgroup flip-vs-expired-vblank-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#102887
Test kms_sysfs_edid_timing:
                pass       -> WARN       (shard-apl) fdo#100047
Test perf:
        Subgroup oa-exponents:
                pass       -> FAIL       (shard-apl) fdo#102254
Test kms_chv_cursor_fail:
        Subgroup pipe-b-64x64-right-edge:
                pass       -> DMESG-WARN (shard-snb)
        Subgroup pipe-b-128x128-left-edge:
                pass       -> DMESG-WARN (shard-snb)
Test kms_vblank:
        Subgroup pipe-c-wait-idle:
                dmesg-warn -> PASS       (shard-hsw) fdo#102614

fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#104676 https://bugs.freedesktop.org/show_bug.cgi?id=104676
fdo#104058 https://bugs.freedesktop.org/show_bug.cgi?id=104058
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#102254 https://bugs.freedesktop.org/show_bug.cgi?id=102254
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614

shard-apl        total:3367 pass:1763 dwarn:1   dfail:0   fail:9   skip:1592 time:11948s
shard-hsw        total:3429 pass:1759 dwarn:1   dfail:0   fail:3   skip:1665 time:11653s
shard-snb        total:3429 pass:1347 dwarn:4   dfail:0   fail:2   skip:2076 time:6580s
Blacklisted hosts:
shard-kbl        total:3429 pass:1926 dwarn:1   dfail:0   fail:9   skip:1493 time:9598s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8093/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 3/3] drm/i915: Remove unused variable in hsw_write_infoframe()
  2018-02-21  2:18 ` [PATCH 3/3] drm/i915: Remove unused variable in hsw_write_infoframe() José Roberto de Souza
@ 2018-02-24  1:49   ` Pandiyan, Dhinakaran
  0 siblings, 0 replies; 8+ messages in thread
From: Pandiyan, Dhinakaran @ 2018-02-24  1:49 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, 2018-02-20 at 18:18 -0800, José Roberto de Souza wrote:
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index f5d7bfb43006..fe4bef081dae 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -381,14 +381,11 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>  	i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder);
> -	i915_reg_t data_reg;
>  	int data_size = type == DP_SDP_VSC ?
>  		VIDEO_DIP_VSC_DATA_SIZE : VIDEO_DIP_DATA_SIZE;
>  	int i;
>  	u32 val = I915_READ(ctl_reg);
>  
> -	data_reg = hsw_dip_data_reg(dev_priv, cpu_transcoder, type, 0);
> -

Don't see any use for data_reg.

hsw_dip_data_reg() is somewhat useful as it warns if 'type' happens to
be invalid. But hsw_dip_data_reg() following this hunk should take care
of the warning.

Reviewed-by: Dhinakaran Pandiyan <dhinakara.pandiyan@intel.com> 


>  	val &= ~hsw_infoframe_enable(type);
>  	I915_WRITE(ctl_reg, val);
>  
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup
  2018-02-21  2:18 [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup José Roberto de Souza
                   ` (3 preceding siblings ...)
  2018-02-21  7:25 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2018-02-24  1:52 ` Pandiyan, Dhinakaran
  4 siblings, 0 replies; 8+ messages in thread
From: Pandiyan, Dhinakaran @ 2018-02-24  1:52 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx


On Tue, 2018-02-20 at 18:18 -0800, José Roberto de Souza wrote:
> Just share the common code in PSR and PSR2.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 2ef374f936b9..71801a25a2b3 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -88,11 +88,12 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
>  	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
>  	struct edp_vsc_psr psr_vsc;
>  
> +	memset(&psr_vsc, 0, sizeof(psr_vsc));
> +	psr_vsc.sdp_header.HB0 = 0;
> +	psr_vsc.sdp_header.HB1 = 0x7;
> +
>  

I don't think this is very useful, the original version is easier to
read IMO.


> 	if (dev_priv->psr.psr2_support) {
>  		/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
> -		memset(&psr_vsc, 0, sizeof(psr_vsc));
> -		psr_vsc.sdp_header.HB0 = 0;
> -		psr_vsc.sdp_header.HB1 = 0x7;
>  		if (dev_priv->psr.colorimetry_support &&
>  		    dev_priv->psr.y_cord_support) {
>  			psr_vsc.sdp_header.HB2 = 0x5;
> @@ -106,9 +107,6 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
>  		}
>  	} else {
>  		/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
> -		memset(&psr_vsc, 0, sizeof(psr_vsc));
> -		psr_vsc.sdp_header.HB0 = 0;
> -		psr_vsc.sdp_header.HB1 = 0x7;
>  		psr_vsc.sdp_header.HB2 = 0x2;
>  		psr_vsc.sdp_header.HB3 = 0x8;
>  	}
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm
  2018-02-21  2:18 ` [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm José Roberto de Souza
@ 2018-02-24  1:53   ` Pandiyan, Dhinakaran
  0 siblings, 0 replies; 8+ messages in thread
From: Pandiyan, Dhinakaran @ 2018-02-24  1:53 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx


On Tue, 2018-02-20 at 18:18 -0800, José Roberto de Souza wrote:
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 71801a25a2b3..3fc1bdd65b14 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -90,7 +90,7 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
>  
>  	memset(&psr_vsc, 0, sizeof(psr_vsc));
>  	psr_vsc.sdp_header.HB0 = 0;
> -	psr_vsc.sdp_header.HB1 = 0x7;
> +	psr_vsc.sdp_header.HB1 = DP_SDP_VSC;
>  

Do you mind rebasing this without Patch 1?


>  	if (dev_priv->psr.psr2_support) {
>  		/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2018-02-24  1:53 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-21  2:18 [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup José Roberto de Souza
2018-02-21  2:18 ` [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm José Roberto de Souza
2018-02-24  1:53   ` Pandiyan, Dhinakaran
2018-02-21  2:18 ` [PATCH 3/3] drm/i915: Remove unused variable in hsw_write_infoframe() José Roberto de Souza
2018-02-24  1:49   ` Pandiyan, Dhinakaran
2018-02-21  2:45 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Share PSR and PSR2 VSC setup Patchwork
2018-02-21  7:25 ` ✗ Fi.CI.IGT: warning " Patchwork
2018-02-24  1:52 ` [PATCH 1/3] " Pandiyan, Dhinakaran

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