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* [igt CI 1/3] igt/gem_exec_schedule: Trim max number of contexts used
@ 2018-02-20 16:53 ` Chris Wilson
  0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2018-02-20 16:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

icl offers a much reduced context space, and in its simplest setup we
cannot allocate one context per priority level, so trim the number and
reuse the same context for multiple priority requests.

v2: Bump the MAX to 1024 (still lower than the ~4096 previously in use)
v3: Also limit NCTX to MAX_CONTEXTS for wide-*

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/gem_exec_schedule.c | 58 ++++++++++++++++++++++++++---------------------
 1 file changed, 32 insertions(+), 26 deletions(-)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index 05f7ae38..1fc7c697 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -43,6 +43,8 @@
 #define BUSY_QLEN 8
 #define MAX_ELSP_QLEN 16
 
+#define MAX_CONTEXTS 1024
+
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
 static void store_dword(int fd, uint32_t ctx, unsigned ring,
@@ -556,8 +558,8 @@ static void preemptive_hang(int fd, unsigned ring)
 static void deep(int fd, unsigned ring)
 {
 #define XS 8
-	const unsigned int nctx = MAX_PRIO - MIN_PRIO;
-	const unsigned size = ALIGN(4*nctx, 4096);
+	const unsigned int nreq = MAX_PRIO - MIN_PRIO;
+	const unsigned size = ALIGN(4*nreq, 4096);
 	struct timespec tv = {};
 	struct cork cork;
 	uint32_t result, dep[XS];
@@ -565,10 +567,9 @@ static void deep(int fd, unsigned ring)
 	uint32_t *ptr;
 	uint32_t *ctx;
 
-	ctx = malloc(sizeof(*ctx) * nctx);
-	for (int n = 0; n < nctx; n++) {
+	ctx = malloc(sizeof(*ctx) * MAX_CONTEXTS);
+	for (int n = 0; n < MAX_CONTEXTS; n++) {
 		ctx[n] = gem_context_create(fd);
-		gem_context_set_priority(fd, ctx[n], MAX_PRIO - nctx + n);
 	}
 
 	result = gem_create(fd, size);
@@ -592,7 +593,7 @@ static void deep(int fd, unsigned ring)
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = XS + 2;
 		execbuf.flags = ring;
-		for (int n = 0; n < nctx; n++) {
+		for (int n = 0; n < MAX_CONTEXTS; n++) {
 			execbuf.rsvd1 = ctx[n];
 			gem_execbuf(fd, &execbuf);
 		}
@@ -603,22 +604,29 @@ static void deep(int fd, unsigned ring)
 	plug(fd, &cork);
 
 	/* Create a deep dependency chain, with a few branches */
-	for (int n = 0; n < nctx && igt_seconds_elapsed(&tv) < 8; n++)
+	for (int n = 0; n < nreq && igt_seconds_elapsed(&tv) < 8; n++) {
+		uint32_t context = ctx[n % MAX_CONTEXTS];
+		gem_context_set_priority(fd, context, MAX_PRIO - nreq + n);
+
 		for (int m = 0; m < XS; m++)
-			store_dword(fd, ctx[n], ring, dep[m], 4*n, ctx[n], cork.handle, I915_GEM_DOMAIN_INSTRUCTION);
+			store_dword(fd, context, ring, dep[m], 4*n, context, cork.handle, I915_GEM_DOMAIN_INSTRUCTION);
+	}
+
+	for (int n = 0; n < nreq && igt_seconds_elapsed(&tv) < 6; n++) {
+		uint32_t context = ctx[n % MAX_CONTEXTS];
+		gem_context_set_priority(fd, context, MAX_PRIO - nreq + n);
 
-	for (int n = 0; n < nctx && igt_seconds_elapsed(&tv) < 6; n++) {
 		for (int m = 0; m < XS; m++) {
-			store_dword(fd, ctx[n], ring, result, 4*n, ctx[n], dep[m], 0);
-			store_dword(fd, ctx[n], ring, result, 4*m, ctx[n], 0, I915_GEM_DOMAIN_INSTRUCTION);
+			store_dword(fd, context, ring, result, 4*n, context, dep[m], 0);
+			store_dword(fd, context, ring, result, 4*m, context, 0, I915_GEM_DOMAIN_INSTRUCTION);
 		}
-		expected = ctx[n];
+		expected = context;
 	}
 
 	unplug_show_queue(fd, &cork, ring);
 	igt_require(expected); /* too slow */
 
-	for (int n = 0; n < nctx; n++)
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		gem_context_destroy(fd, ctx[n]);
 
 	for (int m = 0; m < XS; m++) {
@@ -627,8 +635,8 @@ static void deep(int fd, unsigned ring)
 				I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 		gem_close(fd, dep[m]);
 
-		for (int n = 0; n < nctx; n++)
-			igt_assert_eq_u32(ptr[n], ctx[n]);
+		for (int n = 0; n < nreq; n++)
+			igt_assert_eq_u32(ptr[n], ctx[n % MAX_CONTEXTS]);
 		munmap(ptr, size);
 	}
 
@@ -719,7 +727,6 @@ static unsigned int measure_ring_size(int fd, unsigned int ring)
 
 static void wide(int fd, unsigned ring)
 {
-#define NCTX 4096
 	struct timespec tv = {};
 	unsigned int ring_size = measure_ring_size(fd, ring);
 
@@ -729,11 +736,11 @@ static void wide(int fd, unsigned ring)
 	uint32_t *ctx;
 	unsigned int count;
 
-	ctx = malloc(sizeof(*ctx)*NCTX);
-	for (int n = 0; n < NCTX; n++)
+	ctx = malloc(sizeof(*ctx)*MAX_CONTEXTS);
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		ctx[n] = gem_context_create(fd);
 
-	result = gem_create(fd, 4*NCTX);
+	result = gem_create(fd, 4*MAX_CONTEXTS);
 
 	plug(fd, &cork);
 
@@ -741,28 +748,27 @@ static void wide(int fd, unsigned ring)
 	for (count = 0;
 	     igt_seconds_elapsed(&tv) < 5 && count < ring_size;
 	     count++) {
-		for (int n = 0; n < NCTX; n++) {
+		for (int n = 0; n < MAX_CONTEXTS; n++) {
 			store_dword(fd, ctx[n], ring, result, 4*n, ctx[n], cork.handle, I915_GEM_DOMAIN_INSTRUCTION);
 		}
 	}
 	igt_info("Submitted %d requests over %d contexts in %.1fms\n",
-		 count, NCTX, igt_nsec_elapsed(&tv) * 1e-6);
+		 count, MAX_CONTEXTS, igt_nsec_elapsed(&tv) * 1e-6);
 
 	unplug_show_queue(fd, &cork, ring);
 
-	for (int n = 0; n < NCTX; n++)
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		gem_context_destroy(fd, ctx[n]);
 
-	ptr = gem_mmap__gtt(fd, result, 4*NCTX, PROT_READ);
+	ptr = gem_mmap__gtt(fd, result, 4*MAX_CONTEXTS, PROT_READ);
 	gem_set_domain(fd, result, /* no write hazard lies! */
 			I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
-	for (int n = 0; n < NCTX; n++)
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		igt_assert_eq_u32(ptr[n], ctx[n]);
-	munmap(ptr, 4*NCTX);
+	munmap(ptr, 4*MAX_CONTEXTS);
 
 	gem_close(fd, result);
 	free(ctx);
-#undef NCTX
 }
 
 static void reorder_wide(int fd, unsigned ring)
-- 
2.16.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] [igt CI 1/3] igt/gem_exec_schedule: Trim max number of contexts used
@ 2018-02-20 16:53 ` Chris Wilson
  0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2018-02-20 16:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

icl offers a much reduced context space, and in its simplest setup we
cannot allocate one context per priority level, so trim the number and
reuse the same context for multiple priority requests.

v2: Bump the MAX to 1024 (still lower than the ~4096 previously in use)
v3: Also limit NCTX to MAX_CONTEXTS for wide-*

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/gem_exec_schedule.c | 58 ++++++++++++++++++++++++++---------------------
 1 file changed, 32 insertions(+), 26 deletions(-)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index 05f7ae38..1fc7c697 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -43,6 +43,8 @@
 #define BUSY_QLEN 8
 #define MAX_ELSP_QLEN 16
 
+#define MAX_CONTEXTS 1024
+
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
 static void store_dword(int fd, uint32_t ctx, unsigned ring,
@@ -556,8 +558,8 @@ static void preemptive_hang(int fd, unsigned ring)
 static void deep(int fd, unsigned ring)
 {
 #define XS 8
-	const unsigned int nctx = MAX_PRIO - MIN_PRIO;
-	const unsigned size = ALIGN(4*nctx, 4096);
+	const unsigned int nreq = MAX_PRIO - MIN_PRIO;
+	const unsigned size = ALIGN(4*nreq, 4096);
 	struct timespec tv = {};
 	struct cork cork;
 	uint32_t result, dep[XS];
@@ -565,10 +567,9 @@ static void deep(int fd, unsigned ring)
 	uint32_t *ptr;
 	uint32_t *ctx;
 
-	ctx = malloc(sizeof(*ctx) * nctx);
-	for (int n = 0; n < nctx; n++) {
+	ctx = malloc(sizeof(*ctx) * MAX_CONTEXTS);
+	for (int n = 0; n < MAX_CONTEXTS; n++) {
 		ctx[n] = gem_context_create(fd);
-		gem_context_set_priority(fd, ctx[n], MAX_PRIO - nctx + n);
 	}
 
 	result = gem_create(fd, size);
@@ -592,7 +593,7 @@ static void deep(int fd, unsigned ring)
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = XS + 2;
 		execbuf.flags = ring;
-		for (int n = 0; n < nctx; n++) {
+		for (int n = 0; n < MAX_CONTEXTS; n++) {
 			execbuf.rsvd1 = ctx[n];
 			gem_execbuf(fd, &execbuf);
 		}
@@ -603,22 +604,29 @@ static void deep(int fd, unsigned ring)
 	plug(fd, &cork);
 
 	/* Create a deep dependency chain, with a few branches */
-	for (int n = 0; n < nctx && igt_seconds_elapsed(&tv) < 8; n++)
+	for (int n = 0; n < nreq && igt_seconds_elapsed(&tv) < 8; n++) {
+		uint32_t context = ctx[n % MAX_CONTEXTS];
+		gem_context_set_priority(fd, context, MAX_PRIO - nreq + n);
+
 		for (int m = 0; m < XS; m++)
-			store_dword(fd, ctx[n], ring, dep[m], 4*n, ctx[n], cork.handle, I915_GEM_DOMAIN_INSTRUCTION);
+			store_dword(fd, context, ring, dep[m], 4*n, context, cork.handle, I915_GEM_DOMAIN_INSTRUCTION);
+	}
+
+	for (int n = 0; n < nreq && igt_seconds_elapsed(&tv) < 6; n++) {
+		uint32_t context = ctx[n % MAX_CONTEXTS];
+		gem_context_set_priority(fd, context, MAX_PRIO - nreq + n);
 
-	for (int n = 0; n < nctx && igt_seconds_elapsed(&tv) < 6; n++) {
 		for (int m = 0; m < XS; m++) {
-			store_dword(fd, ctx[n], ring, result, 4*n, ctx[n], dep[m], 0);
-			store_dword(fd, ctx[n], ring, result, 4*m, ctx[n], 0, I915_GEM_DOMAIN_INSTRUCTION);
+			store_dword(fd, context, ring, result, 4*n, context, dep[m], 0);
+			store_dword(fd, context, ring, result, 4*m, context, 0, I915_GEM_DOMAIN_INSTRUCTION);
 		}
-		expected = ctx[n];
+		expected = context;
 	}
 
 	unplug_show_queue(fd, &cork, ring);
 	igt_require(expected); /* too slow */
 
-	for (int n = 0; n < nctx; n++)
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		gem_context_destroy(fd, ctx[n]);
 
 	for (int m = 0; m < XS; m++) {
@@ -627,8 +635,8 @@ static void deep(int fd, unsigned ring)
 				I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 		gem_close(fd, dep[m]);
 
-		for (int n = 0; n < nctx; n++)
-			igt_assert_eq_u32(ptr[n], ctx[n]);
+		for (int n = 0; n < nreq; n++)
+			igt_assert_eq_u32(ptr[n], ctx[n % MAX_CONTEXTS]);
 		munmap(ptr, size);
 	}
 
@@ -719,7 +727,6 @@ static unsigned int measure_ring_size(int fd, unsigned int ring)
 
 static void wide(int fd, unsigned ring)
 {
-#define NCTX 4096
 	struct timespec tv = {};
 	unsigned int ring_size = measure_ring_size(fd, ring);
 
@@ -729,11 +736,11 @@ static void wide(int fd, unsigned ring)
 	uint32_t *ctx;
 	unsigned int count;
 
-	ctx = malloc(sizeof(*ctx)*NCTX);
-	for (int n = 0; n < NCTX; n++)
+	ctx = malloc(sizeof(*ctx)*MAX_CONTEXTS);
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		ctx[n] = gem_context_create(fd);
 
-	result = gem_create(fd, 4*NCTX);
+	result = gem_create(fd, 4*MAX_CONTEXTS);
 
 	plug(fd, &cork);
 
@@ -741,28 +748,27 @@ static void wide(int fd, unsigned ring)
 	for (count = 0;
 	     igt_seconds_elapsed(&tv) < 5 && count < ring_size;
 	     count++) {
-		for (int n = 0; n < NCTX; n++) {
+		for (int n = 0; n < MAX_CONTEXTS; n++) {
 			store_dword(fd, ctx[n], ring, result, 4*n, ctx[n], cork.handle, I915_GEM_DOMAIN_INSTRUCTION);
 		}
 	}
 	igt_info("Submitted %d requests over %d contexts in %.1fms\n",
-		 count, NCTX, igt_nsec_elapsed(&tv) * 1e-6);
+		 count, MAX_CONTEXTS, igt_nsec_elapsed(&tv) * 1e-6);
 
 	unplug_show_queue(fd, &cork, ring);
 
-	for (int n = 0; n < NCTX; n++)
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		gem_context_destroy(fd, ctx[n]);
 
-	ptr = gem_mmap__gtt(fd, result, 4*NCTX, PROT_READ);
+	ptr = gem_mmap__gtt(fd, result, 4*MAX_CONTEXTS, PROT_READ);
 	gem_set_domain(fd, result, /* no write hazard lies! */
 			I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
-	for (int n = 0; n < NCTX; n++)
+	for (int n = 0; n < MAX_CONTEXTS; n++)
 		igt_assert_eq_u32(ptr[n], ctx[n]);
-	munmap(ptr, 4*NCTX);
+	munmap(ptr, 4*MAX_CONTEXTS);
 
 	gem_close(fd, result);
 	free(ctx);
-#undef NCTX
 }
 
 static void reorder_wide(int fd, unsigned ring)
-- 
2.16.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt CI 2/3] igt/gem_exec_schedule: Dump the engine info prior to sync on preempt_other
  2018-02-20 16:53 ` [igt-dev] " Chris Wilson
@ 2018-02-20 16:53   ` Chris Wilson
  -1 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2018-02-20 16:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

It is useful to dump the request layout between engines  help debug
ordering issues and stuck preemption, so add it to preempt_other().

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/gem_exec_schedule.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index 1fc7c697..c9c4452e 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -450,6 +450,7 @@ static void preempt_other(int fd, unsigned ring)
 		    result, (n + 1)*sizeof(uint32_t), n + 1,
 		    0, I915_GEM_DOMAIN_RENDER);
 
+	igt_debugfs_dump(fd, "i915_engine_info");
 	gem_set_domain(fd, result, I915_GEM_DOMAIN_GTT, 0);
 
 	for (i = 0; i < n; i++) {
-- 
2.16.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] [igt CI 2/3] igt/gem_exec_schedule: Dump the engine info prior to sync on preempt_other
@ 2018-02-20 16:53   ` Chris Wilson
  0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2018-02-20 16:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

It is useful to dump the request layout between engines  help debug
ordering issues and stuck preemption, so add it to preempt_other().

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/gem_exec_schedule.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index 1fc7c697..c9c4452e 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -450,6 +450,7 @@ static void preempt_other(int fd, unsigned ring)
 		    result, (n + 1)*sizeof(uint32_t), n + 1,
 		    0, I915_GEM_DOMAIN_RENDER);
 
+	igt_debugfs_dump(fd, "i915_engine_info");
 	gem_set_domain(fd, result, I915_GEM_DOMAIN_GTT, 0);
 
 	for (i = 0; i < n; i++) {
-- 
2.16.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt CI 3/3] igt/gem_exec_schedule: Replace constant 16 with its magic macro
  2018-02-20 16:53 ` [igt-dev] " Chris Wilson
@ 2018-02-20 16:53   ` Chris Wilson
  -1 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2018-02-20 16:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

s/16/MAX_ELSP_QLEN/ as appropriate

v2: Use ARRAY_SIZE for loop bounds over fixed size arrays

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/gem_exec_schedule.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index c9c4452e..5f24df33 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -40,9 +40,10 @@
 #define MAX_PRIO LOCAL_I915_CONTEXT_MAX_USER_PRIORITY
 #define MIN_PRIO LOCAL_I915_CONTEXT_MIN_USER_PRIORITY
 
-#define BUSY_QLEN 8
 #define MAX_ELSP_QLEN 16
 
+#define MAX_ENGINES 16
+
 #define MAX_CONTEXTS 1024
 
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
@@ -146,7 +147,7 @@ static uint32_t create_highest_priority(int fd)
 
 static void unplug_show_queue(int fd, struct cork *c, unsigned int engine)
 {
-	igt_spin_t *spin[BUSY_QLEN];
+	igt_spin_t *spin[MAX_ELSP_QLEN];
 
 	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		uint32_t ctx = create_highest_priority(fd);
@@ -201,7 +202,7 @@ static bool ignore_engine(int fd, unsigned engine)
 static void smoketest(int fd, unsigned ring, unsigned timeout)
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
-	unsigned engines[16];
+	unsigned engines[MAX_ENGINES];
 	unsigned nengine;
 	unsigned engine;
 	uint32_t scratch;
@@ -382,7 +383,7 @@ static void preempt(int fd, unsigned ring, unsigned flags)
 	if (flags & HANG_LP)
 		hang = igt_hang_ctx(fd, ctx[LO], ring, 0, NULL);
 
-	for (int n = 0; n < 16; n++) {
+	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		if (flags & NEW_CTX) {
 			gem_context_destroy(fd, ctx[LO]);
 			ctx[LO] = gem_context_create(fd);
@@ -398,7 +399,7 @@ static void preempt(int fd, unsigned ring, unsigned flags)
 		igt_assert(gem_bo_busy(fd, spin[0]->handle));
 	}
 
-	for (int n = 0; n < 16; n++)
+	for (int n = 0; n < ARRAY_SIZE(spin); n++)
 		igt_spin_batch_free(fd, spin[n]);
 
 	if (flags & HANG_LP)
@@ -415,7 +416,7 @@ static void preempt_other(int fd, unsigned ring)
 {
 	uint32_t result = gem_create(fd, 4096);
 	uint32_t *ptr = gem_mmap__gtt(fd, result, 4096, PROT_READ);
-	igt_spin_t *spin[MAX_ELSP_QLEN];
+	igt_spin_t *spin[MAX_ENGINES];
 	unsigned int other;
 	unsigned int n, i;
 	uint32_t ctx[3];
@@ -440,6 +441,8 @@ static void preempt_other(int fd, unsigned ring)
 
 	n = 0;
 	for_each_engine(fd, other) {
+		igt_assert(n < ARRAY_SIZE(spin));
+
 		spin[n] = __igt_spin_batch_new(fd, ctx[NOISE], other, 0);
 		store_dword(fd, ctx[LO], other,
 			    result, (n + 1)*sizeof(uint32_t), n + 1,
@@ -532,7 +535,7 @@ static void preemptive_hang(int fd, unsigned ring)
 	ctx[HI] = gem_context_create(fd);
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
 
-	for (int n = 0; n < 16; n++) {
+	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		ctx[LO] = gem_context_create(fd);
 		gem_context_set_priority(fd, ctx[LO], MIN_PRIO);
 
@@ -544,7 +547,7 @@ static void preemptive_hang(int fd, unsigned ring)
 	hang = igt_hang_ctx(fd, ctx[HI], ring, 0, NULL);
 	igt_post_hang_ring(fd, hang);
 
-	for (int n = 0; n < 16; n++) {
+	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		/* Current behavior is to execute requests in order of submission.
 		 * This is subject to change as the scheduler evolve. The test should
 		 * be updated to reflect such changes.
-- 
2.16.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] [igt CI 3/3] igt/gem_exec_schedule: Replace constant 16 with its magic macro
@ 2018-02-20 16:53   ` Chris Wilson
  0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2018-02-20 16:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

s/16/MAX_ELSP_QLEN/ as appropriate

v2: Use ARRAY_SIZE for loop bounds over fixed size arrays

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/gem_exec_schedule.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index c9c4452e..5f24df33 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -40,9 +40,10 @@
 #define MAX_PRIO LOCAL_I915_CONTEXT_MAX_USER_PRIORITY
 #define MIN_PRIO LOCAL_I915_CONTEXT_MIN_USER_PRIORITY
 
-#define BUSY_QLEN 8
 #define MAX_ELSP_QLEN 16
 
+#define MAX_ENGINES 16
+
 #define MAX_CONTEXTS 1024
 
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
@@ -146,7 +147,7 @@ static uint32_t create_highest_priority(int fd)
 
 static void unplug_show_queue(int fd, struct cork *c, unsigned int engine)
 {
-	igt_spin_t *spin[BUSY_QLEN];
+	igt_spin_t *spin[MAX_ELSP_QLEN];
 
 	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		uint32_t ctx = create_highest_priority(fd);
@@ -201,7 +202,7 @@ static bool ignore_engine(int fd, unsigned engine)
 static void smoketest(int fd, unsigned ring, unsigned timeout)
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
-	unsigned engines[16];
+	unsigned engines[MAX_ENGINES];
 	unsigned nengine;
 	unsigned engine;
 	uint32_t scratch;
@@ -382,7 +383,7 @@ static void preempt(int fd, unsigned ring, unsigned flags)
 	if (flags & HANG_LP)
 		hang = igt_hang_ctx(fd, ctx[LO], ring, 0, NULL);
 
-	for (int n = 0; n < 16; n++) {
+	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		if (flags & NEW_CTX) {
 			gem_context_destroy(fd, ctx[LO]);
 			ctx[LO] = gem_context_create(fd);
@@ -398,7 +399,7 @@ static void preempt(int fd, unsigned ring, unsigned flags)
 		igt_assert(gem_bo_busy(fd, spin[0]->handle));
 	}
 
-	for (int n = 0; n < 16; n++)
+	for (int n = 0; n < ARRAY_SIZE(spin); n++)
 		igt_spin_batch_free(fd, spin[n]);
 
 	if (flags & HANG_LP)
@@ -415,7 +416,7 @@ static void preempt_other(int fd, unsigned ring)
 {
 	uint32_t result = gem_create(fd, 4096);
 	uint32_t *ptr = gem_mmap__gtt(fd, result, 4096, PROT_READ);
-	igt_spin_t *spin[MAX_ELSP_QLEN];
+	igt_spin_t *spin[MAX_ENGINES];
 	unsigned int other;
 	unsigned int n, i;
 	uint32_t ctx[3];
@@ -440,6 +441,8 @@ static void preempt_other(int fd, unsigned ring)
 
 	n = 0;
 	for_each_engine(fd, other) {
+		igt_assert(n < ARRAY_SIZE(spin));
+
 		spin[n] = __igt_spin_batch_new(fd, ctx[NOISE], other, 0);
 		store_dword(fd, ctx[LO], other,
 			    result, (n + 1)*sizeof(uint32_t), n + 1,
@@ -532,7 +535,7 @@ static void preemptive_hang(int fd, unsigned ring)
 	ctx[HI] = gem_context_create(fd);
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
 
-	for (int n = 0; n < 16; n++) {
+	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		ctx[LO] = gem_context_create(fd);
 		gem_context_set_priority(fd, ctx[LO], MIN_PRIO);
 
@@ -544,7 +547,7 @@ static void preemptive_hang(int fd, unsigned ring)
 	hang = igt_hang_ctx(fd, ctx[HI], ring, 0, NULL);
 	igt_post_hang_ring(fd, hang);
 
-	for (int n = 0; n < 16; n++) {
+	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		/* Current behavior is to execute requests in order of submission.
 		 * This is subject to change as the scheduler evolve. The test should
 		 * be updated to reflect such changes.
-- 
2.16.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] igt/gem_exec_schedule: Trim max number of contexts used
  2018-02-20 16:53 ` [igt-dev] " Chris Wilson
                   ` (2 preceding siblings ...)
  (?)
@ 2018-02-20 21:39 ` Patchwork
  -1 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-02-20 21:39 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev

== Series Details ==

Series: series starting with [CI,1/3] igt/gem_exec_schedule: Trim max number of contexts used
URL   : https://patchwork.freedesktop.org/series/38610/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
4340b479e7769eb619249600328b916fb16949da igt/gem_fenced_exec_thrash: Use fixed durations

with latest DRM-Tip kernel build CI_DRM_3813
f727568c3b37 drm-tip: 2018y-02m-20d-20h-39m-03s UTC integration manifest

No testlist changes.

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:416s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:424s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:374s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:490s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:284s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:481s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:484s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:468s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:457s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:564s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:415s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:286s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:514s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:386s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:410s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:447s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:413s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:451s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:489s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:447s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:494s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:582s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:430s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:502s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:520s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:492s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:475s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:406s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:431s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:394s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_964/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [igt-dev] ✗ Fi.CI.IGT: warning for series starting with [CI,1/3] igt/gem_exec_schedule: Trim max number of contexts used
  2018-02-20 16:53 ` [igt-dev] " Chris Wilson
                   ` (3 preceding siblings ...)
  (?)
@ 2018-02-21  7:08 ` Patchwork
  -1 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-02-21  7:08 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev

== Series Details ==

Series: series starting with [CI,1/3] igt/gem_exec_schedule: Trim max number of contexts used
URL   : https://patchwork.freedesktop.org/series/38610/
State : warning

== Summary ==

Test gem_eio:
        Subgroup hibernate:
                pass       -> DMESG-WARN (shard-snb)
                pass       -> DMESG-WARN (shard-hsw) fdo#103540
        Subgroup in-flight-contexts:
                fail       -> PASS       (shard-hsw) fdo#104676 +1
Test kms_flip:
        Subgroup 2x-wf_vblank-ts-check-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#103928
Test kms_vblank:
        Subgroup pipe-c-wait-idle:
                dmesg-warn -> PASS       (shard-hsw)
Test perf:
        Subgroup blocking:
                pass       -> FAIL       (shard-hsw) fdo#102252
        Subgroup enable-disable:
                pass       -> FAIL       (shard-apl) fdo#103715
Test kms_rotation_crc:
        Subgroup primary-rotation-180:
                fail       -> PASS       (shard-snb) fdo#103925 +1
Test kms_plane_lowres:
        Subgroup pipe-c-tiling-y:
                pass       -> FAIL       (shard-apl) fdo#103166

fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#104676 https://bugs.freedesktop.org/show_bug.cgi?id=104676
fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103715 https://bugs.freedesktop.org/show_bug.cgi?id=103715
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166

shard-apl        total:3343 pass:1753 dwarn:1   dfail:0   fail:10  skip:1578 time:12103s
shard-hsw        total:3341 pass:1714 dwarn:2   dfail:0   fail:3   skip:1620 time:10818s
shard-snb        total:3429 pass:1349 dwarn:2   dfail:0   fail:2   skip:2076 time:6582s
Blacklisted hosts:
shard-kbl        total:3429 pass:1928 dwarn:3   dfail:0   fail:9   skip:1489 time:9618s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_964/shards.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2018-02-21  7:08 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-20 16:53 [igt CI 1/3] igt/gem_exec_schedule: Trim max number of contexts used Chris Wilson
2018-02-20 16:53 ` [igt-dev] " Chris Wilson
2018-02-20 16:53 ` [igt CI 2/3] igt/gem_exec_schedule: Dump the engine info prior to sync on preempt_other Chris Wilson
2018-02-20 16:53   ` [igt-dev] " Chris Wilson
2018-02-20 16:53 ` [igt CI 3/3] igt/gem_exec_schedule: Replace constant 16 with its magic macro Chris Wilson
2018-02-20 16:53   ` [igt-dev] " Chris Wilson
2018-02-20 21:39 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] igt/gem_exec_schedule: Trim max number of contexts used Patchwork
2018-02-21  7:08 ` [igt-dev] ✗ Fi.CI.IGT: warning " Patchwork

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