* [RFC] drm/i915: Eliminate devid sprinkle
@ 2018-02-22 8:09 Tvrtko Ursulin
2018-02-22 8:16 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (5 more replies)
0 siblings, 6 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2018-02-22 8:09 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Introduce subplatform mask to eliminate throughout the code devid checking
sprinkle, mostly courtesy of IS_*_UL[TX] macros.
Subplatform mask initialization is moved either to static tables (Ironlake
M) or runtime device info init (Pineview, Haswell, Broadwell, Skylake,
Kabylake, Coffeelake and Cannonlake).
text data bss dec hex filename
1673630 59691 5064 1738385 1a8691 i915.ko.0
1673214 59691 5064 1737969 1a84f1 i915.ko.1
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 55 +++++++++++-----------------
drivers/gpu/drm/i915/i915_pci.c | 3 ++
drivers/gpu/drm/i915/intel_device_info.c | 61 +++++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/intel_device_info.h | 23 +++++++++++-
5 files changed, 108 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index aaa861b51024..ca624285c96e 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -905,7 +905,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
device_info->device_id = dev_priv->drm.pdev->device;
BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
- sizeof(device_info->platform_mask) * BITS_PER_BYTE);
+ sizeof(device_info->platform_subplatform_mask) *
+ BITS_PER_BYTE - INTEL_SUBPLATFORM_BITS);
BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 82a106b1bdbc..400fff0320fe 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2588,6 +2588,9 @@ intel_info(const struct drm_i915_private *dev_priv)
(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_mask & BIT(p))
+#define IS_SUBPLATFORM(dev_priv, p, s) \
+ ((dev_priv)->info.platform_subplatform_mask & \
+ (BIT(p) | BIT((32 - INTEL_SUBPLATFORM_BITS) + INTEL_SUBPLATFORM_##s)))
#define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
@@ -2602,11 +2605,15 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45)
#define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45)
#define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv))
-#define IS_PINEVIEW_G(dev_priv) (INTEL_DEVID(dev_priv) == 0xa001)
-#define IS_PINEVIEW_M(dev_priv) (INTEL_DEVID(dev_priv) == 0xa011)
+#define IS_PINEVIEW_G(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_G)
+#define IS_PINEVIEW_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_M)
#define IS_PINEVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
#define IS_G33(dev_priv) IS_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
+#define IS_IRONLAKE_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_IRONLAKE, IRONLAKE_M)
#define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
@@ -2624,38 +2631,19 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
-#define IS_BDW_ULT(dev_priv) (IS_BROADWELL(dev_priv) && \
- ((INTEL_DEVID(dev_priv) & 0xf) == 0x6 || \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xb || \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xe))
-/* ULX machines are also considered ULT. */
-#define IS_BDW_ULX(dev_priv) (IS_BROADWELL(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
+#define IS_BDW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULT)
+#define IS_BDW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULX)
#define IS_BDW_GT3(dev_priv) (IS_BROADWELL(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_HSW_ULT(dev_priv) (IS_HASWELL(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
+#define IS_HSW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULT)
#define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \
(dev_priv)->info.gt == 3)
/* ULX machines are also considered ULT. */
-#define IS_HSW_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x0A0E || \
- INTEL_DEVID(dev_priv) == 0x0A1E)
-#define IS_SKL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x1906 || \
- INTEL_DEVID(dev_priv) == 0x1913 || \
- INTEL_DEVID(dev_priv) == 0x1916 || \
- INTEL_DEVID(dev_priv) == 0x1921 || \
- INTEL_DEVID(dev_priv) == 0x1926)
-#define IS_SKL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x190E || \
- INTEL_DEVID(dev_priv) == 0x1915 || \
- INTEL_DEVID(dev_priv) == 0x191E)
-#define IS_KBL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x5906 || \
- INTEL_DEVID(dev_priv) == 0x5913 || \
- INTEL_DEVID(dev_priv) == 0x5916 || \
- INTEL_DEVID(dev_priv) == 0x5921 || \
- INTEL_DEVID(dev_priv) == 0x5926)
-#define IS_KBL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x590E || \
- INTEL_DEVID(dev_priv) == 0x5915 || \
- INTEL_DEVID(dev_priv) == 0x591E)
+#define IS_HSW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULX)
+#define IS_SKL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULT)
+#define IS_SKL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULX)
+#define IS_KBL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULT)
+#define IS_KBL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULX)
#define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \
(dev_priv)->info.gt == 2)
#define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \
@@ -2666,14 +2654,13 @@ intel_info(const struct drm_i915_private *dev_priv)
(dev_priv)->info.gt == 2)
#define IS_KBL_GT3(dev_priv) (IS_KABYLAKE(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_CFL_ULT(dev_priv) (IS_COFFEELAKE(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
+#define IS_CFL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, ULT)
#define IS_CFL_GT2(dev_priv) (IS_COFFEELAKE(dev_priv) && \
(dev_priv)->info.gt == 2)
#define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
+#define IS_CNL_WITH_PORT_F(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, PORTF)
#define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1eaabf28d7b7..9e2967f7c583 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -30,6 +30,7 @@
#include "i915_selftest.h"
#define PLATFORM(x) .platform = (x), .platform_mask = BIT(x)
+#define SUBPLATFORM(x) .subplatform_mask = BIT(INTEL_SUBPLATFORM_##x)
#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
#define GEN_DEFAULT_PIPEOFFSETS \
@@ -234,6 +235,7 @@ static const struct intel_device_info intel_ironlake_d_info = {
static const struct intel_device_info intel_ironlake_m_info = {
GEN5_FEATURES,
PLATFORM(INTEL_IRONLAKE),
+ SUBPLATFORM(IRONLAKE_M),
.is_mobile = 1, .has_fbc = 1,
};
@@ -605,6 +607,7 @@ static const struct intel_device_info intel_icelake_11_info = {
#undef GEN
#undef PLATFORM
+#undef SUBPLATFORM
/*
* Make sure any device matches here are from most specific to most
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 298f8996cc54..f5c9d29a7471 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -111,10 +111,11 @@ void intel_device_info_dump(const struct intel_device_info *info,
struct drm_i915_private *dev_priv =
container_of(info, struct drm_i915_private, info);
- drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s gen=%i\n",
+ drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=%x) gen=%i\n",
INTEL_DEVID(dev_priv),
INTEL_REVID(dev_priv),
intel_platform_name(info->platform),
+ info->subplatform_mask,
info->gen);
intel_device_info_dump_flags(info, p);
@@ -458,6 +459,62 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
return 0;
}
+static void intel_device_info_subplatform_init(struct intel_device_info *info)
+{
+ struct drm_i915_private *i915 =
+ container_of(info, struct drm_i915_private, info);
+ u16 devid = INTEL_DEVID(i915);
+
+ if (IS_PINEVIEW(i915)) {
+ if (devid == 0xa001)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_G;
+ else if (devid == 0xa011)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_M;
+ } else if (IS_HASWELL(i915)) {
+ if ((devid & 0xFF00) == 0x0A00)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ /* ULX machines are also considered ULT. */
+ if (devid == 0x0A0E || devid == 0x0A1E)
+ info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
+ } else if (IS_BROADWELL(i915)) {
+ if ((devid & 0xf) == 0x6 ||
+ (devid & 0xf) == 0xb ||
+ (devid & 0xf) == 0xe)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ /* ULX machines are also considered ULT. */
+ if ((devid & 0xf) == 0xe)
+ info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
+ } else if (IS_SKYLAKE(i915)) {
+ if (devid == 0x1906 ||
+ devid == 0x1913 ||
+ devid == 0x1916 ||
+ devid == 0x1921 ||
+ devid == 0x1926)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ else if (devid == 0x190E ||
+ devid == 0x1915 ||
+ devid == 0x191E)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
+ } else if (IS_KABYLAKE(i915)) {
+ if (devid == 0x5906 ||
+ devid == 0x5913 ||
+ devid == 0x5916 ||
+ devid == 0x5921 ||
+ devid == 0x5926)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ else if (devid == 0x590E ||
+ devid == 0x5915 ||
+ devid == 0x591E)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
+ } else if (IS_COFFEELAKE(i915)) {
+ if ((devid & 0x00F0) == 0x00A0)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ } else if (IS_CANNONLAKE(i915)) {
+ if ((devid & 0x0004) == 0x0004)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PORTF;
+ }
+}
+
/**
* intel_device_info_runtime_init - initialize runtime info
* @info: intel device info struct
@@ -480,6 +537,8 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
container_of(info, struct drm_i915_private, info);
enum pipe pipe;
+ intel_device_info_subplatform_init(info);
+
if (INTEL_GEN(dev_priv) >= 10) {
for_each_pipe(dev_priv, pipe)
info->num_scalers[pipe] = 2;
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 71fdfb0451ef..7b6211061fba 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -74,6 +74,20 @@ enum intel_platform {
INTEL_MAX_PLATFORMS
};
+/* Subplatform flags share the same namespace per parent platform. */
+
+#define INTEL_SUBPLATFORM_BITS (2)
+
+#define INTEL_SUBPLATFORM_IRONLAKE_M (0)
+
+#define INTEL_SUBPLATFORM_PINEVIEW_G (0)
+#define INTEL_SUBPLATFORM_PINEVIEW_M (1)
+
+#define INTEL_SUBPLATFORM_ULT (0)
+#define INTEL_SUBPLATFORM_ULX (1)
+
+#define INTEL_SUBPLATFORM_PORTF (0)
+
#define DEV_INFO_FOR_EACH_FLAG(func) \
func(is_mobile); \
func(is_lp); \
@@ -135,7 +149,14 @@ struct intel_device_info {
u8 ring_mask; /* Rings supported by the HW */
enum intel_platform platform;
- u32 platform_mask;
+
+ union {
+ u32 platform_subplatform_mask;
+ struct {
+ u32 platform_mask : (32 - INTEL_SUBPLATFORM_BITS);
+ u32 subplatform_mask : INTEL_SUBPLATFORM_BITS;
+ };
+ };
u32 display_mmio_offset;
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Eliminate devid sprinkle
2018-02-22 8:09 [RFC] drm/i915: Eliminate devid sprinkle Tvrtko Ursulin
@ 2018-02-22 8:16 ` Patchwork
2018-02-22 8:24 ` [RFC] " Chris Wilson
` (4 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-02-22 8:16 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Eliminate devid sprinkle
URL : https://patchwork.freedesktop.org/series/38749/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2cce38de5993 drm/i915: Eliminate devid sprinkle
-:171: WARNING: line over 80 characters
#171: FILE: drivers/gpu/drm/i915/intel_device_info.c:114:
+ drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=%x) gen=%i\n",
-:230: WARNING: suspect code indent for conditional statements (8, 17)
#230: FILE: drivers/gpu/drm/i915/intel_device_info.c:509:
+ } else if (IS_COFFEELAKE(i915)) {
+ if ((devid & 0x00F0) == 0x00A0)
-:231: WARNING: Statements should start on a tabstop
#231: FILE: drivers/gpu/drm/i915/intel_device_info.c:510:
+ if ((devid & 0x00F0) == 0x00A0)
total: 0 errors, 3 warnings, 0 checks, 237 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC] drm/i915: Eliminate devid sprinkle
2018-02-22 8:09 [RFC] drm/i915: Eliminate devid sprinkle Tvrtko Ursulin
2018-02-22 8:16 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2018-02-22 8:24 ` Chris Wilson
2018-02-22 10:39 ` Tvrtko Ursulin
2018-02-22 8:30 ` ✗ Fi.CI.BAT: warning for " Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 16+ messages in thread
From: Chris Wilson @ 2018-02-22 8:24 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula
Quoting Tvrtko Ursulin (2018-02-22 08:09:07)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Introduce subplatform mask to eliminate throughout the code devid checking
> sprinkle, mostly courtesy of IS_*_UL[TX] macros.
>
> Subplatform mask initialization is moved either to static tables (Ironlake
> M) or runtime device info init (Pineview, Haswell, Broadwell, Skylake,
> Kabylake, Coffeelake and Cannonlake).
>
> text data bss dec hex filename
> 1673630 59691 5064 1738385 1a8691 i915.ko.0
> 1673214 59691 5064 1737969 1a84f1 i915.ko.1
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@intel.com>
> ---
> @@ -2624,38 +2631,19 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
> #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
> (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
Killme. :)
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 298f8996cc54..f5c9d29a7471 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -111,10 +111,11 @@ void intel_device_info_dump(const struct intel_device_info *info,
> struct drm_i915_private *dev_priv =
> container_of(info, struct drm_i915_private, info);
>
> - drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s gen=%i\n",
> + drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=%x) gen=%i\n",
> INTEL_DEVID(dev_priv),
> INTEL_REVID(dev_priv),
> intel_platform_name(info->platform),
> + info->subplatform_mask,
> info->gen);
Worth it.
>
> intel_device_info_dump_flags(info, p);
> @@ -458,6 +459,62 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
> return 0;
> }
>
> +static void intel_device_info_subplatform_init(struct intel_device_info *info)
> +{
> + struct drm_i915_private *i915 =
> + container_of(info, struct drm_i915_private, info);
> + u16 devid = INTEL_DEVID(i915);
> +
> + if (IS_PINEVIEW(i915)) {
> -#define IS_PINEVIEW_G(dev_priv) (INTEL_DEVID(dev_priv) == 0xa001)
> -#define IS_PINEVIEW_M(dev_priv) (INTEL_DEVID(dev_priv) == 0xa011)
> + if (devid == 0xa001)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_G;
> + else if (devid == 0xa011)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_M;
Ok. Do we use IS_PINEVIEW_G/M? Should just be IS_PINEVIEW() &&
IS_MOBILE() but I guess after this change, IS_PINEVIEW_G/M is even
easier.
> + } else if (IS_HASWELL(i915)) {
> + if ((devid & 0xFF00) == 0x0A00)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> + /* ULX machines are also considered ULT. */
> + if (devid == 0x0A0E || devid == 0x0A1E)
> + info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
> + } else if (IS_BROADWELL(i915)) {
> -#define IS_BDW_ULT(dev_priv) (IS_BROADWELL(dev_priv) && \
> - ((INTEL_DEVID(dev_priv) & 0xf) == 0x6 || \
> - (INTEL_DEVID(dev_priv) & 0xf) == 0xb || \
> - (INTEL_DEVID(dev_priv) & 0xf) == 0xe))
> + if ((devid & 0xf) == 0x6 ||
> + (devid & 0xf) == 0xb ||
> + (devid & 0xf) == 0xe)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> -#define IS_BDW_ULX(dev_priv) (IS_BROADWELL(dev_priv) && \
> - (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
> + /* ULX machines are also considered ULT. */
> + if ((devid & 0xf) == 0xe)
> + info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
Ok.
> + } else if (IS_SKYLAKE(i915)) {
> -#define IS_SKL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x1906 || \
> - INTEL_DEVID(dev_priv) == 0x1913 || \
> - INTEL_DEVID(dev_priv) == 0x1916 || \
> - INTEL_DEVID(dev_priv) == 0x1921 || \
> - INTEL_DEVID(dev_priv) == 0x1926)
> + if (devid == 0x1906 ||
> + devid == 0x1913 ||
> + devid == 0x1916 ||
> + devid == 0x1921 ||
> + devid == 0x1926)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> -#define IS_SKL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x190E || \
> - INTEL_DEVID(dev_priv) == 0x1915 || \
> - INTEL_DEVID(dev_priv) == 0x191E)
> + else if (devid == 0x190E ||
> + devid == 0x1915 ||
> + devid == 0x191E)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
Ok.
> + } else if (IS_KABYLAKE(i915)) {
> -#define IS_KBL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x5906 || \
> - INTEL_DEVID(dev_priv) == 0x5913 || \
> - INTEL_DEVID(dev_priv) == 0x5916 || \
> - INTEL_DEVID(dev_priv) == 0x5921 || \
> - INTEL_DEVID(dev_priv) == 0x5926)
> + if (devid == 0x5906 ||
> + devid == 0x5913 ||
> + devid == 0x5916 ||
> + devid == 0x5921 ||
> + devid == 0x5926)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> -#define IS_KBL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x590E || \
> - INTEL_DEVID(dev_priv) == 0x5915 || \
> - INTEL_DEVID(dev_priv) == 0x591E)
> + else if (devid == 0x590E ||
> + devid == 0x5915 ||
> + devid == 0x591E)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
Ok.
> + } else if (IS_COFFEELAKE(i915)) {
> -#define IS_CFL_ULT(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> - (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
> + if ((devid & 0x00F0) == 0x00A0)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
Ok.
> + } else if (IS_CANNONLAKE(i915)) {
> -#define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \
> - (INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
> + if ((devid & 0x0004) == 0x0004)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PORTF;
Odd, but ok. (Wondering if this needs it own bit. It doesn't, ok.)
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 71fdfb0451ef..7b6211061fba 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -74,6 +74,20 @@ enum intel_platform {
> INTEL_MAX_PLATFORMS
> };
>
> +/* Subplatform flags share the same namespace per parent platform. */
> +
> +#define INTEL_SUBPLATFORM_BITS (2)
Enough space to do the same for GT (4 bits?) on top?
Looks good to me. I'm moaning at mkwrite_device_info() but that can
stand for now ;)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle
2018-02-22 8:09 [RFC] drm/i915: Eliminate devid sprinkle Tvrtko Ursulin
2018-02-22 8:16 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-02-22 8:24 ` [RFC] " Chris Wilson
@ 2018-02-22 8:30 ` Patchwork
2018-02-22 8:35 ` Chris Wilson
2018-02-22 9:05 ` [RFC v2] " Tvrtko Ursulin
` (2 subsequent siblings)
5 siblings, 1 reply; 16+ messages in thread
From: Patchwork @ 2018-02-22 8:30 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Eliminate devid sprinkle
URL : https://patchwork.freedesktop.org/series/38749/
State : warning
== Summary ==
Series 38749v1 drm/i915: Eliminate devid sprinkle
https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/1/mbox/
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
fail -> PASS (fi-gdg-551) fdo#102575
Test kms_busy:
Subgroup basic-flip-a:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-b:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-c:
pass -> SKIP (fi-hsw-4770)
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-busy-flip-before-cursor-legacy:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-after-cursor-atomic:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-after-cursor-legacy:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-after-cursor-varying-size:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-before-cursor-atomic:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-before-cursor-legacy:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-before-cursor-varying-size:
pass -> SKIP (fi-hsw-4770)
Test kms_flip:
Subgroup basic-flip-vs-dpms:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-vs-modeset:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-flip-vs-wf_vblank:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-plain-flip:
pass -> SKIP (fi-hsw-4770)
Test kms_frontbuffer_tracking:
Subgroup basic:
pass -> SKIP (fi-hsw-4770)
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
pass -> SKIP (fi-hsw-4770)
Subgroup hang-read-crc-pipe-b:
pass -> SKIP (fi-hsw-4770)
Subgroup hang-read-crc-pipe-c:
pass -> SKIP (fi-hsw-4770)
Subgroup nonblocking-crc-pipe-a:
pass -> SKIP (fi-hsw-4770)
Subgroup nonblocking-crc-pipe-a-frame-sequence:
pass -> SKIP (fi-hsw-4770)
Subgroup nonblocking-crc-pipe-b:
pass -> SKIP (fi-hsw-4770)
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass -> SKIP (fi-hsw-4770)
Subgroup nonblocking-crc-pipe-c:
pass -> SKIP (fi-hsw-4770)
Subgroup nonblocking-crc-pipe-c-frame-sequence:
pass -> SKIP (fi-hsw-4770)
Subgroup read-crc-pipe-a:
pass -> SKIP (fi-hsw-4770)
Subgroup read-crc-pipe-a-frame-sequence:
pass -> SKIP (fi-hsw-4770)
Subgroup read-crc-pipe-b:
pass -> SKIP (fi-hsw-4770)
Subgroup read-crc-pipe-b-frame-sequence:
pass -> SKIP (fi-hsw-4770)
Subgroup read-crc-pipe-c:
pass -> SKIP (fi-hsw-4770)
Subgroup read-crc-pipe-c-frame-sequence:
pass -> SKIP (fi-hsw-4770)
Subgroup suspend-read-crc-pipe-a:
pass -> SKIP (fi-hsw-4770) fdo#104944
Subgroup suspend-read-crc-pipe-b:
pass -> SKIP (fi-hsw-4770)
Subgroup suspend-read-crc-pipe-c:
pass -> SKIP (fi-hsw-4770)
incomplete -> PASS (fi-bxt-dsi) fdo#103927
Test pm_rpm:
Subgroup basic-pci-d3-state:
pass -> SKIP (fi-hsw-4770)
Subgroup basic-rte:
pass -> SKIP (fi-hsw-4770)
Test prime_vgem:
Subgroup basic-fence-flip:
pass -> SKIP (fi-hsw-4770)
Test drv_module_reload:
Subgroup basic-reload:
pass -> DMESG-WARN (fi-hsw-4770)
Subgroup basic-no-display:
pass -> DMESG-WARN (fi-hsw-4770)
Subgroup basic-reload-inject:
pass -> DMESG-WARN (fi-hsw-4770)
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104944 https://bugs.freedesktop.org/show_bug.cgi?id=104944
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
WARNING: Long output truncated
42016703e66b7b572d4ab651946b715cdbff3050 drm-tip: 2018y-02m-21d-21h-26m-53s UTC integration manifest
2cce38de5993 drm/i915: Eliminate devid sprinkle
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8120/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle
2018-02-22 8:30 ` ✗ Fi.CI.BAT: warning for " Patchwork
@ 2018-02-22 8:35 ` Chris Wilson
2018-02-22 8:59 ` Tvrtko Ursulin
0 siblings, 1 reply; 16+ messages in thread
From: Chris Wilson @ 2018-02-22 8:35 UTC (permalink / raw)
To: Patchwork, Tvrtko Ursulin; +Cc: intel-gfx
Quoting Patchwork (2018-02-22 08:30:36)
> == Series Details ==
>
> Series: drm/i915: Eliminate devid sprinkle
> URL : https://patchwork.freedesktop.org/series/38749/
> State : warning
>
> == Summary ==
>
> Series 38749v1 drm/i915: Eliminate devid sprinkle
> https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/1/mbox/
>
> Test gem_mmap_gtt:
> Subgroup basic-small-bo-tiledx:
> fail -> PASS (fi-gdg-551) fdo#102575
> Test kms_busy:
> Subgroup basic-flip-a:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-b:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-c:
> pass -> SKIP (fi-hsw-4770)
> Test kms_cursor_legacy:
> Subgroup basic-busy-flip-before-cursor-atomic:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-busy-flip-before-cursor-legacy:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-after-cursor-atomic:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-after-cursor-legacy:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-after-cursor-varying-size:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-before-cursor-atomic:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-before-cursor-legacy:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-before-cursor-varying-size:
> pass -> SKIP (fi-hsw-4770)
> Test kms_flip:
> Subgroup basic-flip-vs-dpms:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-vs-modeset:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-flip-vs-wf_vblank:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-plain-flip:
> pass -> SKIP (fi-hsw-4770)
> Test kms_frontbuffer_tracking:
> Subgroup basic:
> pass -> SKIP (fi-hsw-4770)
> Test kms_pipe_crc_basic:
> Subgroup hang-read-crc-pipe-a:
> pass -> SKIP (fi-hsw-4770)
> Subgroup hang-read-crc-pipe-b:
> pass -> SKIP (fi-hsw-4770)
> Subgroup hang-read-crc-pipe-c:
> pass -> SKIP (fi-hsw-4770)
> Subgroup nonblocking-crc-pipe-a:
> pass -> SKIP (fi-hsw-4770)
> Subgroup nonblocking-crc-pipe-a-frame-sequence:
> pass -> SKIP (fi-hsw-4770)
> Subgroup nonblocking-crc-pipe-b:
> pass -> SKIP (fi-hsw-4770)
> Subgroup nonblocking-crc-pipe-b-frame-sequence:
> pass -> SKIP (fi-hsw-4770)
> Subgroup nonblocking-crc-pipe-c:
> pass -> SKIP (fi-hsw-4770)
> Subgroup nonblocking-crc-pipe-c-frame-sequence:
> pass -> SKIP (fi-hsw-4770)
> Subgroup read-crc-pipe-a:
> pass -> SKIP (fi-hsw-4770)
> Subgroup read-crc-pipe-a-frame-sequence:
> pass -> SKIP (fi-hsw-4770)
> Subgroup read-crc-pipe-b:
> pass -> SKIP (fi-hsw-4770)
> Subgroup read-crc-pipe-b-frame-sequence:
> pass -> SKIP (fi-hsw-4770)
> Subgroup read-crc-pipe-c:
> pass -> SKIP (fi-hsw-4770)
> Subgroup read-crc-pipe-c-frame-sequence:
> pass -> SKIP (fi-hsw-4770)
> Subgroup suspend-read-crc-pipe-a:
> pass -> SKIP (fi-hsw-4770) fdo#104944
> Subgroup suspend-read-crc-pipe-b:
> pass -> SKIP (fi-hsw-4770)
> Subgroup suspend-read-crc-pipe-c:
> pass -> SKIP (fi-hsw-4770)
> incomplete -> PASS (fi-bxt-dsi) fdo#103927
> Test pm_rpm:
> Subgroup basic-pci-d3-state:
> pass -> SKIP (fi-hsw-4770)
> Subgroup basic-rte:
> pass -> SKIP (fi-hsw-4770)
> Test prime_vgem:
> Subgroup basic-fence-flip:
> pass -> SKIP (fi-hsw-4770)
> Test drv_module_reload:
> Subgroup basic-reload:
> pass -> DMESG-WARN (fi-hsw-4770)
> Subgroup basic-no-display:
> pass -> DMESG-WARN (fi-hsw-4770)
> Subgroup basic-reload-inject:
> pass -> DMESG-WARN (fi-hsw-4770)
I regret everything!
WARN_ON(((dev_priv)->info.platform_subplatform_mask & ((1UL << (INTEL_HASWELL)) | (1UL << ((32 - (2)) + (0))))) || ((dev_priv)->info.platform_subplatform_mask & ((1UL << (INTEL_BROADWELL)) | (1UL << ((32 - (2)) + (0))))))
WARNING: CPU: 0 PID: 4450 at drivers/gpu/drm/i915/i915_drv.c:146 intel_pch_type+0x4e3/0x510 [i915]
Looks just to be an ordering issue.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle
2018-02-22 8:35 ` Chris Wilson
@ 2018-02-22 8:59 ` Tvrtko Ursulin
0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2018-02-22 8:59 UTC (permalink / raw)
To: Chris Wilson, intel-gfx, Patchwork, Tvrtko Ursulin
On 22/02/2018 08:35, Chris Wilson wrote:
> Quoting Patchwork (2018-02-22 08:30:36)
>> == Series Details ==
>>
>> Series: drm/i915: Eliminate devid sprinkle
>> URL : https://patchwork.freedesktop.org/series/38749/
>> State : warning
>>
>> == Summary ==
>>
>> Series 38749v1 drm/i915: Eliminate devid sprinkle
>> https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/1/mbox/
>>
>> Test gem_mmap_gtt:
>> Subgroup basic-small-bo-tiledx:
>> fail -> PASS (fi-gdg-551) fdo#102575
>> Test kms_busy:
>> Subgroup basic-flip-a:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-b:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-c:
>> pass -> SKIP (fi-hsw-4770)
>> Test kms_cursor_legacy:
>> Subgroup basic-busy-flip-before-cursor-atomic:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-busy-flip-before-cursor-legacy:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-after-cursor-atomic:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-after-cursor-legacy:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-after-cursor-varying-size:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-before-cursor-atomic:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-before-cursor-legacy:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-before-cursor-varying-size:
>> pass -> SKIP (fi-hsw-4770)
>> Test kms_flip:
>> Subgroup basic-flip-vs-dpms:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-vs-modeset:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-flip-vs-wf_vblank:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-plain-flip:
>> pass -> SKIP (fi-hsw-4770)
>> Test kms_frontbuffer_tracking:
>> Subgroup basic:
>> pass -> SKIP (fi-hsw-4770)
>> Test kms_pipe_crc_basic:
>> Subgroup hang-read-crc-pipe-a:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup hang-read-crc-pipe-b:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup hang-read-crc-pipe-c:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup nonblocking-crc-pipe-a:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup nonblocking-crc-pipe-a-frame-sequence:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup nonblocking-crc-pipe-b:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup nonblocking-crc-pipe-b-frame-sequence:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup nonblocking-crc-pipe-c:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup nonblocking-crc-pipe-c-frame-sequence:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup read-crc-pipe-a:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup read-crc-pipe-a-frame-sequence:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup read-crc-pipe-b:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup read-crc-pipe-b-frame-sequence:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup read-crc-pipe-c:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup read-crc-pipe-c-frame-sequence:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup suspend-read-crc-pipe-a:
>> pass -> SKIP (fi-hsw-4770) fdo#104944
>> Subgroup suspend-read-crc-pipe-b:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup suspend-read-crc-pipe-c:
>> pass -> SKIP (fi-hsw-4770)
>> incomplete -> PASS (fi-bxt-dsi) fdo#103927
>> Test pm_rpm:
>> Subgroup basic-pci-d3-state:
>> pass -> SKIP (fi-hsw-4770)
>> Subgroup basic-rte:
>> pass -> SKIP (fi-hsw-4770)
>> Test prime_vgem:
>> Subgroup basic-fence-flip:
>> pass -> SKIP (fi-hsw-4770)
>> Test drv_module_reload:
>> Subgroup basic-reload:
>> pass -> DMESG-WARN (fi-hsw-4770)
>> Subgroup basic-no-display:
>> pass -> DMESG-WARN (fi-hsw-4770)
>> Subgroup basic-reload-inject:
>> pass -> DMESG-WARN (fi-hsw-4770)
>
> I regret everything!
>
> WARN_ON(((dev_priv)->info.platform_subplatform_mask & ((1UL << (INTEL_HASWELL)) | (1UL << ((32 - (2)) + (0))))) || ((dev_priv)->info.platform_subplatform_mask & ((1UL << (INTEL_BROADWELL)) | (1UL << ((32 - (2)) + (0))))))
> WARNING: CPU: 0 PID: 4450 at drivers/gpu/drm/i915/i915_drv.c:146 intel_pch_type+0x4e3/0x510 [i915]
>
> Looks just to be an ordering issue.
Bug in the IS_SUBPLATFORM macro. It's checking for any bit set, but has
to be both in this scheme. At least with that fixed text size is still
in check.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [RFC v2] drm/i915: Eliminate devid sprinkle
2018-02-22 8:09 [RFC] drm/i915: Eliminate devid sprinkle Tvrtko Ursulin
` (2 preceding siblings ...)
2018-02-22 8:30 ` ✗ Fi.CI.BAT: warning for " Patchwork
@ 2018-02-22 9:05 ` Tvrtko Ursulin
2018-02-22 10:15 ` [RFC v3] " Tvrtko Ursulin
2018-02-22 9:25 ` ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev2) Patchwork
2018-02-22 10:47 ` ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev3) Patchwork
5 siblings, 1 reply; 16+ messages in thread
From: Tvrtko Ursulin @ 2018-02-22 9:05 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Introduce subplatform mask to eliminate throughout the code devid checking
sprinkle, mostly courtesy of IS_*_UL[TX] macros.
Subplatform mask initialization is moved either to static tables (Ironlake
M) or runtime device info init (Pineview, Haswell, Broadwell, Skylake,
Kabylake, Coffeelake and Cannonlake).
text data bss dec hex filename
1673630 59691 5064 1738385 1a8691 i915.ko.0
1673536 59691 5064 1738291 1a8633 i915.ko.1
v2: Fixed IS_SUBPLATFORM. Updated commit msg.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 58 ++++++++++++------------------
drivers/gpu/drm/i915/i915_pci.c | 3 ++
drivers/gpu/drm/i915/intel_device_info.c | 61 +++++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/intel_device_info.h | 23 +++++++++++-
5 files changed, 110 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index aaa861b51024..ca624285c96e 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -905,7 +905,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
device_info->device_id = dev_priv->drm.pdev->device;
BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
- sizeof(device_info->platform_mask) * BITS_PER_BYTE);
+ sizeof(device_info->platform_subplatform_mask) *
+ BITS_PER_BYTE - INTEL_SUBPLATFORM_BITS);
BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 82a106b1bdbc..808d957ce9ba 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2587,7 +2587,11 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_REVID(p, since, until) \
(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
-#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_mask & BIT(p))
+#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_subplatform_mask & BIT(p))
+#define IS_SUBPLATFORM(dev_priv, p, s) \
+ (IS_PLATFORM(dev_priv, p) && \
+ ((dev_priv)->info.platform_subplatform_mask & \
+ BIT(32 - INTEL_SUBPLATFORM_BITS + INTEL_SUBPLATFORM_##s)))
#define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
@@ -2602,11 +2606,15 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45)
#define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45)
#define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv))
-#define IS_PINEVIEW_G(dev_priv) (INTEL_DEVID(dev_priv) == 0xa001)
-#define IS_PINEVIEW_M(dev_priv) (INTEL_DEVID(dev_priv) == 0xa011)
+#define IS_PINEVIEW_G(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_G)
+#define IS_PINEVIEW_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_M)
#define IS_PINEVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
#define IS_G33(dev_priv) IS_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
+#define IS_IRONLAKE_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_IRONLAKE, IRONLAKE_M)
#define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
@@ -2624,38 +2632,19 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
-#define IS_BDW_ULT(dev_priv) (IS_BROADWELL(dev_priv) && \
- ((INTEL_DEVID(dev_priv) & 0xf) == 0x6 || \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xb || \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xe))
-/* ULX machines are also considered ULT. */
-#define IS_BDW_ULX(dev_priv) (IS_BROADWELL(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
+#define IS_BDW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULT)
+#define IS_BDW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULX)
#define IS_BDW_GT3(dev_priv) (IS_BROADWELL(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_HSW_ULT(dev_priv) (IS_HASWELL(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
+#define IS_HSW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULT)
#define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \
(dev_priv)->info.gt == 3)
/* ULX machines are also considered ULT. */
-#define IS_HSW_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x0A0E || \
- INTEL_DEVID(dev_priv) == 0x0A1E)
-#define IS_SKL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x1906 || \
- INTEL_DEVID(dev_priv) == 0x1913 || \
- INTEL_DEVID(dev_priv) == 0x1916 || \
- INTEL_DEVID(dev_priv) == 0x1921 || \
- INTEL_DEVID(dev_priv) == 0x1926)
-#define IS_SKL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x190E || \
- INTEL_DEVID(dev_priv) == 0x1915 || \
- INTEL_DEVID(dev_priv) == 0x191E)
-#define IS_KBL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x5906 || \
- INTEL_DEVID(dev_priv) == 0x5913 || \
- INTEL_DEVID(dev_priv) == 0x5916 || \
- INTEL_DEVID(dev_priv) == 0x5921 || \
- INTEL_DEVID(dev_priv) == 0x5926)
-#define IS_KBL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x590E || \
- INTEL_DEVID(dev_priv) == 0x5915 || \
- INTEL_DEVID(dev_priv) == 0x591E)
+#define IS_HSW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULX)
+#define IS_SKL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULT)
+#define IS_SKL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULX)
+#define IS_KBL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULT)
+#define IS_KBL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULX)
#define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \
(dev_priv)->info.gt == 2)
#define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \
@@ -2666,14 +2655,13 @@ intel_info(const struct drm_i915_private *dev_priv)
(dev_priv)->info.gt == 2)
#define IS_KBL_GT3(dev_priv) (IS_KABYLAKE(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_CFL_ULT(dev_priv) (IS_COFFEELAKE(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
+#define IS_CFL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, ULT)
#define IS_CFL_GT2(dev_priv) (IS_COFFEELAKE(dev_priv) && \
(dev_priv)->info.gt == 2)
#define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
+#define IS_CNL_WITH_PORT_F(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, PORTF)
#define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1eaabf28d7b7..9e2967f7c583 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -30,6 +30,7 @@
#include "i915_selftest.h"
#define PLATFORM(x) .platform = (x), .platform_mask = BIT(x)
+#define SUBPLATFORM(x) .subplatform_mask = BIT(INTEL_SUBPLATFORM_##x)
#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
#define GEN_DEFAULT_PIPEOFFSETS \
@@ -234,6 +235,7 @@ static const struct intel_device_info intel_ironlake_d_info = {
static const struct intel_device_info intel_ironlake_m_info = {
GEN5_FEATURES,
PLATFORM(INTEL_IRONLAKE),
+ SUBPLATFORM(IRONLAKE_M),
.is_mobile = 1, .has_fbc = 1,
};
@@ -605,6 +607,7 @@ static const struct intel_device_info intel_icelake_11_info = {
#undef GEN
#undef PLATFORM
+#undef SUBPLATFORM
/*
* Make sure any device matches here are from most specific to most
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 298f8996cc54..5beb2cbde3b5 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -111,10 +111,11 @@ void intel_device_info_dump(const struct intel_device_info *info,
struct drm_i915_private *dev_priv =
container_of(info, struct drm_i915_private, info);
- drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s gen=%i\n",
+ drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=%x) gen=%i\n",
INTEL_DEVID(dev_priv),
INTEL_REVID(dev_priv),
intel_platform_name(info->platform),
+ info->subplatform_mask,
info->gen);
intel_device_info_dump_flags(info, p);
@@ -458,6 +459,62 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
return 0;
}
+static void intel_device_info_subplatform_init(struct intel_device_info *info)
+{
+ struct drm_i915_private *i915 =
+ container_of(info, struct drm_i915_private, info);
+ u16 devid = INTEL_DEVID(i915);
+
+ if (IS_PINEVIEW(i915)) {
+ if (devid == 0xa001)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_G;
+ else if (devid == 0xa011)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_M;
+ } else if (IS_HASWELL(i915)) {
+ if ((devid & 0xFF00) == 0x0A00)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ /* ULX machines are also considered ULT. */
+ if (devid == 0x0A0E || devid == 0x0A1E)
+ info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
+ } else if (IS_BROADWELL(i915)) {
+ if ((devid & 0xf) == 0x6 ||
+ (devid & 0xf) == 0xb ||
+ (devid & 0xf) == 0xe)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ /* ULX machines are also considered ULT. */
+ if ((devid & 0xf) == 0xe)
+ info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
+ } else if (IS_SKYLAKE(i915)) {
+ if (devid == 0x1906 ||
+ devid == 0x1913 ||
+ devid == 0x1916 ||
+ devid == 0x1921 ||
+ devid == 0x1926)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ else if (devid == 0x190E ||
+ devid == 0x1915 ||
+ devid == 0x191E)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
+ } else if (IS_KABYLAKE(i915)) {
+ if (devid == 0x5906 ||
+ devid == 0x5913 ||
+ devid == 0x5916 ||
+ devid == 0x5921 ||
+ devid == 0x5926)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ else if (devid == 0x590E ||
+ devid == 0x5915 ||
+ devid == 0x591E)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
+ } else if (IS_COFFEELAKE(i915)) {
+ if ((devid & 0x00F0) == 0x00A0)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ } else if (IS_CANNONLAKE(i915)) {
+ if ((devid & 0x0004) == 0x0004)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PORTF;
+ }
+}
+
/**
* intel_device_info_runtime_init - initialize runtime info
* @info: intel device info struct
@@ -480,6 +537,8 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
container_of(info, struct drm_i915_private, info);
enum pipe pipe;
+ intel_device_info_subplatform_init(info);
+
if (INTEL_GEN(dev_priv) >= 10) {
for_each_pipe(dev_priv, pipe)
info->num_scalers[pipe] = 2;
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 71fdfb0451ef..7b6211061fba 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -74,6 +74,20 @@ enum intel_platform {
INTEL_MAX_PLATFORMS
};
+/* Subplatform flags share the same namespace per parent platform. */
+
+#define INTEL_SUBPLATFORM_BITS (2)
+
+#define INTEL_SUBPLATFORM_IRONLAKE_M (0)
+
+#define INTEL_SUBPLATFORM_PINEVIEW_G (0)
+#define INTEL_SUBPLATFORM_PINEVIEW_M (1)
+
+#define INTEL_SUBPLATFORM_ULT (0)
+#define INTEL_SUBPLATFORM_ULX (1)
+
+#define INTEL_SUBPLATFORM_PORTF (0)
+
#define DEV_INFO_FOR_EACH_FLAG(func) \
func(is_mobile); \
func(is_lp); \
@@ -135,7 +149,14 @@ struct intel_device_info {
u8 ring_mask; /* Rings supported by the HW */
enum intel_platform platform;
- u32 platform_mask;
+
+ union {
+ u32 platform_subplatform_mask;
+ struct {
+ u32 platform_mask : (32 - INTEL_SUBPLATFORM_BITS);
+ u32 subplatform_mask : INTEL_SUBPLATFORM_BITS;
+ };
+ };
u32 display_mmio_offset;
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev2)
2018-02-22 8:09 [RFC] drm/i915: Eliminate devid sprinkle Tvrtko Ursulin
` (3 preceding siblings ...)
2018-02-22 9:05 ` [RFC v2] " Tvrtko Ursulin
@ 2018-02-22 9:25 ` Patchwork
2018-02-22 10:47 ` ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev3) Patchwork
5 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-02-22 9:25 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Eliminate devid sprinkle (rev2)
URL : https://patchwork.freedesktop.org/series/38749/
State : warning
== Summary ==
Series 38749v2 drm/i915: Eliminate devid sprinkle
https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/2/mbox/
Test debugfs_test:
Subgroup read_all_entries:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_exec_suspend:
Subgroup basic-s3:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup basic-s4-devices:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup suspend-read-crc-pipe-b:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup suspend-read-crc-pipe-c:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
incomplete -> PASS (fi-bxt-dsi) fdo#103927
Test drv_module_reload:
Subgroup basic-reload:
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup basic-no-display:
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup basic-reload-inject:
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fi-bdw-5557u total:288 pass:264 dwarn:3 dfail:0 fail:0 skip:21 time:418s
fi-bdw-gvtdvm total:288 pass:256 dwarn:8 dfail:0 fail:0 skip:24 time:423s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:375s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:492s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:285s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:482s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:493s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:470s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:457s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:565s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:408s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:289s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:509s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:387s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:410s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:444s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:409s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:450s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:490s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:451s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:491s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:587s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:438s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:500s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:522s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:489s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:491s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:405s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:430s
fi-snb-2520m total:3 pass:2 dwarn:0 dfail:0 fail:0 skip:0
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:392s
42016703e66b7b572d4ab651946b715cdbff3050 drm-tip: 2018y-02m-21d-21h-26m-53s UTC integration manifest
487c87f18b1b drm/i915: Eliminate devid sprinkle
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8121/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [RFC v3] drm/i915: Eliminate devid sprinkle
2018-02-22 9:05 ` [RFC v2] " Tvrtko Ursulin
@ 2018-02-22 10:15 ` Tvrtko Ursulin
2018-02-22 10:27 ` Chris Wilson
` (2 more replies)
0 siblings, 3 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2018-02-22 10:15 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Introduce subplatform mask to eliminate throughout the code devid checking
sprinkle, mostly courtesy of IS_*_UL[TX] macros.
Subplatform mask initialization is moved either to static tables (Ironlake
M) or runtime device info init (Pineview, Haswell, Broadwell, Skylake,
Kabylake, Coffeelake and Cannonlake).
text data bss dec hex filename
1673630 59691 5064 1738385 1a8691 i915.ko.0
1673536 59691 5064 1738291 1a8633 i915.ko.1
v2: Fixed IS_SUBPLATFORM. Updated commit msg.
v3: Chris was right, there is an ordering problem.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 5 ++-
drivers/gpu/drm/i915/i915_drv.h | 58 +++++++++++++------------------
drivers/gpu/drm/i915/i915_pci.c | 3 ++
drivers/gpu/drm/i915/intel_device_info.c | 59 +++++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/intel_device_info.h | 27 ++++++++++++++-
5 files changed, 114 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index aaa861b51024..f6c2e67257c9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -904,8 +904,11 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
memcpy(device_info, match_info, sizeof(*device_info));
device_info->device_id = dev_priv->drm.pdev->device;
+ intel_device_info_subplatform_init(device_info);
+
BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
- sizeof(device_info->platform_mask) * BITS_PER_BYTE);
+ sizeof(device_info->platform_subplatform_mask) *
+ BITS_PER_BYTE - INTEL_SUBPLATFORM_BITS);
BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 82a106b1bdbc..808d957ce9ba 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2587,7 +2587,11 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_REVID(p, since, until) \
(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
-#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_mask & BIT(p))
+#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_subplatform_mask & BIT(p))
+#define IS_SUBPLATFORM(dev_priv, p, s) \
+ (IS_PLATFORM(dev_priv, p) && \
+ ((dev_priv)->info.platform_subplatform_mask & \
+ BIT(32 - INTEL_SUBPLATFORM_BITS + INTEL_SUBPLATFORM_##s)))
#define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
@@ -2602,11 +2606,15 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45)
#define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45)
#define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv))
-#define IS_PINEVIEW_G(dev_priv) (INTEL_DEVID(dev_priv) == 0xa001)
-#define IS_PINEVIEW_M(dev_priv) (INTEL_DEVID(dev_priv) == 0xa011)
+#define IS_PINEVIEW_G(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_G)
+#define IS_PINEVIEW_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_M)
#define IS_PINEVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
#define IS_G33(dev_priv) IS_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
+#define IS_IRONLAKE_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_IRONLAKE, IRONLAKE_M)
#define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
@@ -2624,38 +2632,19 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
-#define IS_BDW_ULT(dev_priv) (IS_BROADWELL(dev_priv) && \
- ((INTEL_DEVID(dev_priv) & 0xf) == 0x6 || \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xb || \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xe))
-/* ULX machines are also considered ULT. */
-#define IS_BDW_ULX(dev_priv) (IS_BROADWELL(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
+#define IS_BDW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULT)
+#define IS_BDW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULX)
#define IS_BDW_GT3(dev_priv) (IS_BROADWELL(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_HSW_ULT(dev_priv) (IS_HASWELL(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
+#define IS_HSW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULT)
#define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \
(dev_priv)->info.gt == 3)
/* ULX machines are also considered ULT. */
-#define IS_HSW_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x0A0E || \
- INTEL_DEVID(dev_priv) == 0x0A1E)
-#define IS_SKL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x1906 || \
- INTEL_DEVID(dev_priv) == 0x1913 || \
- INTEL_DEVID(dev_priv) == 0x1916 || \
- INTEL_DEVID(dev_priv) == 0x1921 || \
- INTEL_DEVID(dev_priv) == 0x1926)
-#define IS_SKL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x190E || \
- INTEL_DEVID(dev_priv) == 0x1915 || \
- INTEL_DEVID(dev_priv) == 0x191E)
-#define IS_KBL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x5906 || \
- INTEL_DEVID(dev_priv) == 0x5913 || \
- INTEL_DEVID(dev_priv) == 0x5916 || \
- INTEL_DEVID(dev_priv) == 0x5921 || \
- INTEL_DEVID(dev_priv) == 0x5926)
-#define IS_KBL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x590E || \
- INTEL_DEVID(dev_priv) == 0x5915 || \
- INTEL_DEVID(dev_priv) == 0x591E)
+#define IS_HSW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULX)
+#define IS_SKL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULT)
+#define IS_SKL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULX)
+#define IS_KBL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULT)
+#define IS_KBL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULX)
#define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \
(dev_priv)->info.gt == 2)
#define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \
@@ -2666,14 +2655,13 @@ intel_info(const struct drm_i915_private *dev_priv)
(dev_priv)->info.gt == 2)
#define IS_KBL_GT3(dev_priv) (IS_KABYLAKE(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_CFL_ULT(dev_priv) (IS_COFFEELAKE(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
+#define IS_CFL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, ULT)
#define IS_CFL_GT2(dev_priv) (IS_COFFEELAKE(dev_priv) && \
(dev_priv)->info.gt == 2)
#define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \
(dev_priv)->info.gt == 3)
-#define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \
- (INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
+#define IS_CNL_WITH_PORT_F(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, PORTF)
#define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1eaabf28d7b7..9e2967f7c583 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -30,6 +30,7 @@
#include "i915_selftest.h"
#define PLATFORM(x) .platform = (x), .platform_mask = BIT(x)
+#define SUBPLATFORM(x) .subplatform_mask = BIT(INTEL_SUBPLATFORM_##x)
#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
#define GEN_DEFAULT_PIPEOFFSETS \
@@ -234,6 +235,7 @@ static const struct intel_device_info intel_ironlake_d_info = {
static const struct intel_device_info intel_ironlake_m_info = {
GEN5_FEATURES,
PLATFORM(INTEL_IRONLAKE),
+ SUBPLATFORM(IRONLAKE_M),
.is_mobile = 1, .has_fbc = 1,
};
@@ -605,6 +607,7 @@ static const struct intel_device_info intel_icelake_11_info = {
#undef GEN
#undef PLATFORM
+#undef SUBPLATFORM
/*
* Make sure any device matches here are from most specific to most
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 298f8996cc54..23bb6f6f94d9 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -111,10 +111,11 @@ void intel_device_info_dump(const struct intel_device_info *info,
struct drm_i915_private *dev_priv =
container_of(info, struct drm_i915_private, info);
- drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s gen=%i\n",
+ drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=%x) gen=%i\n",
INTEL_DEVID(dev_priv),
INTEL_REVID(dev_priv),
intel_platform_name(info->platform),
+ info->subplatform_mask,
info->gen);
intel_device_info_dump_flags(info, p);
@@ -458,6 +459,62 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
return 0;
}
+void intel_device_info_subplatform_init(struct intel_device_info *info)
+{
+ struct drm_i915_private *i915 =
+ container_of(info, struct drm_i915_private, info);
+ u16 devid = INTEL_DEVID(i915);
+
+ if (IS_PINEVIEW(i915)) {
+ if (devid == 0xa001)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_G;
+ else if (devid == 0xa011)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_M;
+ } else if (IS_HASWELL(i915)) {
+ if ((devid & 0xFF00) == 0x0A00)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ /* ULX machines are also considered ULT. */
+ if (devid == 0x0A0E || devid == 0x0A1E)
+ info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
+ } else if (IS_BROADWELL(i915)) {
+ if ((devid & 0xf) == 0x6 ||
+ (devid & 0xf) == 0xb ||
+ (devid & 0xf) == 0xe)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ /* ULX machines are also considered ULT. */
+ if ((devid & 0xf) == 0xe)
+ info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
+ } else if (IS_SKYLAKE(i915)) {
+ if (devid == 0x1906 ||
+ devid == 0x1913 ||
+ devid == 0x1916 ||
+ devid == 0x1921 ||
+ devid == 0x1926)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ else if (devid == 0x190E ||
+ devid == 0x1915 ||
+ devid == 0x191E)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
+ } else if (IS_KABYLAKE(i915)) {
+ if (devid == 0x5906 ||
+ devid == 0x5913 ||
+ devid == 0x5916 ||
+ devid == 0x5921 ||
+ devid == 0x5926)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ else if (devid == 0x590E ||
+ devid == 0x5915 ||
+ devid == 0x591E)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
+ } else if (IS_COFFEELAKE(i915)) {
+ if ((devid & 0x00F0) == 0x00A0)
+ info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
+ } else if (IS_CANNONLAKE(i915)) {
+ if ((devid & 0x0004) == 0x0004)
+ info->subplatform_mask = INTEL_SUBPLATFORM_PORTF;
+ }
+}
+
/**
* intel_device_info_runtime_init - initialize runtime info
* @info: intel device info struct
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 71fdfb0451ef..2732c03ad0cb 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -74,6 +74,23 @@ enum intel_platform {
INTEL_MAX_PLATFORMS
};
+/*
+ * Subplatform bits share the same namespace per parent platform. In other words
+ * it is fine for the same bit to be used on multiple parent platform.
+ */
+
+#define INTEL_SUBPLATFORM_BITS (2)
+
+#define INTEL_SUBPLATFORM_IRONLAKE_M (0)
+
+#define INTEL_SUBPLATFORM_PINEVIEW_G (0)
+#define INTEL_SUBPLATFORM_PINEVIEW_M (1)
+
+#define INTEL_SUBPLATFORM_ULT (0)
+#define INTEL_SUBPLATFORM_ULX (1)
+
+#define INTEL_SUBPLATFORM_PORTF (0)
+
#define DEV_INFO_FOR_EACH_FLAG(func) \
func(is_mobile); \
func(is_lp); \
@@ -135,7 +152,14 @@ struct intel_device_info {
u8 ring_mask; /* Rings supported by the HW */
enum intel_platform platform;
- u32 platform_mask;
+
+ union {
+ u32 platform_subplatform_mask;
+ struct {
+ u32 platform_mask : (32 - INTEL_SUBPLATFORM_BITS);
+ u32 subplatform_mask : INTEL_SUBPLATFORM_BITS;
+ };
+ };
u32 display_mmio_offset;
@@ -178,6 +202,7 @@ static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
const char *intel_platform_name(enum intel_platform platform);
+void intel_device_info_subplatform_init(struct intel_device_info *info);
void intel_device_info_runtime_init(struct intel_device_info *info);
void intel_device_info_dump(const struct intel_device_info *info,
struct drm_printer *p);
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [RFC v3] drm/i915: Eliminate devid sprinkle
2018-02-22 10:15 ` [RFC v3] " Tvrtko Ursulin
@ 2018-02-22 10:27 ` Chris Wilson
2018-02-22 10:59 ` Chris Wilson
2018-02-26 14:00 ` Jani Nikula
2 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2018-02-22 10:27 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula
Quoting Tvrtko Ursulin (2018-02-22 10:15:04)
> +#define INTEL_SUBPLATFORM_IRONLAKE_M (0)
> +
> +#define INTEL_SUBPLATFORM_PINEVIEW_G (0)
> +#define INTEL_SUBPLATFORM_PINEVIEW_M (1)
Looking at these, we can reduce these to IS_MOBILE. Clearer before or
after this conversion? Pretty orthogonal I think.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC] drm/i915: Eliminate devid sprinkle
2018-02-22 8:24 ` [RFC] " Chris Wilson
@ 2018-02-22 10:39 ` Tvrtko Ursulin
0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2018-02-22 10:39 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula
On 22/02/2018 08:24, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-22 08:09:07)
>
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>> index 71fdfb0451ef..7b6211061fba 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.h
>> +++ b/drivers/gpu/drm/i915/intel_device_info.h
>> @@ -74,6 +74,20 @@ enum intel_platform {
>> INTEL_MAX_PLATFORMS
>> };
>>
>> +/* Subplatform flags share the same namespace per parent platform. */
>> +
>> +#define INTEL_SUBPLATFORM_BITS (2)
>
> Enough space to do the same for GT (4 bits?) on top?
Nope, only 1 bit remains with this patch. Maybe 2 if Jani lets me do
BIT(platform - 1) for the mask. ;) You could also release your Gen1 bit. :D
Not sure if there is scope (makes sense or not) to free up some more
bits by downgrading some of the I9[146]5GM platforms to be subplatforms
of I9[146]G. G[M]45 also.
Or how IS_MOBILE fits in this scheme.
But anyway, not enough for gen in any case.
I think I've prototyped aggregated u64 platform+gen mask in some branch
though. It is a small code increase overall due 64 bit immediates.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev3)
2018-02-22 8:09 [RFC] drm/i915: Eliminate devid sprinkle Tvrtko Ursulin
` (4 preceding siblings ...)
2018-02-22 9:25 ` ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev2) Patchwork
@ 2018-02-22 10:47 ` Patchwork
5 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-02-22 10:47 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Eliminate devid sprinkle (rev3)
URL : https://patchwork.freedesktop.org/series/38749/
State : warning
== Summary ==
Series 38749v3 drm/i915: Eliminate devid sprinkle
https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/3/mbox/
Test gem_exec_suspend:
Subgroup basic-s3:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup basic-s4-devices:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
fail -> PASS (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup suspend-read-crc-pipe-b:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup suspend-read-crc-pipe-c:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Test prime_vgem:
Subgroup basic-fence-flip:
pass -> FAIL (fi-ilk-650) fdo#104008
Test drv_module_reload:
Subgroup basic-reload:
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup basic-no-display:
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Subgroup basic-reload-inject:
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fi-bdw-5557u total:288 pass:264 dwarn:3 dfail:0 fail:0 skip:21 time:414s
fi-bdw-gvtdvm total:288 pass:256 dwarn:8 dfail:0 fail:0 skip:24 time:422s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:374s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:479s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:285s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:475s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:480s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:463s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:452s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:561s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:415s
fi-gdg-551 total:288 pass:180 dwarn:0 dfail:0 fail:0 skip:108 time:279s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:506s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:386s
fi-ilk-650 total:288 pass:227 dwarn:0 dfail:0 fail:1 skip:60 time:405s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:445s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:415s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:450s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:489s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:447s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:492s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:590s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:432s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:498s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:520s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:480s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:474s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:404s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:428s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:522s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:393s
Blacklisted hosts:
fi-cfl-8700k total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:391s
56c6f2eb05bf491778aee6f4d5851212e0ae9f2d drm-tip: 2018y-02m-22d-09h-36m-00s UTC integration manifest
c60ffc2f21be drm/i915: Eliminate devid sprinkle
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8123/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC v3] drm/i915: Eliminate devid sprinkle
2018-02-22 10:15 ` [RFC v3] " Tvrtko Ursulin
2018-02-22 10:27 ` Chris Wilson
@ 2018-02-22 10:59 ` Chris Wilson
2018-02-26 14:00 ` Jani Nikula
2 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2018-02-22 10:59 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula
Quoting Tvrtko Ursulin (2018-02-22 10:15:04)
> +void intel_device_info_subplatform_init(struct intel_device_info *info)
> +{
> + struct drm_i915_private *i915 =
> + container_of(info, struct drm_i915_private, info);
> + u16 devid = INTEL_DEVID(i915);
> +
> + if (IS_PINEVIEW(i915)) {
> + if (devid == 0xa001)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_G;
> + else if (devid == 0xa011)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_M;
> + } else if (IS_HASWELL(i915)) {
> + if ((devid & 0xFF00) == 0x0A00)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> + /* ULX machines are also considered ULT. */
> + if (devid == 0x0A0E || devid == 0x0A1E)
> + info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
Ah. Needs BIT(ULT) | BIT(ULX).
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC v3] drm/i915: Eliminate devid sprinkle
2018-02-22 10:15 ` [RFC v3] " Tvrtko Ursulin
2018-02-22 10:27 ` Chris Wilson
2018-02-22 10:59 ` Chris Wilson
@ 2018-02-26 14:00 ` Jani Nikula
2018-02-26 15:53 ` Chris Wilson
2 siblings, 1 reply; 16+ messages in thread
From: Jani Nikula @ 2018-02-26 14:00 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx
On Thu, 22 Feb 2018, Tvrtko Ursulin <tursulin@ursulin.net> wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Introduce subplatform mask to eliminate throughout the code devid checking
> sprinkle, mostly courtesy of IS_*_UL[TX] macros.
>
> Subplatform mask initialization is moved either to static tables (Ironlake
> M) or runtime device info init (Pineview, Haswell, Broadwell, Skylake,
> Kabylake, Coffeelake and Cannonlake).
I thought Chris had the goal of separating runtime and static init, and
I very much agreed with that idea. Throw away the mkwrite stuff. This
patch seems to be at odds with that goal by tying a runtime init into
the same mask with statically initialized platform mask.
I could bikeshed some details, but that's by far the biggest concern I
have that should be resolved first.
BR,
Jani.
>
> text data bss dec hex filename
> 1673630 59691 5064 1738385 1a8691 i915.ko.0
> 1673536 59691 5064 1738291 1a8633 i915.ko.1
>
> v2: Fixed IS_SUBPLATFORM. Updated commit msg.
> v3: Chris was right, there is an ordering problem.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 5 ++-
> drivers/gpu/drm/i915/i915_drv.h | 58 +++++++++++++------------------
> drivers/gpu/drm/i915/i915_pci.c | 3 ++
> drivers/gpu/drm/i915/intel_device_info.c | 59 +++++++++++++++++++++++++++++++-
> drivers/gpu/drm/i915/intel_device_info.h | 27 ++++++++++++++-
> 5 files changed, 114 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index aaa861b51024..f6c2e67257c9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -904,8 +904,11 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
> memcpy(device_info, match_info, sizeof(*device_info));
> device_info->device_id = dev_priv->drm.pdev->device;
>
> + intel_device_info_subplatform_init(device_info);
> +
> BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> - sizeof(device_info->platform_mask) * BITS_PER_BYTE);
> + sizeof(device_info->platform_subplatform_mask) *
> + BITS_PER_BYTE - INTEL_SUBPLATFORM_BITS);
> BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
> spin_lock_init(&dev_priv->irq_lock);
> spin_lock_init(&dev_priv->gpu_error.lock);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 82a106b1bdbc..808d957ce9ba 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2587,7 +2587,11 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define IS_REVID(p, since, until) \
> (INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
>
> -#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_mask & BIT(p))
> +#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_subplatform_mask & BIT(p))
> +#define IS_SUBPLATFORM(dev_priv, p, s) \
> + (IS_PLATFORM(dev_priv, p) && \
> + ((dev_priv)->info.platform_subplatform_mask & \
> + BIT(32 - INTEL_SUBPLATFORM_BITS + INTEL_SUBPLATFORM_##s)))
>
> #define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
> #define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
> @@ -2602,11 +2606,15 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45)
> #define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45)
> #define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv))
> -#define IS_PINEVIEW_G(dev_priv) (INTEL_DEVID(dev_priv) == 0xa001)
> -#define IS_PINEVIEW_M(dev_priv) (INTEL_DEVID(dev_priv) == 0xa011)
> +#define IS_PINEVIEW_G(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_G)
> +#define IS_PINEVIEW_M(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_PINEVIEW, PINEVIEW_M)
> #define IS_PINEVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
> #define IS_G33(dev_priv) IS_PLATFORM(dev_priv, INTEL_G33)
> -#define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
> +#define IS_IRONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
> +#define IS_IRONLAKE_M(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_IRONLAKE, IRONLAKE_M)
> #define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
> #define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
> (dev_priv)->info.gt == 1)
> @@ -2624,38 +2632,19 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
> #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
> (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
> -#define IS_BDW_ULT(dev_priv) (IS_BROADWELL(dev_priv) && \
> - ((INTEL_DEVID(dev_priv) & 0xf) == 0x6 || \
> - (INTEL_DEVID(dev_priv) & 0xf) == 0xb || \
> - (INTEL_DEVID(dev_priv) & 0xf) == 0xe))
> -/* ULX machines are also considered ULT. */
> -#define IS_BDW_ULX(dev_priv) (IS_BROADWELL(dev_priv) && \
> - (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
> +#define IS_BDW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULT)
> +#define IS_BDW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, ULX)
> #define IS_BDW_GT3(dev_priv) (IS_BROADWELL(dev_priv) && \
> (dev_priv)->info.gt == 3)
> -#define IS_HSW_ULT(dev_priv) (IS_HASWELL(dev_priv) && \
> - (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
> +#define IS_HSW_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULT)
> #define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \
> (dev_priv)->info.gt == 3)
> /* ULX machines are also considered ULT. */
> -#define IS_HSW_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x0A0E || \
> - INTEL_DEVID(dev_priv) == 0x0A1E)
> -#define IS_SKL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x1906 || \
> - INTEL_DEVID(dev_priv) == 0x1913 || \
> - INTEL_DEVID(dev_priv) == 0x1916 || \
> - INTEL_DEVID(dev_priv) == 0x1921 || \
> - INTEL_DEVID(dev_priv) == 0x1926)
> -#define IS_SKL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x190E || \
> - INTEL_DEVID(dev_priv) == 0x1915 || \
> - INTEL_DEVID(dev_priv) == 0x191E)
> -#define IS_KBL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x5906 || \
> - INTEL_DEVID(dev_priv) == 0x5913 || \
> - INTEL_DEVID(dev_priv) == 0x5916 || \
> - INTEL_DEVID(dev_priv) == 0x5921 || \
> - INTEL_DEVID(dev_priv) == 0x5926)
> -#define IS_KBL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x590E || \
> - INTEL_DEVID(dev_priv) == 0x5915 || \
> - INTEL_DEVID(dev_priv) == 0x591E)
> +#define IS_HSW_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, ULX)
> +#define IS_SKL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULT)
> +#define IS_SKL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, ULX)
> +#define IS_KBL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULT)
> +#define IS_KBL_ULX(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, ULX)
> #define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \
> (dev_priv)->info.gt == 2)
> #define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \
> @@ -2666,14 +2655,13 @@ intel_info(const struct drm_i915_private *dev_priv)
> (dev_priv)->info.gt == 2)
> #define IS_KBL_GT3(dev_priv) (IS_KABYLAKE(dev_priv) && \
> (dev_priv)->info.gt == 3)
> -#define IS_CFL_ULT(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> - (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
> +#define IS_CFL_ULT(dev_priv) IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, ULT)
> #define IS_CFL_GT2(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> (dev_priv)->info.gt == 2)
> #define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> (dev_priv)->info.gt == 3)
> -#define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \
> - (INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
> +#define IS_CNL_WITH_PORT_F(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, PORTF)
>
> #define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 1eaabf28d7b7..9e2967f7c583 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -30,6 +30,7 @@
> #include "i915_selftest.h"
>
> #define PLATFORM(x) .platform = (x), .platform_mask = BIT(x)
> +#define SUBPLATFORM(x) .subplatform_mask = BIT(INTEL_SUBPLATFORM_##x)
> #define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
>
> #define GEN_DEFAULT_PIPEOFFSETS \
> @@ -234,6 +235,7 @@ static const struct intel_device_info intel_ironlake_d_info = {
> static const struct intel_device_info intel_ironlake_m_info = {
> GEN5_FEATURES,
> PLATFORM(INTEL_IRONLAKE),
> + SUBPLATFORM(IRONLAKE_M),
> .is_mobile = 1, .has_fbc = 1,
> };
>
> @@ -605,6 +607,7 @@ static const struct intel_device_info intel_icelake_11_info = {
>
> #undef GEN
> #undef PLATFORM
> +#undef SUBPLATFORM
>
> /*
> * Make sure any device matches here are from most specific to most
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 298f8996cc54..23bb6f6f94d9 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -111,10 +111,11 @@ void intel_device_info_dump(const struct intel_device_info *info,
> struct drm_i915_private *dev_priv =
> container_of(info, struct drm_i915_private, info);
>
> - drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s gen=%i\n",
> + drm_printf(p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=%x) gen=%i\n",
> INTEL_DEVID(dev_priv),
> INTEL_REVID(dev_priv),
> intel_platform_name(info->platform),
> + info->subplatform_mask,
> info->gen);
>
> intel_device_info_dump_flags(info, p);
> @@ -458,6 +459,62 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
> return 0;
> }
>
> +void intel_device_info_subplatform_init(struct intel_device_info *info)
> +{
> + struct drm_i915_private *i915 =
> + container_of(info, struct drm_i915_private, info);
> + u16 devid = INTEL_DEVID(i915);
> +
> + if (IS_PINEVIEW(i915)) {
> + if (devid == 0xa001)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_G;
> + else if (devid == 0xa011)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PINEVIEW_M;
> + } else if (IS_HASWELL(i915)) {
> + if ((devid & 0xFF00) == 0x0A00)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> + /* ULX machines are also considered ULT. */
> + if (devid == 0x0A0E || devid == 0x0A1E)
> + info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
> + } else if (IS_BROADWELL(i915)) {
> + if ((devid & 0xf) == 0x6 ||
> + (devid & 0xf) == 0xb ||
> + (devid & 0xf) == 0xe)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> + /* ULX machines are also considered ULT. */
> + if ((devid & 0xf) == 0xe)
> + info->subplatform_mask |= INTEL_SUBPLATFORM_ULX;
> + } else if (IS_SKYLAKE(i915)) {
> + if (devid == 0x1906 ||
> + devid == 0x1913 ||
> + devid == 0x1916 ||
> + devid == 0x1921 ||
> + devid == 0x1926)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> + else if (devid == 0x190E ||
> + devid == 0x1915 ||
> + devid == 0x191E)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
> + } else if (IS_KABYLAKE(i915)) {
> + if (devid == 0x5906 ||
> + devid == 0x5913 ||
> + devid == 0x5916 ||
> + devid == 0x5921 ||
> + devid == 0x5926)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> + else if (devid == 0x590E ||
> + devid == 0x5915 ||
> + devid == 0x591E)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULX;
> + } else if (IS_COFFEELAKE(i915)) {
> + if ((devid & 0x00F0) == 0x00A0)
> + info->subplatform_mask = INTEL_SUBPLATFORM_ULT;
> + } else if (IS_CANNONLAKE(i915)) {
> + if ((devid & 0x0004) == 0x0004)
> + info->subplatform_mask = INTEL_SUBPLATFORM_PORTF;
> + }
> +}
> +
> /**
> * intel_device_info_runtime_init - initialize runtime info
> * @info: intel device info struct
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 71fdfb0451ef..2732c03ad0cb 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -74,6 +74,23 @@ enum intel_platform {
> INTEL_MAX_PLATFORMS
> };
>
> +/*
> + * Subplatform bits share the same namespace per parent platform. In other words
> + * it is fine for the same bit to be used on multiple parent platform.
> + */
> +
> +#define INTEL_SUBPLATFORM_BITS (2)
> +
> +#define INTEL_SUBPLATFORM_IRONLAKE_M (0)
> +
> +#define INTEL_SUBPLATFORM_PINEVIEW_G (0)
> +#define INTEL_SUBPLATFORM_PINEVIEW_M (1)
> +
> +#define INTEL_SUBPLATFORM_ULT (0)
> +#define INTEL_SUBPLATFORM_ULX (1)
> +
> +#define INTEL_SUBPLATFORM_PORTF (0)
> +
> #define DEV_INFO_FOR_EACH_FLAG(func) \
> func(is_mobile); \
> func(is_lp); \
> @@ -135,7 +152,14 @@ struct intel_device_info {
> u8 ring_mask; /* Rings supported by the HW */
>
> enum intel_platform platform;
> - u32 platform_mask;
> +
> + union {
> + u32 platform_subplatform_mask;
> + struct {
> + u32 platform_mask : (32 - INTEL_SUBPLATFORM_BITS);
> + u32 subplatform_mask : INTEL_SUBPLATFORM_BITS;
> + };
> + };
>
> u32 display_mmio_offset;
>
> @@ -178,6 +202,7 @@ static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
>
> const char *intel_platform_name(enum intel_platform platform);
>
> +void intel_device_info_subplatform_init(struct intel_device_info *info);
> void intel_device_info_runtime_init(struct intel_device_info *info);
> void intel_device_info_dump(const struct intel_device_info *info,
> struct drm_printer *p);
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC v3] drm/i915: Eliminate devid sprinkle
2018-02-26 14:00 ` Jani Nikula
@ 2018-02-26 15:53 ` Chris Wilson
2018-02-26 16:08 ` Jani Nikula
0 siblings, 1 reply; 16+ messages in thread
From: Chris Wilson @ 2018-02-26 15:53 UTC (permalink / raw)
To: Jani Nikula, Tvrtko Ursulin, Intel-gfx
Quoting Jani Nikula (2018-02-26 14:00:37)
> On Thu, 22 Feb 2018, Tvrtko Ursulin <tursulin@ursulin.net> wrote:
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >
> > Introduce subplatform mask to eliminate throughout the code devid checking
> > sprinkle, mostly courtesy of IS_*_UL[TX] macros.
> >
> > Subplatform mask initialization is moved either to static tables (Ironlake
> > M) or runtime device info init (Pineview, Haswell, Broadwell, Skylake,
> > Kabylake, Coffeelake and Cannonlake).
>
> I thought Chris had the goal of separating runtime and static init, and
> I very much agreed with that idea. Throw away the mkwrite stuff. This
> patch seems to be at odds with that goal by tying a runtime init into
> the same mask with statically initialized platform mask.
Yes.
In the extreme version of single platform LTO, we would bake one
device-info stanza for every subplatform. That may be a little overkill
(or rather too complicated for the user to know and too fine-grained to
be useful). So the middle ground is that we have subplatform in the
runtime_info, and the compiler has to do two loads. We can still benefit
from using BIT() though.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC v3] drm/i915: Eliminate devid sprinkle
2018-02-26 15:53 ` Chris Wilson
@ 2018-02-26 16:08 ` Jani Nikula
0 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2018-02-26 16:08 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, Intel-gfx
On Mon, 26 Feb 2018, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Quoting Jani Nikula (2018-02-26 14:00:37)
>> On Thu, 22 Feb 2018, Tvrtko Ursulin <tursulin@ursulin.net> wrote:
>> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> >
>> > Introduce subplatform mask to eliminate throughout the code devid checking
>> > sprinkle, mostly courtesy of IS_*_UL[TX] macros.
>> >
>> > Subplatform mask initialization is moved either to static tables (Ironlake
>> > M) or runtime device info init (Pineview, Haswell, Broadwell, Skylake,
>> > Kabylake, Coffeelake and Cannonlake).
>>
>> I thought Chris had the goal of separating runtime and static init, and
>> I very much agreed with that idea. Throw away the mkwrite stuff. This
>> patch seems to be at odds with that goal by tying a runtime init into
>> the same mask with statically initialized platform mask.
>
> Yes.
>
> In the extreme version of single platform LTO, we would bake one
> device-info stanza for every subplatform. That may be a little overkill
> (or rather too complicated for the user to know and too fine-grained to
> be useful). So the middle ground is that we have subplatform in the
> runtime_info, and the compiler has to do two loads. We can still benefit
> from using BIT() though.
Well, let's not conflate platform and subplatform into the same mask in
the same info for the short-term benefit, then?
And with that, I think we could go towards:
#define IS_BWD_ULT(dev_priv) (IS_BROADWELL(dev_priv) && IS_ULT(dev_priv))
where the IS_ULT would just check the subplatform mask.
I am not convinced it's worth overloading the subplatform bits.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2018-02-26 16:08 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-22 8:09 [RFC] drm/i915: Eliminate devid sprinkle Tvrtko Ursulin
2018-02-22 8:16 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-02-22 8:24 ` [RFC] " Chris Wilson
2018-02-22 10:39 ` Tvrtko Ursulin
2018-02-22 8:30 ` ✗ Fi.CI.BAT: warning for " Patchwork
2018-02-22 8:35 ` Chris Wilson
2018-02-22 8:59 ` Tvrtko Ursulin
2018-02-22 9:05 ` [RFC v2] " Tvrtko Ursulin
2018-02-22 10:15 ` [RFC v3] " Tvrtko Ursulin
2018-02-22 10:27 ` Chris Wilson
2018-02-22 10:59 ` Chris Wilson
2018-02-26 14:00 ` Jani Nikula
2018-02-26 15:53 ` Chris Wilson
2018-02-26 16:08 ` Jani Nikula
2018-02-22 9:25 ` ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev2) Patchwork
2018-02-22 10:47 ` ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev3) Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.