[igt-dev] [PATCH i-g-t 1/2] include: bump drm uAPI headers

[igt-dev] [PATCH i-g-t 1/2] include: bump drm uAPI headers

[Lionel Landwerlin]

For testing only, to be updated with proper commit id from drm-next.
---
 include/drm-uapi/i915_drm.h | 146 +++++++++++++++++++++++++++++++++++++++++++-
 lib/igt_perf.h              |   7 ---
 2 files changed, 145 insertions(+), 8 deletions(-)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 7f28eea4..9dfebbbe 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -102,6 +102,46 @@ enum drm_i915_gem_engine_class {
 	I915_ENGINE_CLASS_INVALID	= -1
 };
 
+/**
+ * DOC: perf_events exposed by i915 through /sys/bus/event_sources/drivers/i915
+ *
+ */
+
+enum drm_i915_pmu_engine_sample {
+	I915_SAMPLE_BUSY = 0,
+	I915_SAMPLE_WAIT = 1,
+	I915_SAMPLE_SEMA = 2
+};
+
+#define I915_PMU_SAMPLE_BITS (4)
+#define I915_PMU_SAMPLE_MASK (0xf)
+#define I915_PMU_SAMPLE_INSTANCE_BITS (8)
+#define I915_PMU_CLASS_SHIFT \
+	(I915_PMU_SAMPLE_BITS + I915_PMU_SAMPLE_INSTANCE_BITS)
+
+#define __I915_PMU_ENGINE(class, instance, sample) \
+	((class) << I915_PMU_CLASS_SHIFT | \
+	(instance) << I915_PMU_SAMPLE_BITS | \
+	(sample))
+
+#define I915_PMU_ENGINE_BUSY(class, instance) \
+	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_BUSY)
+
+#define I915_PMU_ENGINE_WAIT(class, instance) \
+	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_WAIT)
+
+#define I915_PMU_ENGINE_SEMA(class, instance) \
+	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
+
+#define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
+
+#define I915_PMU_ACTUAL_FREQUENCY	__I915_PMU_OTHER(0)
+#define I915_PMU_REQUESTED_FREQUENCY	__I915_PMU_OTHER(1)
+#define I915_PMU_INTERRUPTS		__I915_PMU_OTHER(2)
+#define I915_PMU_RC6_RESIDENCY		__I915_PMU_OTHER(3)
+
+#define I915_PMU_LAST I915_PMU_RC6_RESIDENCY
+
 /* Each region is a minimum of 16k, and there are at most 255 of them.
  */
 #define I915_NR_TEX_REGIONS 255	/* table size 2k - maximum due to use
@@ -278,6 +318,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_I915_PERF_OPEN		0x36
 #define DRM_I915_PERF_ADD_CONFIG	0x37
 #define DRM_I915_PERF_REMOVE_CONFIG	0x38
+#define DRM_I915_QUERY			0x39
 
 #define DRM_IOCTL_I915_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH		DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -335,6 +376,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_PERF_OPEN	DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
 #define DRM_IOCTL_I915_PERF_ADD_CONFIG	DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
 #define DRM_IOCTL_I915_PERF_REMOVE_CONFIG	DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64)
+#define DRM_IOCTL_I915_QUERY			DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
@@ -1318,7 +1360,9 @@ struct drm_intel_overlay_attrs {
  * active on a given plane.
  */
 
-#define I915_SET_COLORKEY_NONE		(1<<0) /* disable color key matching */
+#define I915_SET_COLORKEY_NONE		(1<<0) /* Deprecated. Instead set
+						* flags==0 to disable colorkeying.
+						*/
 #define I915_SET_COLORKEY_DESTINATION	(1<<1)
 #define I915_SET_COLORKEY_SOURCE	(1<<2)
 struct drm_intel_sprite_colorkey {
@@ -1573,6 +1617,106 @@ struct drm_i915_perf_oa_config {
 	__u64 flex_regs_ptr;
 };
 
+struct drm_i915_query_item {
+	__u64 query_id;
+#define DRM_I915_QUERY_TOPOLOGY_INFO    1
+
+	/*
+	 * When set to zero by userspace, this is filled with the size of the
+	 * data to be written at the data_ptr pointer. The kernel set this
+	 * value to a negative value to signal an error on a particular query
+	 * item.
+	 */
+	__s32 length;
+
+	/*
+	 * Unused for now.
+	 */
+	__u32 flags;
+
+	/*
+	 * Data will be written at the location pointed by data_ptr when the
+	 * value of length matches the length of the data to be written by the
+	 * kernel.
+	 */
+	__u64 data_ptr;
+};
+
+struct drm_i915_query {
+	__u32 num_items;
+
+	/*
+	 * Unused for now.
+	 */
+	__u32 flags;
+
+	/*
+	 * This point to an array of num_items drm_i915_query_item structures.
+	 */
+	__u64 items_ptr;
+};
+
+/*
+ * Data written by the kernel with query DRM_I915_QUERY_TOPOLOGY_INFO :
+ *
+ * data: contains the 3 pieces of information :
+ *
+ * - the slice mask with one bit per slice telling whether a slice is
+ *   available. The availability of slice X can be queried with the following
+ *   formula :
+ *
+ *           (data[X / 8] >> (X % 8)) & 1
+ *
+ * - the subslice mask for each slice with one bit per subslice telling
+ *   whether a subslice is available. The availability of subslice Y in slice
+ *   X can be queried with the following formula :
+ *
+ *           (data[subslice_offset +
+ *                 X * subslice_stride +
+ *                 Y / 8] >> (Y % 8)) & 1
+ *
+ * - the EU mask for each subslice in each slice with one bit per EU telling
+ *   whether an EU is available. The availability of EU Z in subslice Y in
+ *   slice X can be queried with the following formula :
+ *
+ *           (data[eu_offset +
+ *                 (X * max_subslices Y) * eu_stride +
+ *                 Z / 8] >> (Z % 8)) & 1
+ */
+struct drm_i915_query_topology_info {
+	/*
+	 * Unused for now.
+	 */
+	__u16 flags;
+
+	__u16 max_slices;
+	__u16 max_subslices;
+	__u16 max_eus_per_subslice;
+
+	/*
+	 * Offset in data[] at which the subslice masks are stored.
+	 */
+	__u16 subslice_offset;
+
+	/*
+	 * Stride at which each of the subslice masks for each slice are
+	 * stored.
+	 */
+	__u16 subslice_stride;
+
+	/*
+	 * Offset in data[] at which the EU masks are stored.
+	 */
+	__u16 eu_offset;
+
+	/*
+	 * Stride at which each of the EU masks for each subslice are stored.
+	 */
+	__u16 eu_stride;
+
+	__u8 data[];
+};
+
 #if defined(__cplusplus)
 }
 #endif
diff --git a/lib/igt_perf.h b/lib/igt_perf.h
index 7b66fc58..105b8cd9 100644
--- a/lib/igt_perf.h
+++ b/lib/igt_perf.h
@@ -31,13 +31,6 @@
 
 #include "igt_gt.h"
 
-enum drm_i915_pmu_engine_sample {
-	I915_SAMPLE_BUSY = 0,
-	I915_SAMPLE_WAIT = 1,
-	I915_SAMPLE_SEMA = 2,
-	I915_ENGINE_SAMPLE_MAX /* non-ABI */
-};
-
 #define I915_PMU_SAMPLE_BITS (4)
 #define I915_PMU_SAMPLE_MASK (0xf)
 #define I915_PMU_SAMPLE_INSTANCE_BITS (8)
-- 
2.16.1

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[igt-dev] [PATCH i-g-t 2/2] tests: add i915 query tests

[Lionel Landwerlin]

v2: Complete invalid cases (Chris)
    Some styling (to_user_pointer, etc...) (Chris)
    New error check, through item.length (Chris)

v3: Update for new uAPI iteration (Lionel)

v4: Return errno from a single point (Chris)
    Poising checks (Chris)

v5: Add more debug traces (Lionel)
    Update uAPI (Joonas/Lionel)
    Make sure Haswell is tested (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/Makefile.sources |   1 +
 tests/i915_query.c     | 314 +++++++++++++++++++++++++++++++++++++++++++++++++
 tests/meson.build      |   1 +
 3 files changed, 316 insertions(+)
 create mode 100644 tests/i915_query.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index b277de2f..fa1bc69e 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -167,6 +167,7 @@ TESTS_progs = \
 	gen3_render_tiledy_blits \
 	gen7_forcewake_mt \
 	gvt_basic \
+	i915_query \
 	kms_3d \
 	kms_addfb_basic \
 	kms_atomic \
diff --git a/tests/i915_query.c b/tests/i915_query.c
new file mode 100644
index 00000000..21621b78
--- /dev/null
+++ b/tests/i915_query.c
@@ -0,0 +1,314 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+
+#include <limits.h>
+
+IGT_TEST_DESCRIPTION("Testing the i915 query uAPI.");
+
+static int
+__i915_query(int fd, struct drm_i915_query *q)
+{
+	if (igt_ioctl(fd, DRM_IOCTL_I915_QUERY, q))
+		return -errno;
+	return 0;
+}
+
+static int
+__i915_query_item(int fd, struct drm_i915_query_item *items, uint32_t n_items)
+{
+	struct drm_i915_query q = {
+		.num_items = n_items,
+		.items_ptr = to_user_pointer(items),
+	};
+	return __i915_query(fd, &q);
+}
+
+#define i915_query_item(fd, items, n_items) do { \
+		igt_assert_eq(__i915_query_item(fd, items, n_items), 0); \
+		errno = 0; \
+	} while (0)
+#define i915_query_item_err(fd, items, n_items, err) do { \
+		igt_assert_eq(__i915_query_item(fd, items, n_items), -err); \
+	} while (0)
+
+static bool has_query_supports(int fd)
+{
+	struct drm_i915_query query = {};
+
+	return __i915_query(fd, &query) == 0;
+}
+
+static void test_query_garbage(int fd)
+{
+	struct drm_i915_query_item items[2];
+	struct drm_i915_query_item *items_ptr;
+	int i, len, ret;
+
+	i915_query_item_err(fd, (void *) ULONG_MAX, 1, EFAULT);
+
+	i915_query_item_err(fd, (void *) 0, 1, EFAULT);
+
+	memset(items, 0, sizeof(items));
+	i915_query_item_err(fd, items, 1, EINVAL);
+
+	memset(items, 0, sizeof(items));
+	items[0].query_id = ULONG_MAX;
+	items[1].query_id = ULONG_MAX - 2;
+	i915_query_item(fd, items, 2);
+	igt_assert_eq(items[0].length, -EINVAL);
+	igt_assert_eq(items[1].length, -EINVAL);
+
+	memset(items, 0, sizeof(items));
+	items[0].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	items[1].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	items[1].length = sizeof(struct drm_i915_query_topology_info) - 1;
+	i915_query_item(fd, items, 2);
+	igt_assert_lte(0, items[0].length);
+	igt_assert_eq(items[1].length, -EINVAL);
+
+	items_ptr = mmap(0, 4096, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
+	items_ptr[0].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	i915_query_item(fd, items_ptr, 1);
+	igt_assert(items_ptr[0].length >= sizeof(struct drm_i915_query_topology_info));
+	munmap(items_ptr, 4096);
+	i915_query_item_err(fd, items_ptr, 1, EFAULT);
+
+	len = sizeof(struct drm_i915_query_item) * 10;
+	items_ptr = mmap(0, len, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
+	for (i = 0; i < 10; i++)
+		items_ptr[i].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	ret = __i915_query_item(fd, items_ptr,
+				INT_MAX / sizeof(struct drm_i915_query_item) + 1);
+	igt_assert(ret == -EFAULT || ret == -EINVAL);
+	munmap(items_ptr, len);
+}
+
+static bool query_topology_supported(int fd)
+{
+	struct drm_i915_query_item item = {
+		.query_id = DRM_I915_QUERY_TOPOLOGY_INFO,
+	};
+
+	return __i915_query_item(fd, &item, 1) == 0 && item.length > 0;
+}
+
+static void test_query_topology_pre_gen8(int fd)
+{
+	struct drm_i915_query_item item = {
+		.query_id = DRM_I915_QUERY_TOPOLOGY_INFO,
+	};
+
+	i915_query_item(fd, &item, 1);
+	igt_assert_eq(item.length, -ENODEV);
+}
+
+#define DIV_ROUND_UP(val, div) (ALIGN(val, div) / div)
+
+static bool
+slice_available(const struct drm_i915_query_topology_info *topo_info,
+		int s)
+{
+	return (topo_info->data[s / 8] >> (s % 8)) & 1;
+}
+
+static bool
+subslice_available(const struct drm_i915_query_topology_info *topo_info,
+		   int s, int ss)
+{
+	return (topo_info->data[topo_info->subslice_offset +
+				s * topo_info->subslice_stride +
+				ss / 8] >> (ss % 8)) & 1;
+}
+
+static bool
+eu_available(const struct drm_i915_query_topology_info *topo_info,
+	     int s, int ss, int eu)
+{
+	return (topo_info->data[topo_info->eu_offset +
+				(s * topo_info->max_subslices + ss) * topo_info->eu_stride +
+				eu / 8] >> (eu % 8)) & 1;
+}
+
+static void
+test_query_topology_coherent_slice_mask(int fd)
+{
+	struct drm_i915_query_item item;
+	uint8_t *_topo_info;
+	struct drm_i915_query_topology_info *topo_info;
+	drm_i915_getparam_t gp;
+	int slice_mask, subslice_mask;
+	int s, topology_slices, topology_subslices_slice0;
+
+	gp.param = I915_PARAM_SLICE_MASK;
+	gp.value = &slice_mask;
+	igt_skip_on(igt_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) != 0);
+
+	gp.param = I915_PARAM_SUBSLICE_MASK;
+	gp.value = &subslice_mask;
+	igt_skip_on(igt_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) != 0);
+
+	/* Slices */
+	memset(&item, 0, sizeof(item));
+	item.query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	i915_query_item(fd, &item, 1);
+	igt_assert(item.length > 0);
+
+	_topo_info = malloc(3 * item.length);
+	memset(_topo_info, 0xff, 3 * item.length);
+	topo_info = (struct drm_i915_query_topology_info *) (_topo_info + item.length);
+	memset(topo_info, 0, item.length);
+	igt_assert(topo_info);
+
+	item.data_ptr = to_user_pointer(topo_info);
+	i915_query_item(fd, &item, 1);
+	igt_assert(item.length > 0);
+
+	topology_slices = 0;
+	for (s = 0; s < topo_info->max_slices; s++) {
+		if (slice_available(topo_info, s))
+			topology_slices |= 1UL << s;
+	}
+
+	igt_debug("slice mask getparam=0x%x / query=0x%x\n",
+		  slice_mask, topology_slices);
+
+	/* These 2 should always match. */
+	igt_assert_eq_u32(slice_mask, topology_slices);
+
+	topology_subslices_slice0 = 0;
+	for (s = 0; s < topo_info->max_subslices; s++) {
+		if (subslice_available(topo_info, 0, s))
+			topology_subslices_slice0 |= 1UL << s;
+	}
+
+	igt_debug("subslice mask getparam=0x%x / query=0x%x\n",
+		  subslice_mask, topology_subslices_slice0);
+
+	/* I915_PARAM_SUBSLICE_MASK returns the value for slice0, we
+	 * should match the values for the first slice of the
+	 * topology.
+	 */
+	igt_assert_eq_u32(subslice_mask, topology_subslices_slice0);
+
+	for (s = 0; s < item.length; s++) {
+		igt_assert_eq(_topo_info[s], 0xff);
+		igt_assert_eq(_topo_info[2 * item.length + s], 0xff);
+	}
+
+	free(_topo_info);
+}
+
+static void
+test_query_topology_matches_eu_total(int fd)
+{
+	struct drm_i915_query_item item;
+	struct drm_i915_query_topology_info *topo_info;
+	drm_i915_getparam_t gp;
+	int n_eus, n_eus_topology, s;
+
+	gp.param = I915_PARAM_EU_TOTAL;
+	gp.value = &n_eus;
+	do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	igt_debug("n_eus=%i\n", n_eus);
+
+	memset(&item, 0, sizeof(item));
+	item.query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	i915_query_item(fd, &item, 1);
+
+	topo_info = (struct drm_i915_query_topology_info *) calloc(1, item.length);
+
+	item.data_ptr = to_user_pointer(topo_info);
+	i915_query_item(fd, &item, 1);
+
+	igt_debug("max_slices=%hu max_subslices=%hu max_eus_per_subslice=%hu\n",
+		  topo_info->max_slices, topo_info->max_subslices,
+		  topo_info->max_eus_per_subslice);
+	igt_debug(" subslice_offset=%hu subslice_stride=%hu\n",
+		  topo_info->subslice_offset, topo_info->subslice_stride);
+	igt_debug(" eu_offset=%hu eu_stride=%hu\n",
+		  topo_info->eu_offset, topo_info->eu_stride);
+
+	n_eus_topology = 0;
+	for (s = 0; s < topo_info->max_slices; s++) {
+		int ss;
+
+		igt_debug("slice%i:\n", s);
+
+		for (ss = 0; ss < topo_info->max_subslices; ss++) {
+			int eu, n_subslice_eus = 0;
+
+			igt_debug("\tsubslice: %i\n", ss);
+
+			igt_debug("\t\teu_mask: 0b");
+			for (eu = 0; eu < topo_info->max_eus_per_subslice; eu++) {
+				uint8_t val = eu_available(topo_info, s, ss,
+							   topo_info->max_eus_per_subslice - 1 - eu);
+				igt_debug("%hhi", val);
+				n_subslice_eus += __builtin_popcount(val);
+				n_eus_topology += __builtin_popcount(val);
+			}
+			igt_debug(" (%i)\n", n_subslice_eus);
+		}
+	}
+
+	igt_assert(n_eus_topology == n_eus);
+}
+
+igt_main
+{
+	int fd = -1;
+	int devid;
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_INTEL);
+		igt_require(has_query_supports(fd));
+		devid = intel_get_drm_devid(fd);
+	}
+
+	igt_subtest("query-garbage")
+		test_query_garbage(fd);
+
+	igt_subtest("query-topology-pre-gen8") {
+		igt_require(intel_gen(devid) < 8 && !IS_HASWELL(devid));
+		igt_require(query_topology_supported(fd));
+		test_query_topology_pre_gen8(fd);
+	}
+
+	igt_subtest("query-topology-coherent-slice-mask") {
+		igt_require(AT_LEAST_GEN(devid, 8) || IS_HASWELL(devid));
+		igt_require(query_topology_supported(fd));
+		test_query_topology_coherent_slice_mask(fd);
+	}
+
+	igt_subtest("query-topology-matches-eu-total") {
+		igt_require(AT_LEAST_GEN(devid, 8) || IS_HASWELL(devid));
+		igt_require(query_topology_supported(fd));
+		test_query_topology_matches_eu_total(fd);
+	}
+
+	igt_fixture {
+		close(fd);
+	}
+}
diff --git a/tests/meson.build b/tests/meson.build
index 521a4c42..28058320 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -144,6 +144,7 @@ test_progs = [
 	'gen3_render_tiledy_blits',
 	'gen7_forcewake_mt',
 	'gvt_basic',
+	'i915_query',
 	'kms_3d',
 	'kms_addfb_basic',
 	'kms_atomic',
-- 
2.16.1

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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] include: bump drm uAPI headers

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] include: bump drm uAPI headers
URL   : https://patchwork.freedesktop.org/series/38796/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
21eb83d4736b4dd019f119b0abe7f2c5d5593aa3 igt/gem_ctx_isolation: Fix checking for context support

with latest DRM-Tip kernel build CI_DRM_3825
6e31b67bbce7 drm-tip: 2018y-02m-22d-16h-59m-35s UTC integration manifest

Testlist changes:
+igt@i915_query@query-garbage
+igt@i915_query@query-topology-coherent-slice-mask
+igt@i915_query@query-topology-matches-eu-total
+igt@i915_query@query-topology-pre-gen8

Test debugfs_test:
        Subgroup read_all_entries:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_chamelium:
        Subgroup dp-edid-read:
                pass       -> FAIL       (fi-kbl-7500u) fdo#102505

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:415s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:426s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:374s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:487s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:285s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:480s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:468s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:462s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:559s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:417s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:285s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:510s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:387s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:410s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:453s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:413s
fi-kbl-7500u     total:288  pass:262  dwarn:1   dfail:0   fail:1   skip:24  time:447s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:491s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:449s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:491s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:594s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:432s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:504s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:519s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:489s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:470s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:408s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:430s
fi-snb-2520m     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:395s
Blacklisted hosts:
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:392s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_990/issues.html
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[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] include: bump drm uAPI headers

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] include: bump drm uAPI headers
URL   : https://patchwork.freedesktop.org/series/38796/
State : success

== Summary ==

Test kms_vblank:
        Subgroup pipe-b-ts-continuation-suspend:
                skip       -> PASS       (shard-snb)
Test gem_eio:
        Subgroup in-flight:
                pass       -> INCOMPLETE (shard-apl) fdo#104945
Test kms_flip:
        Subgroup 2x-plain-flip-fb-recreate:
                fail       -> PASS       (shard-hsw) fdo#100368
        Subgroup modeset-vs-vblank-race-interruptible:
                fail       -> PASS       (shard-hsw) fdo#103060
Test kms_rotation_crc:
        Subgroup sprite-rotation-180:
                pass       -> FAIL       (shard-snb) fdo#103925
Test kms_sysfs_edid_timing:
                pass       -> WARN       (shard-apl) fdo#100047

fdo#104945 https://bugs.freedesktop.org/show_bug.cgi?id=104945
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047

shard-apl        total:3321 pass:1749 dwarn:1   dfail:0   fail:12  skip:1556 time:11724s
shard-hsw        total:3469 pass:1768 dwarn:1   dfail:0   fail:2   skip:1697 time:11811s
shard-snb        total:3469 pass:1357 dwarn:1   dfail:0   fail:3   skip:2108 time:6637s
Blacklisted hosts:
shard-kbl        total:3469 pass:1959 dwarn:1   dfail:0   fail:14  skip:1495 time:9638s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_990/shards.html
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Re: [igt-dev] [PATCH i-g-t 2/2] tests: add i915 query tests

[Lionel Landwerlin]

On 15/02/18 12:20, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2018-02-15 12:03:08)
>> v2: Complete invalid cases (Chris)
>>      Some styling (to_user_pointer, etc...) (Chris)
>>      New error check, through item.length (Chris)
>>
>> v3: Update for new uAPI iteration (Lionel)
>>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> ---
>>   tests/Makefile.sources |   1 +
>>   tests/i915_query.c     | 300 +++++++++++++++++++++++++++++++++++++++++++++++++
>>   tests/meson.build      |   1 +
>>   3 files changed, 302 insertions(+)
>>   create mode 100644 tests/i915_query.c
>>
>> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
>> index 870c9093..d8e55e8b 100644
>> --- a/tests/Makefile.sources
>> +++ b/tests/Makefile.sources
>> @@ -166,6 +166,7 @@ TESTS_progs = \
>>          gen3_render_tiledy_blits \
>>          gen7_forcewake_mt \
>>          gvt_basic \
>> +       i915_query \
>>          kms_3d \
>>          kms_addfb_basic \
>>          kms_atomic \
>> diff --git a/tests/i915_query.c b/tests/i915_query.c
>> new file mode 100644
>> index 00000000..aba7b082
>> --- /dev/null
>> +++ b/tests/i915_query.c
>> @@ -0,0 +1,300 @@
>> +/*
>> + * Copyright © 2017 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including the next
>> + * paragraph) shall be included in all copies or substantial portions of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>> + * IN THE SOFTWARE.
>> + */
>> +
>> +#include "igt.h"
>> +
>> +#include <limits.h>
>> +
>> +IGT_TEST_DESCRIPTION("Testing the i915 query uAPI.");
>> +
>> +static int
>> +__i915_query(int fd, struct drm_i915_query *q)
>> +{
>> +       return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, q);
> Please get into the habit of returning the errno so that we don't have
> to rely on errno being valid from the time of failure to the time of
> checking.
>
> int err = 0;
> if (igt_ioctl(...))
> 	err = -errno;
> return err;
>
> E.g., even
> 	igt_assert(_i915_query() == -1);
> 	igt_assert(errno == -EINVAL);
> is subject to creativity on behalf of igt.

Thanks, will do.

>
>> +static void
>> +test_query_topology_coherent_slice_mask(int fd)
>> +{
>> +       struct drm_i915_query_item item;
>> +       struct drm_i915_query_topology_info *topo_info;
>> +       drm_i915_getparam_t gp;
>> +       int slice_mask, subslice_mask;
>> +       int s, topology_slices, topology_subslices_slice0;
>> +
>> +       gp.param = I915_PARAM_SLICE_MASK;
>> +       gp.value = &slice_mask;
>> +       do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> Shouldn't these be handling ENODEV?

I think we've handled that by running this only on gen8+ in the caller.

>
>> +       gp.param = I915_PARAM_SUBSLICE_MASK;
>> +       gp.value = &subslice_mask;
>> +       do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>> +
>> +       /* Slices */
>> +       memset(&item, 0, sizeof(item));
>> +       item.query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
>> +       i915_query_item(fd, &item, 1);
>> +       igt_assert(item.length > 0);
>> +
>> +       topo_info = (struct drm_i915_query_topology_info *) calloc(1, item.length);
> igt_assert(topo_info); cast is unnecessary
> pre-zero or poisoned?
>
> Bonus points for quarantining it and checking the guards.

On it.

>
>> +       item.data_ptr = to_user_pointer(topo_info);
>> +       i915_query_item(fd, &item, 1);
>> +       igt_assert(item.length > 0);
>> +
>> +       topology_slices = 0;
>> +       for (s = 0; s < topo_info->max_slices; s++) {
>> +               if (slice_available(topo_info, s))
>> +                       topology_slices |= 1UL << s;
>> +       }
>> +
>> +       igt_debug("slice mask getparam=0x%x / query=0x%x\n",
>> +                 slice_mask, topology_slices);
>> +
>> +       /* These 2 should always match. */
>> +       igt_assert(slice_mask == topology_slices);
> igt_assert_eq();

Sure.

>> +
>> +       topology_subslices_slice0 = 0;
>> +       for (s = 0; s < topo_info->max_subslices; s++) {
>> +               if (subslice_available(topo_info, 0, s))
>> +                       topology_subslices_slice0 |= 1UL << s;
>> +       }
>> +
>> +       igt_debug("subslice mask getparam=0x%x / query=0x%x\n",
>> +                 subslice_mask, topology_subslices_slice0);
>> +
>> +       /* I915_PARAM_SUBSLICE_MASK returns the value for slice0, we
>> +        * should match the values for the first slice of the
>> +        * topology.
>> +        */
>> +       igt_assert(subslice_mask == topology_subslices_slice0);
> igt_assert_eq_u32() ?

Sure.

>
>> +
>> +       free(topo_info);
>> +}
> -Chris
>

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Re: [igt-dev] [PATCH i-g-t 2/2] tests: add i915 query tests

[Chris Wilson]

Quoting Lionel Landwerlin (2018-02-15 12:03:08)
> v2: Complete invalid cases (Chris)
>     Some styling (to_user_pointer, etc...) (Chris)
>     New error check, through item.length (Chris)
> 
> v3: Update for new uAPI iteration (Lionel)
> 
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
>  tests/Makefile.sources |   1 +
>  tests/i915_query.c     | 300 +++++++++++++++++++++++++++++++++++++++++++++++++
>  tests/meson.build      |   1 +
>  3 files changed, 302 insertions(+)
>  create mode 100644 tests/i915_query.c
> 
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index 870c9093..d8e55e8b 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -166,6 +166,7 @@ TESTS_progs = \
>         gen3_render_tiledy_blits \
>         gen7_forcewake_mt \
>         gvt_basic \
> +       i915_query \
>         kms_3d \
>         kms_addfb_basic \
>         kms_atomic \
> diff --git a/tests/i915_query.c b/tests/i915_query.c
> new file mode 100644
> index 00000000..aba7b082
> --- /dev/null
> +++ b/tests/i915_query.c
> @@ -0,0 +1,300 @@
> +/*
> + * Copyright © 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +
> +#include <limits.h>
> +
> +IGT_TEST_DESCRIPTION("Testing the i915 query uAPI.");
> +
> +static int
> +__i915_query(int fd, struct drm_i915_query *q)
> +{
> +       return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, q);

Please get into the habit of returning the errno so that we don't have
to rely on errno being valid from the time of failure to the time of
checking.

int err = 0;
if (igt_ioctl(...))
	err = -errno;
return err;

E.g., even
	igt_assert(_i915_query() == -1);
	igt_assert(errno == -EINVAL);
is subject to creativity on behalf of igt.

> +static void
> +test_query_topology_coherent_slice_mask(int fd)
> +{
> +       struct drm_i915_query_item item;
> +       struct drm_i915_query_topology_info *topo_info;
> +       drm_i915_getparam_t gp;
> +       int slice_mask, subslice_mask;
> +       int s, topology_slices, topology_subslices_slice0;
> +
> +       gp.param = I915_PARAM_SLICE_MASK;
> +       gp.value = &slice_mask;
> +       do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);

Shouldn't these be handling ENODEV?

> +       gp.param = I915_PARAM_SUBSLICE_MASK;
> +       gp.value = &subslice_mask;
> +       do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +
> +       /* Slices */
> +       memset(&item, 0, sizeof(item));
> +       item.query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
> +       i915_query_item(fd, &item, 1);
> +       igt_assert(item.length > 0);
> +
> +       topo_info = (struct drm_i915_query_topology_info *) calloc(1, item.length);

igt_assert(topo_info); cast is unnecessary
pre-zero or poisoned?

Bonus points for quarantining it and checking the guards.

> +       item.data_ptr = to_user_pointer(topo_info);
> +       i915_query_item(fd, &item, 1);
> +       igt_assert(item.length > 0);
> +
> +       topology_slices = 0;
> +       for (s = 0; s < topo_info->max_slices; s++) {
> +               if (slice_available(topo_info, s))
> +                       topology_slices |= 1UL << s;
> +       }
> +
> +       igt_debug("slice mask getparam=0x%x / query=0x%x\n",
> +                 slice_mask, topology_slices);
> +
> +       /* These 2 should always match. */
> +       igt_assert(slice_mask == topology_slices);
igt_assert_eq();
> +
> +       topology_subslices_slice0 = 0;
> +       for (s = 0; s < topo_info->max_subslices; s++) {
> +               if (subslice_available(topo_info, 0, s))
> +                       topology_subslices_slice0 |= 1UL << s;
> +       }
> +
> +       igt_debug("subslice mask getparam=0x%x / query=0x%x\n",
> +                 subslice_mask, topology_subslices_slice0);
> +
> +       /* I915_PARAM_SUBSLICE_MASK returns the value for slice0, we
> +        * should match the values for the first slice of the
> +        * topology.
> +        */
> +       igt_assert(subslice_mask == topology_subslices_slice0);

igt_assert_eq_u32() ?

> +
> +       free(topo_info);
> +}
-Chris
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[igt-dev] [PATCH i-g-t 2/2] tests: add i915 query tests

[Lionel Landwerlin]

v2: Complete invalid cases (Chris)
    Some styling (to_user_pointer, etc...) (Chris)
    New error check, through item.length (Chris)

v3: Update for new uAPI iteration (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/Makefile.sources |   1 +
 tests/i915_query.c     | 300 +++++++++++++++++++++++++++++++++++++++++++++++++
 tests/meson.build      |   1 +
 3 files changed, 302 insertions(+)
 create mode 100644 tests/i915_query.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 870c9093..d8e55e8b 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -166,6 +166,7 @@ TESTS_progs = \
 	gen3_render_tiledy_blits \
 	gen7_forcewake_mt \
 	gvt_basic \
+	i915_query \
 	kms_3d \
 	kms_addfb_basic \
 	kms_atomic \
diff --git a/tests/i915_query.c b/tests/i915_query.c
new file mode 100644
index 00000000..aba7b082
--- /dev/null
+++ b/tests/i915_query.c
@@ -0,0 +1,300 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+
+#include <limits.h>
+
+IGT_TEST_DESCRIPTION("Testing the i915 query uAPI.");
+
+static int
+__i915_query(int fd, struct drm_i915_query *q)
+{
+	return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, q);
+}
+
+static int
+__i915_query_item(int fd, struct drm_i915_query_item *items, uint32_t n_items)
+{
+	struct drm_i915_query q = {
+		.num_items = n_items,
+		.items_ptr = to_user_pointer(items),
+	};
+	return __i915_query(fd, &q);
+}
+
+#define i915_query_item(fd, items, n_items) do { \
+		igt_assert_eq(__i915_query_item(fd, items, n_items), 0); \
+		errno = 0; \
+	} while (0)
+#define i915_query_item_err(fd, items, n_items, err) do { \
+		igt_assert_eq(__i915_query_item(fd, items, n_items), -1); \
+		igt_assert_eq(errno, err); \
+	} while (0)
+
+static bool has_query_supports(int fd)
+{
+	struct drm_i915_query query = {};
+
+	return __i915_query(fd, &query) == 0;
+}
+
+static void test_query_garbage(int fd)
+{
+	struct drm_i915_query_item items[2];
+	struct drm_i915_query_item *items_ptr;
+	int i, len;
+
+	i915_query_item_err(fd, (void *) ULONG_MAX, 1, EFAULT);
+
+	i915_query_item_err(fd, (void *) 0, 1, EFAULT);
+
+	memset(items, 0, sizeof(items));
+	i915_query_item_err(fd, items, 1, EINVAL);
+
+	memset(items, 0, sizeof(items));
+	items[0].query_id = ULONG_MAX;
+	items[1].query_id = ULONG_MAX - 2;
+	i915_query_item(fd, items, 2);
+	igt_assert_eq(items[0].length, -EINVAL);
+	igt_assert_eq(items[1].length, -EINVAL);
+
+	memset(items, 0, sizeof(items));
+	items[0].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	items[1].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	items[1].length = sizeof(struct drm_i915_query_topology_info) - 1;
+	i915_query_item(fd, items, 2);
+	igt_assert_lte(0, items[0].length);
+	igt_assert_eq(items[1].length, -EINVAL);
+
+	items_ptr = mmap(0, 4096, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
+	items_ptr[0].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	i915_query_item(fd, items_ptr, 1);
+	igt_assert(items_ptr[0].length >= sizeof(struct drm_i915_query_topology_info));
+	munmap(items_ptr, 4096);
+	i915_query_item_err(fd, items_ptr, 1, EFAULT);
+
+	len = sizeof(struct drm_i915_query_item) * 10;
+	items_ptr = mmap(0, len, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
+	for (i = 0; i < 10; i++)
+		items_ptr[i].query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	igt_assert_eq(__i915_query_item(fd, items_ptr,
+					INT_MAX / sizeof(struct drm_i915_query_item) + 1), -1);
+	igt_assert(errno == EFAULT || errno == EINVAL);
+	munmap(items_ptr, len);
+}
+
+static bool query_topology_supported(int fd)
+{
+	struct drm_i915_query_item item = {
+		.query_id = DRM_I915_QUERY_TOPOLOGY_INFO,
+	};
+
+	return __i915_query_item(fd, &item, 1) == 0 && item.length > 0;
+}
+
+static void test_query_topology_pre_gen8(int fd)
+{
+	struct drm_i915_query_item item = {
+		.query_id = DRM_I915_QUERY_TOPOLOGY_INFO,
+	};
+
+	i915_query_item(fd, &item, 1);
+	igt_assert_eq(item.length, -ENODEV);
+}
+
+#define DIV_ROUND_UP(val, div) (ALIGN(val, div) / div)
+
+static bool
+slice_available(const struct drm_i915_query_topology_info *topo_info,
+		int s)
+{
+	return (topo_info->data[s / 8] >> (s % 8)) & 1;
+}
+
+static bool
+subslice_available(const struct drm_i915_query_topology_info *topo_info,
+		   int s, int ss)
+{
+	return (topo_info->data[topo_info->subslice_offset +
+				s * DIV_ROUND_UP(topo_info->max_subslices, 8) +
+				ss / 8] >> (ss % 8)) & 1;
+}
+
+static bool
+eu_available(const struct drm_i915_query_topology_info *topo_info,
+	     int s, int ss, int eu)
+{
+	return (topo_info->data[topo_info->eu_offset +
+				s * topo_info->max_subslices * DIV_ROUND_UP(topo_info->max_eus_per_subslice, 8) +
+				ss * DIV_ROUND_UP(topo_info->max_eus_per_subslice, 8) +
+				eu / 8] >> (eu % 8)) & 1;
+}
+
+static void
+test_query_topology_coherent_slice_mask(int fd)
+{
+	struct drm_i915_query_item item;
+	struct drm_i915_query_topology_info *topo_info;
+	drm_i915_getparam_t gp;
+	int slice_mask, subslice_mask;
+	int s, topology_slices, topology_subslices_slice0;
+
+	gp.param = I915_PARAM_SLICE_MASK;
+	gp.value = &slice_mask;
+	do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+	gp.param = I915_PARAM_SUBSLICE_MASK;
+	gp.value = &subslice_mask;
+	do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+	/* Slices */
+	memset(&item, 0, sizeof(item));
+	item.query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	i915_query_item(fd, &item, 1);
+	igt_assert(item.length > 0);
+
+	topo_info = (struct drm_i915_query_topology_info *) calloc(1, item.length);
+
+	item.data_ptr = to_user_pointer(topo_info);
+	i915_query_item(fd, &item, 1);
+	igt_assert(item.length > 0);
+
+	topology_slices = 0;
+	for (s = 0; s < topo_info->max_slices; s++) {
+		if (slice_available(topo_info, s))
+			topology_slices |= 1UL << s;
+	}
+
+	igt_debug("slice mask getparam=0x%x / query=0x%x\n",
+		  slice_mask, topology_slices);
+
+	/* These 2 should always match. */
+	igt_assert(slice_mask == topology_slices);
+
+	topology_subslices_slice0 = 0;
+	for (s = 0; s < topo_info->max_subslices; s++) {
+		if (subslice_available(topo_info, 0, s))
+			topology_subslices_slice0 |= 1UL << s;
+	}
+
+	igt_debug("subslice mask getparam=0x%x / query=0x%x\n",
+		  subslice_mask, topology_subslices_slice0);
+
+	/* I915_PARAM_SUBSLICE_MASK returns the value for slice0, we
+	 * should match the values for the first slice of the
+	 * topology.
+	 */
+	igt_assert(subslice_mask == topology_subslices_slice0);
+
+	free(topo_info);
+}
+
+static void
+test_query_topology_matches_eu_total(int fd)
+{
+	struct drm_i915_query_item item;
+	struct drm_i915_query_topology_info *topo_info;
+	drm_i915_getparam_t gp;
+	int n_eus, n_eus_topology, s;
+
+	gp.param = I915_PARAM_EU_TOTAL;
+	gp.value = &n_eus;
+	do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	igt_debug("n_eus=%i\n", n_eus);
+
+	memset(&item, 0, sizeof(item));
+	item.query_id = DRM_I915_QUERY_TOPOLOGY_INFO;
+	i915_query_item(fd, &item, 1);
+
+	topo_info = (struct drm_i915_query_topology_info *) calloc(1, item.length);
+
+	item.data_ptr = to_user_pointer(topo_info);
+	i915_query_item(fd, &item, 1);
+
+	igt_debug("max_slices=%u max_subslices=%u max_eus_per_subslice=%u\n",
+		  topo_info->max_slices, topo_info->max_subslices,
+		  topo_info->max_eus_per_subslice);
+
+	n_eus_topology = 0;
+	for (s = 0; s < topo_info->max_slices; s++) {
+		int ss;
+
+		igt_debug("slice%i:\n", s);
+
+		for (ss = 0; ss < topo_info->max_subslices; ss++) {
+			int eu, n_subslice_eus = 0;
+
+			igt_debug("\tsubslice: %i\n", ss);
+
+			igt_debug("\t\teu_mask: 0b");
+			for (eu = 0; eu < topo_info->max_eus_per_subslice; eu++) {
+				uint8_t val = eu_available(topo_info, s, ss,
+							   topo_info->max_eus_per_subslice - 1 - eu);
+				igt_debug("%hhi", val);
+				n_subslice_eus += __builtin_popcount(val);
+				n_eus_topology += __builtin_popcount(val);
+			}
+			igt_debug(" (%i)\n", n_subslice_eus);
+		}
+	}
+
+	igt_assert(n_eus_topology == n_eus);
+}
+
+igt_main
+{
+	int fd = -1;
+	int devid;
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_INTEL);
+		igt_require(has_query_supports(fd));
+		devid = intel_get_drm_devid(fd);
+	}
+
+	igt_subtest("query-garbage")
+		test_query_garbage(fd);
+
+	igt_subtest("query-topology-pre-gen8") {
+		igt_require(intel_gen(devid) < 8);
+		igt_require(query_topology_supported(fd));
+		test_query_topology_pre_gen8(fd);
+	}
+
+	igt_subtest("query-topology-coherent-slice-mask") {
+		igt_require(AT_LEAST_GEN(devid, 8));
+		igt_require(query_topology_supported(fd));
+		test_query_topology_coherent_slice_mask(fd);
+	}
+
+	igt_subtest("query-topology-matches-eu-total") {
+		igt_require(AT_LEAST_GEN(devid, 8));
+		igt_require(query_topology_supported(fd));
+		test_query_topology_matches_eu_total(fd);
+	}
+
+	igt_fixture {
+		close(fd);
+	}
+}
diff --git a/tests/meson.build b/tests/meson.build
index 521a4c42..28058320 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -144,6 +144,7 @@ test_progs = [
 	'gen3_render_tiledy_blits',
 	'gen7_forcewake_mt',
 	'gvt_basic',
+	'i915_query',
 	'kms_3d',
 	'kms_addfb_basic',
 	'kms_atomic',
-- 
2.16.1

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