* [PATCH 00/52] Allow dynamic allocations during NAND chip identification phase
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
This series make a quite deep change in the NAND framework. Until now,
the NAND chip identification phase could be done in two manners from the
controller driver perspective:
1/ Call nand_scan()
or
1/ Call nand_scan_ident()
2/ Do some controller-dependent configuration
3/ Call nand_scan_tail().
The fact that the identifaction could be split in two operations
involved that in the NAND framework, it was not possible to do any
dynamic allocation without risking a memory leak. What if the core
allocates a structure, then the driver between nand_scan_ident() and
nand_scan_tail() decides it cannot handle the chip and errors out?
The structure allocated by the core is lost: it is a memory leak.
To avoid this situation, we migrate all drivers to use nand_scan(). But
because drivers need to do some configuration before nand_scan_tail(), a
first hook is offered, embedded in the nand_ecc_ctrl structure, called
->attach_chip(). Drivers that need to tweak their configuration after
nand_scan_ident() should implement it. Any dynamically allocated space
in ->attach_chip() must be freed in the second hook: ->detach_chip().
The ->detach_chip() does not have to be called upon error in the
controller driver probe function. The nand_realease() helper already
exists for that and will do the call if needed. Of course, this helper
must be called on error after a successful nand_scan(), just like
before.
Once all drivers not using nand_scan() (yet) are migrated,
nand_scan_ident() and nand_scan_tail() are unexported and only available
internally.
A previous work [1] removed the ONFI/JEDEC parameter pages and instead
allocated a nand_parameters structure in nand_chip, embedding both
generic entries and ONFI-related ones. The deal was, once dynamic
allocation possible, allocate in nand_scan_ident() the ONFI strcuture
only if actually needed. This is done in the last patches.
All these changes have been tested with the GPMI driver and tested by
the 0-day robot.
Thank you,
Miqu?l
[1] http://lists.infradead.org/pipermail/linux-mtd/2018-March/079456.html
Miquel Raynal (52):
mtd: rawnand: add hooks that may be called during nand_scan()
mtd: rawnand: bf5xx: fix probe function error path
mtd: rawnand: bf5xx: convert driver to nand_scan()
mtd: rawnand: brcmnand: fix probe function error path
mtd: rawnand: brcmnand: convert driver to nand_scan()
mtd: rawnand: cafe: fix probe function error path
mtd: rawnand: cafe: convert driver to nand_scan()
mtd: rawnand: davinci: fix probe function error path
mtd: rawnand: davinci: convert driver to nand_scan()
mtd: rawnand: denali: fix probe function error path
mtd: rawnand: denali: convert to nand_scan()
mtd: rawnand: fsl_elbc: fix probe function error path
mtd: rawnand: fsl_elbc: convert driver to nand_scan()
mtd: rawnand: fsl_ifc: fix probe function error path
mtd: rawnand: fsl_ifc: convert driver to nand_scan()
mtd: rawnand: fsmc: fix probe function error path
mtd: rawnand: fsmc: convert driver to nand_scan()
mtd: rawnand: gpmi: convert driver to nand_scan()
mtd: rawnand: hisi504: enhance the probe function error path
mtd: rawnand: hisi504: convert driver to nand_scan()
mtd: rawnand: jz4780: convert driver to nand_scan()
mtd: rawnand: lpc32xx_mlc: enhance the probe function error path
mtd: rawnand: lpc32xx_mlc: convert driver to nand_scan()
mtd: rawnand: lpc32xx_slc: enhance the probe function error
mtd: rawnand: lpc32xx_slc: convert driver to nand_scan()
mtd: rawnand: marvell: convert driver to nand_scan()
mtd: rawnand: mtk: convert driver to nand_scan()
mtd: rawnand: mxc: fix probe function error path
mtd: rawnand: mxc: convert driver to nand_scan()
mtd: rawnand: nandsim: convert driver to nand_scan()
mtd: rawnand: omap2: fix the probe function error path
mtd: rawnand: omap2: convert driver to nand_scan()
mtd: rawnand: s3c2410: enhance the probe function error path
mtd: rawnand: s3c2410: convert driver to nand_scan()
mtd: rawnand: sh_flctl: move all NAND chip related setup in one
function
mtd: rawnand: sh_flctl: fix the probe function error path
mtd: rawnand: sh_flctl: convert driver to nand_scan()
mtd: rawnand: sunxi: convert driver to nand_scan()
mtd: rawnand: tango: fix probe function error path
mtd: rawnand: tango: convert driver to nand_scan()
mtd: rawnand: txx9ndfmc: convert driver to nand_scan()
mtd: rawnand: vf610: convert driver to nand_scan()
mtd: rawnand: atmel: convert driver to nand_scan()
mtd: rawnand: add a field in nand_chip to fill an array of IDs
mtd: rawnand: sm_common: make use of the new flash_ids table entry
mtd: rawnand: sm_common: convert driver to nand_scan()
mtd: rawnand: docg4: fix the probe function error path
mtd: rawnand: docg4: convert driver to nand_scan()
mtd: rawnand: qcom: convert driver to nand_scan()
mtd: rawnand: jz4740: convert driver to nand_scan()
mtd: rawnand: do not export nand_scan_[ident|tail]() anymore
mtd: rawnand: allocate dynamically ONFI parameters during detection
drivers/mtd/nand/raw/atmel/nand-controller.c | 70 ++--
drivers/mtd/nand/raw/bf5xx_nand.c | 55 +--
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 45 ++-
drivers/mtd/nand/raw/cafe_nand.c | 148 ++++----
drivers/mtd/nand/raw/davinci_nand.c | 192 +++++-----
drivers/mtd/nand/raw/denali.c | 138 +++----
drivers/mtd/nand/raw/docg4.c | 65 ++--
drivers/mtd/nand/raw/fsl_elbc_nand.c | 22 +-
drivers/mtd/nand/raw/fsl_ifc_nand.c | 21 +-
drivers/mtd/nand/raw/fsmc_nand.c | 154 ++++----
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 52 +--
drivers/mtd/nand/raw/hisi504_nand.c | 101 +++---
drivers/mtd/nand/raw/jz4740_nand.c | 42 ++-
drivers/mtd/nand/raw/jz4780_nand.c | 30 +-
drivers/mtd/nand/raw/lpc32xx_mlc.c | 131 +++----
drivers/mtd/nand/raw/lpc32xx_slc.c | 97 ++---
drivers/mtd/nand/raw/marvell_nand.c | 201 ++++++-----
drivers/mtd/nand/raw/mtk_nand.c | 71 ++--
drivers/mtd/nand/raw/mxc_nand.c | 143 ++++----
drivers/mtd/nand/raw/nand_base.c | 118 ++++--
drivers/mtd/nand/raw/nand_micron.c | 4 +-
drivers/mtd/nand/raw/nand_timings.c | 12 +-
drivers/mtd/nand/raw/nandsim.c | 78 ++--
drivers/mtd/nand/raw/omap2.c | 521 +++++++++++++--------------
drivers/mtd/nand/raw/qcom_nandc.c | 67 +---
drivers/mtd/nand/raw/s3c2410.c | 32 +-
drivers/mtd/nand/raw/sh_flctl.c | 55 ++-
drivers/mtd/nand/raw/sm_common.c | 35 +-
drivers/mtd/nand/raw/sunxi_nand.c | 38 +-
drivers/mtd/nand/raw/tango_nand.c | 40 +-
drivers/mtd/nand/raw/txx9ndfmc.c | 25 +-
drivers/mtd/nand/raw/vf610_nfc.c | 119 +++---
include/linux/mtd/rawnand.h | 27 +-
include/linux/mtd/sh_flctl.h | 1 +
34 files changed, 1537 insertions(+), 1413 deletions(-)
--
2.14.1
^ permalink raw reply [flat|nested] 120+ messages in thread* [PATCH 01/52] mtd: rawnand: add hooks that may be called during nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
In order to remove the limitation that forbids dynamic allocation in
nand_scan_ident(), we must create a path that will be the same for all
controller drivers. The idea is to use nand_scan() instead of the widely
implemented nand_scan_ident()/nand_scan_tail() couple. In order to
achieve this, controller drivers will need to adjust some parameters
between these two functions depending on the NAND chip wired on them.
For that, a hook called ->attach_chip() is created in the
nand_hw_control structure (called *controller in struct nand_chip) of
the NAND chip structure.
Another hook, ->detach_chip() is also introduced in order to clean the
controller driver's potential allocations in case of failure of
nand_scan_tail(). There is no need for the controller driver to call the
->detach_chip() hook directly upon error after a successful nand_scan().
In this situation, calling nand_release() as before is enough.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 21 +++++++++++++++++++--
include/linux/mtd/rawnand.h | 6 ++++++
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index ef0a44a8c3d5..182904b2fc07 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -6647,11 +6647,23 @@ EXPORT_SYMBOL(nand_scan_tail);
*/
int nand_scan(struct mtd_info *mtd, int maxchips)
{
+ struct nand_chip *chip = mtd_to_nand(mtd);
int ret;
ret = nand_scan_ident(mtd, maxchips, NULL);
- if (!ret)
- ret = nand_scan_tail(mtd);
+ if (ret)
+ return ret;
+
+ if (chip->ecc.attach_chip) {
+ ret = chip->ecc.attach_chip(chip);
+ if (ret)
+ return ret;
+ }
+
+ ret = nand_scan_tail(mtd);
+ if (ret && chip->ecc.detach_chip)
+ chip->ecc.detach_chip(chip);
+
return ret;
}
EXPORT_SYMBOL(nand_scan);
@@ -6679,7 +6691,12 @@ void nand_cleanup(struct nand_chip *chip)
/* Free manufacturer priv data. */
nand_manufacturer_cleanup(chip);
+
+ /* Free controller specific allocations after chip identification */
+ if (chip->ecc.detach_chip)
+ chip->ecc.detach_chip(chip);
}
+
EXPORT_SYMBOL_GPL(nand_cleanup);
/**
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 348f2aba0b9e..53bb6ef1a7c2 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -576,6 +576,10 @@ static const struct nand_ecc_caps __name = { \
* @read_oob_raw: function to read chip OOB data without ECC
* @read_oob: function to read chip OOB data
* @write_oob: function to write chip OOB data
+ * @attach_chip: Callback that may be called between nand_detec() and
+ * nand_scan_tail() during nand_scan() (optional).
+ * @detach_chip: Callback that may be called if nand_scan_tail() fails
+ * (optional).
*/
struct nand_ecc_ctrl {
nand_ecc_modes_t mode;
@@ -616,6 +620,8 @@ struct nand_ecc_ctrl {
int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page);
int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
int page);
+ int (*attach_chip)(struct nand_chip *chip);
+ void (*detach_chip)(struct nand_chip *chip);
};
/**
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 01/52] mtd: rawnand: add hooks that may be called during nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
In order to remove the limitation that forbids dynamic allocation in
nand_scan_ident(), we must create a path that will be the same for all
controller drivers. The idea is to use nand_scan() instead of the widely
implemented nand_scan_ident()/nand_scan_tail() couple. In order to
achieve this, controller drivers will need to adjust some parameters
between these two functions depending on the NAND chip wired on them.
For that, a hook called ->attach_chip() is created in the
nand_hw_control structure (called *controller in struct nand_chip) of
the NAND chip structure.
Another hook, ->detach_chip() is also introduced in order to clean the
controller driver's potential allocations in case of failure of
nand_scan_tail(). There is no need for the controller driver to call the
->detach_chip() hook directly upon error after a successful nand_scan().
In this situation, calling nand_release() as before is enough.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 21 +++++++++++++++++++--
include/linux/mtd/rawnand.h | 6 ++++++
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index ef0a44a8c3d5..182904b2fc07 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -6647,11 +6647,23 @@ EXPORT_SYMBOL(nand_scan_tail);
*/
int nand_scan(struct mtd_info *mtd, int maxchips)
{
+ struct nand_chip *chip = mtd_to_nand(mtd);
int ret;
ret = nand_scan_ident(mtd, maxchips, NULL);
- if (!ret)
- ret = nand_scan_tail(mtd);
+ if (ret)
+ return ret;
+
+ if (chip->ecc.attach_chip) {
+ ret = chip->ecc.attach_chip(chip);
+ if (ret)
+ return ret;
+ }
+
+ ret = nand_scan_tail(mtd);
+ if (ret && chip->ecc.detach_chip)
+ chip->ecc.detach_chip(chip);
+
return ret;
}
EXPORT_SYMBOL(nand_scan);
@@ -6679,7 +6691,12 @@ void nand_cleanup(struct nand_chip *chip)
/* Free manufacturer priv data. */
nand_manufacturer_cleanup(chip);
+
+ /* Free controller specific allocations after chip identification */
+ if (chip->ecc.detach_chip)
+ chip->ecc.detach_chip(chip);
}
+
EXPORT_SYMBOL_GPL(nand_cleanup);
/**
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 348f2aba0b9e..53bb6ef1a7c2 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -576,6 +576,10 @@ static const struct nand_ecc_caps __name = { \
* @read_oob_raw: function to read chip OOB data without ECC
* @read_oob: function to read chip OOB data
* @write_oob: function to write chip OOB data
+ * @attach_chip: Callback that may be called between nand_detec() and
+ * nand_scan_tail() during nand_scan() (optional).
+ * @detach_chip: Callback that may be called if nand_scan_tail() fails
+ * (optional).
*/
struct nand_ecc_ctrl {
nand_ecc_modes_t mode;
@@ -616,6 +620,8 @@ struct nand_ecc_ctrl {
int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page);
int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
int page);
+ int (*attach_chip)(struct nand_chip *chip);
+ void (*detach_chip)(struct nand_chip *chip);
};
/**
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* Re: [PATCH 01/52] mtd: rawnand: add hooks that may be called during nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-15 15:24 ` Boris Brezillon
-1 siblings, 0 replies; 120+ messages in thread
From: Boris Brezillon @ 2018-03-15 15:24 UTC (permalink / raw)
To: Miquel Raynal
Cc: Richard Weinberger, David Woodhouse, Brian Norris, Marek Vasut,
Cyrille Pitchen, Josh Wu, Kamal Dasu, Harvey Hunt, Stefan Agner,
linux-mtd, linux-arm-kernel
On Fri, 2 Mar 2018 18:03:09 +0100
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> In order to remove the limitation that forbids dynamic allocation in
> nand_scan_ident(), we must create a path that will be the same for all
> controller drivers. The idea is to use nand_scan() instead of the widely
> implemented nand_scan_ident()/nand_scan_tail() couple. In order to
> achieve this, controller drivers will need to adjust some parameters
> between these two functions depending on the NAND chip wired on them.
>
> For that, a hook called ->attach_chip() is created in the
> nand_hw_control structure (called *controller in struct nand_chip) of
> the NAND chip structure.
>
> Another hook, ->detach_chip() is also introduced in order to clean the
> controller driver's potential allocations in case of failure of
> nand_scan_tail(). There is no need for the controller driver to call the
> ->detach_chip() hook directly upon error after a successful nand_scan().
> In this situation, calling nand_release() as before is enough.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/nand_base.c | 21 +++++++++++++++++++--
> include/linux/mtd/rawnand.h | 6 ++++++
> 2 files changed, 25 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index ef0a44a8c3d5..182904b2fc07 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -6647,11 +6647,23 @@ EXPORT_SYMBOL(nand_scan_tail);
> */
> int nand_scan(struct mtd_info *mtd, int maxchips)
> {
> + struct nand_chip *chip = mtd_to_nand(mtd);
> int ret;
>
> ret = nand_scan_ident(mtd, maxchips, NULL);
> - if (!ret)
> - ret = nand_scan_tail(mtd);
> + if (ret)
> + return ret;
> +
> + if (chip->ecc.attach_chip) {
> + ret = chip->ecc.attach_chip(chip);
> + if (ret)
> + return ret;
> + }
> +
> + ret = nand_scan_tail(mtd);
> + if (ret && chip->ecc.detach_chip)
> + chip->ecc.detach_chip(chip);
> +
> return ret;
> }
> EXPORT_SYMBOL(nand_scan);
> @@ -6679,7 +6691,12 @@ void nand_cleanup(struct nand_chip *chip)
>
> /* Free manufacturer priv data. */
> nand_manufacturer_cleanup(chip);
> +
> + /* Free controller specific allocations after chip identification */
> + if (chip->ecc.detach_chip)
> + chip->ecc.detach_chip(chip);
> }
> +
> EXPORT_SYMBOL_GPL(nand_cleanup);
>
> /**
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 348f2aba0b9e..53bb6ef1a7c2 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -576,6 +576,10 @@ static const struct nand_ecc_caps __name = { \
> * @read_oob_raw: function to read chip OOB data without ECC
> * @read_oob: function to read chip OOB data
> * @write_oob: function to write chip OOB data
> + * @attach_chip: Callback that may be called between nand_detec() and
> + * nand_scan_tail() during nand_scan() (optional).
> + * @detach_chip: Callback that may be called if nand_scan_tail() fails
> + * (optional).
> */
> struct nand_ecc_ctrl {
> nand_ecc_modes_t mode;
> @@ -616,6 +620,8 @@ struct nand_ecc_ctrl {
> int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page);
> int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
> int page);
> + int (*attach_chip)(struct nand_chip *chip);
> + void (*detach_chip)(struct nand_chip *chip);
As said in my reply to the cover letter, I'd prefer to have these hooks
in nand_hw_ctrl.
> };
>
> /**
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread* [PATCH 01/52] mtd: rawnand: add hooks that may be called during nand_scan()
@ 2018-03-15 15:24 ` Boris Brezillon
0 siblings, 0 replies; 120+ messages in thread
From: Boris Brezillon @ 2018-03-15 15:24 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, 2 Mar 2018 18:03:09 +0100
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> In order to remove the limitation that forbids dynamic allocation in
> nand_scan_ident(), we must create a path that will be the same for all
> controller drivers. The idea is to use nand_scan() instead of the widely
> implemented nand_scan_ident()/nand_scan_tail() couple. In order to
> achieve this, controller drivers will need to adjust some parameters
> between these two functions depending on the NAND chip wired on them.
>
> For that, a hook called ->attach_chip() is created in the
> nand_hw_control structure (called *controller in struct nand_chip) of
> the NAND chip structure.
>
> Another hook, ->detach_chip() is also introduced in order to clean the
> controller driver's potential allocations in case of failure of
> nand_scan_tail(). There is no need for the controller driver to call the
> ->detach_chip() hook directly upon error after a successful nand_scan().
> In this situation, calling nand_release() as before is enough.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/nand_base.c | 21 +++++++++++++++++++--
> include/linux/mtd/rawnand.h | 6 ++++++
> 2 files changed, 25 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index ef0a44a8c3d5..182904b2fc07 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -6647,11 +6647,23 @@ EXPORT_SYMBOL(nand_scan_tail);
> */
> int nand_scan(struct mtd_info *mtd, int maxchips)
> {
> + struct nand_chip *chip = mtd_to_nand(mtd);
> int ret;
>
> ret = nand_scan_ident(mtd, maxchips, NULL);
> - if (!ret)
> - ret = nand_scan_tail(mtd);
> + if (ret)
> + return ret;
> +
> + if (chip->ecc.attach_chip) {
> + ret = chip->ecc.attach_chip(chip);
> + if (ret)
> + return ret;
> + }
> +
> + ret = nand_scan_tail(mtd);
> + if (ret && chip->ecc.detach_chip)
> + chip->ecc.detach_chip(chip);
> +
> return ret;
> }
> EXPORT_SYMBOL(nand_scan);
> @@ -6679,7 +6691,12 @@ void nand_cleanup(struct nand_chip *chip)
>
> /* Free manufacturer priv data. */
> nand_manufacturer_cleanup(chip);
> +
> + /* Free controller specific allocations after chip identification */
> + if (chip->ecc.detach_chip)
> + chip->ecc.detach_chip(chip);
> }
> +
> EXPORT_SYMBOL_GPL(nand_cleanup);
>
> /**
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 348f2aba0b9e..53bb6ef1a7c2 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -576,6 +576,10 @@ static const struct nand_ecc_caps __name = { \
> * @read_oob_raw: function to read chip OOB data without ECC
> * @read_oob: function to read chip OOB data
> * @write_oob: function to write chip OOB data
> + * @attach_chip: Callback that may be called between nand_detec() and
> + * nand_scan_tail() during nand_scan() (optional).
> + * @detach_chip: Callback that may be called if nand_scan_tail() fails
> + * (optional).
> */
> struct nand_ecc_ctrl {
> nand_ecc_modes_t mode;
> @@ -616,6 +620,8 @@ struct nand_ecc_ctrl {
> int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page);
> int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
> int page);
> + int (*attach_chip)(struct nand_chip *chip);
> + void (*detach_chip)(struct nand_chip *chip);
As said in my reply to the cover letter, I'd prefer to have these hooks
in nand_hw_ctrl.
> };
>
> /**
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread
* [PATCH 02/52] mtd: rawnand: bf5xx: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() (wrapped by bf5xx_nand_add_partition())
returns an error code that should be checked and nand_release() called
accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/bf5xx_nand.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/bf5xx_nand.c b/drivers/mtd/nand/raw/bf5xx_nand.c
index 9a1d8d104570..da7a6083b0e5 100644
--- a/drivers/mtd/nand/raw/bf5xx_nand.c
+++ b/drivers/mtd/nand/raw/bf5xx_nand.c
@@ -831,11 +831,16 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
#endif
/* add NAND partition */
- bf5xx_nand_add_partition(info);
+ err = bf5xx_nand_add_partition(info);
+ if (err)
+ goto out_err_release_nand;
dev_dbg(&pdev->dev, "initialised ok\n");
+
return 0;
+out_err_release_nand:
+ nand_release(mtd);
out_err_nand_scan:
bf5xx_nand_dma_remove(info);
out_err:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 02/52] mtd: rawnand: bf5xx: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() (wrapped by bf5xx_nand_add_partition())
returns an error code that should be checked and nand_release() called
accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/bf5xx_nand.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/bf5xx_nand.c b/drivers/mtd/nand/raw/bf5xx_nand.c
index 9a1d8d104570..da7a6083b0e5 100644
--- a/drivers/mtd/nand/raw/bf5xx_nand.c
+++ b/drivers/mtd/nand/raw/bf5xx_nand.c
@@ -831,11 +831,16 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
#endif
/* add NAND partition */
- bf5xx_nand_add_partition(info);
+ err = bf5xx_nand_add_partition(info);
+ if (err)
+ goto out_err_release_nand;
dev_dbg(&pdev->dev, "initialised ok\n");
+
return 0;
+out_err_release_nand:
+ nand_release(mtd);
out_err_nand_scan:
bf5xx_nand_dma_remove(info);
out_err:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* Re: [PATCH 02/52] mtd: rawnand: bf5xx: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-15 15:23 ` Boris Brezillon
-1 siblings, 0 replies; 120+ messages in thread
From: Boris Brezillon @ 2018-03-15 15:23 UTC (permalink / raw)
To: Miquel Raynal
Cc: Richard Weinberger, David Woodhouse, Brian Norris, Marek Vasut,
Cyrille Pitchen, Josh Wu, Kamal Dasu, Harvey Hunt, Stefan Agner,
linux-mtd, linux-arm-kernel
On Fri, 2 Mar 2018 18:03:10 +0100
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> An error after nand_scan_tail() should trigger a nand_release().
> The helper mtd_device_register() (wrapped by bf5xx_nand_add_partition())
> returns an error code that should be checked and nand_release() called
> accordingly.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/bf5xx_nand.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/bf5xx_nand.c b/drivers/mtd/nand/raw/bf5xx_nand.c
> index 9a1d8d104570..da7a6083b0e5 100644
> --- a/drivers/mtd/nand/raw/bf5xx_nand.c
> +++ b/drivers/mtd/nand/raw/bf5xx_nand.c
> @@ -831,11 +831,16 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
> #endif
>
> /* add NAND partition */
> - bf5xx_nand_add_partition(info);
> + err = bf5xx_nand_add_partition(info);
> + if (err)
> + goto out_err_release_nand;
>
> dev_dbg(&pdev->dev, "initialised ok\n");
> +
> return 0;
>
> +out_err_release_nand:
> + nand_release(mtd);
You should call nand_cleanup() here not nand_release(), because the
mtd device has not been registered and nand_release() does both
mtd_device_unregister() and nand_cleanup().
I'll let you check the other patches.
> out_err_nand_scan:
> bf5xx_nand_dma_remove(info);
> out_err:
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread
* [PATCH 02/52] mtd: rawnand: bf5xx: fix probe function error path
@ 2018-03-15 15:23 ` Boris Brezillon
0 siblings, 0 replies; 120+ messages in thread
From: Boris Brezillon @ 2018-03-15 15:23 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, 2 Mar 2018 18:03:10 +0100
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> An error after nand_scan_tail() should trigger a nand_release().
> The helper mtd_device_register() (wrapped by bf5xx_nand_add_partition())
> returns an error code that should be checked and nand_release() called
> accordingly.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/bf5xx_nand.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/bf5xx_nand.c b/drivers/mtd/nand/raw/bf5xx_nand.c
> index 9a1d8d104570..da7a6083b0e5 100644
> --- a/drivers/mtd/nand/raw/bf5xx_nand.c
> +++ b/drivers/mtd/nand/raw/bf5xx_nand.c
> @@ -831,11 +831,16 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
> #endif
>
> /* add NAND partition */
> - bf5xx_nand_add_partition(info);
> + err = bf5xx_nand_add_partition(info);
> + if (err)
> + goto out_err_release_nand;
>
> dev_dbg(&pdev->dev, "initialised ok\n");
> +
> return 0;
>
> +out_err_release_nand:
> + nand_release(mtd);
You should call nand_cleanup() here not nand_release(), because the
mtd device has not been registered and nand_release() does both
mtd_device_unregister() and nand_cleanup().
I'll let you check the other patches.
> out_err_nand_scan:
> bf5xx_nand_dma_remove(info);
> out_err:
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread
* [PATCH 03/52] mtd: rawnand: bf5xx: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/bf5xx_nand.c | 48 +++++++++++++++++++--------------------
1 file changed, 23 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/nand/raw/bf5xx_nand.c b/drivers/mtd/nand/raw/bf5xx_nand.c
index da7a6083b0e5..bc42bccf1beb 100644
--- a/drivers/mtd/nand/raw/bf5xx_nand.c
+++ b/drivers/mtd/nand/raw/bf5xx_nand.c
@@ -697,33 +697,31 @@ static int bf5xx_nand_remove(struct platform_device *pdev)
return 0;
}
-static int bf5xx_nand_scan(struct mtd_info *mtd)
+static int bf5xx_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
- int ret;
+ struct mtd_info *mtd = nand_to_mtd(chip);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
+ if (!hardware_ecc)
+ return 0;
- if (hardware_ecc) {
- /*
- * for nand with page size > 512B, think it as several sections with 512B
- */
- if (likely(mtd->writesize >= 512)) {
- chip->ecc.size = 512;
- chip->ecc.bytes = 6;
- chip->ecc.strength = 2;
- } else {
- chip->ecc.size = 256;
- chip->ecc.bytes = 3;
- chip->ecc.strength = 1;
- bfin_write_NFC_CTL(bfin_read_NFC_CTL() & ~(1 << NFC_PG_SIZE_OFFSET));
- SSYNC();
- }
+ /*
+ * For NAND with page size > 512B, it is like if it had several sections
+ * of 512B.
+ */
+ if (likely(mtd->writesize >= 512)) {
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 6;
+ chip->ecc.strength = 2;
+ } else {
+ chip->ecc.size = 256;
+ chip->ecc.bytes = 3;
+ chip->ecc.strength = 1;
+ bfin_write_NFC_CTL(bfin_read_NFC_CTL() &
+ ~(1 << NFC_PG_SIZE_OFFSET));
+ SSYNC();
}
- return nand_scan_tail(mtd);
+ return 0;
}
/*
@@ -821,10 +819,10 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
}
/* scan hardware nand chip and setup mtd info data struct */
- if (bf5xx_nand_scan(mtd)) {
- err = -ENXIO;
+ chip->ecc.attach_chip = bf5xx_nand_attach_chip;
+ err = nand_scan(mtd, 1);
+ if (err)
goto out_err_nand_scan;
- }
#ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC
chip->badblockpos = 63;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 03/52] mtd: rawnand: bf5xx: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/bf5xx_nand.c | 48 +++++++++++++++++++--------------------
1 file changed, 23 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/nand/raw/bf5xx_nand.c b/drivers/mtd/nand/raw/bf5xx_nand.c
index da7a6083b0e5..bc42bccf1beb 100644
--- a/drivers/mtd/nand/raw/bf5xx_nand.c
+++ b/drivers/mtd/nand/raw/bf5xx_nand.c
@@ -697,33 +697,31 @@ static int bf5xx_nand_remove(struct platform_device *pdev)
return 0;
}
-static int bf5xx_nand_scan(struct mtd_info *mtd)
+static int bf5xx_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
- int ret;
+ struct mtd_info *mtd = nand_to_mtd(chip);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
+ if (!hardware_ecc)
+ return 0;
- if (hardware_ecc) {
- /*
- * for nand with page size > 512B, think it as several sections with 512B
- */
- if (likely(mtd->writesize >= 512)) {
- chip->ecc.size = 512;
- chip->ecc.bytes = 6;
- chip->ecc.strength = 2;
- } else {
- chip->ecc.size = 256;
- chip->ecc.bytes = 3;
- chip->ecc.strength = 1;
- bfin_write_NFC_CTL(bfin_read_NFC_CTL() & ~(1 << NFC_PG_SIZE_OFFSET));
- SSYNC();
- }
+ /*
+ * For NAND with page size > 512B, it is like if it had several sections
+ * of 512B.
+ */
+ if (likely(mtd->writesize >= 512)) {
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 6;
+ chip->ecc.strength = 2;
+ } else {
+ chip->ecc.size = 256;
+ chip->ecc.bytes = 3;
+ chip->ecc.strength = 1;
+ bfin_write_NFC_CTL(bfin_read_NFC_CTL() &
+ ~(1 << NFC_PG_SIZE_OFFSET));
+ SSYNC();
}
- return nand_scan_tail(mtd);
+ return 0;
}
/*
@@ -821,10 +819,10 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
}
/* scan hardware nand chip and setup mtd info data struct */
- if (bf5xx_nand_scan(mtd)) {
- err = -ENXIO;
+ chip->ecc.attach_chip = bf5xx_nand_attach_chip;
+ err = nand_scan(mtd, 1);
+ if (err)
goto out_err_nand_scan;
- }
#ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC
chip->badblockpos = 63;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 04/52] mtd: rawnand: brcmnand: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index c28fd2bc1a84..844c84987f49 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2297,7 +2297,11 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
if (ret)
return ret;
- return mtd_device_register(mtd, NULL, 0);
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret)
+ nand_release(mtd);
+
+ return ret;
}
static void brcmnand_save_restore_cs_config(struct brcmnand_host *host,
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 04/52] mtd: rawnand: brcmnand: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index c28fd2bc1a84..844c84987f49 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2297,7 +2297,11 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
if (ret)
return ret;
- return mtd_device_register(mtd, NULL, 0);
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret)
+ nand_release(mtd);
+
+ return ret;
}
static void brcmnand_save_restore_cs_config(struct brcmnand_host *host,
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 05/52] mtd: rawnand: brcmnand: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 43 ++++++++++++++++++--------------
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 844c84987f49..4ba240f8662a 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2208,6 +2208,28 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
return 0;
}
+static int brcmnand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct brcmnand_host *host = nand_get_controller_data(chip);
+ int ret;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ if (brcmnand_setup_dev(host))
+ return -ENXIO;
+
+ chip->ecc.size = host->hwcfg.sector_size_1k ? 1024 : 512;
+
+ /* only use our internal HW threshold */
+ mtd->bitflip_threshold = 1;
+
+ ret = brcmstb_choose_ecc_layout(host);
+
+ return ret;
+}
+
static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
{
struct brcmnand_controller *ctrl = host->ctrl;
@@ -2267,10 +2289,6 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
nand_writereg(ctrl, cfg_offs,
nand_readreg(ctrl, cfg_offs) & ~CFG_BUS_WIDTH);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
-
chip->options |= NAND_NO_SUBPAGE_WRITE;
/*
* Avoid (for instance) kmap()'d buffers from JFFS2, which we can't DMA
@@ -2279,21 +2297,8 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
*/
chip->options |= NAND_USE_BOUNCE_BUFFER;
- if (chip->bbt_options & NAND_BBT_USE_FLASH)
- chip->bbt_options |= NAND_BBT_NO_OOB;
-
- if (brcmnand_setup_dev(host))
- return -ENXIO;
-
- chip->ecc.size = host->hwcfg.sector_size_1k ? 1024 : 512;
- /* only use our internal HW threshold */
- mtd->bitflip_threshold = 1;
-
- ret = brcmstb_choose_ecc_layout(host);
- if (ret)
- return ret;
-
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = brcmnand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 05/52] mtd: rawnand: brcmnand: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 43 ++++++++++++++++++--------------
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 844c84987f49..4ba240f8662a 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2208,6 +2208,28 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
return 0;
}
+static int brcmnand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct brcmnand_host *host = nand_get_controller_data(chip);
+ int ret;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ if (brcmnand_setup_dev(host))
+ return -ENXIO;
+
+ chip->ecc.size = host->hwcfg.sector_size_1k ? 1024 : 512;
+
+ /* only use our internal HW threshold */
+ mtd->bitflip_threshold = 1;
+
+ ret = brcmstb_choose_ecc_layout(host);
+
+ return ret;
+}
+
static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
{
struct brcmnand_controller *ctrl = host->ctrl;
@@ -2267,10 +2289,6 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
nand_writereg(ctrl, cfg_offs,
nand_readreg(ctrl, cfg_offs) & ~CFG_BUS_WIDTH);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
-
chip->options |= NAND_NO_SUBPAGE_WRITE;
/*
* Avoid (for instance) kmap()'d buffers from JFFS2, which we can't DMA
@@ -2279,21 +2297,8 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
*/
chip->options |= NAND_USE_BOUNCE_BUFFER;
- if (chip->bbt_options & NAND_BBT_USE_FLASH)
- chip->bbt_options |= NAND_BBT_NO_OOB;
-
- if (brcmnand_setup_dev(host))
- return -ENXIO;
-
- chip->ecc.size = host->hwcfg.sector_size_1k ? 1024 : 512;
- /* only use our internal HW threshold */
- mtd->bitflip_threshold = 1;
-
- ret = brcmstb_choose_ecc_layout(host);
- if (ret)
- return ret;
-
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = brcmnand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 06/52] mtd: rawnand: cafe: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/cafe_nand.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index b4c4032a2d83..15cec32383a6 100644
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -774,21 +774,26 @@ static int cafe_nand_probe(struct pci_dev *pdev,
pci_set_drvdata(pdev, mtd);
mtd->name = "cafe_nand";
- mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
+ err = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
+ if (err)
+ goto out_release_nand;
goto out;
- out_free_dma:
+out_release_nand:
+ nand_release(mtd);
+out_free_dma:
dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
- out_irq:
+out_irq:
/* Disable NAND IRQ in global IRQ mask register */
cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
free_irq(pdev->irq, mtd);
- out_ior:
+out_ior:
pci_iounmap(pdev, cafe->mmio);
- out_free_mtd:
+out_free_mtd:
kfree(cafe);
- out:
+out:
+
return err;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 06/52] mtd: rawnand: cafe: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/cafe_nand.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index b4c4032a2d83..15cec32383a6 100644
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -774,21 +774,26 @@ static int cafe_nand_probe(struct pci_dev *pdev,
pci_set_drvdata(pdev, mtd);
mtd->name = "cafe_nand";
- mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
+ err = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
+ if (err)
+ goto out_release_nand;
goto out;
- out_free_dma:
+out_release_nand:
+ nand_release(mtd);
+out_free_dma:
dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
- out_irq:
+out_irq:
/* Disable NAND IRQ in global IRQ mask register */
cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
free_irq(pdev->irq, mtd);
- out_ior:
+out_ior:
pci_iounmap(pdev, cafe->mmio);
- out_free_mtd:
+out_free_mtd:
kfree(cafe);
- out:
+out:
+
return err;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 07/52] mtd: rawnand: cafe: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/cafe_nand.c | 133 ++++++++++++++++++++++-----------------
1 file changed, 76 insertions(+), 57 deletions(-)
diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index 15cec32383a6..ff51b56dfcef 100644
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -71,7 +71,9 @@ struct cafe_priv {
unsigned char *dmabuf;
};
-static int usedma = 1;
+#define CAFE_DEFAULT_DMA 1
+
+static int usedma = CAFE_DEFAULT_DMA;
module_param(usedma, int, 0644);
static int skipbbt = 0;
@@ -597,6 +599,74 @@ static int cafe_mul(int x)
return gf4096_mul(x, 0xe01);
}
+static int cafe_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct cafe_priv *cafe = nand_get_controller_data(chip);
+ int err = 0;
+
+ cafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112,
+ &cafe->dmaaddr, GFP_KERNEL);
+ if (!cafe->dmabuf)
+ return -ENOMEM;
+
+ /* Set up DMA address */
+ cafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);
+ cafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);
+
+ cafe_dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
+ cafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);
+
+ /* Restore the DMA flag */
+ usedma = CAFE_DEFAULT_DMA;
+
+ cafe->ctl2 = BIT(27); /* Reed-Solomon ECC */
+ if (mtd->writesize == 2048)
+ cafe->ctl2 |= BIT(29); /* 2KiB page size */
+
+ /* Set up ECC according to the type of chip we found */
+ mtd_set_ooblayout(mtd, &cafe_ooblayout_ops);
+ if (mtd->writesize == 2048) {
+ cafe->nand.bbt_td = &cafe_bbt_main_descr_2048;
+ cafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;
+ } else if (mtd->writesize == 512) {
+ cafe->nand.bbt_td = &cafe_bbt_main_descr_512;
+ cafe->nand.bbt_md = &cafe_bbt_mirror_descr_512;
+ } else {
+ dev_warn(&cafe->pdev->dev,
+ "Unexpected NAND flash writesize %d. Aborting\n",
+ mtd->writesize);
+ err = -ENOTSUPP;
+ goto out_free_dma;
+ }
+
+ cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
+ cafe->nand.ecc.size = mtd->writesize;
+ cafe->nand.ecc.bytes = 14;
+ cafe->nand.ecc.strength = 4;
+ cafe->nand.ecc.hwctl = (void *)cafe_nand_bug;
+ cafe->nand.ecc.calculate = (void *)cafe_nand_bug;
+ cafe->nand.ecc.correct = (void *)cafe_nand_bug;
+ cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel;
+ cafe->nand.ecc.write_oob = cafe_nand_write_oob;
+ cafe->nand.ecc.read_page = cafe_nand_read_page;
+ cafe->nand.ecc.read_oob = cafe_nand_read_oob;
+
+ return 0;
+
+ out_free_dma:
+ dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
+
+ return err;
+}
+
+static void cafe_nand_detach_chip(struct nand_chip *chip)
+{
+ struct cafe_priv *cafe = nand_get_controller_data(chip);
+
+ dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
+}
+
static int cafe_nand_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
@@ -712,65 +782,16 @@ static int cafe_nand_probe(struct pci_dev *pdev,
cafe_readl(cafe, GLOBAL_CTRL),
cafe_readl(cafe, GLOBAL_IRQ_MASK));
- /* Do not use the DMA for the nand_scan_ident() */
- old_dma = usedma;
+ /* Do not use the DMA during the NAND identification */
usedma = 0;
/* Scan to find existence of the device */
- err = nand_scan_ident(mtd, 2, NULL);
+ cafe->nand.ecc.attach_chip = cafe_nand_attach_chip;
+ cafe->nand.ecc.detach_chip = cafe_nand_detach_chip;
+ err = nand_scan(mtd, 2);
if (err)
goto out_irq;
- cafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112,
- &cafe->dmaaddr, GFP_KERNEL);
- if (!cafe->dmabuf) {
- err = -ENOMEM;
- goto out_irq;
- }
-
- /* Set up DMA address */
- cafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);
- cafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);
-
- cafe_dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
- cafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);
-
- /* Restore the DMA flag */
- usedma = old_dma;
-
- cafe->ctl2 = 1<<27; /* Reed-Solomon ECC */
- if (mtd->writesize == 2048)
- cafe->ctl2 |= 1<<29; /* 2KiB page size */
-
- /* Set up ECC according to the type of chip we found */
- mtd_set_ooblayout(mtd, &cafe_ooblayout_ops);
- if (mtd->writesize == 2048) {
- cafe->nand.bbt_td = &cafe_bbt_main_descr_2048;
- cafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;
- } else if (mtd->writesize == 512) {
- cafe->nand.bbt_td = &cafe_bbt_main_descr_512;
- cafe->nand.bbt_md = &cafe_bbt_mirror_descr_512;
- } else {
- printk(KERN_WARNING "Unexpected NAND flash writesize %d. Aborting\n",
- mtd->writesize);
- goto out_free_dma;
- }
- cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
- cafe->nand.ecc.size = mtd->writesize;
- cafe->nand.ecc.bytes = 14;
- cafe->nand.ecc.strength = 4;
- cafe->nand.ecc.hwctl = (void *)cafe_nand_bug;
- cafe->nand.ecc.calculate = (void *)cafe_nand_bug;
- cafe->nand.ecc.correct = (void *)cafe_nand_bug;
- cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel;
- cafe->nand.ecc.write_oob = cafe_nand_write_oob;
- cafe->nand.ecc.read_page = cafe_nand_read_page;
- cafe->nand.ecc.read_oob = cafe_nand_read_oob;
-
- err = nand_scan_tail(mtd);
- if (err)
- goto out_free_dma;
-
pci_set_drvdata(pdev, mtd);
mtd->name = "cafe_nand";
@@ -778,12 +799,10 @@ static int cafe_nand_probe(struct pci_dev *pdev,
if (err)
goto out_release_nand;
- goto out;
+ return 0;
out_release_nand:
nand_release(mtd);
-out_free_dma:
- dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
out_irq:
/* Disable NAND IRQ in global IRQ mask register */
cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 07/52] mtd: rawnand: cafe: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/cafe_nand.c | 133 ++++++++++++++++++++++-----------------
1 file changed, 76 insertions(+), 57 deletions(-)
diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index 15cec32383a6..ff51b56dfcef 100644
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -71,7 +71,9 @@ struct cafe_priv {
unsigned char *dmabuf;
};
-static int usedma = 1;
+#define CAFE_DEFAULT_DMA 1
+
+static int usedma = CAFE_DEFAULT_DMA;
module_param(usedma, int, 0644);
static int skipbbt = 0;
@@ -597,6 +599,74 @@ static int cafe_mul(int x)
return gf4096_mul(x, 0xe01);
}
+static int cafe_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct cafe_priv *cafe = nand_get_controller_data(chip);
+ int err = 0;
+
+ cafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112,
+ &cafe->dmaaddr, GFP_KERNEL);
+ if (!cafe->dmabuf)
+ return -ENOMEM;
+
+ /* Set up DMA address */
+ cafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);
+ cafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);
+
+ cafe_dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
+ cafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);
+
+ /* Restore the DMA flag */
+ usedma = CAFE_DEFAULT_DMA;
+
+ cafe->ctl2 = BIT(27); /* Reed-Solomon ECC */
+ if (mtd->writesize == 2048)
+ cafe->ctl2 |= BIT(29); /* 2KiB page size */
+
+ /* Set up ECC according to the type of chip we found */
+ mtd_set_ooblayout(mtd, &cafe_ooblayout_ops);
+ if (mtd->writesize == 2048) {
+ cafe->nand.bbt_td = &cafe_bbt_main_descr_2048;
+ cafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;
+ } else if (mtd->writesize == 512) {
+ cafe->nand.bbt_td = &cafe_bbt_main_descr_512;
+ cafe->nand.bbt_md = &cafe_bbt_mirror_descr_512;
+ } else {
+ dev_warn(&cafe->pdev->dev,
+ "Unexpected NAND flash writesize %d. Aborting\n",
+ mtd->writesize);
+ err = -ENOTSUPP;
+ goto out_free_dma;
+ }
+
+ cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
+ cafe->nand.ecc.size = mtd->writesize;
+ cafe->nand.ecc.bytes = 14;
+ cafe->nand.ecc.strength = 4;
+ cafe->nand.ecc.hwctl = (void *)cafe_nand_bug;
+ cafe->nand.ecc.calculate = (void *)cafe_nand_bug;
+ cafe->nand.ecc.correct = (void *)cafe_nand_bug;
+ cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel;
+ cafe->nand.ecc.write_oob = cafe_nand_write_oob;
+ cafe->nand.ecc.read_page = cafe_nand_read_page;
+ cafe->nand.ecc.read_oob = cafe_nand_read_oob;
+
+ return 0;
+
+ out_free_dma:
+ dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
+
+ return err;
+}
+
+static void cafe_nand_detach_chip(struct nand_chip *chip)
+{
+ struct cafe_priv *cafe = nand_get_controller_data(chip);
+
+ dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
+}
+
static int cafe_nand_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
@@ -712,65 +782,16 @@ static int cafe_nand_probe(struct pci_dev *pdev,
cafe_readl(cafe, GLOBAL_CTRL),
cafe_readl(cafe, GLOBAL_IRQ_MASK));
- /* Do not use the DMA for the nand_scan_ident() */
- old_dma = usedma;
+ /* Do not use the DMA during the NAND identification */
usedma = 0;
/* Scan to find existence of the device */
- err = nand_scan_ident(mtd, 2, NULL);
+ cafe->nand.ecc.attach_chip = cafe_nand_attach_chip;
+ cafe->nand.ecc.detach_chip = cafe_nand_detach_chip;
+ err = nand_scan(mtd, 2);
if (err)
goto out_irq;
- cafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112,
- &cafe->dmaaddr, GFP_KERNEL);
- if (!cafe->dmabuf) {
- err = -ENOMEM;
- goto out_irq;
- }
-
- /* Set up DMA address */
- cafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);
- cafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);
-
- cafe_dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
- cafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);
-
- /* Restore the DMA flag */
- usedma = old_dma;
-
- cafe->ctl2 = 1<<27; /* Reed-Solomon ECC */
- if (mtd->writesize == 2048)
- cafe->ctl2 |= 1<<29; /* 2KiB page size */
-
- /* Set up ECC according to the type of chip we found */
- mtd_set_ooblayout(mtd, &cafe_ooblayout_ops);
- if (mtd->writesize == 2048) {
- cafe->nand.bbt_td = &cafe_bbt_main_descr_2048;
- cafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;
- } else if (mtd->writesize == 512) {
- cafe->nand.bbt_td = &cafe_bbt_main_descr_512;
- cafe->nand.bbt_md = &cafe_bbt_mirror_descr_512;
- } else {
- printk(KERN_WARNING "Unexpected NAND flash writesize %d. Aborting\n",
- mtd->writesize);
- goto out_free_dma;
- }
- cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
- cafe->nand.ecc.size = mtd->writesize;
- cafe->nand.ecc.bytes = 14;
- cafe->nand.ecc.strength = 4;
- cafe->nand.ecc.hwctl = (void *)cafe_nand_bug;
- cafe->nand.ecc.calculate = (void *)cafe_nand_bug;
- cafe->nand.ecc.correct = (void *)cafe_nand_bug;
- cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel;
- cafe->nand.ecc.write_oob = cafe_nand_write_oob;
- cafe->nand.ecc.read_page = cafe_nand_read_page;
- cafe->nand.ecc.read_oob = cafe_nand_read_oob;
-
- err = nand_scan_tail(mtd);
- if (err)
- goto out_free_dma;
-
pci_set_drvdata(pdev, mtd);
mtd->name = "cafe_nand";
@@ -778,12 +799,10 @@ static int cafe_nand_probe(struct pci_dev *pdev,
if (err)
goto out_release_nand;
- goto out;
+ return 0;
out_release_nand:
nand_release(mtd);
-out_free_dma:
- dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
out_irq:
/* Disable NAND IRQ in global IRQ mask register */
cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 08/52] mtd: rawnand: davinci: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/davinci_nand.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index ccc8c43abcff..b5c107f8dc53 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -826,7 +826,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
else
ret = mtd_device_register(mtd, NULL, 0);
if (ret < 0)
- goto err;
+ goto release_nand;
val = davinci_nand_readl(info, NRCSR_OFFSET);
dev_info(&pdev->dev, "controller rev. %d.%d\n",
@@ -834,14 +834,16 @@ static int nand_davinci_probe(struct platform_device *pdev)
return 0;
+release_nand:
+ nand_release(mtd);
err:
clk_disable_unprepare(info->clk);
-
err_clk_enable:
spin_lock_irq(&davinci_nand_lock);
if (info->chip.ecc.mode == NAND_ECC_HW_SYNDROME)
ecc4_busy = false;
spin_unlock_irq(&davinci_nand_lock);
+
return ret;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 08/52] mtd: rawnand: davinci: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/davinci_nand.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index ccc8c43abcff..b5c107f8dc53 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -826,7 +826,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
else
ret = mtd_device_register(mtd, NULL, 0);
if (ret < 0)
- goto err;
+ goto release_nand;
val = davinci_nand_readl(info, NRCSR_OFFSET);
dev_info(&pdev->dev, "controller rev. %d.%d\n",
@@ -834,14 +834,16 @@ static int nand_davinci_probe(struct platform_device *pdev)
return 0;
+release_nand:
+ nand_release(mtd);
err:
clk_disable_unprepare(info->clk);
-
err_clk_enable:
spin_lock_irq(&davinci_nand_lock);
if (info->chip.ecc.mode == NAND_ECC_HW_SYNDROME)
ecc4_busy = false;
spin_unlock_irq(&davinci_nand_lock);
+
return ret;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 09/52] mtd: rawnand: davinci: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Also change the unused "struct device *dev" parameter of the driver
structure into a platform device to reuse it in the ->attach_chip()
hook.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/davinci_nand.c | 186 +++++++++++++++++++-----------------
1 file changed, 98 insertions(+), 88 deletions(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index b5c107f8dc53..21dc67089335 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -54,7 +54,7 @@
struct davinci_nand_info {
struct nand_chip chip;
- struct device *dev;
+ struct platform_device *pdev;
struct clk *clk;
bool is_readmode;
@@ -608,6 +608,100 @@ static struct davinci_nand_pdata
}
#endif
+static int davinci_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct davinci_nand_info *info = to_davinci_nand(mtd);
+ struct davinci_nand_pdata *pdata = nand_davinci_get_pdata(info->pdev);
+ int ret = 0;
+
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+
+ switch (info->chip.ecc.mode) {
+ case NAND_ECC_NONE:
+ pdata->ecc_bits = 0;
+ break;
+ case NAND_ECC_SOFT:
+ pdata->ecc_bits = 0;
+ /*
+ * This driver expects Hamming based ECC when ecc_mode is set
+ * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_HAMMING to
+ * avoid adding an extra ->ecc_algo field to
+ * davinci_nand_pdata.
+ */
+ info->chip.ecc.algo = NAND_ECC_HAMMING;
+ break;
+ case NAND_ECC_HW:
+ if (pdata->ecc_bits == 4) {
+ /*
+ * No sanity checks: CPUs must support this,
+ * and the chips may not use NAND_BUSWIDTH_16.
+ */
+
+ /* No sharing 4-bit hardware between chipselects yet */
+ spin_lock_irq(&davinci_nand_lock);
+ if (ecc4_busy)
+ ret = -EBUSY;
+ else
+ ecc4_busy = true;
+ spin_unlock_irq(&davinci_nand_lock);
+
+ if (ret == -EBUSY)
+ return ret;
+
+ info->chip.ecc.calculate = nand_davinci_calculate_4bit;
+ info->chip.ecc.correct = nand_davinci_correct_4bit;
+ info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;
+ info->chip.ecc.bytes = 10;
+ info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+ info->chip.ecc.algo = NAND_ECC_BCH;
+ } else {
+ /* 1bit ecc hamming */
+ info->chip.ecc.calculate = nand_davinci_calculate_1bit;
+ info->chip.ecc.correct = nand_davinci_correct_1bit;
+ info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;
+ info->chip.ecc.bytes = 3;
+ info->chip.ecc.algo = NAND_ECC_HAMMING;
+ }
+ info->chip.ecc.size = 512;
+ info->chip.ecc.strength = pdata->ecc_bits;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /*
+ * Update ECC layout if needed ... for 1-bit HW ECC, the default
+ * is OK, but it allocates 6 bytes when only 3 are needed (for
+ * each 512 bytes). For the 4-bit HW ECC, that default is not
+ * usable: 10 bytes are needed, not 6.
+ */
+ if (pdata->ecc_bits == 4) {
+ int chunks = mtd->writesize / 512;
+
+ if (!chunks || mtd->oobsize < 16) {
+ dev_dbg(&info->pdev->dev, "too small\n");
+ return -EINVAL;
+ }
+
+ /* For small page chips, preserve the manufacturer's
+ * badblock marking data ... and make sure a flash BBT
+ * table marker fits in the free bytes.
+ */
+ if (chunks == 1) {
+ mtd_set_ooblayout(mtd, &hwecc4_small_ooblayout_ops);
+ } else if (chunks == 4 || chunks == 8) {
+ mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ info->chip.ecc.mode = NAND_ECC_HW_OOB_FIRST;
+ } else {
+ return -EIO;
+ }
+ }
+
+ return ret;
+}
+
static int nand_davinci_probe(struct platform_device *pdev)
{
struct davinci_nand_pdata *pdata;
@@ -661,7 +755,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
return -EADDRNOTAVAIL;
}
- info->dev = &pdev->dev;
+ info->pdev = pdev;
info->base = base;
info->vaddr = vaddr;
@@ -729,97 +823,13 @@ static int nand_davinci_probe(struct platform_device *pdev)
spin_unlock_irq(&davinci_nand_lock);
/* Scan to find existence of the device(s) */
- ret = nand_scan_ident(mtd, pdata->mask_chipsel ? 2 : 1, NULL);
+ info->chip.ecc.attach_chip = davinci_nand_attach_chip;
+ ret = nand_scan(mtd, pdata->mask_chipsel ? 2 : 1);
if (ret < 0) {
dev_dbg(&pdev->dev, "no NAND chip(s) found\n");
goto err;
}
- switch (info->chip.ecc.mode) {
- case NAND_ECC_NONE:
- pdata->ecc_bits = 0;
- break;
- case NAND_ECC_SOFT:
- pdata->ecc_bits = 0;
- /*
- * This driver expects Hamming based ECC when ecc_mode is set
- * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_HAMMING to
- * avoid adding an extra ->ecc_algo field to
- * davinci_nand_pdata.
- */
- info->chip.ecc.algo = NAND_ECC_HAMMING;
- break;
- case NAND_ECC_HW:
- if (pdata->ecc_bits == 4) {
- /* No sanity checks: CPUs must support this,
- * and the chips may not use NAND_BUSWIDTH_16.
- */
-
- /* No sharing 4-bit hardware between chipselects yet */
- spin_lock_irq(&davinci_nand_lock);
- if (ecc4_busy)
- ret = -EBUSY;
- else
- ecc4_busy = true;
- spin_unlock_irq(&davinci_nand_lock);
-
- if (ret == -EBUSY)
- return ret;
-
- info->chip.ecc.calculate = nand_davinci_calculate_4bit;
- info->chip.ecc.correct = nand_davinci_correct_4bit;
- info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;
- info->chip.ecc.bytes = 10;
- info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
- info->chip.ecc.algo = NAND_ECC_BCH;
- } else {
- /* 1bit ecc hamming */
- info->chip.ecc.calculate = nand_davinci_calculate_1bit;
- info->chip.ecc.correct = nand_davinci_correct_1bit;
- info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;
- info->chip.ecc.bytes = 3;
- info->chip.ecc.algo = NAND_ECC_HAMMING;
- }
- info->chip.ecc.size = 512;
- info->chip.ecc.strength = pdata->ecc_bits;
- break;
- default:
- return -EINVAL;
- }
-
- /* Update ECC layout if needed ... for 1-bit HW ECC, the default
- * is OK, but it allocates 6 bytes when only 3 are needed (for
- * each 512 bytes). For the 4-bit HW ECC, that default is not
- * usable: 10 bytes are needed, not 6.
- */
- if (pdata->ecc_bits == 4) {
- int chunks = mtd->writesize / 512;
-
- if (!chunks || mtd->oobsize < 16) {
- dev_dbg(&pdev->dev, "too small\n");
- ret = -EINVAL;
- goto err;
- }
-
- /* For small page chips, preserve the manufacturer's
- * badblock marking data ... and make sure a flash BBT
- * table marker fits in the free bytes.
- */
- if (chunks == 1) {
- mtd_set_ooblayout(mtd, &hwecc4_small_ooblayout_ops);
- } else if (chunks == 4 || chunks == 8) {
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
- info->chip.ecc.mode = NAND_ECC_HW_OOB_FIRST;
- } else {
- ret = -EIO;
- goto err;
- }
- }
-
- ret = nand_scan_tail(mtd);
- if (ret < 0)
- goto err;
-
if (pdata->parts)
ret = mtd_device_parse_register(mtd, NULL, NULL,
pdata->parts, pdata->nr_parts);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 09/52] mtd: rawnand: davinci: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Also change the unused "struct device *dev" parameter of the driver
structure into a platform device to reuse it in the ->attach_chip()
hook.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/davinci_nand.c | 186 +++++++++++++++++++-----------------
1 file changed, 98 insertions(+), 88 deletions(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index b5c107f8dc53..21dc67089335 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -54,7 +54,7 @@
struct davinci_nand_info {
struct nand_chip chip;
- struct device *dev;
+ struct platform_device *pdev;
struct clk *clk;
bool is_readmode;
@@ -608,6 +608,100 @@ static struct davinci_nand_pdata
}
#endif
+static int davinci_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct davinci_nand_info *info = to_davinci_nand(mtd);
+ struct davinci_nand_pdata *pdata = nand_davinci_get_pdata(info->pdev);
+ int ret = 0;
+
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+
+ switch (info->chip.ecc.mode) {
+ case NAND_ECC_NONE:
+ pdata->ecc_bits = 0;
+ break;
+ case NAND_ECC_SOFT:
+ pdata->ecc_bits = 0;
+ /*
+ * This driver expects Hamming based ECC when ecc_mode is set
+ * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_HAMMING to
+ * avoid adding an extra ->ecc_algo field to
+ * davinci_nand_pdata.
+ */
+ info->chip.ecc.algo = NAND_ECC_HAMMING;
+ break;
+ case NAND_ECC_HW:
+ if (pdata->ecc_bits == 4) {
+ /*
+ * No sanity checks: CPUs must support this,
+ * and the chips may not use NAND_BUSWIDTH_16.
+ */
+
+ /* No sharing 4-bit hardware between chipselects yet */
+ spin_lock_irq(&davinci_nand_lock);
+ if (ecc4_busy)
+ ret = -EBUSY;
+ else
+ ecc4_busy = true;
+ spin_unlock_irq(&davinci_nand_lock);
+
+ if (ret == -EBUSY)
+ return ret;
+
+ info->chip.ecc.calculate = nand_davinci_calculate_4bit;
+ info->chip.ecc.correct = nand_davinci_correct_4bit;
+ info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;
+ info->chip.ecc.bytes = 10;
+ info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+ info->chip.ecc.algo = NAND_ECC_BCH;
+ } else {
+ /* 1bit ecc hamming */
+ info->chip.ecc.calculate = nand_davinci_calculate_1bit;
+ info->chip.ecc.correct = nand_davinci_correct_1bit;
+ info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;
+ info->chip.ecc.bytes = 3;
+ info->chip.ecc.algo = NAND_ECC_HAMMING;
+ }
+ info->chip.ecc.size = 512;
+ info->chip.ecc.strength = pdata->ecc_bits;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /*
+ * Update ECC layout if needed ... for 1-bit HW ECC, the default
+ * is OK, but it allocates 6 bytes when only 3 are needed (for
+ * each 512 bytes). For the 4-bit HW ECC, that default is not
+ * usable: 10 bytes are needed, not 6.
+ */
+ if (pdata->ecc_bits == 4) {
+ int chunks = mtd->writesize / 512;
+
+ if (!chunks || mtd->oobsize < 16) {
+ dev_dbg(&info->pdev->dev, "too small\n");
+ return -EINVAL;
+ }
+
+ /* For small page chips, preserve the manufacturer's
+ * badblock marking data ... and make sure a flash BBT
+ * table marker fits in the free bytes.
+ */
+ if (chunks == 1) {
+ mtd_set_ooblayout(mtd, &hwecc4_small_ooblayout_ops);
+ } else if (chunks == 4 || chunks == 8) {
+ mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ info->chip.ecc.mode = NAND_ECC_HW_OOB_FIRST;
+ } else {
+ return -EIO;
+ }
+ }
+
+ return ret;
+}
+
static int nand_davinci_probe(struct platform_device *pdev)
{
struct davinci_nand_pdata *pdata;
@@ -661,7 +755,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
return -EADDRNOTAVAIL;
}
- info->dev = &pdev->dev;
+ info->pdev = pdev;
info->base = base;
info->vaddr = vaddr;
@@ -729,97 +823,13 @@ static int nand_davinci_probe(struct platform_device *pdev)
spin_unlock_irq(&davinci_nand_lock);
/* Scan to find existence of the device(s) */
- ret = nand_scan_ident(mtd, pdata->mask_chipsel ? 2 : 1, NULL);
+ info->chip.ecc.attach_chip = davinci_nand_attach_chip;
+ ret = nand_scan(mtd, pdata->mask_chipsel ? 2 : 1);
if (ret < 0) {
dev_dbg(&pdev->dev, "no NAND chip(s) found\n");
goto err;
}
- switch (info->chip.ecc.mode) {
- case NAND_ECC_NONE:
- pdata->ecc_bits = 0;
- break;
- case NAND_ECC_SOFT:
- pdata->ecc_bits = 0;
- /*
- * This driver expects Hamming based ECC when ecc_mode is set
- * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_HAMMING to
- * avoid adding an extra ->ecc_algo field to
- * davinci_nand_pdata.
- */
- info->chip.ecc.algo = NAND_ECC_HAMMING;
- break;
- case NAND_ECC_HW:
- if (pdata->ecc_bits == 4) {
- /* No sanity checks: CPUs must support this,
- * and the chips may not use NAND_BUSWIDTH_16.
- */
-
- /* No sharing 4-bit hardware between chipselects yet */
- spin_lock_irq(&davinci_nand_lock);
- if (ecc4_busy)
- ret = -EBUSY;
- else
- ecc4_busy = true;
- spin_unlock_irq(&davinci_nand_lock);
-
- if (ret == -EBUSY)
- return ret;
-
- info->chip.ecc.calculate = nand_davinci_calculate_4bit;
- info->chip.ecc.correct = nand_davinci_correct_4bit;
- info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;
- info->chip.ecc.bytes = 10;
- info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
- info->chip.ecc.algo = NAND_ECC_BCH;
- } else {
- /* 1bit ecc hamming */
- info->chip.ecc.calculate = nand_davinci_calculate_1bit;
- info->chip.ecc.correct = nand_davinci_correct_1bit;
- info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;
- info->chip.ecc.bytes = 3;
- info->chip.ecc.algo = NAND_ECC_HAMMING;
- }
- info->chip.ecc.size = 512;
- info->chip.ecc.strength = pdata->ecc_bits;
- break;
- default:
- return -EINVAL;
- }
-
- /* Update ECC layout if needed ... for 1-bit HW ECC, the default
- * is OK, but it allocates 6 bytes when only 3 are needed (for
- * each 512 bytes). For the 4-bit HW ECC, that default is not
- * usable: 10 bytes are needed, not 6.
- */
- if (pdata->ecc_bits == 4) {
- int chunks = mtd->writesize / 512;
-
- if (!chunks || mtd->oobsize < 16) {
- dev_dbg(&pdev->dev, "too small\n");
- ret = -EINVAL;
- goto err;
- }
-
- /* For small page chips, preserve the manufacturer's
- * badblock marking data ... and make sure a flash BBT
- * table marker fits in the free bytes.
- */
- if (chunks == 1) {
- mtd_set_ooblayout(mtd, &hwecc4_small_ooblayout_ops);
- } else if (chunks == 4 || chunks == 8) {
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
- info->chip.ecc.mode = NAND_ECC_HW_OOB_FIRST;
- } else {
- ret = -EIO;
- goto err;
- }
- }
-
- ret = nand_scan_tail(mtd);
- if (ret < 0)
- goto err;
-
if (pdata->parts)
ret = mtd_device_parse_register(mtd, NULL, NULL,
pdata->parts, pdata->nr_parts);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 10/52] mtd: rawnand: denali: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/denali.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 313c7f50621b..d1942155fc92 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1384,10 +1384,12 @@ int denali_init(struct denali_nand_info *denali)
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(denali->dev, "Failed to register MTD: %d\n", ret);
- goto free_buf;
+ goto detach;
}
return 0;
+detach:
+ nand_release(mtd);
free_buf:
kfree(denali->buf);
disable_irq:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 10/52] mtd: rawnand: denali: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/denali.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 313c7f50621b..d1942155fc92 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1384,10 +1384,12 @@ int denali_init(struct denali_nand_info *denali)
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(denali->dev, "Failed to register MTD: %d\n", ret);
- goto free_buf;
+ goto detach;
}
return 0;
+detach:
+ nand_release(mtd);
free_buf:
kfree(denali->buf);
disable_irq:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 11/52] mtd: rawnand: denali: convert to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/denali.c | 138 +++++++++++++++++++++++-------------------
1 file changed, 75 insertions(+), 63 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index d1942155fc92..91e09f6a5232 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1233,62 +1233,12 @@ static int denali_multidev_fixup(struct denali_nand_info *denali)
return 0;
}
-int denali_init(struct denali_nand_info *denali)
+static int denali_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &denali->nand;
struct mtd_info *mtd = nand_to_mtd(chip);
- u32 features = ioread32(denali->reg + FEATURES);
+ struct denali_nand_info *denali = mtd_to_denali(mtd);
int ret;
- mtd->dev.parent = denali->dev;
- denali_hw_init(denali);
-
- init_completion(&denali->complete);
- spin_lock_init(&denali->irq_lock);
-
- denali_clear_irq_all(denali);
-
- ret = devm_request_irq(denali->dev, denali->irq, denali_isr,
- IRQF_SHARED, DENALI_NAND_NAME, denali);
- if (ret) {
- dev_err(denali->dev, "Unable to request IRQ\n");
- return ret;
- }
-
- denali_enable_irq(denali);
- denali_reset_banks(denali);
-
- denali->active_bank = DENALI_INVALID_BANK;
-
- nand_set_flash_node(chip, denali->dev->of_node);
- /* Fallback to the default name if DT did not give "label" property */
- if (!mtd->name)
- mtd->name = "denali-nand";
-
- chip->select_chip = denali_select_chip;
- chip->read_byte = denali_read_byte;
- chip->write_byte = denali_write_byte;
- chip->read_word = denali_read_word;
- chip->cmd_ctrl = denali_cmd_ctrl;
- chip->dev_ready = denali_dev_ready;
- chip->waitfunc = denali_waitfunc;
-
- if (features & FEATURES__INDEX_ADDR) {
- denali->host_read = denali_indexed_read;
- denali->host_write = denali_indexed_write;
- } else {
- denali->host_read = denali_direct_read;
- denali->host_write = denali_direct_write;
- }
-
- /* clk rate info is needed for setup_data_interface */
- if (denali->clk_x_rate)
- chip->setup_data_interface = denali_setup_data_interface;
-
- ret = nand_scan_ident(mtd, denali->max_banks, NULL);
- if (ret)
- goto disable_irq;
-
if (ioread32(denali->reg + FEATURES) & FEATURES__DMA)
denali->dma_avail = 1;
@@ -1320,7 +1270,7 @@ int denali_init(struct denali_nand_info *denali)
ret = denali_ecc_setup(mtd, chip, denali);
if (ret) {
dev_err(denali->dev, "Failed to setup ECC settings.\n");
- goto disable_irq;
+ return ret;
}
dev_dbg(denali->dev,
@@ -1364,7 +1314,7 @@ int denali_init(struct denali_nand_info *denali)
ret = denali_multidev_fixup(denali);
if (ret)
- goto disable_irq;
+ return ret;
/*
* This buffer is DMA-mapped by denali_{read,write}_page_raw. Do not
@@ -1372,26 +1322,88 @@ int denali_init(struct denali_nand_info *denali)
* guarantee DMA-safe alignment.
*/
denali->buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
- if (!denali->buf) {
- ret = -ENOMEM;
- goto disable_irq;
+ if (!denali->buf)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static void denali_detach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct denali_nand_info *denali = mtd_to_denali(mtd);
+
+ kfree(denali->buf);
+}
+
+int denali_init(struct denali_nand_info *denali)
+{
+ struct nand_chip *chip = &denali->nand;
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ u32 features = ioread32(denali->reg + FEATURES);
+ int ret;
+
+ mtd->dev.parent = denali->dev;
+ denali_hw_init(denali);
+
+ init_completion(&denali->complete);
+ spin_lock_init(&denali->irq_lock);
+
+ denali_clear_irq_all(denali);
+
+ ret = devm_request_irq(denali->dev, denali->irq, denali_isr,
+ IRQF_SHARED, DENALI_NAND_NAME, denali);
+ if (ret) {
+ dev_err(denali->dev, "Unable to request IRQ\n");
+ return ret;
}
- ret = nand_scan_tail(mtd);
+ denali_enable_irq(denali);
+ denali_reset_banks(denali);
+
+ denali->active_bank = DENALI_INVALID_BANK;
+
+ nand_set_flash_node(chip, denali->dev->of_node);
+ /* Fallback to the default name if DT did not give "label" property */
+ if (!mtd->name)
+ mtd->name = "denali-nand";
+
+ chip->select_chip = denali_select_chip;
+ chip->read_byte = denali_read_byte;
+ chip->write_byte = denali_write_byte;
+ chip->read_word = denali_read_word;
+ chip->cmd_ctrl = denali_cmd_ctrl;
+ chip->dev_ready = denali_dev_ready;
+ chip->waitfunc = denali_waitfunc;
+
+ if (features & FEATURES__INDEX_ADDR) {
+ denali->host_read = denali_indexed_read;
+ denali->host_write = denali_indexed_write;
+ } else {
+ denali->host_read = denali_direct_read;
+ denali->host_write = denali_direct_write;
+ }
+
+ /* clk rate info is needed for setup_data_interface */
+ if (denali->clk_x_rate)
+ chip->setup_data_interface = denali_setup_data_interface;
+
+ chip->ecc.attach_chip = denali_attach_chip;
+ chip->ecc.detach_chip = denali_detach_chip;
+ ret = nand_scan(mtd, denali->max_banks);
if (ret)
- goto free_buf;
+ goto disable_irq;
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(denali->dev, "Failed to register MTD: %d\n", ret);
- goto detach;
+ goto release_chip;
}
+
return 0;
-detach:
+release_chip:
nand_release(mtd);
-free_buf:
- kfree(denali->buf);
disable_irq:
denali_disable_irq(denali);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 11/52] mtd: rawnand: denali: convert to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/denali.c | 138 +++++++++++++++++++++++-------------------
1 file changed, 75 insertions(+), 63 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index d1942155fc92..91e09f6a5232 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1233,62 +1233,12 @@ static int denali_multidev_fixup(struct denali_nand_info *denali)
return 0;
}
-int denali_init(struct denali_nand_info *denali)
+static int denali_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &denali->nand;
struct mtd_info *mtd = nand_to_mtd(chip);
- u32 features = ioread32(denali->reg + FEATURES);
+ struct denali_nand_info *denali = mtd_to_denali(mtd);
int ret;
- mtd->dev.parent = denali->dev;
- denali_hw_init(denali);
-
- init_completion(&denali->complete);
- spin_lock_init(&denali->irq_lock);
-
- denali_clear_irq_all(denali);
-
- ret = devm_request_irq(denali->dev, denali->irq, denali_isr,
- IRQF_SHARED, DENALI_NAND_NAME, denali);
- if (ret) {
- dev_err(denali->dev, "Unable to request IRQ\n");
- return ret;
- }
-
- denali_enable_irq(denali);
- denali_reset_banks(denali);
-
- denali->active_bank = DENALI_INVALID_BANK;
-
- nand_set_flash_node(chip, denali->dev->of_node);
- /* Fallback to the default name if DT did not give "label" property */
- if (!mtd->name)
- mtd->name = "denali-nand";
-
- chip->select_chip = denali_select_chip;
- chip->read_byte = denali_read_byte;
- chip->write_byte = denali_write_byte;
- chip->read_word = denali_read_word;
- chip->cmd_ctrl = denali_cmd_ctrl;
- chip->dev_ready = denali_dev_ready;
- chip->waitfunc = denali_waitfunc;
-
- if (features & FEATURES__INDEX_ADDR) {
- denali->host_read = denali_indexed_read;
- denali->host_write = denali_indexed_write;
- } else {
- denali->host_read = denali_direct_read;
- denali->host_write = denali_direct_write;
- }
-
- /* clk rate info is needed for setup_data_interface */
- if (denali->clk_x_rate)
- chip->setup_data_interface = denali_setup_data_interface;
-
- ret = nand_scan_ident(mtd, denali->max_banks, NULL);
- if (ret)
- goto disable_irq;
-
if (ioread32(denali->reg + FEATURES) & FEATURES__DMA)
denali->dma_avail = 1;
@@ -1320,7 +1270,7 @@ int denali_init(struct denali_nand_info *denali)
ret = denali_ecc_setup(mtd, chip, denali);
if (ret) {
dev_err(denali->dev, "Failed to setup ECC settings.\n");
- goto disable_irq;
+ return ret;
}
dev_dbg(denali->dev,
@@ -1364,7 +1314,7 @@ int denali_init(struct denali_nand_info *denali)
ret = denali_multidev_fixup(denali);
if (ret)
- goto disable_irq;
+ return ret;
/*
* This buffer is DMA-mapped by denali_{read,write}_page_raw. Do not
@@ -1372,26 +1322,88 @@ int denali_init(struct denali_nand_info *denali)
* guarantee DMA-safe alignment.
*/
denali->buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
- if (!denali->buf) {
- ret = -ENOMEM;
- goto disable_irq;
+ if (!denali->buf)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static void denali_detach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct denali_nand_info *denali = mtd_to_denali(mtd);
+
+ kfree(denali->buf);
+}
+
+int denali_init(struct denali_nand_info *denali)
+{
+ struct nand_chip *chip = &denali->nand;
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ u32 features = ioread32(denali->reg + FEATURES);
+ int ret;
+
+ mtd->dev.parent = denali->dev;
+ denali_hw_init(denali);
+
+ init_completion(&denali->complete);
+ spin_lock_init(&denali->irq_lock);
+
+ denali_clear_irq_all(denali);
+
+ ret = devm_request_irq(denali->dev, denali->irq, denali_isr,
+ IRQF_SHARED, DENALI_NAND_NAME, denali);
+ if (ret) {
+ dev_err(denali->dev, "Unable to request IRQ\n");
+ return ret;
}
- ret = nand_scan_tail(mtd);
+ denali_enable_irq(denali);
+ denali_reset_banks(denali);
+
+ denali->active_bank = DENALI_INVALID_BANK;
+
+ nand_set_flash_node(chip, denali->dev->of_node);
+ /* Fallback to the default name if DT did not give "label" property */
+ if (!mtd->name)
+ mtd->name = "denali-nand";
+
+ chip->select_chip = denali_select_chip;
+ chip->read_byte = denali_read_byte;
+ chip->write_byte = denali_write_byte;
+ chip->read_word = denali_read_word;
+ chip->cmd_ctrl = denali_cmd_ctrl;
+ chip->dev_ready = denali_dev_ready;
+ chip->waitfunc = denali_waitfunc;
+
+ if (features & FEATURES__INDEX_ADDR) {
+ denali->host_read = denali_indexed_read;
+ denali->host_write = denali_indexed_write;
+ } else {
+ denali->host_read = denali_direct_read;
+ denali->host_write = denali_direct_write;
+ }
+
+ /* clk rate info is needed for setup_data_interface */
+ if (denali->clk_x_rate)
+ chip->setup_data_interface = denali_setup_data_interface;
+
+ chip->ecc.attach_chip = denali_attach_chip;
+ chip->ecc.detach_chip = denali_detach_chip;
+ ret = nand_scan(mtd, denali->max_banks);
if (ret)
- goto free_buf;
+ goto disable_irq;
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(denali->dev, "Failed to register MTD: %d\n", ret);
- goto detach;
+ goto release_chip;
}
+
return 0;
-detach:
+release_chip:
nand_release(mtd);
-free_buf:
- kfree(denali->buf);
disable_irq:
denali_disable_irq(denali);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 12/52] mtd: rawnand: fsl_elbc: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_elbc_nand.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index d59ec6572548..fc6b18fc704c 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -926,13 +926,16 @@ static int fsl_elbc_nand_probe(struct platform_device *pdev)
/* First look for RedBoot table or partitions on the command
* line, these take precedence over device tree information */
- mtd_device_parse_register(mtd, part_probe_types, NULL,
- NULL, 0);
+ ret = mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0);
+ if (ret)
+ goto release_nand;
printk(KERN_INFO "eLBC NAND device at 0x%llx, bank %d\n",
(unsigned long long)res.start, priv->bank);
return 0;
+release_nand:
+ nand_release(mtd);
err:
fsl_elbc_chip_remove(priv);
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 12/52] mtd: rawnand: fsl_elbc: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_elbc_nand.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index d59ec6572548..fc6b18fc704c 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -926,13 +926,16 @@ static int fsl_elbc_nand_probe(struct platform_device *pdev)
/* First look for RedBoot table or partitions on the command
* line, these take precedence over device tree information */
- mtd_device_parse_register(mtd, part_probe_types, NULL,
- NULL, 0);
+ ret = mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0);
+ if (ret)
+ goto release_nand;
printk(KERN_INFO "eLBC NAND device at 0x%llx, bank %d\n",
(unsigned long long)res.start, priv->bank);
return 0;
+release_nand:
+ nand_release(mtd);
err:
fsl_elbc_chip_remove(priv);
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 13/52] mtd: rawnand: fsl_elbc: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_elbc_nand.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index fc6b18fc704c..ffbef01ab540 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -637,9 +637,9 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
return (elbc_fcm_ctrl->mdr & 0xff) | NAND_STATUS_WP;
}
-static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
+static int fsl_elbc_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
+ struct mtd_info *mtd = nand_to_mtd(chip);
struct fsl_elbc_mtd *priv = nand_get_controller_data(chip);
struct fsl_lbc_ctrl *ctrl = priv->ctrl;
struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
@@ -912,15 +912,8 @@ static int fsl_elbc_nand_probe(struct platform_device *pdev)
if (ret)
goto err;
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- goto err;
-
- ret = fsl_elbc_chip_init_tail(mtd);
- if (ret)
- goto err;
-
- ret = nand_scan_tail(mtd);
+ priv->chip.ecc.attach_chip = fsl_elbc_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
goto err;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 13/52] mtd: rawnand: fsl_elbc: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_elbc_nand.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index fc6b18fc704c..ffbef01ab540 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -637,9 +637,9 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
return (elbc_fcm_ctrl->mdr & 0xff) | NAND_STATUS_WP;
}
-static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
+static int fsl_elbc_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
+ struct mtd_info *mtd = nand_to_mtd(chip);
struct fsl_elbc_mtd *priv = nand_get_controller_data(chip);
struct fsl_lbc_ctrl *ctrl = priv->ctrl;
struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
@@ -912,15 +912,8 @@ static int fsl_elbc_nand_probe(struct platform_device *pdev)
if (ret)
goto err;
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- goto err;
-
- ret = fsl_elbc_chip_init_tail(mtd);
- if (ret)
- goto err;
-
- ret = nand_scan_tail(mtd);
+ priv->chip.ecc.attach_chip = fsl_elbc_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
goto err;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 14/52] mtd: rawnand: fsl_ifc: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_ifc_nand.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
index 7bcd95ff38c9..f9c042d69b1c 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c
@@ -1065,12 +1065,16 @@ static int fsl_ifc_nand_probe(struct platform_device *dev)
/* First look for RedBoot table or partitions on the command
* line, these take precedence over device tree information */
- mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0);
+ ret = mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0);
+ if (ret)
+ goto release_nand;
dev_info(priv->dev, "IFC NAND device at 0x%llx, bank %d\n",
(unsigned long long)res.start, priv->bank);
return 0;
+release_nand:
+ nand_release(mtd);
err:
fsl_ifc_chip_remove(priv);
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 14/52] mtd: rawnand: fsl_ifc: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_ifc_nand.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
index 7bcd95ff38c9..f9c042d69b1c 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c
@@ -1065,12 +1065,16 @@ static int fsl_ifc_nand_probe(struct platform_device *dev)
/* First look for RedBoot table or partitions on the command
* line, these take precedence over device tree information */
- mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0);
+ ret = mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0);
+ if (ret)
+ goto release_nand;
dev_info(priv->dev, "IFC NAND device at 0x%llx, bank %d\n",
(unsigned long long)res.start, priv->bank);
return 0;
+release_nand:
+ nand_release(mtd);
err:
fsl_ifc_chip_remove(priv);
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 15/52] mtd: rawnand: fsl_ifc: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_ifc_nand.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
index f9c042d69b1c..ec0e7918fb51 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c
@@ -717,9 +717,9 @@ static int fsl_ifc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
return nand_prog_page_end_op(chip);
}
-static int fsl_ifc_chip_init_tail(struct mtd_info *mtd)
+static int fsl_ifc_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
+ struct mtd_info *mtd = nand_to_mtd(chip);
struct fsl_ifc_mtd *priv = nand_get_controller_data(chip);
dev_dbg(priv->dev, "%s: nand->numchips = %d\n", __func__,
@@ -1051,15 +1051,8 @@ static int fsl_ifc_nand_probe(struct platform_device *dev)
if (ret)
goto err;
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- goto err;
-
- ret = fsl_ifc_chip_init_tail(mtd);
- if (ret)
- goto err;
-
- ret = nand_scan_tail(mtd);
+ priv->chip.ecc.attach_chip = fsl_ifc_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
goto err;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 15/52] mtd: rawnand: fsl_ifc: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsl_ifc_nand.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
index f9c042d69b1c..ec0e7918fb51 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c
@@ -717,9 +717,9 @@ static int fsl_ifc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
return nand_prog_page_end_op(chip);
}
-static int fsl_ifc_chip_init_tail(struct mtd_info *mtd)
+static int fsl_ifc_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
+ struct mtd_info *mtd = nand_to_mtd(chip);
struct fsl_ifc_mtd *priv = nand_get_controller_data(chip);
dev_dbg(priv->dev, "%s: nand->numchips = %d\n", __func__,
@@ -1051,15 +1051,8 @@ static int fsl_ifc_nand_probe(struct platform_device *dev)
if (ret)
goto err;
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- goto err;
-
- ret = fsl_ifc_chip_init_tail(mtd);
- if (ret)
- goto err;
-
- ret = nand_scan_tail(mtd);
+ priv->chip.ecc.attach_chip = fsl_ifc_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
goto err;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 16/52] mtd: rawnand: fsmc: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsmc_nand.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 28c48dcc514e..1bf73d4d4c0d 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -1123,14 +1123,16 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
mtd->name = "nand";
ret = mtd_device_register(mtd, NULL, 0);
if (ret)
- goto err_probe;
+ goto err_release_nand;
platform_set_drvdata(pdev, host);
dev_info(&pdev->dev, "FSMC NAND driver registration successful\n");
+
return 0;
+err_release_nand:
+ nand_release(mtd);
err_probe:
-err_scan_ident:
if (host->mode == USE_DMA_ACCESS)
dma_release_channel(host->write_dma_chan);
err_req_write_chnl:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 16/52] mtd: rawnand: fsmc: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsmc_nand.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 28c48dcc514e..1bf73d4d4c0d 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -1123,14 +1123,16 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
mtd->name = "nand";
ret = mtd_device_register(mtd, NULL, 0);
if (ret)
- goto err_probe;
+ goto err_release_nand;
platform_set_drvdata(pdev, host);
dev_info(&pdev->dev, "FSMC NAND driver registration successful\n");
+
return 0;
+err_release_nand:
+ nand_release(mtd);
err_probe:
-err_scan_ident:
if (host->mode == USE_DMA_ACCESS)
dma_release_channel(host->write_dma_chan);
err_req_write_chnl:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 17/52] mtd: rawnand: fsmc: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsmc_nand.c | 148 ++++++++++++++++++++-------------------
1 file changed, 76 insertions(+), 72 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 1bf73d4d4c0d..8e0c27f9961b 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -918,6 +918,78 @@ static int fsmc_nand_probe_config_dt(struct platform_device *pdev,
return 0;
}
+static int fsmc_nand_attach_chip(struct nand_chip *nand)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
+
+ if (AMBA_REV_BITS(host->pid) >= 8) {
+ switch (mtd->oobsize) {
+ case 16:
+ case 64:
+ case 128:
+ case 224:
+ case 256:
+ break;
+ default:
+ dev_warn(host->dev,
+ "No oob scheme defined for oobsize %d\n",
+ mtd->oobsize);
+ return -EINVAL;
+ }
+
+ mtd_set_ooblayout(mtd, &fsmc_ecc4_ooblayout_ops);
+
+ return 0;
+ }
+
+ switch (nand->ecc.mode) {
+ case NAND_ECC_HW:
+ dev_info(host->dev, "Using 1-bit HW ECC scheme\n");
+ nand->ecc.calculate = fsmc_read_hwecc_ecc1;
+ nand->ecc.correct = nand_correct_data;
+ nand->ecc.bytes = 3;
+ nand->ecc.strength = 1;
+ break;
+
+ case NAND_ECC_SOFT:
+ if (nand->ecc.algo == NAND_ECC_BCH) {
+ dev_info(host->dev,
+ "Using 4-bit SW BCH ECC scheme\n");
+ break;
+ }
+
+ case NAND_ECC_ON_DIE:
+ break;
+
+ default:
+ dev_err(host->dev, "Unsupported ECC mode!\n");
+ return -ENOTSUPP;
+ }
+
+ /*
+ * Don't set layout for BCH4 SW ECC. This will be
+ * generated later in nand_bch_init() later.
+ */
+ if (nand->ecc.mode == NAND_ECC_HW) {
+ switch (mtd->oobsize) {
+ case 16:
+ case 64:
+ case 128:
+ mtd_set_ooblayout(mtd,
+ &fsmc_ecc1_ooblayout_ops);
+ break;
+ default:
+ dev_warn(host->dev,
+ "No oob scheme defined for oobsize %d\n",
+ mtd->oobsize);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
/*
* fsmc_nand_probe - Probe function
* @pdev: platform device structure
@@ -1047,78 +1119,10 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
/*
* Scan to find existence of the device
*/
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret) {
- dev_err(&pdev->dev, "No NAND Device found!\n");
- goto err_scan_ident;
- }
-
- if (AMBA_REV_BITS(host->pid) >= 8) {
- switch (mtd->oobsize) {
- case 16:
- case 64:
- case 128:
- case 224:
- case 256:
- break;
- default:
- dev_warn(&pdev->dev, "No oob scheme defined for oobsize %d\n",
- mtd->oobsize);
- ret = -EINVAL;
- goto err_probe;
- }
-
- mtd_set_ooblayout(mtd, &fsmc_ecc4_ooblayout_ops);
- } else {
- switch (nand->ecc.mode) {
- case NAND_ECC_HW:
- dev_info(&pdev->dev, "Using 1-bit HW ECC scheme\n");
- nand->ecc.calculate = fsmc_read_hwecc_ecc1;
- nand->ecc.correct = nand_correct_data;
- nand->ecc.bytes = 3;
- nand->ecc.strength = 1;
- break;
-
- case NAND_ECC_SOFT:
- if (nand->ecc.algo == NAND_ECC_BCH) {
- dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n");
- break;
- }
-
- case NAND_ECC_ON_DIE:
- break;
-
- default:
- dev_err(&pdev->dev, "Unsupported ECC mode!\n");
- goto err_probe;
- }
-
- /*
- * Don't set layout for BCH4 SW ECC. This will be
- * generated later in nand_bch_init() later.
- */
- if (nand->ecc.mode == NAND_ECC_HW) {
- switch (mtd->oobsize) {
- case 16:
- case 64:
- case 128:
- mtd_set_ooblayout(mtd,
- &fsmc_ecc1_ooblayout_ops);
- break;
- default:
- dev_warn(&pdev->dev,
- "No oob scheme defined for oobsize %d\n",
- mtd->oobsize);
- ret = -EINVAL;
- goto err_probe;
- }
- }
- }
-
- /* Second stage of scan to fill MTD data-structures */
- ret = nand_scan_tail(mtd);
+ nand->ecc.attach_chip = fsmc_nand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
- goto err_probe;
+ goto err_scan;
mtd->name = "nand";
ret = mtd_device_register(mtd, NULL, 0);
@@ -1132,7 +1136,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
err_release_nand:
nand_release(mtd);
-err_probe:
+err_scan:
if (host->mode == USE_DMA_ACCESS)
dma_release_channel(host->write_dma_chan);
err_req_write_chnl:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 17/52] mtd: rawnand: fsmc: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/fsmc_nand.c | 148 ++++++++++++++++++++-------------------
1 file changed, 76 insertions(+), 72 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 1bf73d4d4c0d..8e0c27f9961b 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -918,6 +918,78 @@ static int fsmc_nand_probe_config_dt(struct platform_device *pdev,
return 0;
}
+static int fsmc_nand_attach_chip(struct nand_chip *nand)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
+
+ if (AMBA_REV_BITS(host->pid) >= 8) {
+ switch (mtd->oobsize) {
+ case 16:
+ case 64:
+ case 128:
+ case 224:
+ case 256:
+ break;
+ default:
+ dev_warn(host->dev,
+ "No oob scheme defined for oobsize %d\n",
+ mtd->oobsize);
+ return -EINVAL;
+ }
+
+ mtd_set_ooblayout(mtd, &fsmc_ecc4_ooblayout_ops);
+
+ return 0;
+ }
+
+ switch (nand->ecc.mode) {
+ case NAND_ECC_HW:
+ dev_info(host->dev, "Using 1-bit HW ECC scheme\n");
+ nand->ecc.calculate = fsmc_read_hwecc_ecc1;
+ nand->ecc.correct = nand_correct_data;
+ nand->ecc.bytes = 3;
+ nand->ecc.strength = 1;
+ break;
+
+ case NAND_ECC_SOFT:
+ if (nand->ecc.algo == NAND_ECC_BCH) {
+ dev_info(host->dev,
+ "Using 4-bit SW BCH ECC scheme\n");
+ break;
+ }
+
+ case NAND_ECC_ON_DIE:
+ break;
+
+ default:
+ dev_err(host->dev, "Unsupported ECC mode!\n");
+ return -ENOTSUPP;
+ }
+
+ /*
+ * Don't set layout for BCH4 SW ECC. This will be
+ * generated later in nand_bch_init() later.
+ */
+ if (nand->ecc.mode == NAND_ECC_HW) {
+ switch (mtd->oobsize) {
+ case 16:
+ case 64:
+ case 128:
+ mtd_set_ooblayout(mtd,
+ &fsmc_ecc1_ooblayout_ops);
+ break;
+ default:
+ dev_warn(host->dev,
+ "No oob scheme defined for oobsize %d\n",
+ mtd->oobsize);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
/*
* fsmc_nand_probe - Probe function
* @pdev: platform device structure
@@ -1047,78 +1119,10 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
/*
* Scan to find existence of the device
*/
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret) {
- dev_err(&pdev->dev, "No NAND Device found!\n");
- goto err_scan_ident;
- }
-
- if (AMBA_REV_BITS(host->pid) >= 8) {
- switch (mtd->oobsize) {
- case 16:
- case 64:
- case 128:
- case 224:
- case 256:
- break;
- default:
- dev_warn(&pdev->dev, "No oob scheme defined for oobsize %d\n",
- mtd->oobsize);
- ret = -EINVAL;
- goto err_probe;
- }
-
- mtd_set_ooblayout(mtd, &fsmc_ecc4_ooblayout_ops);
- } else {
- switch (nand->ecc.mode) {
- case NAND_ECC_HW:
- dev_info(&pdev->dev, "Using 1-bit HW ECC scheme\n");
- nand->ecc.calculate = fsmc_read_hwecc_ecc1;
- nand->ecc.correct = nand_correct_data;
- nand->ecc.bytes = 3;
- nand->ecc.strength = 1;
- break;
-
- case NAND_ECC_SOFT:
- if (nand->ecc.algo == NAND_ECC_BCH) {
- dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n");
- break;
- }
-
- case NAND_ECC_ON_DIE:
- break;
-
- default:
- dev_err(&pdev->dev, "Unsupported ECC mode!\n");
- goto err_probe;
- }
-
- /*
- * Don't set layout for BCH4 SW ECC. This will be
- * generated later in nand_bch_init() later.
- */
- if (nand->ecc.mode == NAND_ECC_HW) {
- switch (mtd->oobsize) {
- case 16:
- case 64:
- case 128:
- mtd_set_ooblayout(mtd,
- &fsmc_ecc1_ooblayout_ops);
- break;
- default:
- dev_warn(&pdev->dev,
- "No oob scheme defined for oobsize %d\n",
- mtd->oobsize);
- ret = -EINVAL;
- goto err_probe;
- }
- }
- }
-
- /* Second stage of scan to fill MTD data-structures */
- ret = nand_scan_tail(mtd);
+ nand->ecc.attach_chip = fsmc_nand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
- goto err_probe;
+ goto err_scan;
mtd->name = "nand";
ret = mtd_device_register(mtd, NULL, 0);
@@ -1132,7 +1136,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
err_release_nand:
nand_release(mtd);
-err_probe:
+err_scan:
if (host->mode == USE_DMA_ACCESS)
dma_release_channel(host->write_dma_chan);
err_req_write_chnl:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 18/52] mtd: rawnand: gpmi: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 52 +++++++++++++++++-------------
1 file changed, 29 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
index c2597c8107a0..b72f4f2db695 100644
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
@@ -825,9 +825,9 @@ static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
* [2] Allocate a read/write data buffer.
* The gpmi_alloc_dma_buffer can be called twice.
* We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer
- * is called before the nand_scan_ident; and we allocate a buffer
- * of the real NAND page size when the gpmi_alloc_dma_buffer is
- * called after the nand_scan_ident.
+ * is called before the NAND identification; and we allocate a
+ * buffer of the real NAND page size when the gpmi_alloc_dma_buffer
+ * is called after.
*/
this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE,
GFP_DMA | GFP_KERNEL);
@@ -1951,6 +1951,30 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
return 0;
}
+static int gpmi_nand_attach_chip(struct nand_chip *chip)
+{
+ struct gpmi_nand_data *this = nand_get_controller_data(chip);
+ int ret;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH) {
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ if (of_property_read_bool(this->dev->of_node,
+ "fsl,no-blockmark-swap"))
+ this->swap_block_mark = false;
+ }
+ dev_dbg(this->dev, "Blockmark swapping %sabled\n",
+ this->swap_block_mark ? "en" : "dis");
+
+ ret = gpmi_init_last(this);
+ if (ret)
+ return ret;
+
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ return 0;
+}
+
static int gpmi_nand_init(struct gpmi_nand_data *this)
{
struct nand_chip *chip = &this->nand;
@@ -1991,26 +2015,8 @@ static int gpmi_nand_init(struct gpmi_nand_data *this)
if (ret)
goto err_out;
- ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) ? 2 : 1, NULL);
- if (ret)
- goto err_out;
-
- if (chip->bbt_options & NAND_BBT_USE_FLASH) {
- chip->bbt_options |= NAND_BBT_NO_OOB;
-
- if (of_property_read_bool(this->dev->of_node,
- "fsl,no-blockmark-swap"))
- this->swap_block_mark = false;
- }
- dev_dbg(this->dev, "Blockmark swapping %sabled\n",
- this->swap_block_mark ? "en" : "dis");
-
- ret = gpmi_init_last(this);
- if (ret)
- goto err_out;
-
- chip->options |= NAND_SKIP_BBTSCAN;
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = gpmi_nand_attach_chip;
+ ret = nand_scan(mtd, GPMI_IS_MX6(this) ? 2 : 1);
if (ret)
goto err_out;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 18/52] mtd: rawnand: gpmi: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 52 +++++++++++++++++-------------
1 file changed, 29 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
index c2597c8107a0..b72f4f2db695 100644
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
@@ -825,9 +825,9 @@ static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
* [2] Allocate a read/write data buffer.
* The gpmi_alloc_dma_buffer can be called twice.
* We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer
- * is called before the nand_scan_ident; and we allocate a buffer
- * of the real NAND page size when the gpmi_alloc_dma_buffer is
- * called after the nand_scan_ident.
+ * is called before the NAND identification; and we allocate a
+ * buffer of the real NAND page size when the gpmi_alloc_dma_buffer
+ * is called after.
*/
this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE,
GFP_DMA | GFP_KERNEL);
@@ -1951,6 +1951,30 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
return 0;
}
+static int gpmi_nand_attach_chip(struct nand_chip *chip)
+{
+ struct gpmi_nand_data *this = nand_get_controller_data(chip);
+ int ret;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH) {
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ if (of_property_read_bool(this->dev->of_node,
+ "fsl,no-blockmark-swap"))
+ this->swap_block_mark = false;
+ }
+ dev_dbg(this->dev, "Blockmark swapping %sabled\n",
+ this->swap_block_mark ? "en" : "dis");
+
+ ret = gpmi_init_last(this);
+ if (ret)
+ return ret;
+
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ return 0;
+}
+
static int gpmi_nand_init(struct gpmi_nand_data *this)
{
struct nand_chip *chip = &this->nand;
@@ -1991,26 +2015,8 @@ static int gpmi_nand_init(struct gpmi_nand_data *this)
if (ret)
goto err_out;
- ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) ? 2 : 1, NULL);
- if (ret)
- goto err_out;
-
- if (chip->bbt_options & NAND_BBT_USE_FLASH) {
- chip->bbt_options |= NAND_BBT_NO_OOB;
-
- if (of_property_read_bool(this->dev->of_node,
- "fsl,no-blockmark-swap"))
- this->swap_block_mark = false;
- }
- dev_dbg(this->dev, "Blockmark swapping %sabled\n",
- this->swap_block_mark ? "en" : "dis");
-
- ret = gpmi_init_last(this);
- if (ret)
- goto err_out;
-
- chip->options |= NAND_SKIP_BBTSCAN;
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = gpmi_nand_attach_chip;
+ ret = nand_scan(mtd, GPMI_IS_MX6(this) ? 2 : 1);
if (ret)
goto err_out;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 19/52] mtd: rawnand: hisi504: enhance the probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Prepare the migration of the hisi504_nand driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/hisi504_nand.c | 35 ++++++++++++-----------------------
1 file changed, 12 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/hisi504_nand.c b/drivers/mtd/nand/raw/hisi504_nand.c
index 27558a67fa41..3c64a6281b54 100644
--- a/drivers/mtd/nand/raw/hisi504_nand.c
+++ b/drivers/mtd/nand/raw/hisi504_nand.c
@@ -731,23 +731,19 @@ static int hisi_nfc_probe(struct platform_device *pdev)
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "no IRQ resource defined\n");
- ret = -ENXIO;
- goto err_res;
+ return -ENXIO;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
host->iobase = devm_ioremap_resource(dev, res);
- if (IS_ERR(host->iobase)) {
- ret = PTR_ERR(host->iobase);
- goto err_res;
- }
+ if (IS_ERR(host->iobase))
+ return PTR_ERR(host->iobase);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
host->mmio = devm_ioremap_resource(dev, res);
if (IS_ERR(host->mmio)) {
- ret = PTR_ERR(host->mmio);
dev_err(dev, "devm_ioremap_resource[1] fail\n");
- goto err_res;
+ return PTR_ERR(host->mmio);
}
mtd->name = "hisi_nand";
@@ -770,19 +766,17 @@ static int hisi_nfc_probe(struct platform_device *pdev)
ret = devm_request_irq(dev, irq, hinfc_irq_handle, 0x0, "nandc", host);
if (ret) {
dev_err(dev, "failed to request IRQ\n");
- goto err_res;
+ return ret;
}
ret = nand_scan_ident(mtd, max_chips, NULL);
if (ret)
- goto err_res;
+ return ret;
host->buffer = dmam_alloc_coherent(dev, mtd->writesize + mtd->oobsize,
&host->dma_buffer, GFP_KERNEL);
- if (!host->buffer) {
- ret = -ENOMEM;
- goto err_res;
- }
+ if (!host->buffer)
+ return -ENOMEM;
host->dma_oob = host->dma_buffer + mtd->writesize;
memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize);
@@ -798,8 +792,7 @@ static int hisi_nfc_probe(struct platform_device *pdev)
*/
default:
dev_err(dev, "NON-2KB page size nand flash\n");
- ret = -EINVAL;
- goto err_res;
+ return -EINVAL;
}
hinfc_write(host, flag, HINFC504_CON);
@@ -809,21 +802,17 @@ static int hisi_nfc_probe(struct platform_device *pdev)
ret = nand_scan_tail(mtd);
if (ret) {
dev_err(dev, "nand_scan_tail failed: %d\n", ret);
- goto err_res;
+ return ret;
}
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(dev, "Err MTD partition=%d\n", ret);
- goto err_mtd;
+ nand_release(mtd);
+ return ret;
}
return 0;
-
-err_mtd:
- nand_release(mtd);
-err_res:
- return ret;
}
static int hisi_nfc_remove(struct platform_device *pdev)
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 19/52] mtd: rawnand: hisi504: enhance the probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Prepare the migration of the hisi504_nand driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/hisi504_nand.c | 35 ++++++++++++-----------------------
1 file changed, 12 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/hisi504_nand.c b/drivers/mtd/nand/raw/hisi504_nand.c
index 27558a67fa41..3c64a6281b54 100644
--- a/drivers/mtd/nand/raw/hisi504_nand.c
+++ b/drivers/mtd/nand/raw/hisi504_nand.c
@@ -731,23 +731,19 @@ static int hisi_nfc_probe(struct platform_device *pdev)
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "no IRQ resource defined\n");
- ret = -ENXIO;
- goto err_res;
+ return -ENXIO;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
host->iobase = devm_ioremap_resource(dev, res);
- if (IS_ERR(host->iobase)) {
- ret = PTR_ERR(host->iobase);
- goto err_res;
- }
+ if (IS_ERR(host->iobase))
+ return PTR_ERR(host->iobase);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
host->mmio = devm_ioremap_resource(dev, res);
if (IS_ERR(host->mmio)) {
- ret = PTR_ERR(host->mmio);
dev_err(dev, "devm_ioremap_resource[1] fail\n");
- goto err_res;
+ return PTR_ERR(host->mmio);
}
mtd->name = "hisi_nand";
@@ -770,19 +766,17 @@ static int hisi_nfc_probe(struct platform_device *pdev)
ret = devm_request_irq(dev, irq, hinfc_irq_handle, 0x0, "nandc", host);
if (ret) {
dev_err(dev, "failed to request IRQ\n");
- goto err_res;
+ return ret;
}
ret = nand_scan_ident(mtd, max_chips, NULL);
if (ret)
- goto err_res;
+ return ret;
host->buffer = dmam_alloc_coherent(dev, mtd->writesize + mtd->oobsize,
&host->dma_buffer, GFP_KERNEL);
- if (!host->buffer) {
- ret = -ENOMEM;
- goto err_res;
- }
+ if (!host->buffer)
+ return -ENOMEM;
host->dma_oob = host->dma_buffer + mtd->writesize;
memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize);
@@ -798,8 +792,7 @@ static int hisi_nfc_probe(struct platform_device *pdev)
*/
default:
dev_err(dev, "NON-2KB page size nand flash\n");
- ret = -EINVAL;
- goto err_res;
+ return -EINVAL;
}
hinfc_write(host, flag, HINFC504_CON);
@@ -809,21 +802,17 @@ static int hisi_nfc_probe(struct platform_device *pdev)
ret = nand_scan_tail(mtd);
if (ret) {
dev_err(dev, "nand_scan_tail failed: %d\n", ret);
- goto err_res;
+ return ret;
}
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(dev, "Err MTD partition=%d\n", ret);
- goto err_mtd;
+ nand_release(mtd);
+ return ret;
}
return 0;
-
-err_mtd:
- nand_release(mtd);
-err_res:
- return ret;
}
static int hisi_nfc_remove(struct platform_device *pdev)
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 20/52] mtd: rawnand: hisi504: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/hisi504_nand.c | 74 ++++++++++++++++++++-----------------
1 file changed, 40 insertions(+), 34 deletions(-)
diff --git a/drivers/mtd/nand/raw/hisi504_nand.c b/drivers/mtd/nand/raw/hisi504_nand.c
index 3c64a6281b54..94d02539d150 100644
--- a/drivers/mtd/nand/raw/hisi504_nand.c
+++ b/drivers/mtd/nand/raw/hisi504_nand.c
@@ -709,9 +709,46 @@ static int hisi_nfc_ecc_probe(struct hinfc_host *host)
return 0;
}
+static int hisi_nfc_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct hinfc_host *host = nand_get_controller_data(chip);
+ int flag;
+
+ host->buffer = dmam_alloc_coherent(host->dev,
+ mtd->writesize + mtd->oobsize,
+ &host->dma_buffer, GFP_KERNEL);
+ if (!host->buffer)
+ return -ENOMEM;
+
+ host->dma_oob = host->dma_buffer + mtd->writesize;
+ memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize);
+
+ flag = hinfc_read(host, HINFC504_CON);
+ flag &= ~(HINFC504_CON_PAGESIZE_MASK << HINFC504_CON_PAGEISZE_SHIFT);
+ switch (mtd->writesize) {
+ case 2048:
+ flag |= (0x001 << HINFC504_CON_PAGEISZE_SHIFT);
+ break;
+ /*
+ * TODO: add more pagesize support,
+ * default pagesize has been set in hisi_nfc_host_init
+ */
+ default:
+ dev_err(host->dev, "NON-2KB page size nand flash\n");
+ return -EINVAL;
+ }
+ hinfc_write(host, flag, HINFC504_CON);
+
+ if (chip->ecc.mode == NAND_ECC_HW)
+ hisi_nfc_ecc_probe(host);
+
+ return 0;
+}
+
static int hisi_nfc_probe(struct platform_device *pdev)
{
- int ret = 0, irq, flag, max_chips = HINFC504_MAX_CHIP;
+ int ret = 0, irq, max_chips = HINFC504_MAX_CHIP;
struct device *dev = &pdev->dev;
struct hinfc_host *host;
struct nand_chip *chip;
@@ -769,42 +806,11 @@ static int hisi_nfc_probe(struct platform_device *pdev)
return ret;
}
- ret = nand_scan_ident(mtd, max_chips, NULL);
+ chip->ecc.attach_chip = hisi_nfc_attach_chip;
+ ret = nand_scan(mtd, max_chips);
if (ret)
return ret;
- host->buffer = dmam_alloc_coherent(dev, mtd->writesize + mtd->oobsize,
- &host->dma_buffer, GFP_KERNEL);
- if (!host->buffer)
- return -ENOMEM;
-
- host->dma_oob = host->dma_buffer + mtd->writesize;
- memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize);
-
- flag = hinfc_read(host, HINFC504_CON);
- flag &= ~(HINFC504_CON_PAGESIZE_MASK << HINFC504_CON_PAGEISZE_SHIFT);
- switch (mtd->writesize) {
- case 2048:
- flag |= (0x001 << HINFC504_CON_PAGEISZE_SHIFT); break;
- /*
- * TODO: add more pagesize support,
- * default pagesize has been set in hisi_nfc_host_init
- */
- default:
- dev_err(dev, "NON-2KB page size nand flash\n");
- return -EINVAL;
- }
- hinfc_write(host, flag, HINFC504_CON);
-
- if (chip->ecc.mode == NAND_ECC_HW)
- hisi_nfc_ecc_probe(host);
-
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(dev, "nand_scan_tail failed: %d\n", ret);
- return ret;
- }
-
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(dev, "Err MTD partition=%d\n", ret);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 20/52] mtd: rawnand: hisi504: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/hisi504_nand.c | 74 ++++++++++++++++++++-----------------
1 file changed, 40 insertions(+), 34 deletions(-)
diff --git a/drivers/mtd/nand/raw/hisi504_nand.c b/drivers/mtd/nand/raw/hisi504_nand.c
index 3c64a6281b54..94d02539d150 100644
--- a/drivers/mtd/nand/raw/hisi504_nand.c
+++ b/drivers/mtd/nand/raw/hisi504_nand.c
@@ -709,9 +709,46 @@ static int hisi_nfc_ecc_probe(struct hinfc_host *host)
return 0;
}
+static int hisi_nfc_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct hinfc_host *host = nand_get_controller_data(chip);
+ int flag;
+
+ host->buffer = dmam_alloc_coherent(host->dev,
+ mtd->writesize + mtd->oobsize,
+ &host->dma_buffer, GFP_KERNEL);
+ if (!host->buffer)
+ return -ENOMEM;
+
+ host->dma_oob = host->dma_buffer + mtd->writesize;
+ memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize);
+
+ flag = hinfc_read(host, HINFC504_CON);
+ flag &= ~(HINFC504_CON_PAGESIZE_MASK << HINFC504_CON_PAGEISZE_SHIFT);
+ switch (mtd->writesize) {
+ case 2048:
+ flag |= (0x001 << HINFC504_CON_PAGEISZE_SHIFT);
+ break;
+ /*
+ * TODO: add more pagesize support,
+ * default pagesize has been set in hisi_nfc_host_init
+ */
+ default:
+ dev_err(host->dev, "NON-2KB page size nand flash\n");
+ return -EINVAL;
+ }
+ hinfc_write(host, flag, HINFC504_CON);
+
+ if (chip->ecc.mode == NAND_ECC_HW)
+ hisi_nfc_ecc_probe(host);
+
+ return 0;
+}
+
static int hisi_nfc_probe(struct platform_device *pdev)
{
- int ret = 0, irq, flag, max_chips = HINFC504_MAX_CHIP;
+ int ret = 0, irq, max_chips = HINFC504_MAX_CHIP;
struct device *dev = &pdev->dev;
struct hinfc_host *host;
struct nand_chip *chip;
@@ -769,42 +806,11 @@ static int hisi_nfc_probe(struct platform_device *pdev)
return ret;
}
- ret = nand_scan_ident(mtd, max_chips, NULL);
+ chip->ecc.attach_chip = hisi_nfc_attach_chip;
+ ret = nand_scan(mtd, max_chips);
if (ret)
return ret;
- host->buffer = dmam_alloc_coherent(dev, mtd->writesize + mtd->oobsize,
- &host->dma_buffer, GFP_KERNEL);
- if (!host->buffer)
- return -ENOMEM;
-
- host->dma_oob = host->dma_buffer + mtd->writesize;
- memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize);
-
- flag = hinfc_read(host, HINFC504_CON);
- flag &= ~(HINFC504_CON_PAGESIZE_MASK << HINFC504_CON_PAGEISZE_SHIFT);
- switch (mtd->writesize) {
- case 2048:
- flag |= (0x001 << HINFC504_CON_PAGEISZE_SHIFT); break;
- /*
- * TODO: add more pagesize support,
- * default pagesize has been set in hisi_nfc_host_init
- */
- default:
- dev_err(dev, "NON-2KB page size nand flash\n");
- return -EINVAL;
- }
- hinfc_write(host, flag, HINFC504_CON);
-
- if (chip->ecc.mode == NAND_ECC_HW)
- hisi_nfc_ecc_probe(host);
-
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(dev, "nand_scan_tail failed: %d\n", ret);
- return ret;
- }
-
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(dev, "Err MTD partition=%d\n", ret);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
index e69f6ae4c539..fd5dc9d9b0c6 100644
--- a/drivers/mtd/nand/raw/jz4780_nand.c
+++ b/drivers/mtd/nand/raw/jz4780_nand.c
@@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
}
-static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
+static int jz4780_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &nand->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
int eccbytes;
@@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
switch (chip->ecc.mode) {
case NAND_ECC_HW:
if (!nfc->bch) {
- dev_err(dev, "HW BCH selected, but BCH controller not found\n");
+ dev_err(nfc->dev,
+ "HW BCH selected, but BCH controller not found\n");
return -ENODEV;
}
@@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
chip->ecc.correct = jz4780_nand_ecc_correct;
/* fall through */
case NAND_ECC_SOFT:
- dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
- (nfc->bch) ? "hardware BCH" : "software ECC",
- chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
+ dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
+ (nfc->bch) ? "hardware BCH" : "software ECC",
+ chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
break;
case NAND_ECC_NONE:
- dev_info(dev, "not using ECC\n");
+ dev_info(nfc->dev, "not using ECC\n");
break;
default:
- dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
+ dev_err(nfc->dev, "ECC mode %d not supported\n",
+ chip->ecc.mode);
return -EINVAL;
}
@@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
if (eccbytes > mtd->oobsize - 2) {
- dev_err(dev,
+ dev_err(nfc->dev,
"invalid ECC config: required %d ECC bytes, but only %d are available",
eccbytes, mtd->oobsize - 2);
return -EINVAL;
@@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
chip->controller = &nfc->controller;
nand_set_flash_node(chip, np);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
-
- ret = jz4780_nand_init_ecc(nand, dev);
- if (ret)
- return ret;
-
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = jz4780_nand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
index e69f6ae4c539..fd5dc9d9b0c6 100644
--- a/drivers/mtd/nand/raw/jz4780_nand.c
+++ b/drivers/mtd/nand/raw/jz4780_nand.c
@@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
}
-static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
+static int jz4780_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &nand->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
int eccbytes;
@@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
switch (chip->ecc.mode) {
case NAND_ECC_HW:
if (!nfc->bch) {
- dev_err(dev, "HW BCH selected, but BCH controller not found\n");
+ dev_err(nfc->dev,
+ "HW BCH selected, but BCH controller not found\n");
return -ENODEV;
}
@@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
chip->ecc.correct = jz4780_nand_ecc_correct;
/* fall through */
case NAND_ECC_SOFT:
- dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
- (nfc->bch) ? "hardware BCH" : "software ECC",
- chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
+ dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
+ (nfc->bch) ? "hardware BCH" : "software ECC",
+ chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
break;
case NAND_ECC_NONE:
- dev_info(dev, "not using ECC\n");
+ dev_info(nfc->dev, "not using ECC\n");
break;
default:
- dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
+ dev_err(nfc->dev, "ECC mode %d not supported\n",
+ chip->ecc.mode);
return -EINVAL;
}
@@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
if (eccbytes > mtd->oobsize - 2) {
- dev_err(dev,
+ dev_err(nfc->dev,
"invalid ECC config: required %d ECC bytes, but only %d are available",
eccbytes, mtd->oobsize - 2);
return -EINVAL;
@@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
chip->controller = &nfc->controller;
nand_set_flash_node(chip, np);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
-
- ret = jz4780_nand_init_ecc(nand, dev);
- if (ret)
- return ret;
-
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = jz4780_nand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* Re: [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-15 15:40 ` Harvey Hunt
-1 siblings, 0 replies; 120+ messages in thread
From: Harvey Hunt @ 2018-03-15 15:40 UTC (permalink / raw)
To: Miquel Raynal, Boris Brezillon, Richard Weinberger,
David Woodhouse, Brian Norris, Marek Vasut, Cyrille Pitchen,
Josh Wu, Kamal Dasu, Stefan Agner
Cc: linux-mtd, linux-arm-kernel
Hi Miquel,
Sorry it's taken me a little while to review your changes, a few
comments below:
On 03/02/2018 05:03 PM, Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
> 1 file changed, 12 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> index e69f6ae4c539..fd5dc9d9b0c6 100644
> --- a/drivers/mtd/nand/raw/jz4780_nand.c
> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
> return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
> }
>
> -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
> +static int jz4780_nand_attach_chip(struct nand_chip *chip)
> {
> - struct nand_chip *chip = &nand->chip;
> struct mtd_info *mtd = nand_to_mtd(chip);
> struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
> int eccbytes;
> @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> switch (chip->ecc.mode) {
> case NAND_ECC_HW:
> if (!nfc->bch) {
> - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
> + dev_err(nfc->dev,
> + "HW BCH selected, but BCH controller not found\n");
> return -ENODEV;
> }
>
> @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> chip->ecc.correct = jz4780_nand_ecc_correct;
> /* fall through */
> case NAND_ECC_SOFT:
> - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
> - (nfc->bch) ? "hardware BCH" : "software ECC",
> - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
> + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
> + (nfc->bch) ? "hardware BCH" : "software ECC",
> + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
> case NAND_ECC_NONE:
> - dev_info(dev, "not using ECC\n");
> + dev_info(nfc->dev, "not using ECC\n");
> break;
> default:
> - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
> + dev_err(nfc->dev, "ECC mode %d not supported\n",
> + chip->ecc.mode);
> return -EINVAL;
> }
These changes seem redundant as dev is passed into the function,
although you could remove it from the function defintion.
>
> @@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
>
> if (eccbytes > mtd->oobsize - 2) {
> - dev_err(dev,
> + dev_err(nfc->dev,
> "invalid ECC config: required %d ECC bytes, but only %d are available",
> eccbytes, mtd->oobsize - 2);
> return -EINVAL;
> @@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
> chip->controller = &nfc->controller;
> nand_set_flash_node(chip, np);
>
> - ret = nand_scan_ident(mtd, 1, NULL);
> - if (ret)
> - return ret;
> -
> - ret = jz4780_nand_init_ecc(nand, dev)
You've removed this call, but without it the ECC won't be initialised...
> - if (ret)
> - return ret;
> -
> - ret = nand_scan_tail(mtd);
> + chip->ecc.attach_chip = jz4780_nand_attach_chip;
This function doesn't exist.
> + ret = nand_scan(mtd, 1);
> if (ret)
> return ret;
>
>
Thanks,
Harvey
^ permalink raw reply [flat|nested] 120+ messages in thread* [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
@ 2018-03-15 15:40 ` Harvey Hunt
0 siblings, 0 replies; 120+ messages in thread
From: Harvey Hunt @ 2018-03-15 15:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi Miquel,
Sorry it's taken me a little while to review your changes, a few
comments below:
On 03/02/2018 05:03 PM, Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
> 1 file changed, 12 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> index e69f6ae4c539..fd5dc9d9b0c6 100644
> --- a/drivers/mtd/nand/raw/jz4780_nand.c
> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
> return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
> }
>
> -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
> +static int jz4780_nand_attach_chip(struct nand_chip *chip)
> {
> - struct nand_chip *chip = &nand->chip;
> struct mtd_info *mtd = nand_to_mtd(chip);
> struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
> int eccbytes;
> @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> switch (chip->ecc.mode) {
> case NAND_ECC_HW:
> if (!nfc->bch) {
> - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
> + dev_err(nfc->dev,
> + "HW BCH selected, but BCH controller not found\n");
> return -ENODEV;
> }
>
> @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> chip->ecc.correct = jz4780_nand_ecc_correct;
> /* fall through */
> case NAND_ECC_SOFT:
> - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
> - (nfc->bch) ? "hardware BCH" : "software ECC",
> - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
> + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
> + (nfc->bch) ? "hardware BCH" : "software ECC",
> + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
> case NAND_ECC_NONE:
> - dev_info(dev, "not using ECC\n");
> + dev_info(nfc->dev, "not using ECC\n");
> break;
> default:
> - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
> + dev_err(nfc->dev, "ECC mode %d not supported\n",
> + chip->ecc.mode);
> return -EINVAL;
> }
These changes seem redundant as dev is passed into the function,
although you could remove it from the function defintion.
>
> @@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
>
> if (eccbytes > mtd->oobsize - 2) {
> - dev_err(dev,
> + dev_err(nfc->dev,
> "invalid ECC config: required %d ECC bytes, but only %d are available",
> eccbytes, mtd->oobsize - 2);
> return -EINVAL;
> @@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
> chip->controller = &nfc->controller;
> nand_set_flash_node(chip, np);
>
> - ret = nand_scan_ident(mtd, 1, NULL);
> - if (ret)
> - return ret;
> -
> - ret = jz4780_nand_init_ecc(nand, dev)
You've removed this call, but without it the ECC won't be initialised...
> - if (ret)
> - return ret;
> -
> - ret = nand_scan_tail(mtd);
> + chip->ecc.attach_chip = jz4780_nand_attach_chip;
This function doesn't exist.
> + ret = nand_scan(mtd, 1);
> if (ret)
> return ret;
>
>
Thanks,
Harvey
^ permalink raw reply [flat|nested] 120+ messages in thread* Re: [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
2018-03-15 15:40 ` Harvey Hunt
@ 2018-03-16 13:38 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-16 13:38 UTC (permalink / raw)
To: Harvey Hunt
Cc: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Stefan Agner, linux-mtd, linux-arm-kernel
Hi Harvey,
On Thu, 15 Mar 2018 15:40:25 +0000, Harvey Hunt
<harveyhuntnexus@gmail.com> wrote:
> Hi Miquel,
>
> Sorry it's taken me a little while to review your changes, a few
> comments below:
>
> On 03/02/2018 05:03 PM, Miquel Raynal wrote:
> > Two helpers have been added to the core to make ECC-related
> > configuration between the detection phase and the final NAND scan. Use
> > these hooks and convert the driver to just use nand_scan() instead of
> > both nand_scan_ident() and nand_scan_tail().
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
> > 1 file changed, 12 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> > index e69f6ae4c539..fd5dc9d9b0c6 100644
> > --- a/drivers/mtd/nand/raw/jz4780_nand.c
> > +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> > @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
> > return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
> > }
> >
> > -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
> > +static int jz4780_nand_attach_chip(struct nand_chip *chip)
> > {
> > - struct nand_chip *chip = &nand->chip;
> > struct mtd_info *mtd = nand_to_mtd(chip);
> > struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
> > int eccbytes;
> > @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> > switch (chip->ecc.mode) {
> > case NAND_ECC_HW:
> > if (!nfc->bch) {
> > - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
> > + dev_err(nfc->dev,
> > + "HW BCH selected, but BCH controller not found\n");
> > return -ENODEV;
> > }
> >
> > @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> > chip->ecc.correct = jz4780_nand_ecc_correct;
> > /* fall through */
> > case NAND_ECC_SOFT:
> > - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
> > - (nfc->bch) ? "hardware BCH" : "software ECC",
> > - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
> > + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
> > + (nfc->bch) ? "hardware BCH" : "software ECC",
> > + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
> > case NAND_ECC_NONE:
> > - dev_info(dev, "not using ECC\n");
> > + dev_info(nfc->dev, "not using ECC\n");
> > break;
> > default:
> > - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
> > + dev_err(nfc->dev, "ECC mode %d not supported\n",
> > + chip->ecc.mode);
> > return -EINVAL;
> > }
> These changes seem redundant as dev is passed into the function,
> although you could remove it from the function defintion.
That is right, I should have also removed the 'dev' parameter.
>
> >
> > @@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> > eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
> >
> > if (eccbytes > mtd->oobsize - 2) {
> > - dev_err(dev,
> > + dev_err(nfc->dev,
> > "invalid ECC config: required %d ECC bytes, but only %d are available",
> > eccbytes, mtd->oobsize - 2);
> > return -EINVAL;
> > @@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
> > chip->controller = &nfc->controller;
> > nand_set_flash_node(chip, np);
> >
> > - ret = nand_scan_ident(mtd, 1, NULL);
> > - if (ret)
> > - return ret;
> > -
> > - ret = jz4780_nand_init_ecc(nand, dev)
>
> You've removed this call, but without it the ECC won't be initialised...
Actually it is not removed but just renamed to match the core's hook
name. The purpose of this function is to perform any chip-related
tuning after the identification, and the name should not limit
ourselves to do something not related to ECC configuration.
>
> > - if (ret)
> > - return ret;
> > -
> > - ret = nand_scan_tail(mtd);
> > + chip->ecc.attach_chip = jz4780_nand_attach_chip;
>
> This function doesn't exist.
See above, the *nand_init_ecc() function has been renamed in
*nand_attach_chip().
This hook: chip->ecc.attach_chip() will be called between
nand_scan_ident() and nand_scan_tail() from within nand_scan().
>
> > + ret = nand_scan(mtd, 1);
> > if (ret)
> > return ret;
> >
> >
>
> Thanks,
>
> Harvey
Thanks for reviewing,
Miquèl
--
Miquel Raynal, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread* [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
@ 2018-03-16 13:38 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-16 13:38 UTC (permalink / raw)
To: linux-arm-kernel
Hi Harvey,
On Thu, 15 Mar 2018 15:40:25 +0000, Harvey Hunt
<harveyhuntnexus@gmail.com> wrote:
> Hi Miquel,
>
> Sorry it's taken me a little while to review your changes, a few
> comments below:
>
> On 03/02/2018 05:03 PM, Miquel Raynal wrote:
> > Two helpers have been added to the core to make ECC-related
> > configuration between the detection phase and the final NAND scan. Use
> > these hooks and convert the driver to just use nand_scan() instead of
> > both nand_scan_ident() and nand_scan_tail().
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
> > 1 file changed, 12 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> > index e69f6ae4c539..fd5dc9d9b0c6 100644
> > --- a/drivers/mtd/nand/raw/jz4780_nand.c
> > +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> > @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
> > return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
> > }
> >
> > -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
> > +static int jz4780_nand_attach_chip(struct nand_chip *chip)
> > {
> > - struct nand_chip *chip = &nand->chip;
> > struct mtd_info *mtd = nand_to_mtd(chip);
> > struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
> > int eccbytes;
> > @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> > switch (chip->ecc.mode) {
> > case NAND_ECC_HW:
> > if (!nfc->bch) {
> > - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
> > + dev_err(nfc->dev,
> > + "HW BCH selected, but BCH controller not found\n");
> > return -ENODEV;
> > }
> >
> > @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> > chip->ecc.correct = jz4780_nand_ecc_correct;
> > /* fall through */
> > case NAND_ECC_SOFT:
> > - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
> > - (nfc->bch) ? "hardware BCH" : "software ECC",
> > - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
> > + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
> > + (nfc->bch) ? "hardware BCH" : "software ECC",
> > + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
> > case NAND_ECC_NONE:
> > - dev_info(dev, "not using ECC\n");
> > + dev_info(nfc->dev, "not using ECC\n");
> > break;
> > default:
> > - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
> > + dev_err(nfc->dev, "ECC mode %d not supported\n",
> > + chip->ecc.mode);
> > return -EINVAL;
> > }
> These changes seem redundant as dev is passed into the function,
> although you could remove it from the function defintion.
That is right, I should have also removed the 'dev' parameter.
>
> >
> > @@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> > eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
> >
> > if (eccbytes > mtd->oobsize - 2) {
> > - dev_err(dev,
> > + dev_err(nfc->dev,
> > "invalid ECC config: required %d ECC bytes, but only %d are available",
> > eccbytes, mtd->oobsize - 2);
> > return -EINVAL;
> > @@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
> > chip->controller = &nfc->controller;
> > nand_set_flash_node(chip, np);
> >
> > - ret = nand_scan_ident(mtd, 1, NULL);
> > - if (ret)
> > - return ret;
> > -
> > - ret = jz4780_nand_init_ecc(nand, dev)
>
> You've removed this call, but without it the ECC won't be initialised...
Actually it is not removed but just renamed to match the core's hook
name. The purpose of this function is to perform any chip-related
tuning after the identification, and the name should not limit
ourselves to do something not related to ECC configuration.
>
> > - if (ret)
> > - return ret;
> > -
> > - ret = nand_scan_tail(mtd);
> > + chip->ecc.attach_chip = jz4780_nand_attach_chip;
>
> This function doesn't exist.
See above, the *nand_init_ecc() function has been renamed in
*nand_attach_chip().
This hook: chip->ecc.attach_chip() will be called between
nand_scan_ident() and nand_scan_tail() from within nand_scan().
>
> > + ret = nand_scan(mtd, 1);
> > if (ret)
> > return ret;
> >
> >
>
> Thanks,
>
> Harvey
Thanks for reviewing,
Miqu?l
--
Miquel Raynal, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread* Re: [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
2018-03-16 13:38 ` Miquel Raynal
@ 2018-03-16 15:33 ` Harvey Hunt
-1 siblings, 0 replies; 120+ messages in thread
From: Harvey Hunt @ 2018-03-16 15:33 UTC (permalink / raw)
To: Miquel Raynal
Cc: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Stefan Agner, linux-mtd, linux-arm-kernel
Hi Miquèl,
On 03/16/2018 01:38 PM, Miquel Raynal wrote:
> Hi Harvey,
>
> On Thu, 15 Mar 2018 15:40:25 +0000, Harvey Hunt
> <harveyhuntnexus@gmail.com> wrote:
>
>> Hi Miquel,
>>
>> Sorry it's taken me a little while to review your changes, a few
>> comments below:
>>
>> On 03/02/2018 05:03 PM, Miquel Raynal wrote:
>>> Two helpers have been added to the core to make ECC-related
>>> configuration between the detection phase and the final NAND scan. Use
>>> these hooks and convert the driver to just use nand_scan() instead of
>>> both nand_scan_ident() and nand_scan_tail().
>>>
>>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
>>> ---
>>> drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
>>> 1 file changed, 12 insertions(+), 18 deletions(-)
>>>
>>> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
>>> index e69f6ae4c539..fd5dc9d9b0c6 100644
>>> --- a/drivers/mtd/nand/raw/jz4780_nand.c
>>> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
>>> @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
>>> return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
>>> }
>>>
>>> -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
>>> +static int jz4780_nand_attach_chip(struct nand_chip *chip)
>>> {
>>> - struct nand_chip *chip = &nand->chip;
>>> struct mtd_info *mtd = nand_to_mtd(chip);
>>> struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
>>> int eccbytes;
>>> @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>>> switch (chip->ecc.mode) {
>>> case NAND_ECC_HW:
>>> if (!nfc->bch) {
>>> - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
>>> + dev_err(nfc->dev,
>>> + "HW BCH selected, but BCH controller not found\n");
>>> return -ENODEV;
>>> }
>>>
>>> @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>>> chip->ecc.correct = jz4780_nand_ecc_correct;
>>> /* fall through */
>>> case NAND_ECC_SOFT:
>>> - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
>>> - (nfc->bch) ? "hardware BCH" : "software ECC",
>>> - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
>>> + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
>>> + (nfc->bch) ? "hardware BCH" : "software ECC",
>>> + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
>>> case NAND_ECC_NONE:
>>> - dev_info(dev, "not using ECC\n");
>>> + dev_info(nfc->dev, "not using ECC\n");
>>> break;
>>> default:
>>> - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
>>> + dev_err(nfc->dev, "ECC mode %d not supported\n",
>>> + chip->ecc.mode);
>>> return -EINVAL;
>>> }
>> These changes seem redundant as dev is passed into the function,
>> although you could remove it from the function defintion.
>
> That is right, I should have also removed the 'dev' parameter.
>
That'd be great
>>
>>>
>>> @@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>>> eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
>>>
>>> if (eccbytes > mtd->oobsize - 2) {
>>> - dev_err(dev,
>>> + dev_err(nfc->dev,
>>> "invalid ECC config: required %d ECC bytes, but only %d are available",
>>> eccbytes, mtd->oobsize - 2);
>>> return -EINVAL;
>>> @@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
>>> chip->controller = &nfc->controller;
>>> nand_set_flash_node(chip, np);
>>>
>>> - ret = nand_scan_ident(mtd, 1, NULL);
>>> - if (ret)
>>> - return ret;
>>> -
>>> - ret = jz4780_nand_init_ecc(nand, dev)
>>
>> You've removed this call, but without it the ECC won't be initialised...
>
> Actually it is not removed but just renamed to match the core's hook
> name. The purpose of this function is to perform any chip-related
> tuning after the identification, and the name should not limit
> ourselves to do something not related to ECC configuration.
>
Sorry for the noise, seems I've forgotten how to read patches...
>>
>>> - if (ret)
>>> - return ret;
>>> -
>>> - ret = nand_scan_tail(mtd);
>>> + chip->ecc.attach_chip = jz4780_nand_attach_chip;
>>
>> This function doesn't exist.
>
> See above, the *nand_init_ecc() function has been renamed in
> *nand_attach_chip().
>
> This hook: chip->ecc.attach_chip() will be called between
> nand_scan_ident() and nand_scan_tail() from within nand_scan().
>
Same as above :-)
Once you remove the redundant dev param:
Acked-By: Harvey Hunt <harveyhuntnexus@gmail.com>
>>
>>> + ret = nand_scan(mtd, 1);
>>> if (ret)
>>> return ret;
>>>
>>>
>>
>> Thanks,
>>
>> Harvey
>
> Thanks for reviewing,
> Miquèl
>
Thanks,
Harvey
^ permalink raw reply [flat|nested] 120+ messages in thread* [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
@ 2018-03-16 15:33 ` Harvey Hunt
0 siblings, 0 replies; 120+ messages in thread
From: Harvey Hunt @ 2018-03-16 15:33 UTC (permalink / raw)
To: linux-arm-kernel
Hi Miqu?l,
On 03/16/2018 01:38 PM, Miquel Raynal wrote:
> Hi Harvey,
>
> On Thu, 15 Mar 2018 15:40:25 +0000, Harvey Hunt
> <harveyhuntnexus@gmail.com> wrote:
>
>> Hi Miquel,
>>
>> Sorry it's taken me a little while to review your changes, a few
>> comments below:
>>
>> On 03/02/2018 05:03 PM, Miquel Raynal wrote:
>>> Two helpers have been added to the core to make ECC-related
>>> configuration between the detection phase and the final NAND scan. Use
>>> these hooks and convert the driver to just use nand_scan() instead of
>>> both nand_scan_ident() and nand_scan_tail().
>>>
>>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
>>> ---
>>> drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
>>> 1 file changed, 12 insertions(+), 18 deletions(-)
>>>
>>> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
>>> index e69f6ae4c539..fd5dc9d9b0c6 100644
>>> --- a/drivers/mtd/nand/raw/jz4780_nand.c
>>> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
>>> @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
>>> return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
>>> }
>>>
>>> -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
>>> +static int jz4780_nand_attach_chip(struct nand_chip *chip)
>>> {
>>> - struct nand_chip *chip = &nand->chip;
>>> struct mtd_info *mtd = nand_to_mtd(chip);
>>> struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
>>> int eccbytes;
>>> @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>>> switch (chip->ecc.mode) {
>>> case NAND_ECC_HW:
>>> if (!nfc->bch) {
>>> - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
>>> + dev_err(nfc->dev,
>>> + "HW BCH selected, but BCH controller not found\n");
>>> return -ENODEV;
>>> }
>>>
>>> @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>>> chip->ecc.correct = jz4780_nand_ecc_correct;
>>> /* fall through */
>>> case NAND_ECC_SOFT:
>>> - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
>>> - (nfc->bch) ? "hardware BCH" : "software ECC",
>>> - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
>>> + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
>>> + (nfc->bch) ? "hardware BCH" : "software ECC",
>>> + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
>>> case NAND_ECC_NONE:
>>> - dev_info(dev, "not using ECC\n");
>>> + dev_info(nfc->dev, "not using ECC\n");
>>> break;
>>> default:
>>> - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
>>> + dev_err(nfc->dev, "ECC mode %d not supported\n",
>>> + chip->ecc.mode);
>>> return -EINVAL;
>>> }
>> These changes seem redundant as dev is passed into the function,
>> although you could remove it from the function defintion.
>
> That is right, I should have also removed the 'dev' parameter.
>
That'd be great
>>
>>>
>>> @@ -199,7 +200,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>>> eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
>>>
>>> if (eccbytes > mtd->oobsize - 2) {
>>> - dev_err(dev,
>>> + dev_err(nfc->dev,
>>> "invalid ECC config: required %d ECC bytes, but only %d are available",
>>> eccbytes, mtd->oobsize - 2);
>>> return -EINVAL;
>>> @@ -279,15 +280,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
>>> chip->controller = &nfc->controller;
>>> nand_set_flash_node(chip, np);
>>>
>>> - ret = nand_scan_ident(mtd, 1, NULL);
>>> - if (ret)
>>> - return ret;
>>> -
>>> - ret = jz4780_nand_init_ecc(nand, dev)
>>
>> You've removed this call, but without it the ECC won't be initialised...
>
> Actually it is not removed but just renamed to match the core's hook
> name. The purpose of this function is to perform any chip-related
> tuning after the identification, and the name should not limit
> ourselves to do something not related to ECC configuration.
>
Sorry for the noise, seems I've forgotten how to read patches...
>>
>>> - if (ret)
>>> - return ret;
>>> -
>>> - ret = nand_scan_tail(mtd);
>>> + chip->ecc.attach_chip = jz4780_nand_attach_chip;
>>
>> This function doesn't exist.
>
> See above, the *nand_init_ecc() function has been renamed in
> *nand_attach_chip().
>
> This hook: chip->ecc.attach_chip() will be called between
> nand_scan_ident() and nand_scan_tail() from within nand_scan().
>
Same as above :-)
Once you remove the redundant dev param:
Acked-By: Harvey Hunt <harveyhuntnexus@gmail.com>
>>
>>> + ret = nand_scan(mtd, 1);
>>> if (ret)
>>> return ret;
>>>
>>>
>>
>> Thanks,
>>
>> Harvey
>
> Thanks for reviewing,
> Miqu?l
>
Thanks,
Harvey
^ permalink raw reply [flat|nested] 120+ messages in thread* Re: [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
2018-03-16 15:33 ` Harvey Hunt
@ 2018-03-20 7:24 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-20 7:24 UTC (permalink / raw)
To: Harvey Hunt
Cc: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Stefan Agner, linux-mtd, linux-arm-kernel
Hi Harvey,
On Fri, 16 Mar 2018 15:33:05 +0000, Harvey Hunt
<harveyhuntnexus@gmail.com> wrote:
> Hi Miquèl,
>
> On 03/16/2018 01:38 PM, Miquel Raynal wrote:
> > Hi Harvey,
> >
> > On Thu, 15 Mar 2018 15:40:25 +0000, Harvey Hunt
> > <harveyhuntnexus@gmail.com> wrote:
> >
> >> Hi Miquel,
> >>
> >> Sorry it's taken me a little while to review your changes, a few
> >> comments below:
> >>
> >> On 03/02/2018 05:03 PM, Miquel Raynal wrote:
> >>> Two helpers have been added to the core to make ECC-related
> >>> configuration between the detection phase and the final NAND scan. Use
> >>> these hooks and convert the driver to just use nand_scan() instead of
> >>> both nand_scan_ident() and nand_scan_tail().
> >>>
> >>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> >>> ---
> >>> drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
> >>> 1 file changed, 12 insertions(+), 18 deletions(-)
> >>>
> >>> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> >>> index e69f6ae4c539..fd5dc9d9b0c6 100644
> >>> --- a/drivers/mtd/nand/raw/jz4780_nand.c
> >>> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> >>> @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
> >>> return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
> >>> }
> >>>
> >>> -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
> >>> +static int jz4780_nand_attach_chip(struct nand_chip *chip)
> >>> {
> >>> - struct nand_chip *chip = &nand->chip;
> >>> struct mtd_info *mtd = nand_to_mtd(chip);
> >>> struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
> >>> int eccbytes;
> >>> @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> >>> switch (chip->ecc.mode) {
> >>> case NAND_ECC_HW:
> >>> if (!nfc->bch) {
> >>> - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
> >>> + dev_err(nfc->dev,
> >>> + "HW BCH selected, but BCH controller not found\n");
> >>> return -ENODEV;
> >>> }
> >>>
> >>> @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> >>> chip->ecc.correct = jz4780_nand_ecc_correct;
> >>> /* fall through */
> >>> case NAND_ECC_SOFT:
> >>> - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
> >>> - (nfc->bch) ? "hardware BCH" : "software ECC",
> >>> - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
> >>> + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
> >>> + (nfc->bch) ? "hardware BCH" : "software ECC",
> >>> + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
> >>> case NAND_ECC_NONE:
> >>> - dev_info(dev, "not using ECC\n");
> >>> + dev_info(nfc->dev, "not using ECC\n");
> >>> break;
> >>> default:
> >>> - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
> >>> + dev_err(nfc->dev, "ECC mode %d not supported\n",
> >>> + chip->ecc.mode);
> >>> return -EINVAL;
> >>> }
> >> These changes seem redundant as dev is passed into the function,
> >> although you could remove it from the function defintion.
> >
> > That is right, I should have also removed the 'dev' parameter.
> >
>
> That'd be great
Actually there is nothing to do, the new prototype is already:
static int jz4780_nand_attach_chip(struct nand_chip *chip);
which doesn't have the *dev parameter anymore :-)
Thanks anyway for reviewing!
Miquèl
--
Miquel Raynal, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread* [PATCH 21/52] mtd: rawnand: jz4780: convert driver to nand_scan()
@ 2018-03-20 7:24 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-20 7:24 UTC (permalink / raw)
To: linux-arm-kernel
Hi Harvey,
On Fri, 16 Mar 2018 15:33:05 +0000, Harvey Hunt
<harveyhuntnexus@gmail.com> wrote:
> Hi Miqu?l,
>
> On 03/16/2018 01:38 PM, Miquel Raynal wrote:
> > Hi Harvey,
> >
> > On Thu, 15 Mar 2018 15:40:25 +0000, Harvey Hunt
> > <harveyhuntnexus@gmail.com> wrote:
> >
> >> Hi Miquel,
> >>
> >> Sorry it's taken me a little while to review your changes, a few
> >> comments below:
> >>
> >> On 03/02/2018 05:03 PM, Miquel Raynal wrote:
> >>> Two helpers have been added to the core to make ECC-related
> >>> configuration between the detection phase and the final NAND scan. Use
> >>> these hooks and convert the driver to just use nand_scan() instead of
> >>> both nand_scan_ident() and nand_scan_tail().
> >>>
> >>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> >>> ---
> >>> drivers/mtd/nand/raw/jz4780_nand.c | 30 ++++++++++++------------------
> >>> 1 file changed, 12 insertions(+), 18 deletions(-)
> >>>
> >>> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> >>> index e69f6ae4c539..fd5dc9d9b0c6 100644
> >>> --- a/drivers/mtd/nand/raw/jz4780_nand.c
> >>> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> >>> @@ -157,9 +157,8 @@ static int jz4780_nand_ecc_correct(struct mtd_info *mtd, u8 *dat,
> >>> return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
> >>> }
> >>>
> >>> -static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *dev)
> >>> +static int jz4780_nand_attach_chip(struct nand_chip *chip)
> >>> {
> >>> - struct nand_chip *chip = &nand->chip;
> >>> struct mtd_info *mtd = nand_to_mtd(chip);
> >>> struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
> >>> int eccbytes;
> >>> @@ -170,7 +169,8 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> >>> switch (chip->ecc.mode) {
> >>> case NAND_ECC_HW:
> >>> if (!nfc->bch) {
> >>> - dev_err(dev, "HW BCH selected, but BCH controller not found\n");
> >>> + dev_err(nfc->dev,
> >>> + "HW BCH selected, but BCH controller not found\n");
> >>> return -ENODEV;
> >>> }
> >>>
> >>> @@ -179,15 +179,16 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
> >>> chip->ecc.correct = jz4780_nand_ecc_correct;
> >>> /* fall through */
> >>> case NAND_ECC_SOFT:
> >>> - dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
> >>> - (nfc->bch) ? "hardware BCH" : "software ECC",
> >>> - chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
> >>> + dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
> >>> + (nfc->bch) ? "hardware BCH" : "software ECC",
> >>> + chip->ecc.strength, chip->ecc.size, chip->ecc.bytes)> break;
> >>> case NAND_ECC_NONE:
> >>> - dev_info(dev, "not using ECC\n");
> >>> + dev_info(nfc->dev, "not using ECC\n");
> >>> break;
> >>> default:
> >>> - dev_err(dev, "ECC mode %d not supported\n", chip->ecc.mode);
> >>> + dev_err(nfc->dev, "ECC mode %d not supported\n",
> >>> + chip->ecc.mode);
> >>> return -EINVAL;
> >>> }
> >> These changes seem redundant as dev is passed into the function,
> >> although you could remove it from the function defintion.
> >
> > That is right, I should have also removed the 'dev' parameter.
> >
>
> That'd be great
Actually there is nothing to do, the new prototype is already:
static int jz4780_nand_attach_chip(struct nand_chip *chip);
which doesn't have the *dev parameter anymore :-)
Thanks anyway for reviewing!
Miqu?l
--
Miquel Raynal, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread
* [PATCH 22/52] mtd: rawnand: lpc32xx_mlc: enhance the probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Prepare the migration of the lpc32xx_mlc driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_mlc.c | 38 ++++++++++++++++++++------------------
1 file changed, 20 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_mlc.c b/drivers/mtd/nand/raw/lpc32xx_mlc.c
index e357948a7505..6e31faf2f07f 100644
--- a/drivers/mtd/nand/raw/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_mlc.c
@@ -673,7 +673,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
host->io_base = devm_ioremap_resource(&pdev->dev, rc);
if (IS_ERR(host->io_base))
return PTR_ERR(host->io_base);
-
+
host->io_base_phy = rc->start;
nand_chip = &host->nand_chip;
@@ -706,11 +706,11 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (IS_ERR(host->clk)) {
dev_err(&pdev->dev, "Clock initialization failure\n");
res = -ENOENT;
- goto err_exit1;
+ goto free_gpio;
}
res = clk_prepare_enable(host->clk);
if (res)
- goto err_put_clk;
+ goto put_clk;
nand_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl;
nand_chip->dev_ready = lpc32xx_nand_device_ready;
@@ -744,7 +744,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
res = lpc32xx_dma_setup(host);
if (res) {
res = -EIO;
- goto err_exit2;
+ goto unprepare_clk;
}
}
@@ -754,18 +754,18 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
*/
res = nand_scan_ident(mtd, 1, NULL);
if (res)
- goto err_exit3;
+ goto release_dma_chan;
host->dma_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
if (!host->dma_buf) {
res = -ENOMEM;
- goto err_exit3;
+ goto release_dma_chan;
}
host->dummy_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
if (!host->dummy_buf) {
res = -ENOMEM;
- goto err_exit3;
+ goto release_dma_chan;
}
nand_chip->ecc.mode = NAND_ECC_HW;
@@ -783,14 +783,14 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (host->irq < 0) {
dev_err(&pdev->dev, "failed to get platform irq\n");
res = -EINVAL;
- goto err_exit3;
+ goto release_dma_chan;
}
if (request_irq(host->irq, (irq_handler_t)&lpc3xxx_nand_irq,
IRQF_TRIGGER_HIGH, DRV_NAME, host)) {
dev_err(&pdev->dev, "Error requesting NAND IRQ\n");
res = -ENXIO;
- goto err_exit3;
+ goto release_dma_chan;
}
/*
@@ -799,27 +799,29 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
*/
res = nand_scan_tail(mtd);
if (res)
- goto err_exit4;
+ goto free_irq;
mtd->name = DRV_NAME;
res = mtd_device_register(mtd, host->ncfg->parts,
host->ncfg->num_parts);
- if (!res)
- return res;
+ if (res)
+ goto release_nand;
+ return 0;
+
+release_nand:
nand_release(mtd);
-
-err_exit4:
+free_irq:
free_irq(host->irq, host);
-err_exit3:
+release_dma_chan:
if (use_dma)
dma_release_channel(host->dma_chan);
-err_exit2:
+unprepare_clk:
clk_disable_unprepare(host->clk);
-err_put_clk:
+put_clk:
clk_put(host->clk);
-err_exit1:
+free_gpio:
lpc32xx_wp_enable(host);
gpio_free(host->ncfg->wp_gpio);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 22/52] mtd: rawnand: lpc32xx_mlc: enhance the probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Prepare the migration of the lpc32xx_mlc driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_mlc.c | 38 ++++++++++++++++++++------------------
1 file changed, 20 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_mlc.c b/drivers/mtd/nand/raw/lpc32xx_mlc.c
index e357948a7505..6e31faf2f07f 100644
--- a/drivers/mtd/nand/raw/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_mlc.c
@@ -673,7 +673,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
host->io_base = devm_ioremap_resource(&pdev->dev, rc);
if (IS_ERR(host->io_base))
return PTR_ERR(host->io_base);
-
+
host->io_base_phy = rc->start;
nand_chip = &host->nand_chip;
@@ -706,11 +706,11 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (IS_ERR(host->clk)) {
dev_err(&pdev->dev, "Clock initialization failure\n");
res = -ENOENT;
- goto err_exit1;
+ goto free_gpio;
}
res = clk_prepare_enable(host->clk);
if (res)
- goto err_put_clk;
+ goto put_clk;
nand_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl;
nand_chip->dev_ready = lpc32xx_nand_device_ready;
@@ -744,7 +744,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
res = lpc32xx_dma_setup(host);
if (res) {
res = -EIO;
- goto err_exit2;
+ goto unprepare_clk;
}
}
@@ -754,18 +754,18 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
*/
res = nand_scan_ident(mtd, 1, NULL);
if (res)
- goto err_exit3;
+ goto release_dma_chan;
host->dma_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
if (!host->dma_buf) {
res = -ENOMEM;
- goto err_exit3;
+ goto release_dma_chan;
}
host->dummy_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
if (!host->dummy_buf) {
res = -ENOMEM;
- goto err_exit3;
+ goto release_dma_chan;
}
nand_chip->ecc.mode = NAND_ECC_HW;
@@ -783,14 +783,14 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (host->irq < 0) {
dev_err(&pdev->dev, "failed to get platform irq\n");
res = -EINVAL;
- goto err_exit3;
+ goto release_dma_chan;
}
if (request_irq(host->irq, (irq_handler_t)&lpc3xxx_nand_irq,
IRQF_TRIGGER_HIGH, DRV_NAME, host)) {
dev_err(&pdev->dev, "Error requesting NAND IRQ\n");
res = -ENXIO;
- goto err_exit3;
+ goto release_dma_chan;
}
/*
@@ -799,27 +799,29 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
*/
res = nand_scan_tail(mtd);
if (res)
- goto err_exit4;
+ goto free_irq;
mtd->name = DRV_NAME;
res = mtd_device_register(mtd, host->ncfg->parts,
host->ncfg->num_parts);
- if (!res)
- return res;
+ if (res)
+ goto release_nand;
+ return 0;
+
+release_nand:
nand_release(mtd);
-
-err_exit4:
+free_irq:
free_irq(host->irq, host);
-err_exit3:
+release_dma_chan:
if (use_dma)
dma_release_channel(host->dma_chan);
-err_exit2:
+unprepare_clk:
clk_disable_unprepare(host->clk);
-err_put_clk:
+put_clk:
clk_put(host->clk);
-err_exit1:
+free_gpio:
lpc32xx_wp_enable(host);
gpio_free(host->ncfg->wp_gpio);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 23/52] mtd: rawnand: lpc32xx_mlc: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_mlc.c | 105 +++++++++++++++++++------------------
1 file changed, 55 insertions(+), 50 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_mlc.c b/drivers/mtd/nand/raw/lpc32xx_mlc.c
index 6e31faf2f07f..51ef26a91df8 100644
--- a/drivers/mtd/nand/raw/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_mlc.c
@@ -184,6 +184,7 @@ static struct nand_bbt_descr lpc32xx_nand_bbt_mirror = {
};
struct lpc32xx_nand_host {
+ struct platform_device *pdev;
struct nand_chip nand_chip;
struct lpc32xx_mlc_platform_data *pdata;
struct clk *clk;
@@ -653,6 +654,53 @@ static struct lpc32xx_nand_cfg_mlc *lpc32xx_parse_dt(struct device *dev)
return ncfg;
}
+static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
+ struct device *dev = &host->pdev->dev;
+
+ host->dma_buf = devm_kzalloc(dev, mtd->writesize, GFP_KERNEL);
+ if (!host->dma_buf)
+ return -ENOMEM;
+
+ host->dummy_buf = devm_kzalloc(dev, mtd->writesize, GFP_KERNEL);
+ if (!host->dummy_buf)
+ return -ENOMEM;
+
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
+ host->mlcsubpages = mtd->writesize / 512;
+
+ /* initially clear interrupt status */
+ readb(MLC_IRQ_SR(host->io_base));
+
+ init_completion(&host->comp_nand);
+ init_completion(&host->comp_controller);
+
+ host->irq = platform_get_irq(host->pdev, 0);
+ if (host->irq < 0) {
+ dev_err(dev, "failed to get platform irq\n");
+ return -EINVAL;
+ }
+
+ if (request_irq(host->irq, (irq_handler_t)&lpc3xxx_nand_irq,
+ IRQF_TRIGGER_HIGH, DRV_NAME, host)) {
+ dev_err(dev, "Error requesting NAND IRQ\n");
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+static void lpc32xx_nand_detach_chip(struct nand_chip *chip)
+{
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
+
+ free_irq(host->irq, host);
+}
+
/*
* Probe for NAND controller
*/
@@ -669,6 +717,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (!host)
return -ENOMEM;
+ host->pdev = pdev;
+
rc = platform_get_resource(pdev, IORESOURCE_MEM, 0);
host->io_base = devm_ioremap_resource(&pdev->dev, rc);
if (IS_ERR(host->io_base))
@@ -749,58 +799,15 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
}
/*
- * Scan to find existance of the device and
- * Get the type of NAND device SMALL block or LARGE block
+ * Scan to find existence of the device and get the type of NAND device:
+ * SMALL block or LARGE block.
*/
- res = nand_scan_ident(mtd, 1, NULL);
+ nand_chip->ecc.attach_chip = lpc32xx_nand_attach_chip;
+ nand_chip->ecc.detach_chip = lpc32xx_nand_detach_chip;
+ res = nand_scan(mtd, 1);
if (res)
goto release_dma_chan;
- host->dma_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
- if (!host->dma_buf) {
- res = -ENOMEM;
- goto release_dma_chan;
- }
-
- host->dummy_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
- if (!host->dummy_buf) {
- res = -ENOMEM;
- goto release_dma_chan;
- }
-
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
- host->mlcsubpages = mtd->writesize / 512;
-
- /* initially clear interrupt status */
- readb(MLC_IRQ_SR(host->io_base));
-
- init_completion(&host->comp_nand);
- init_completion(&host->comp_controller);
-
- host->irq = platform_get_irq(pdev, 0);
- if (host->irq < 0) {
- dev_err(&pdev->dev, "failed to get platform irq\n");
- res = -EINVAL;
- goto release_dma_chan;
- }
-
- if (request_irq(host->irq, (irq_handler_t)&lpc3xxx_nand_irq,
- IRQF_TRIGGER_HIGH, DRV_NAME, host)) {
- dev_err(&pdev->dev, "Error requesting NAND IRQ\n");
- res = -ENXIO;
- goto release_dma_chan;
- }
-
- /*
- * Fills out all the uninitialized function pointers with the defaults
- * And scans for a bad block table if appropriate.
- */
- res = nand_scan_tail(mtd);
- if (res)
- goto free_irq;
-
mtd->name = DRV_NAME;
res = mtd_device_register(mtd, host->ncfg->parts,
@@ -812,8 +819,6 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
release_nand:
nand_release(mtd);
-free_irq:
- free_irq(host->irq, host);
release_dma_chan:
if (use_dma)
dma_release_channel(host->dma_chan);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 23/52] mtd: rawnand: lpc32xx_mlc: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_mlc.c | 105 +++++++++++++++++++------------------
1 file changed, 55 insertions(+), 50 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_mlc.c b/drivers/mtd/nand/raw/lpc32xx_mlc.c
index 6e31faf2f07f..51ef26a91df8 100644
--- a/drivers/mtd/nand/raw/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_mlc.c
@@ -184,6 +184,7 @@ static struct nand_bbt_descr lpc32xx_nand_bbt_mirror = {
};
struct lpc32xx_nand_host {
+ struct platform_device *pdev;
struct nand_chip nand_chip;
struct lpc32xx_mlc_platform_data *pdata;
struct clk *clk;
@@ -653,6 +654,53 @@ static struct lpc32xx_nand_cfg_mlc *lpc32xx_parse_dt(struct device *dev)
return ncfg;
}
+static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
+ struct device *dev = &host->pdev->dev;
+
+ host->dma_buf = devm_kzalloc(dev, mtd->writesize, GFP_KERNEL);
+ if (!host->dma_buf)
+ return -ENOMEM;
+
+ host->dummy_buf = devm_kzalloc(dev, mtd->writesize, GFP_KERNEL);
+ if (!host->dummy_buf)
+ return -ENOMEM;
+
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
+ host->mlcsubpages = mtd->writesize / 512;
+
+ /* initially clear interrupt status */
+ readb(MLC_IRQ_SR(host->io_base));
+
+ init_completion(&host->comp_nand);
+ init_completion(&host->comp_controller);
+
+ host->irq = platform_get_irq(host->pdev, 0);
+ if (host->irq < 0) {
+ dev_err(dev, "failed to get platform irq\n");
+ return -EINVAL;
+ }
+
+ if (request_irq(host->irq, (irq_handler_t)&lpc3xxx_nand_irq,
+ IRQF_TRIGGER_HIGH, DRV_NAME, host)) {
+ dev_err(dev, "Error requesting NAND IRQ\n");
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+static void lpc32xx_nand_detach_chip(struct nand_chip *chip)
+{
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
+
+ free_irq(host->irq, host);
+}
+
/*
* Probe for NAND controller
*/
@@ -669,6 +717,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (!host)
return -ENOMEM;
+ host->pdev = pdev;
+
rc = platform_get_resource(pdev, IORESOURCE_MEM, 0);
host->io_base = devm_ioremap_resource(&pdev->dev, rc);
if (IS_ERR(host->io_base))
@@ -749,58 +799,15 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
}
/*
- * Scan to find existance of the device and
- * Get the type of NAND device SMALL block or LARGE block
+ * Scan to find existence of the device and get the type of NAND device:
+ * SMALL block or LARGE block.
*/
- res = nand_scan_ident(mtd, 1, NULL);
+ nand_chip->ecc.attach_chip = lpc32xx_nand_attach_chip;
+ nand_chip->ecc.detach_chip = lpc32xx_nand_detach_chip;
+ res = nand_scan(mtd, 1);
if (res)
goto release_dma_chan;
- host->dma_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
- if (!host->dma_buf) {
- res = -ENOMEM;
- goto release_dma_chan;
- }
-
- host->dummy_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
- if (!host->dummy_buf) {
- res = -ENOMEM;
- goto release_dma_chan;
- }
-
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
- host->mlcsubpages = mtd->writesize / 512;
-
- /* initially clear interrupt status */
- readb(MLC_IRQ_SR(host->io_base));
-
- init_completion(&host->comp_nand);
- init_completion(&host->comp_controller);
-
- host->irq = platform_get_irq(pdev, 0);
- if (host->irq < 0) {
- dev_err(&pdev->dev, "failed to get platform irq\n");
- res = -EINVAL;
- goto release_dma_chan;
- }
-
- if (request_irq(host->irq, (irq_handler_t)&lpc3xxx_nand_irq,
- IRQF_TRIGGER_HIGH, DRV_NAME, host)) {
- dev_err(&pdev->dev, "Error requesting NAND IRQ\n");
- res = -ENXIO;
- goto release_dma_chan;
- }
-
- /*
- * Fills out all the uninitialized function pointers with the defaults
- * And scans for a bad block table if appropriate.
- */
- res = nand_scan_tail(mtd);
- if (res)
- goto free_irq;
-
mtd->name = DRV_NAME;
res = mtd_device_register(mtd, host->ncfg->parts,
@@ -812,8 +819,6 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
release_nand:
nand_release(mtd);
-free_irq:
- free_irq(host->irq, host);
release_dma_chan:
if (use_dma)
dma_release_channel(host->dma_chan);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 24/52] mtd: rawnand: lpc32xx_slc: enhance the probe function error
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Prepare the migration of the lpc32xx_slc driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_slc.c | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c
index 5f7cc6da0a7f..342f666ad435 100644
--- a/drivers/mtd/nand/raw/lpc32xx_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_slc.c
@@ -831,11 +831,11 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (IS_ERR(host->clk)) {
dev_err(&pdev->dev, "Clock failure\n");
res = -ENOENT;
- goto err_exit1;
+ goto release_gpio;
}
res = clk_prepare_enable(host->clk);
if (res)
- goto err_exit1;
+ goto release_gpio;
/* Set NAND IO addresses and command/ready functions */
chip->IO_ADDR_R = SLC_DATA(host->io_base);
@@ -874,19 +874,19 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
GFP_KERNEL);
if (host->data_buf == NULL) {
res = -ENOMEM;
- goto err_exit2;
+ goto release_clk;
}
res = lpc32xx_nand_dma_setup(host);
if (res) {
res = -EIO;
- goto err_exit2;
+ goto release_clk;
}
/* Find NAND device */
res = nand_scan_ident(mtd, 1, NULL);
if (res)
- goto err_exit3;
+ goto release_dma;
/* OOB and ECC CPU and DMA work areas */
host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
@@ -920,21 +920,23 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
*/
res = nand_scan_tail(mtd);
if (res)
- goto err_exit3;
+ goto release_dma;
mtd->name = "nxp_lpc3220_slc";
res = mtd_device_register(mtd, host->ncfg->parts,
host->ncfg->num_parts);
- if (!res)
- return res;
+ if (res)
+ goto release_nand;
+ return 0;
+
+release_nand:
nand_release(mtd);
-
-err_exit3:
+release_dma:
dma_release_channel(host->dma_chan);
-err_exit2:
+release_clk:
clk_disable_unprepare(host->clk);
-err_exit1:
+release_gpio:
lpc32xx_wp_enable(host);
return res;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 24/52] mtd: rawnand: lpc32xx_slc: enhance the probe function error
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Prepare the migration of the lpc32xx_slc driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_slc.c | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c
index 5f7cc6da0a7f..342f666ad435 100644
--- a/drivers/mtd/nand/raw/lpc32xx_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_slc.c
@@ -831,11 +831,11 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
if (IS_ERR(host->clk)) {
dev_err(&pdev->dev, "Clock failure\n");
res = -ENOENT;
- goto err_exit1;
+ goto release_gpio;
}
res = clk_prepare_enable(host->clk);
if (res)
- goto err_exit1;
+ goto release_gpio;
/* Set NAND IO addresses and command/ready functions */
chip->IO_ADDR_R = SLC_DATA(host->io_base);
@@ -874,19 +874,19 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
GFP_KERNEL);
if (host->data_buf == NULL) {
res = -ENOMEM;
- goto err_exit2;
+ goto release_clk;
}
res = lpc32xx_nand_dma_setup(host);
if (res) {
res = -EIO;
- goto err_exit2;
+ goto release_clk;
}
/* Find NAND device */
res = nand_scan_ident(mtd, 1, NULL);
if (res)
- goto err_exit3;
+ goto release_dma;
/* OOB and ECC CPU and DMA work areas */
host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
@@ -920,21 +920,23 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
*/
res = nand_scan_tail(mtd);
if (res)
- goto err_exit3;
+ goto release_dma;
mtd->name = "nxp_lpc3220_slc";
res = mtd_device_register(mtd, host->ncfg->parts,
host->ncfg->num_parts);
- if (!res)
- return res;
+ if (res)
+ goto release_nand;
+ return 0;
+
+release_nand:
nand_release(mtd);
-
-err_exit3:
+release_dma:
dma_release_channel(host->dma_chan);
-err_exit2:
+release_clk:
clk_disable_unprepare(host->clk);
-err_exit1:
+release_gpio:
lpc32xx_wp_enable(host);
return res;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 25/52] mtd: rawnand: lpc32xx_slc: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_slc.c | 73 ++++++++++++++++++++------------------
1 file changed, 38 insertions(+), 35 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c
index 342f666ad435..81c71bc12637 100644
--- a/drivers/mtd/nand/raw/lpc32xx_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_slc.c
@@ -779,6 +779,42 @@ static struct lpc32xx_nand_cfg_slc *lpc32xx_parse_dt(struct device *dev)
return ncfg;
}
+static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
+
+ /* OOB and ECC CPU and DMA work areas */
+ host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
+
+ /*
+ * Small page FLASH has a unique OOB layout, but large and huge
+ * page FLASH use the standard layout. Small page FLASH uses a
+ * custom BBT marker layout.
+ */
+ if (mtd->writesize <= 512)
+ mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
+
+ /* These sizes remain the same regardless of page size */
+ chip->ecc.size = 256;
+ chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;
+ chip->ecc.prepad = 0;
+ chip->ecc.postpad = 0;
+
+ /*
+ * Use a custom BBT marker setup for small page FLASH that
+ * won't interfere with the ECC layout. Large and huge page
+ * FLASH use the standard layout.
+ */
+ if ((chip->bbt_options & NAND_BBT_USE_FLASH) &&
+ mtd->writesize <= 512) {
+ chip->bbt_td = &bbt_smallpage_main_descr;
+ chip->bbt_md = &bbt_smallpage_mirror_descr;
+ }
+
+ return 0;
+}
+
/*
* Probe for NAND controller
*/
@@ -884,41 +920,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
}
/* Find NAND device */
- res = nand_scan_ident(mtd, 1, NULL);
- if (res)
- goto release_dma;
-
- /* OOB and ECC CPU and DMA work areas */
- host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
-
- /*
- * Small page FLASH has a unique OOB layout, but large and huge
- * page FLASH use the standard layout. Small page FLASH uses a
- * custom BBT marker layout.
- */
- if (mtd->writesize <= 512)
- mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
-
- /* These sizes remain the same regardless of page size */
- chip->ecc.size = 256;
- chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;
- chip->ecc.prepad = chip->ecc.postpad = 0;
-
- /*
- * Use a custom BBT marker setup for small page FLASH that
- * won't interfere with the ECC layout. Large and huge page
- * FLASH use the standard layout.
- */
- if ((chip->bbt_options & NAND_BBT_USE_FLASH) &&
- mtd->writesize <= 512) {
- chip->bbt_td = &bbt_smallpage_main_descr;
- chip->bbt_md = &bbt_smallpage_mirror_descr;
- }
-
- /*
- * Fills out all the uninitialized function pointers with the defaults
- */
- res = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = lpc32xx_nand_attach_chip;
+ res = nand_scan(mtd, 1);
if (res)
goto release_dma;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 25/52] mtd: rawnand: lpc32xx_slc: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/lpc32xx_slc.c | 73 ++++++++++++++++++++------------------
1 file changed, 38 insertions(+), 35 deletions(-)
diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c
index 342f666ad435..81c71bc12637 100644
--- a/drivers/mtd/nand/raw/lpc32xx_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_slc.c
@@ -779,6 +779,42 @@ static struct lpc32xx_nand_cfg_slc *lpc32xx_parse_dt(struct device *dev)
return ncfg;
}
+static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
+
+ /* OOB and ECC CPU and DMA work areas */
+ host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
+
+ /*
+ * Small page FLASH has a unique OOB layout, but large and huge
+ * page FLASH use the standard layout. Small page FLASH uses a
+ * custom BBT marker layout.
+ */
+ if (mtd->writesize <= 512)
+ mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
+
+ /* These sizes remain the same regardless of page size */
+ chip->ecc.size = 256;
+ chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;
+ chip->ecc.prepad = 0;
+ chip->ecc.postpad = 0;
+
+ /*
+ * Use a custom BBT marker setup for small page FLASH that
+ * won't interfere with the ECC layout. Large and huge page
+ * FLASH use the standard layout.
+ */
+ if ((chip->bbt_options & NAND_BBT_USE_FLASH) &&
+ mtd->writesize <= 512) {
+ chip->bbt_td = &bbt_smallpage_main_descr;
+ chip->bbt_md = &bbt_smallpage_mirror_descr;
+ }
+
+ return 0;
+}
+
/*
* Probe for NAND controller
*/
@@ -884,41 +920,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
}
/* Find NAND device */
- res = nand_scan_ident(mtd, 1, NULL);
- if (res)
- goto release_dma;
-
- /* OOB and ECC CPU and DMA work areas */
- host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
-
- /*
- * Small page FLASH has a unique OOB layout, but large and huge
- * page FLASH use the standard layout. Small page FLASH uses a
- * custom BBT marker layout.
- */
- if (mtd->writesize <= 512)
- mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
-
- /* These sizes remain the same regardless of page size */
- chip->ecc.size = 256;
- chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;
- chip->ecc.prepad = chip->ecc.postpad = 0;
-
- /*
- * Use a custom BBT marker setup for small page FLASH that
- * won't interfere with the ECC layout. Large and huge page
- * FLASH use the standard layout.
- */
- if ((chip->bbt_options & NAND_BBT_USE_FLASH) &&
- mtd->writesize <= 512) {
- chip->bbt_td = &bbt_smallpage_main_descr;
- chip->bbt_md = &bbt_smallpage_mirror_descr;
- }
-
- /*
- * Fills out all the uninitialized function pointers with the defaults
- */
- res = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = lpc32xx_nand_attach_chip;
+ res = nand_scan(mtd, 1);
if (res)
goto release_dma;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 26/52] mtd: rawnand: marvell: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/marvell_nand.c | 201 +++++++++++++++++++-----------------
1 file changed, 104 insertions(+), 97 deletions(-)
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index cc21f9633edd..d7765445246f 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -2284,6 +2284,107 @@ static int marvell_nfc_setup_data_interface(struct mtd_info *mtd, int chipnr,
return 0;
}
+static int marvell_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct marvell_nand_chip *marvell_nand = to_marvell_nand(chip);
+ struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
+ struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(nfc->dev);
+ int ret;
+
+ if (pdata && pdata->flash_bbt)
+ chip->bbt_options |= NAND_BBT_USE_FLASH;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH) {
+ /*
+ * We'll use a bad block table stored in-flash and don't
+ * allow writing the bad block marker to the flash.
+ */
+ chip->bbt_options |= NAND_BBT_NO_OOB_BBM;
+ chip->bbt_td = &bbt_main_descr;
+ chip->bbt_md = &bbt_mirror_descr;
+ }
+
+ /* Save the chip-specific fields of NDCR */
+ marvell_nand->ndcr = NDCR_PAGE_SZ(mtd->writesize);
+ if (chip->options & NAND_BUSWIDTH_16)
+ marvell_nand->ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C;
+
+ /*
+ * On small page NANDs, only one cycle is needed to pass the
+ * column address.
+ */
+ if (mtd->writesize <= 512) {
+ marvell_nand->addr_cyc = 1;
+ } else {
+ marvell_nand->addr_cyc = 2;
+ marvell_nand->ndcr |= NDCR_RA_START;
+ }
+
+ /*
+ * Now add the number of cycles needed to pass the row
+ * address.
+ *
+ * Addressing a chip using CS 2 or 3 should also need the third row
+ * cycle but due to inconsistance in the documentation and lack of
+ * hardware to test this situation, this case is not supported.
+ */
+ if (chip->options & NAND_ROW_ADDR_3)
+ marvell_nand->addr_cyc += 3;
+ else
+ marvell_nand->addr_cyc += 2;
+
+ if (pdata) {
+ chip->ecc.size = pdata->ecc_step_size;
+ chip->ecc.strength = pdata->ecc_strength;
+ }
+
+ ret = marvell_nand_ecc_init(mtd, &chip->ecc);
+ if (ret) {
+ dev_err(nfc->dev, "ECC init failed: %d\n", ret);
+ return ret;
+ }
+
+ if (chip->ecc.mode == NAND_ECC_HW) {
+ /*
+ * Subpage write not available with hardware ECC, prohibit also
+ * subpage read as in userspace subpage access would still be
+ * allowed and subpage write, if used, would lead to numerous
+ * uncorrectable ECC errors.
+ */
+ chip->options |= NAND_NO_SUBPAGE_WRITE;
+ }
+
+ if (pdata || nfc->caps->legacy_of_bindings) {
+ /*
+ * We keep the MTD name unchanged to avoid breaking platforms
+ * where the MTD cmdline parser is used and the bootloader
+ * has not been updated to use the new naming scheme.
+ */
+ mtd->name = "pxa3xx_nand-0";
+ } else if (!mtd->name) {
+ /*
+ * If the new bindings are used and the bootloader has not been
+ * updated to pass a new mtdparts parameter on the cmdline, you
+ * should define the following property in your NAND node, ie:
+ *
+ * label = "main-storage";
+ *
+ * This way, mtd->name will be set by the core when
+ * nand_set_flash_node() is called.
+ */
+ mtd->name = devm_kasprintf(nfc->dev, GFP_KERNEL,
+ "%s:nand.%d", dev_name(nfc->dev),
+ marvell_nand->sels[0].cs);
+ if (!mtd->name) {
+ dev_err(nfc->dev, "Failed to allocate mtd->name\n");
+ return -ENOMEM;
+ }
+ }
+
+ return 0;
+}
+
static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc,
struct device_node *np)
{
@@ -2435,105 +2536,11 @@ static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc,
marvell_nand->ndtr1 = readl_relaxed(nfc->regs + NDTR1);
chip->options |= NAND_BUSWIDTH_AUTO;
- ret = nand_scan_ident(mtd, marvell_nand->nsels, NULL);
- if (ret) {
- dev_err(dev, "could not identify the nand chip\n");
- return ret;
- }
-
- if (pdata && pdata->flash_bbt)
- chip->bbt_options |= NAND_BBT_USE_FLASH;
-
- if (chip->bbt_options & NAND_BBT_USE_FLASH) {
- /*
- * We'll use a bad block table stored in-flash and don't
- * allow writing the bad block marker to the flash.
- */
- chip->bbt_options |= NAND_BBT_NO_OOB_BBM;
- chip->bbt_td = &bbt_main_descr;
- chip->bbt_md = &bbt_mirror_descr;
- }
-
- /* Save the chip-specific fields of NDCR */
- marvell_nand->ndcr = NDCR_PAGE_SZ(mtd->writesize);
- if (chip->options & NAND_BUSWIDTH_16)
- marvell_nand->ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C;
-
- /*
- * On small page NANDs, only one cycle is needed to pass the
- * column address.
- */
- if (mtd->writesize <= 512) {
- marvell_nand->addr_cyc = 1;
- } else {
- marvell_nand->addr_cyc = 2;
- marvell_nand->ndcr |= NDCR_RA_START;
- }
-
- /*
- * Now add the number of cycles needed to pass the row
- * address.
- *
- * Addressing a chip using CS 2 or 3 should also need the third row
- * cycle but due to inconsistance in the documentation and lack of
- * hardware to test this situation, this case is not supported.
- */
- if (chip->options & NAND_ROW_ADDR_3)
- marvell_nand->addr_cyc += 3;
- else
- marvell_nand->addr_cyc += 2;
-
- if (pdata) {
- chip->ecc.size = pdata->ecc_step_size;
- chip->ecc.strength = pdata->ecc_strength;
- }
-
- ret = marvell_nand_ecc_init(mtd, &chip->ecc);
- if (ret) {
- dev_err(dev, "ECC init failed: %d\n", ret);
- return ret;
- }
-
- if (chip->ecc.mode == NAND_ECC_HW) {
- /*
- * Subpage write not available with hardware ECC, prohibit also
- * subpage read as in userspace subpage access would still be
- * allowed and subpage write, if used, would lead to numerous
- * uncorrectable ECC errors.
- */
- chip->options |= NAND_NO_SUBPAGE_WRITE;
- }
-
- if (pdata || nfc->caps->legacy_of_bindings) {
- /*
- * We keep the MTD name unchanged to avoid breaking platforms
- * where the MTD cmdline parser is used and the bootloader
- * has not been updated to use the new naming scheme.
- */
- mtd->name = "pxa3xx_nand-0";
- } else if (!mtd->name) {
- /*
- * If the new bindings are used and the bootloader has not been
- * updated to pass a new mtdparts parameter on the cmdline, you
- * should define the following property in your NAND node, ie:
- *
- * label = "main-storage";
- *
- * This way, mtd->name will be set by the core when
- * nand_set_flash_node() is called.
- */
- mtd->name = devm_kasprintf(nfc->dev, GFP_KERNEL,
- "%s:nand.%d", dev_name(nfc->dev),
- marvell_nand->sels[0].cs);
- if (!mtd->name) {
- dev_err(nfc->dev, "Failed to allocate mtd->name\n");
- return -ENOMEM;
- }
- }
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = marvell_nand_attach_chip;
+ ret = nand_scan(mtd, marvell_nand->nsels);
if (ret) {
- dev_err(dev, "nand_scan_tail failed: %d\n", ret);
+ dev_err(dev, "could not scan the nand chip\n");
return ret;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 26/52] mtd: rawnand: marvell: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/marvell_nand.c | 201 +++++++++++++++++++-----------------
1 file changed, 104 insertions(+), 97 deletions(-)
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index cc21f9633edd..d7765445246f 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -2284,6 +2284,107 @@ static int marvell_nfc_setup_data_interface(struct mtd_info *mtd, int chipnr,
return 0;
}
+static int marvell_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct marvell_nand_chip *marvell_nand = to_marvell_nand(chip);
+ struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
+ struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(nfc->dev);
+ int ret;
+
+ if (pdata && pdata->flash_bbt)
+ chip->bbt_options |= NAND_BBT_USE_FLASH;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH) {
+ /*
+ * We'll use a bad block table stored in-flash and don't
+ * allow writing the bad block marker to the flash.
+ */
+ chip->bbt_options |= NAND_BBT_NO_OOB_BBM;
+ chip->bbt_td = &bbt_main_descr;
+ chip->bbt_md = &bbt_mirror_descr;
+ }
+
+ /* Save the chip-specific fields of NDCR */
+ marvell_nand->ndcr = NDCR_PAGE_SZ(mtd->writesize);
+ if (chip->options & NAND_BUSWIDTH_16)
+ marvell_nand->ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C;
+
+ /*
+ * On small page NANDs, only one cycle is needed to pass the
+ * column address.
+ */
+ if (mtd->writesize <= 512) {
+ marvell_nand->addr_cyc = 1;
+ } else {
+ marvell_nand->addr_cyc = 2;
+ marvell_nand->ndcr |= NDCR_RA_START;
+ }
+
+ /*
+ * Now add the number of cycles needed to pass the row
+ * address.
+ *
+ * Addressing a chip using CS 2 or 3 should also need the third row
+ * cycle but due to inconsistance in the documentation and lack of
+ * hardware to test this situation, this case is not supported.
+ */
+ if (chip->options & NAND_ROW_ADDR_3)
+ marvell_nand->addr_cyc += 3;
+ else
+ marvell_nand->addr_cyc += 2;
+
+ if (pdata) {
+ chip->ecc.size = pdata->ecc_step_size;
+ chip->ecc.strength = pdata->ecc_strength;
+ }
+
+ ret = marvell_nand_ecc_init(mtd, &chip->ecc);
+ if (ret) {
+ dev_err(nfc->dev, "ECC init failed: %d\n", ret);
+ return ret;
+ }
+
+ if (chip->ecc.mode == NAND_ECC_HW) {
+ /*
+ * Subpage write not available with hardware ECC, prohibit also
+ * subpage read as in userspace subpage access would still be
+ * allowed and subpage write, if used, would lead to numerous
+ * uncorrectable ECC errors.
+ */
+ chip->options |= NAND_NO_SUBPAGE_WRITE;
+ }
+
+ if (pdata || nfc->caps->legacy_of_bindings) {
+ /*
+ * We keep the MTD name unchanged to avoid breaking platforms
+ * where the MTD cmdline parser is used and the bootloader
+ * has not been updated to use the new naming scheme.
+ */
+ mtd->name = "pxa3xx_nand-0";
+ } else if (!mtd->name) {
+ /*
+ * If the new bindings are used and the bootloader has not been
+ * updated to pass a new mtdparts parameter on the cmdline, you
+ * should define the following property in your NAND node, ie:
+ *
+ * label = "main-storage";
+ *
+ * This way, mtd->name will be set by the core when
+ * nand_set_flash_node() is called.
+ */
+ mtd->name = devm_kasprintf(nfc->dev, GFP_KERNEL,
+ "%s:nand.%d", dev_name(nfc->dev),
+ marvell_nand->sels[0].cs);
+ if (!mtd->name) {
+ dev_err(nfc->dev, "Failed to allocate mtd->name\n");
+ return -ENOMEM;
+ }
+ }
+
+ return 0;
+}
+
static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc,
struct device_node *np)
{
@@ -2435,105 +2536,11 @@ static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc,
marvell_nand->ndtr1 = readl_relaxed(nfc->regs + NDTR1);
chip->options |= NAND_BUSWIDTH_AUTO;
- ret = nand_scan_ident(mtd, marvell_nand->nsels, NULL);
- if (ret) {
- dev_err(dev, "could not identify the nand chip\n");
- return ret;
- }
-
- if (pdata && pdata->flash_bbt)
- chip->bbt_options |= NAND_BBT_USE_FLASH;
-
- if (chip->bbt_options & NAND_BBT_USE_FLASH) {
- /*
- * We'll use a bad block table stored in-flash and don't
- * allow writing the bad block marker to the flash.
- */
- chip->bbt_options |= NAND_BBT_NO_OOB_BBM;
- chip->bbt_td = &bbt_main_descr;
- chip->bbt_md = &bbt_mirror_descr;
- }
-
- /* Save the chip-specific fields of NDCR */
- marvell_nand->ndcr = NDCR_PAGE_SZ(mtd->writesize);
- if (chip->options & NAND_BUSWIDTH_16)
- marvell_nand->ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C;
-
- /*
- * On small page NANDs, only one cycle is needed to pass the
- * column address.
- */
- if (mtd->writesize <= 512) {
- marvell_nand->addr_cyc = 1;
- } else {
- marvell_nand->addr_cyc = 2;
- marvell_nand->ndcr |= NDCR_RA_START;
- }
-
- /*
- * Now add the number of cycles needed to pass the row
- * address.
- *
- * Addressing a chip using CS 2 or 3 should also need the third row
- * cycle but due to inconsistance in the documentation and lack of
- * hardware to test this situation, this case is not supported.
- */
- if (chip->options & NAND_ROW_ADDR_3)
- marvell_nand->addr_cyc += 3;
- else
- marvell_nand->addr_cyc += 2;
-
- if (pdata) {
- chip->ecc.size = pdata->ecc_step_size;
- chip->ecc.strength = pdata->ecc_strength;
- }
-
- ret = marvell_nand_ecc_init(mtd, &chip->ecc);
- if (ret) {
- dev_err(dev, "ECC init failed: %d\n", ret);
- return ret;
- }
-
- if (chip->ecc.mode == NAND_ECC_HW) {
- /*
- * Subpage write not available with hardware ECC, prohibit also
- * subpage read as in userspace subpage access would still be
- * allowed and subpage write, if used, would lead to numerous
- * uncorrectable ECC errors.
- */
- chip->options |= NAND_NO_SUBPAGE_WRITE;
- }
-
- if (pdata || nfc->caps->legacy_of_bindings) {
- /*
- * We keep the MTD name unchanged to avoid breaking platforms
- * where the MTD cmdline parser is used and the bootloader
- * has not been updated to use the new naming scheme.
- */
- mtd->name = "pxa3xx_nand-0";
- } else if (!mtd->name) {
- /*
- * If the new bindings are used and the bootloader has not been
- * updated to pass a new mtdparts parameter on the cmdline, you
- * should define the following property in your NAND node, ie:
- *
- * label = "main-storage";
- *
- * This way, mtd->name will be set by the core when
- * nand_set_flash_node() is called.
- */
- mtd->name = devm_kasprintf(nfc->dev, GFP_KERNEL,
- "%s:nand.%d", dev_name(nfc->dev),
- marvell_nand->sels[0].cs);
- if (!mtd->name) {
- dev_err(nfc->dev, "Failed to allocate mtd->name\n");
- return -ENOMEM;
- }
- }
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = marvell_nand_attach_chip;
+ ret = nand_scan(mtd, marvell_nand->nsels);
if (ret) {
- dev_err(dev, "nand_scan_tail failed: %d\n", ret);
+ dev_err(dev, "could not scan the nand chip\n");
return ret;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 27/52] mtd: rawnand: mtk: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/mtk_nand.c | 71 +++++++++++++++++++++++------------------
1 file changed, 40 insertions(+), 31 deletions(-)
diff --git a/drivers/mtd/nand/raw/mtk_nand.c b/drivers/mtd/nand/raw/mtk_nand.c
index 6977da3a26aa..fc4848bf3e00 100644
--- a/drivers/mtd/nand/raw/mtk_nand.c
+++ b/drivers/mtd/nand/raw/mtk_nand.c
@@ -1250,13 +1250,50 @@ static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
return 0;
}
+static int mtk_nfc_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct device *dev = mtd->dev.parent;
+ struct mtk_nfc *nfc = nand_get_controller_data(chip);
+ struct mtk_nfc_nand_chip *mtk_nand = to_mtk_nand(chip);
+ int len;
+ int ret;
+
+ if (chip->options & NAND_BUSWIDTH_16) {
+ dev_err(dev, "16bits buswidth not supported");
+ return -EINVAL;
+ }
+
+ /* store bbt magic in page, cause OOB is not protected */
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ ret = mtk_nfc_ecc_init(dev, mtd);
+ if (ret)
+ return ret;
+
+ ret = mtk_nfc_set_spare_per_sector(&mtk_nand->spare_per_sector, mtd);
+ if (ret)
+ return ret;
+
+ mtk_nfc_set_fdm(&mtk_nand->fdm, mtd);
+ mtk_nfc_set_bad_mark_ctl(&mtk_nand->bad_mark, mtd);
+
+ len = mtd->writesize + mtd->oobsize;
+ nfc->buffer = devm_kzalloc(dev, len, GFP_KERNEL);
+ if (!nfc->buffer)
+ return -ENOMEM;
+
+ return 0;
+}
+
static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
struct device_node *np)
{
struct mtk_nfc_nand_chip *chip;
struct nand_chip *nand;
struct mtd_info *mtd;
- int nsels, len;
+ int nsels;
u32 tmp;
int ret;
int i;
@@ -1324,36 +1361,8 @@ static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
mtk_nfc_hw_init(nfc);
- ret = nand_scan_ident(mtd, nsels, NULL);
- if (ret)
- return ret;
-
- /* store bbt magic in page, cause OOB is not protected */
- if (nand->bbt_options & NAND_BBT_USE_FLASH)
- nand->bbt_options |= NAND_BBT_NO_OOB;
-
- ret = mtk_nfc_ecc_init(dev, mtd);
- if (ret)
- return -EINVAL;
-
- if (nand->options & NAND_BUSWIDTH_16) {
- dev_err(dev, "16bits buswidth not supported");
- return -EINVAL;
- }
-
- ret = mtk_nfc_set_spare_per_sector(&chip->spare_per_sector, mtd);
- if (ret)
- return ret;
-
- mtk_nfc_set_fdm(&chip->fdm, mtd);
- mtk_nfc_set_bad_mark_ctl(&chip->bad_mark, mtd);
-
- len = mtd->writesize + mtd->oobsize;
- nfc->buffer = devm_kzalloc(dev, len, GFP_KERNEL);
- if (!nfc->buffer)
- return -ENOMEM;
-
- ret = nand_scan_tail(mtd);
+ nand->ecc.attach_chip = mtk_nfc_attach_chip;
+ ret = nand_scan(mtd, nsels);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 27/52] mtd: rawnand: mtk: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/mtk_nand.c | 71 +++++++++++++++++++++++------------------
1 file changed, 40 insertions(+), 31 deletions(-)
diff --git a/drivers/mtd/nand/raw/mtk_nand.c b/drivers/mtd/nand/raw/mtk_nand.c
index 6977da3a26aa..fc4848bf3e00 100644
--- a/drivers/mtd/nand/raw/mtk_nand.c
+++ b/drivers/mtd/nand/raw/mtk_nand.c
@@ -1250,13 +1250,50 @@ static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
return 0;
}
+static int mtk_nfc_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct device *dev = mtd->dev.parent;
+ struct mtk_nfc *nfc = nand_get_controller_data(chip);
+ struct mtk_nfc_nand_chip *mtk_nand = to_mtk_nand(chip);
+ int len;
+ int ret;
+
+ if (chip->options & NAND_BUSWIDTH_16) {
+ dev_err(dev, "16bits buswidth not supported");
+ return -EINVAL;
+ }
+
+ /* store bbt magic in page, cause OOB is not protected */
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ ret = mtk_nfc_ecc_init(dev, mtd);
+ if (ret)
+ return ret;
+
+ ret = mtk_nfc_set_spare_per_sector(&mtk_nand->spare_per_sector, mtd);
+ if (ret)
+ return ret;
+
+ mtk_nfc_set_fdm(&mtk_nand->fdm, mtd);
+ mtk_nfc_set_bad_mark_ctl(&mtk_nand->bad_mark, mtd);
+
+ len = mtd->writesize + mtd->oobsize;
+ nfc->buffer = devm_kzalloc(dev, len, GFP_KERNEL);
+ if (!nfc->buffer)
+ return -ENOMEM;
+
+ return 0;
+}
+
static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
struct device_node *np)
{
struct mtk_nfc_nand_chip *chip;
struct nand_chip *nand;
struct mtd_info *mtd;
- int nsels, len;
+ int nsels;
u32 tmp;
int ret;
int i;
@@ -1324,36 +1361,8 @@ static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
mtk_nfc_hw_init(nfc);
- ret = nand_scan_ident(mtd, nsels, NULL);
- if (ret)
- return ret;
-
- /* store bbt magic in page, cause OOB is not protected */
- if (nand->bbt_options & NAND_BBT_USE_FLASH)
- nand->bbt_options |= NAND_BBT_NO_OOB;
-
- ret = mtk_nfc_ecc_init(dev, mtd);
- if (ret)
- return -EINVAL;
-
- if (nand->options & NAND_BUSWIDTH_16) {
- dev_err(dev, "16bits buswidth not supported");
- return -EINVAL;
- }
-
- ret = mtk_nfc_set_spare_per_sector(&chip->spare_per_sector, mtd);
- if (ret)
- return ret;
-
- mtk_nfc_set_fdm(&chip->fdm, mtd);
- mtk_nfc_set_bad_mark_ctl(&chip->bad_mark, mtd);
-
- len = mtd->writesize + mtd->oobsize;
- nfc->buffer = devm_kzalloc(dev, len, GFP_KERNEL);
- if (!nfc->buffer)
- return -ENOMEM;
-
- ret = nand_scan_tail(mtd);
+ nand->ecc.attach_chip = mtk_nfc_attach_chip;
+ ret = nand_scan(mtd, nsels);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 28/52] mtd: rawnand: mxc: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/mxc_nand.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index 944ecf03d3b1..948fe3e9d8da 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -1911,15 +1911,18 @@ static int mxcnd_probe(struct platform_device *pdev)
goto escan;
/* Register the partitions */
- mtd_device_parse_register(mtd, part_probes,
- NULL,
- host->pdata.parts,
- host->pdata.nr_parts);
+ err = mtd_device_parse_register(mtd, part_probes, NULL,
+ host->pdata.parts,
+ host->pdata.nr_parts);
+ if (err)
+ goto release_nand;
platform_set_drvdata(pdev, host);
return 0;
+release_nand:
+ nand_release(mtd);
escan:
if (host->clk_act)
clk_disable_unprepare(host->clk);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 28/52] mtd: rawnand: mxc: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
The helper mtd_device_parse_register() returns an error code that should
be checked and nand_release() called accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/mxc_nand.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index 944ecf03d3b1..948fe3e9d8da 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -1911,15 +1911,18 @@ static int mxcnd_probe(struct platform_device *pdev)
goto escan;
/* Register the partitions */
- mtd_device_parse_register(mtd, part_probes,
- NULL,
- host->pdata.parts,
- host->pdata.nr_parts);
+ err = mtd_device_parse_register(mtd, part_probes, NULL,
+ host->pdata.parts,
+ host->pdata.nr_parts);
+ if (err)
+ goto release_nand;
platform_set_drvdata(pdev, host);
return 0;
+release_nand:
+ nand_release(mtd);
escan:
if (host->clk_act)
clk_disable_unprepare(host->clk);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 29/52] mtd: rawnand: mxc: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/mxc_nand.c | 132 ++++++++++++++++++++--------------------
1 file changed, 67 insertions(+), 65 deletions(-)
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index 948fe3e9d8da..585f5ce623c8 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -1703,6 +1703,70 @@ static int __init mxcnd_probe_dt(struct mxc_nand_host *host)
}
#endif
+static int mxcnd_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
+ struct device *dev = mtd->dev.parent;
+
+ switch (chip->ecc.mode) {
+ case NAND_ECC_HW:
+ chip->ecc.read_page = mxc_nand_read_page;
+ chip->ecc.read_page_raw = mxc_nand_read_page_raw;
+ chip->ecc.read_oob = mxc_nand_read_oob;
+ chip->ecc.write_page = mxc_nand_write_page_ecc;
+ chip->ecc.write_page_raw = mxc_nand_write_page_raw;
+ chip->ecc.write_oob = mxc_nand_write_oob;
+ break;
+
+ case NAND_ECC_SOFT:
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH) {
+ chip->bbt_td = &bbt_main_descr;
+ chip->bbt_md = &bbt_mirror_descr;
+ }
+
+ /* Allocate the right size buffer now */
+ devm_kfree(dev, (void *)host->data_buf);
+ host->data_buf = devm_kzalloc(dev, mtd->writesize + mtd->oobsize,
+ GFP_KERNEL);
+ if (!host->data_buf)
+ return -ENOMEM;
+
+ /* Call preset again, with correct writesize chip time */
+ host->devtype_data->preset(mtd);
+
+ if (!chip->ecc.bytes) {
+ if (host->eccsize == 8)
+ chip->ecc.bytes = 18;
+ else if (host->eccsize == 4)
+ chip->ecc.bytes = 9;
+ }
+
+ /*
+ * Experimentation shows that i.MX NFC can only handle up to 218 oob
+ * bytes. Limit used_oobsize to 218 so as to not confuse copy_spare()
+ * into copying invalid data to/from the spare IO buffer, as this
+ * might cause ECC data corruption when doing sub-page write to a
+ * partially written page.
+ */
+ host->used_oobsize = min(mtd->oobsize, 218U);
+
+ if (chip->ecc.mode == NAND_ECC_HW) {
+ if (is_imx21_nfc(host) || is_imx27_nfc(host))
+ chip->ecc.strength = 1;
+ else
+ chip->ecc.strength = (host->eccsize == 4) ? 4 : 8;
+ }
+
+ return 0;
+}
+
static int mxcnd_probe(struct platform_device *pdev)
{
struct nand_chip *this;
@@ -1842,71 +1906,9 @@ static int mxcnd_probe(struct platform_device *pdev)
host->devtype_data->irq_control(host, 1);
}
- /* first scan to find the device and get the page size */
- err = nand_scan_ident(mtd, is_imx25_nfc(host) ? 4 : 1, NULL);
- if (err)
- goto escan;
-
- switch (this->ecc.mode) {
- case NAND_ECC_HW:
- this->ecc.read_page = mxc_nand_read_page;
- this->ecc.read_page_raw = mxc_nand_read_page_raw;
- this->ecc.read_oob = mxc_nand_read_oob;
- this->ecc.write_page = mxc_nand_write_page_ecc;
- this->ecc.write_page_raw = mxc_nand_write_page_raw;
- this->ecc.write_oob = mxc_nand_write_oob;
- break;
-
- case NAND_ECC_SOFT:
- break;
-
- default:
- err = -EINVAL;
- goto escan;
- }
-
- if (this->bbt_options & NAND_BBT_USE_FLASH) {
- this->bbt_td = &bbt_main_descr;
- this->bbt_md = &bbt_mirror_descr;
- }
-
- /* allocate the right size buffer now */
- devm_kfree(&pdev->dev, (void *)host->data_buf);
- host->data_buf = devm_kzalloc(&pdev->dev, mtd->writesize + mtd->oobsize,
- GFP_KERNEL);
- if (!host->data_buf) {
- err = -ENOMEM;
- goto escan;
- }
-
- /* Call preset again, with correct writesize this time */
- host->devtype_data->preset(mtd);
-
- if (!this->ecc.bytes) {
- if (host->eccsize == 8)
- this->ecc.bytes = 18;
- else if (host->eccsize == 4)
- this->ecc.bytes = 9;
- }
-
- /*
- * Experimentation shows that i.MX NFC can only handle up to 218 oob
- * bytes. Limit used_oobsize to 218 so as to not confuse copy_spare()
- * into copying invalid data to/from the spare IO buffer, as this
- * might cause ECC data corruption when doing sub-page write to a
- * partially written page.
- */
- host->used_oobsize = min(mtd->oobsize, 218U);
-
- if (this->ecc.mode == NAND_ECC_HW) {
- if (is_imx21_nfc(host) || is_imx27_nfc(host))
- this->ecc.strength = 1;
- else
- this->ecc.strength = (host->eccsize == 4) ? 4 : 8;
- }
-
- /* second phase scan */
- err = nand_scan_tail(mtd);
+ /* Scan the NAND device */
+ this->ecc.attach_chip = mxcnd_attach_chip;
+ err = nand_scan(mtd, is_imx25_nfc(host) ? 4 : 1);
if (err)
goto escan;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 29/52] mtd: rawnand: mxc: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/mxc_nand.c | 132 ++++++++++++++++++++--------------------
1 file changed, 67 insertions(+), 65 deletions(-)
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index 948fe3e9d8da..585f5ce623c8 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -1703,6 +1703,70 @@ static int __init mxcnd_probe_dt(struct mxc_nand_host *host)
}
#endif
+static int mxcnd_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
+ struct device *dev = mtd->dev.parent;
+
+ switch (chip->ecc.mode) {
+ case NAND_ECC_HW:
+ chip->ecc.read_page = mxc_nand_read_page;
+ chip->ecc.read_page_raw = mxc_nand_read_page_raw;
+ chip->ecc.read_oob = mxc_nand_read_oob;
+ chip->ecc.write_page = mxc_nand_write_page_ecc;
+ chip->ecc.write_page_raw = mxc_nand_write_page_raw;
+ chip->ecc.write_oob = mxc_nand_write_oob;
+ break;
+
+ case NAND_ECC_SOFT:
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH) {
+ chip->bbt_td = &bbt_main_descr;
+ chip->bbt_md = &bbt_mirror_descr;
+ }
+
+ /* Allocate the right size buffer now */
+ devm_kfree(dev, (void *)host->data_buf);
+ host->data_buf = devm_kzalloc(dev, mtd->writesize + mtd->oobsize,
+ GFP_KERNEL);
+ if (!host->data_buf)
+ return -ENOMEM;
+
+ /* Call preset again, with correct writesize chip time */
+ host->devtype_data->preset(mtd);
+
+ if (!chip->ecc.bytes) {
+ if (host->eccsize == 8)
+ chip->ecc.bytes = 18;
+ else if (host->eccsize == 4)
+ chip->ecc.bytes = 9;
+ }
+
+ /*
+ * Experimentation shows that i.MX NFC can only handle up to 218 oob
+ * bytes. Limit used_oobsize to 218 so as to not confuse copy_spare()
+ * into copying invalid data to/from the spare IO buffer, as this
+ * might cause ECC data corruption when doing sub-page write to a
+ * partially written page.
+ */
+ host->used_oobsize = min(mtd->oobsize, 218U);
+
+ if (chip->ecc.mode == NAND_ECC_HW) {
+ if (is_imx21_nfc(host) || is_imx27_nfc(host))
+ chip->ecc.strength = 1;
+ else
+ chip->ecc.strength = (host->eccsize == 4) ? 4 : 8;
+ }
+
+ return 0;
+}
+
static int mxcnd_probe(struct platform_device *pdev)
{
struct nand_chip *this;
@@ -1842,71 +1906,9 @@ static int mxcnd_probe(struct platform_device *pdev)
host->devtype_data->irq_control(host, 1);
}
- /* first scan to find the device and get the page size */
- err = nand_scan_ident(mtd, is_imx25_nfc(host) ? 4 : 1, NULL);
- if (err)
- goto escan;
-
- switch (this->ecc.mode) {
- case NAND_ECC_HW:
- this->ecc.read_page = mxc_nand_read_page;
- this->ecc.read_page_raw = mxc_nand_read_page_raw;
- this->ecc.read_oob = mxc_nand_read_oob;
- this->ecc.write_page = mxc_nand_write_page_ecc;
- this->ecc.write_page_raw = mxc_nand_write_page_raw;
- this->ecc.write_oob = mxc_nand_write_oob;
- break;
-
- case NAND_ECC_SOFT:
- break;
-
- default:
- err = -EINVAL;
- goto escan;
- }
-
- if (this->bbt_options & NAND_BBT_USE_FLASH) {
- this->bbt_td = &bbt_main_descr;
- this->bbt_md = &bbt_mirror_descr;
- }
-
- /* allocate the right size buffer now */
- devm_kfree(&pdev->dev, (void *)host->data_buf);
- host->data_buf = devm_kzalloc(&pdev->dev, mtd->writesize + mtd->oobsize,
- GFP_KERNEL);
- if (!host->data_buf) {
- err = -ENOMEM;
- goto escan;
- }
-
- /* Call preset again, with correct writesize this time */
- host->devtype_data->preset(mtd);
-
- if (!this->ecc.bytes) {
- if (host->eccsize == 8)
- this->ecc.bytes = 18;
- else if (host->eccsize == 4)
- this->ecc.bytes = 9;
- }
-
- /*
- * Experimentation shows that i.MX NFC can only handle up to 218 oob
- * bytes. Limit used_oobsize to 218 so as to not confuse copy_spare()
- * into copying invalid data to/from the spare IO buffer, as this
- * might cause ECC data corruption when doing sub-page write to a
- * partially written page.
- */
- host->used_oobsize = min(mtd->oobsize, 218U);
-
- if (this->ecc.mode == NAND_ECC_HW) {
- if (is_imx21_nfc(host) || is_imx27_nfc(host))
- this->ecc.strength = 1;
- else
- this->ecc.strength = (host->eccsize == 4) ? 4 : 8;
- }
-
- /* second phase scan */
- err = nand_scan_tail(mtd);
+ /* Scan the NAND device */
+ this->ecc.attach_chip = mxcnd_attach_chip;
+ err = nand_scan(mtd, is_imx25_nfc(host) ? 4 : 1);
if (err)
goto escan;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 30/52] mtd: rawnand: nandsim: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nandsim.c | 78 ++++++++++++++++++++++--------------------
1 file changed, 41 insertions(+), 37 deletions(-)
diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c
index 44322a363ba5..b3b502c9e9e4 100644
--- a/drivers/mtd/nand/raw/nandsim.c
+++ b/drivers/mtd/nand/raw/nandsim.c
@@ -2192,6 +2192,44 @@ static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
return;
}
+static int ns_attach_chip(struct nand_chip *chip)
+{
+ unsigned int eccsteps, eccbytes;
+
+ if (!bch)
+ return 0;
+
+ if (!mtd_nand_has_bch()) {
+ NS_ERR("BCH ECC support is disabled\n");
+ return -EINVAL;
+ }
+
+ /* Use 512-byte ecc blocks */
+ eccsteps = nsmtd->writesize / 512;
+ eccbytes = ((bch * 13) + 7) / 8;
+
+ /* Do not bother supporting small page devices */
+ if (nsmtd->oobsize < 64 || !eccsteps) {
+ NS_ERR("BCH not available on small page devices\n");
+ return -EINVAL;
+ }
+
+ if (((eccbytes * eccsteps) + 2) > nsmtd->oobsize) {
+ NS_ERR("Invalid BCH value %u\n", bch);
+ return -EINVAL;
+ }
+
+ chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.algo = NAND_ECC_BCH;
+ chip->ecc.size = 512;
+ chip->ecc.strength = bch;
+ chip->ecc.bytes = eccbytes;
+
+ NS_INFO("Using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
+
+ return 0;
+}
+
/*
* Module initialization function
*/
@@ -2276,44 +2314,10 @@ static int __init ns_init_module(void)
if ((retval = parse_gravepages()) != 0)
goto error;
- retval = nand_scan_ident(nsmtd, 1, NULL);
+ chip->ecc.attach_chip = ns_attach_chip;
+ retval = nand_scan(nsmtd, 1);
if (retval) {
- NS_ERR("cannot scan NAND Simulator device\n");
- goto error;
- }
-
- if (bch) {
- unsigned int eccsteps, eccbytes;
- if (!mtd_nand_has_bch()) {
- NS_ERR("BCH ECC support is disabled\n");
- retval = -EINVAL;
- goto error;
- }
- /* use 512-byte ecc blocks */
- eccsteps = nsmtd->writesize/512;
- eccbytes = (bch*13+7)/8;
- /* do not bother supporting small page devices */
- if ((nsmtd->oobsize < 64) || !eccsteps) {
- NS_ERR("bch not available on small page devices\n");
- retval = -EINVAL;
- goto error;
- }
- if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
- NS_ERR("invalid bch value %u\n", bch);
- retval = -EINVAL;
- goto error;
- }
- chip->ecc.mode = NAND_ECC_SOFT;
- chip->ecc.algo = NAND_ECC_BCH;
- chip->ecc.size = 512;
- chip->ecc.strength = bch;
- chip->ecc.bytes = eccbytes;
- NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
- }
-
- retval = nand_scan_tail(nsmtd);
- if (retval) {
- NS_ERR("can't register NAND Simulator\n");
+ NS_ERR("Could not scan NAND Simulator device\n");
goto error;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 30/52] mtd: rawnand: nandsim: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nandsim.c | 78 ++++++++++++++++++++++--------------------
1 file changed, 41 insertions(+), 37 deletions(-)
diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c
index 44322a363ba5..b3b502c9e9e4 100644
--- a/drivers/mtd/nand/raw/nandsim.c
+++ b/drivers/mtd/nand/raw/nandsim.c
@@ -2192,6 +2192,44 @@ static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
return;
}
+static int ns_attach_chip(struct nand_chip *chip)
+{
+ unsigned int eccsteps, eccbytes;
+
+ if (!bch)
+ return 0;
+
+ if (!mtd_nand_has_bch()) {
+ NS_ERR("BCH ECC support is disabled\n");
+ return -EINVAL;
+ }
+
+ /* Use 512-byte ecc blocks */
+ eccsteps = nsmtd->writesize / 512;
+ eccbytes = ((bch * 13) + 7) / 8;
+
+ /* Do not bother supporting small page devices */
+ if (nsmtd->oobsize < 64 || !eccsteps) {
+ NS_ERR("BCH not available on small page devices\n");
+ return -EINVAL;
+ }
+
+ if (((eccbytes * eccsteps) + 2) > nsmtd->oobsize) {
+ NS_ERR("Invalid BCH value %u\n", bch);
+ return -EINVAL;
+ }
+
+ chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.algo = NAND_ECC_BCH;
+ chip->ecc.size = 512;
+ chip->ecc.strength = bch;
+ chip->ecc.bytes = eccbytes;
+
+ NS_INFO("Using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
+
+ return 0;
+}
+
/*
* Module initialization function
*/
@@ -2276,44 +2314,10 @@ static int __init ns_init_module(void)
if ((retval = parse_gravepages()) != 0)
goto error;
- retval = nand_scan_ident(nsmtd, 1, NULL);
+ chip->ecc.attach_chip = ns_attach_chip;
+ retval = nand_scan(nsmtd, 1);
if (retval) {
- NS_ERR("cannot scan NAND Simulator device\n");
- goto error;
- }
-
- if (bch) {
- unsigned int eccsteps, eccbytes;
- if (!mtd_nand_has_bch()) {
- NS_ERR("BCH ECC support is disabled\n");
- retval = -EINVAL;
- goto error;
- }
- /* use 512-byte ecc blocks */
- eccsteps = nsmtd->writesize/512;
- eccbytes = (bch*13+7)/8;
- /* do not bother supporting small page devices */
- if ((nsmtd->oobsize < 64) || !eccsteps) {
- NS_ERR("bch not available on small page devices\n");
- retval = -EINVAL;
- goto error;
- }
- if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
- NS_ERR("invalid bch value %u\n", bch);
- retval = -EINVAL;
- goto error;
- }
- chip->ecc.mode = NAND_ECC_SOFT;
- chip->ecc.algo = NAND_ECC_BCH;
- chip->ecc.size = 512;
- chip->ecc.strength = bch;
- chip->ecc.bytes = eccbytes;
- NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
- }
-
- retval = nand_scan_tail(nsmtd);
- if (retval) {
- NS_ERR("can't register NAND Simulator\n");
+ NS_ERR("Could not scan NAND Simulator device\n");
goto error;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 31/52] mtd: rawnand: omap2: fix the probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() call should trigger a nand_release()
call. This is rightly handled in the remove function, but not in the
probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/omap2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c
index 8cdf7d3d8fa7..88c43334d777 100644
--- a/drivers/mtd/nand/raw/omap2.c
+++ b/drivers/mtd/nand/raw/omap2.c
@@ -2263,12 +2263,14 @@ static int omap_nand_probe(struct platform_device *pdev)
err = mtd_device_register(mtd, NULL, 0);
if (err)
- goto return_error;
+ goto release_nand;
platform_set_drvdata(pdev, mtd);
return 0;
+release_nand:
+ nand_release(mtd);
return_error:
if (!IS_ERR_OR_NULL(info->dma))
dma_release_channel(info->dma);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 31/52] mtd: rawnand: omap2: fix the probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() call should trigger a nand_release()
call. This is rightly handled in the remove function, but not in the
probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/omap2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c
index 8cdf7d3d8fa7..88c43334d777 100644
--- a/drivers/mtd/nand/raw/omap2.c
+++ b/drivers/mtd/nand/raw/omap2.c
@@ -2263,12 +2263,14 @@ static int omap_nand_probe(struct platform_device *pdev)
err = mtd_device_register(mtd, NULL, 0);
if (err)
- goto return_error;
+ goto release_nand;
platform_set_drvdata(pdev, mtd);
return 0;
+release_nand:
+ nand_release(mtd);
return_error:
if (!IS_ERR_OR_NULL(info->dma))
dma_release_channel(info->dma);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 32/52] mtd: rawnand: omap2: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/omap2.c | 517 +++++++++++++++++++++----------------------
1 file changed, 255 insertions(+), 262 deletions(-)
diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c
index 88c43334d777..4d7a2ccb0725 100644
--- a/drivers/mtd/nand/raw/omap2.c
+++ b/drivers/mtd/nand/raw/omap2.c
@@ -1915,17 +1915,267 @@ static const struct mtd_ooblayout_ops omap_sw_ooblayout_ops = {
.free = omap_sw_ooblayout_free,
};
+static int omap_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct omap_nand_info *info = mtd_to_omap(mtd);
+ struct device *dev = &info->pdev->dev;
+ int min_oobbytes = BADBLOCK_MARKER_LENGTH;
+ int oobbytes_per_step;
+ dma_cap_mask_t mask;
+ int err;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+ else
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ /* Re-populate low-level callbacks based on xfer modes */
+ switch (info->xfer_type) {
+ case NAND_OMAP_PREFETCH_POLLED:
+ chip->read_buf = omap_read_buf_pref;
+ chip->write_buf = omap_write_buf_pref;
+ break;
+
+ case NAND_OMAP_POLLED:
+ /* Use nand_base defaults for {read,write}_buf */
+ break;
+
+ case NAND_OMAP_PREFETCH_DMA:
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+ info->dma = dma_request_chan(dev, "rxtx");
+
+ if (IS_ERR(info->dma)) {
+ dev_err(dev, "DMA engine request failed\n");
+ return PTR_ERR(info->dma);
+ } else {
+ struct dma_slave_config cfg;
+
+ memset(&cfg, 0, sizeof(cfg));
+ cfg.src_addr = info->phys_base;
+ cfg.dst_addr = info->phys_base;
+ cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ cfg.src_maxburst = 16;
+ cfg.dst_maxburst = 16;
+ err = dmaengine_slave_config(info->dma, &cfg);
+ if (err) {
+ dev_err(dev,
+ "DMA engine slave config failed: %d\n",
+ err);
+ return err;
+ }
+ chip->read_buf = omap_read_buf_dma_pref;
+ chip->write_buf = omap_write_buf_dma_pref;
+ }
+ break;
+
+ case NAND_OMAP_PREFETCH_IRQ:
+ info->gpmc_irq_fifo = platform_get_irq(info->pdev, 0);
+ if (info->gpmc_irq_fifo <= 0) {
+ dev_err(dev, "Error getting fifo IRQ\n");
+ return -ENODEV;
+ }
+ err = devm_request_irq(dev, info->gpmc_irq_fifo,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-fifo", info);
+ if (err) {
+ dev_err(dev, "Requesting IRQ %d, error %d\n",
+ info->gpmc_irq_fifo, err);
+ info->gpmc_irq_fifo = 0;
+ return err;
+ }
+
+ info->gpmc_irq_count = platform_get_irq(info->pdev, 1);
+ if (info->gpmc_irq_count <= 0) {
+ dev_err(dev, "Error getting IRQ count\n");
+ return -ENODEV;
+ }
+ err = devm_request_irq(dev, info->gpmc_irq_count,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-count", info);
+ if (err) {
+ dev_err(dev, "Requesting IRQ %d, error %d\n",
+ info->gpmc_irq_count, err);
+ info->gpmc_irq_count = 0;
+ return err;
+ }
+
+ chip->read_buf = omap_read_buf_irq_pref;
+ chip->write_buf = omap_write_buf_irq_pref;
+
+ break;
+
+ default:
+ dev_err(dev, "xfer_type %d not supported!\n", info->xfer_type);
+ return -EINVAL;
+ }
+
+ if (!omap2_nand_ecc_check(info))
+ return -EINVAL;
+
+ /*
+ * Bail out earlier to let NAND_ECC_SOFT code create its own
+ * ooblayout instead of using ours.
+ */
+ if (info->ecc_opt == OMAP_ECC_HAM1_CODE_SW) {
+ chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.algo = NAND_ECC_HAMMING;
+ return 0;
+ }
+
+ /* Populate MTD interface based on ECC scheme */
+ switch (info->ecc_opt) {
+ case OMAP_ECC_HAM1_CODE_HW:
+ dev_info(dev, "nand: using OMAP_ECC_HAM1_CODE_HW\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.bytes = 3;
+ chip->ecc.size = 512;
+ chip->ecc.strength = 1;
+ chip->ecc.calculate = omap_calculate_ecc;
+ chip->ecc.hwctl = omap_enable_hwecc;
+ chip->ecc.correct = omap_correct_data;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ if (!(chip->options & NAND_BUSWIDTH_16))
+ min_oobbytes = 1;
+
+ break;
+
+ case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW_DETECTION_SW\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 7;
+ chip->ecc.strength = 4;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = nand_bch_correct_data;
+ chip->ecc.calculate = omap_calculate_ecc_bch_sw;
+ mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
+ /* Reserve one byte for the OMAP marker */
+ oobbytes_per_step = chip->ecc.bytes + 1;
+ /* Software BCH library is used for locating errors */
+ chip->ecc.priv = nand_bch_init(mtd);
+ if (!chip->ecc.priv) {
+ dev_err(dev, "Unable to use BCH library\n");
+ return -EINVAL;
+ }
+ break;
+
+ case OMAP_ECC_BCH4_CODE_HW:
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW ECC scheme\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ chip->ecc.bytes = 7 + 1;
+ chip->ecc.strength = 4;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = omap_elm_correct_data;
+ chip->ecc.read_page = omap_read_page_bch;
+ chip->ecc.write_page = omap_write_page_bch;
+ chip->ecc.write_subpage = omap_write_subpage_bch;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ err = elm_config(info->elm_dev, BCH4_ECC,
+ mtd->writesize / chip->ecc.size,
+ chip->ecc.size, chip->ecc.bytes);
+ if (err < 0)
+ return err;
+ break;
+
+ case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 13;
+ chip->ecc.strength = 8;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = nand_bch_correct_data;
+ chip->ecc.calculate = omap_calculate_ecc_bch_sw;
+ mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
+ /* Reserve one byte for the OMAP marker */
+ oobbytes_per_step = chip->ecc.bytes + 1;
+ /* Software BCH library is used for locating errors */
+ chip->ecc.priv = nand_bch_init(mtd);
+ if (!chip->ecc.priv) {
+ dev_err(dev, "unable to use BCH library\n");
+ return -EINVAL;
+ }
+ break;
+
+ case OMAP_ECC_BCH8_CODE_HW:
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ chip->ecc.bytes = 13 + 1;
+ chip->ecc.strength = 8;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = omap_elm_correct_data;
+ chip->ecc.read_page = omap_read_page_bch;
+ chip->ecc.write_page = omap_write_page_bch;
+ chip->ecc.write_subpage = omap_write_subpage_bch;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ err = elm_config(info->elm_dev, BCH8_ECC,
+ mtd->writesize / chip->ecc.size,
+ chip->ecc.size, chip->ecc.bytes);
+ if (err < 0)
+ return err;
+
+ break;
+
+ case OMAP_ECC_BCH16_CODE_HW:
+ pr_info("Using OMAP_ECC_BCH16_CODE_HW ECC scheme\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 26;
+ chip->ecc.strength = 16;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = omap_elm_correct_data;
+ chip->ecc.read_page = omap_read_page_bch;
+ chip->ecc.write_page = omap_write_page_bch;
+ chip->ecc.write_subpage = omap_write_subpage_bch;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ err = elm_config(info->elm_dev, BCH16_ECC,
+ mtd->writesize / chip->ecc.size,
+ chip->ecc.size, chip->ecc.bytes);
+ if (err < 0)
+ return err;
+
+ break;
+ default:
+ dev_err(dev, "Invalid or unsupported ECC scheme\n");
+ return -EINVAL;
+ }
+
+ /* Check if NAND device's OOB is enough to store ECC signatures */
+ min_oobbytes += (oobbytes_per_step *
+ (mtd->writesize / chip->ecc.size));
+ if (mtd->oobsize < min_oobbytes) {
+ dev_err(dev,
+ "Not enough OOB bytes: required = %d, available=%d\n",
+ min_oobbytes, mtd->oobsize);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
struct mtd_info *mtd;
struct nand_chip *nand_chip;
int err;
- dma_cap_mask_t mask;
struct resource *res;
struct device *dev = &pdev->dev;
- int min_oobbytes = BADBLOCK_MARKER_LENGTH;
- int oobbytes_per_step;
info = devm_kzalloc(&pdev->dev, sizeof(struct omap_nand_info),
GFP_KERNEL);
@@ -1998,266 +2248,9 @@ static int omap_nand_probe(struct platform_device *pdev)
/* scan NAND device connected to chip controller */
nand_chip->options |= info->devsize & NAND_BUSWIDTH_16;
- err = nand_scan_ident(mtd, 1, NULL);
- if (err) {
- dev_err(&info->pdev->dev,
- "scan failed, may be bus-width mismatch\n");
- goto return_error;
- }
- if (nand_chip->bbt_options & NAND_BBT_USE_FLASH)
- nand_chip->bbt_options |= NAND_BBT_NO_OOB;
- else
- nand_chip->options |= NAND_SKIP_BBTSCAN;
-
- /* re-populate low-level callbacks based on xfer modes */
- switch (info->xfer_type) {
- case NAND_OMAP_PREFETCH_POLLED:
- nand_chip->read_buf = omap_read_buf_pref;
- nand_chip->write_buf = omap_write_buf_pref;
- break;
-
- case NAND_OMAP_POLLED:
- /* Use nand_base defaults for {read,write}_buf */
- break;
-
- case NAND_OMAP_PREFETCH_DMA:
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
- info->dma = dma_request_chan(pdev->dev.parent, "rxtx");
-
- if (IS_ERR(info->dma)) {
- dev_err(&pdev->dev, "DMA engine request failed\n");
- err = PTR_ERR(info->dma);
- goto return_error;
- } else {
- struct dma_slave_config cfg;
-
- memset(&cfg, 0, sizeof(cfg));
- cfg.src_addr = info->phys_base;
- cfg.dst_addr = info->phys_base;
- cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- cfg.src_maxburst = 16;
- cfg.dst_maxburst = 16;
- err = dmaengine_slave_config(info->dma, &cfg);
- if (err) {
- dev_err(&pdev->dev, "DMA engine slave config failed: %d\n",
- err);
- goto return_error;
- }
- nand_chip->read_buf = omap_read_buf_dma_pref;
- nand_chip->write_buf = omap_write_buf_dma_pref;
- }
- break;
-
- case NAND_OMAP_PREFETCH_IRQ:
- info->gpmc_irq_fifo = platform_get_irq(pdev, 0);
- if (info->gpmc_irq_fifo <= 0) {
- dev_err(&pdev->dev, "error getting fifo irq\n");
- err = -ENODEV;
- goto return_error;
- }
- err = devm_request_irq(&pdev->dev, info->gpmc_irq_fifo,
- omap_nand_irq, IRQF_SHARED,
- "gpmc-nand-fifo", info);
- if (err) {
- dev_err(&pdev->dev, "requesting irq(%d) error:%d",
- info->gpmc_irq_fifo, err);
- info->gpmc_irq_fifo = 0;
- goto return_error;
- }
-
- info->gpmc_irq_count = platform_get_irq(pdev, 1);
- if (info->gpmc_irq_count <= 0) {
- dev_err(&pdev->dev, "error getting count irq\n");
- err = -ENODEV;
- goto return_error;
- }
- err = devm_request_irq(&pdev->dev, info->gpmc_irq_count,
- omap_nand_irq, IRQF_SHARED,
- "gpmc-nand-count", info);
- if (err) {
- dev_err(&pdev->dev, "requesting irq(%d) error:%d",
- info->gpmc_irq_count, err);
- info->gpmc_irq_count = 0;
- goto return_error;
- }
-
- nand_chip->read_buf = omap_read_buf_irq_pref;
- nand_chip->write_buf = omap_write_buf_irq_pref;
-
- break;
-
- default:
- dev_err(&pdev->dev,
- "xfer_type(%d) not supported!\n", info->xfer_type);
- err = -EINVAL;
- goto return_error;
- }
-
- if (!omap2_nand_ecc_check(info)) {
- err = -EINVAL;
- goto return_error;
- }
-
- /*
- * Bail out earlier to let NAND_ECC_SOFT code create its own
- * ooblayout instead of using ours.
- */
- if (info->ecc_opt == OMAP_ECC_HAM1_CODE_SW) {
- nand_chip->ecc.mode = NAND_ECC_SOFT;
- nand_chip->ecc.algo = NAND_ECC_HAMMING;
- goto scan_tail;
- }
-
- /* populate MTD interface based on ECC scheme */
- switch (info->ecc_opt) {
- case OMAP_ECC_HAM1_CODE_HW:
- pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.bytes = 3;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.strength = 1;
- nand_chip->ecc.calculate = omap_calculate_ecc;
- nand_chip->ecc.hwctl = omap_enable_hwecc;
- nand_chip->ecc.correct = omap_correct_data;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- if (!(nand_chip->options & NAND_BUSWIDTH_16))
- min_oobbytes = 1;
-
- break;
-
- case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
- pr_info("nand: using OMAP_ECC_BCH4_CODE_HW_DETECTION_SW\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.bytes = 7;
- nand_chip->ecc.strength = 4;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = nand_bch_correct_data;
- nand_chip->ecc.calculate = omap_calculate_ecc_bch_sw;
- mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
- /* Reserve one byte for the OMAP marker */
- oobbytes_per_step = nand_chip->ecc.bytes + 1;
- /* software bch library is used for locating errors */
- nand_chip->ecc.priv = nand_bch_init(mtd);
- if (!nand_chip->ecc.priv) {
- dev_err(&info->pdev->dev, "unable to use BCH library\n");
- err = -EINVAL;
- goto return_error;
- }
- break;
-
- case OMAP_ECC_BCH4_CODE_HW:
- pr_info("nand: using OMAP_ECC_BCH4_CODE_HW ECC scheme\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- /* 14th bit is kept reserved for ROM-code compatibility */
- nand_chip->ecc.bytes = 7 + 1;
- nand_chip->ecc.strength = 4;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = omap_elm_correct_data;
- nand_chip->ecc.read_page = omap_read_page_bch;
- nand_chip->ecc.write_page = omap_write_page_bch;
- nand_chip->ecc.write_subpage = omap_write_subpage_bch;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- err = elm_config(info->elm_dev, BCH4_ECC,
- mtd->writesize / nand_chip->ecc.size,
- nand_chip->ecc.size, nand_chip->ecc.bytes);
- if (err < 0)
- goto return_error;
- break;
-
- case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
- pr_info("nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.bytes = 13;
- nand_chip->ecc.strength = 8;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = nand_bch_correct_data;
- nand_chip->ecc.calculate = omap_calculate_ecc_bch_sw;
- mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
- /* Reserve one byte for the OMAP marker */
- oobbytes_per_step = nand_chip->ecc.bytes + 1;
- /* software bch library is used for locating errors */
- nand_chip->ecc.priv = nand_bch_init(mtd);
- if (!nand_chip->ecc.priv) {
- dev_err(&info->pdev->dev, "unable to use BCH library\n");
- err = -EINVAL;
- goto return_error;
- }
- break;
-
- case OMAP_ECC_BCH8_CODE_HW:
- pr_info("nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- /* 14th bit is kept reserved for ROM-code compatibility */
- nand_chip->ecc.bytes = 13 + 1;
- nand_chip->ecc.strength = 8;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = omap_elm_correct_data;
- nand_chip->ecc.read_page = omap_read_page_bch;
- nand_chip->ecc.write_page = omap_write_page_bch;
- nand_chip->ecc.write_subpage = omap_write_subpage_bch;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- err = elm_config(info->elm_dev, BCH8_ECC,
- mtd->writesize / nand_chip->ecc.size,
- nand_chip->ecc.size, nand_chip->ecc.bytes);
- if (err < 0)
- goto return_error;
-
- break;
-
- case OMAP_ECC_BCH16_CODE_HW:
- pr_info("using OMAP_ECC_BCH16_CODE_HW ECC scheme\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.bytes = 26;
- nand_chip->ecc.strength = 16;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = omap_elm_correct_data;
- nand_chip->ecc.read_page = omap_read_page_bch;
- nand_chip->ecc.write_page = omap_write_page_bch;
- nand_chip->ecc.write_subpage = omap_write_subpage_bch;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- err = elm_config(info->elm_dev, BCH16_ECC,
- mtd->writesize / nand_chip->ecc.size,
- nand_chip->ecc.size, nand_chip->ecc.bytes);
- if (err < 0)
- goto return_error;
-
- break;
- default:
- dev_err(&info->pdev->dev, "invalid or unsupported ECC scheme\n");
- err = -EINVAL;
- goto return_error;
- }
-
- /* check if NAND device's OOB is enough to store ECC signatures */
- min_oobbytes += (oobbytes_per_step *
- (mtd->writesize / nand_chip->ecc.size));
- if (mtd->oobsize < min_oobbytes) {
- dev_err(&info->pdev->dev,
- "not enough OOB bytes required = %d, available=%d\n",
- min_oobbytes, mtd->oobsize);
- err = -EINVAL;
- goto return_error;
- }
-
-scan_tail:
- /* second phase scan */
- err = nand_scan_tail(mtd);
+ nand_chip->ecc.attach_chip = omap_nand_attach_chip;
+ err = nand_scan(mtd, 1);
if (err)
goto return_error;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 32/52] mtd: rawnand: omap2: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/omap2.c | 517 +++++++++++++++++++++----------------------
1 file changed, 255 insertions(+), 262 deletions(-)
diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c
index 88c43334d777..4d7a2ccb0725 100644
--- a/drivers/mtd/nand/raw/omap2.c
+++ b/drivers/mtd/nand/raw/omap2.c
@@ -1915,17 +1915,267 @@ static const struct mtd_ooblayout_ops omap_sw_ooblayout_ops = {
.free = omap_sw_ooblayout_free,
};
+static int omap_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct omap_nand_info *info = mtd_to_omap(mtd);
+ struct device *dev = &info->pdev->dev;
+ int min_oobbytes = BADBLOCK_MARKER_LENGTH;
+ int oobbytes_per_step;
+ dma_cap_mask_t mask;
+ int err;
+
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+ else
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ /* Re-populate low-level callbacks based on xfer modes */
+ switch (info->xfer_type) {
+ case NAND_OMAP_PREFETCH_POLLED:
+ chip->read_buf = omap_read_buf_pref;
+ chip->write_buf = omap_write_buf_pref;
+ break;
+
+ case NAND_OMAP_POLLED:
+ /* Use nand_base defaults for {read,write}_buf */
+ break;
+
+ case NAND_OMAP_PREFETCH_DMA:
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+ info->dma = dma_request_chan(dev, "rxtx");
+
+ if (IS_ERR(info->dma)) {
+ dev_err(dev, "DMA engine request failed\n");
+ return PTR_ERR(info->dma);
+ } else {
+ struct dma_slave_config cfg;
+
+ memset(&cfg, 0, sizeof(cfg));
+ cfg.src_addr = info->phys_base;
+ cfg.dst_addr = info->phys_base;
+ cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ cfg.src_maxburst = 16;
+ cfg.dst_maxburst = 16;
+ err = dmaengine_slave_config(info->dma, &cfg);
+ if (err) {
+ dev_err(dev,
+ "DMA engine slave config failed: %d\n",
+ err);
+ return err;
+ }
+ chip->read_buf = omap_read_buf_dma_pref;
+ chip->write_buf = omap_write_buf_dma_pref;
+ }
+ break;
+
+ case NAND_OMAP_PREFETCH_IRQ:
+ info->gpmc_irq_fifo = platform_get_irq(info->pdev, 0);
+ if (info->gpmc_irq_fifo <= 0) {
+ dev_err(dev, "Error getting fifo IRQ\n");
+ return -ENODEV;
+ }
+ err = devm_request_irq(dev, info->gpmc_irq_fifo,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-fifo", info);
+ if (err) {
+ dev_err(dev, "Requesting IRQ %d, error %d\n",
+ info->gpmc_irq_fifo, err);
+ info->gpmc_irq_fifo = 0;
+ return err;
+ }
+
+ info->gpmc_irq_count = platform_get_irq(info->pdev, 1);
+ if (info->gpmc_irq_count <= 0) {
+ dev_err(dev, "Error getting IRQ count\n");
+ return -ENODEV;
+ }
+ err = devm_request_irq(dev, info->gpmc_irq_count,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-count", info);
+ if (err) {
+ dev_err(dev, "Requesting IRQ %d, error %d\n",
+ info->gpmc_irq_count, err);
+ info->gpmc_irq_count = 0;
+ return err;
+ }
+
+ chip->read_buf = omap_read_buf_irq_pref;
+ chip->write_buf = omap_write_buf_irq_pref;
+
+ break;
+
+ default:
+ dev_err(dev, "xfer_type %d not supported!\n", info->xfer_type);
+ return -EINVAL;
+ }
+
+ if (!omap2_nand_ecc_check(info))
+ return -EINVAL;
+
+ /*
+ * Bail out earlier to let NAND_ECC_SOFT code create its own
+ * ooblayout instead of using ours.
+ */
+ if (info->ecc_opt == OMAP_ECC_HAM1_CODE_SW) {
+ chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.algo = NAND_ECC_HAMMING;
+ return 0;
+ }
+
+ /* Populate MTD interface based on ECC scheme */
+ switch (info->ecc_opt) {
+ case OMAP_ECC_HAM1_CODE_HW:
+ dev_info(dev, "nand: using OMAP_ECC_HAM1_CODE_HW\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.bytes = 3;
+ chip->ecc.size = 512;
+ chip->ecc.strength = 1;
+ chip->ecc.calculate = omap_calculate_ecc;
+ chip->ecc.hwctl = omap_enable_hwecc;
+ chip->ecc.correct = omap_correct_data;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ if (!(chip->options & NAND_BUSWIDTH_16))
+ min_oobbytes = 1;
+
+ break;
+
+ case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW_DETECTION_SW\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 7;
+ chip->ecc.strength = 4;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = nand_bch_correct_data;
+ chip->ecc.calculate = omap_calculate_ecc_bch_sw;
+ mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
+ /* Reserve one byte for the OMAP marker */
+ oobbytes_per_step = chip->ecc.bytes + 1;
+ /* Software BCH library is used for locating errors */
+ chip->ecc.priv = nand_bch_init(mtd);
+ if (!chip->ecc.priv) {
+ dev_err(dev, "Unable to use BCH library\n");
+ return -EINVAL;
+ }
+ break;
+
+ case OMAP_ECC_BCH4_CODE_HW:
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW ECC scheme\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ chip->ecc.bytes = 7 + 1;
+ chip->ecc.strength = 4;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = omap_elm_correct_data;
+ chip->ecc.read_page = omap_read_page_bch;
+ chip->ecc.write_page = omap_write_page_bch;
+ chip->ecc.write_subpage = omap_write_subpage_bch;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ err = elm_config(info->elm_dev, BCH4_ECC,
+ mtd->writesize / chip->ecc.size,
+ chip->ecc.size, chip->ecc.bytes);
+ if (err < 0)
+ return err;
+ break;
+
+ case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 13;
+ chip->ecc.strength = 8;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = nand_bch_correct_data;
+ chip->ecc.calculate = omap_calculate_ecc_bch_sw;
+ mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
+ /* Reserve one byte for the OMAP marker */
+ oobbytes_per_step = chip->ecc.bytes + 1;
+ /* Software BCH library is used for locating errors */
+ chip->ecc.priv = nand_bch_init(mtd);
+ if (!chip->ecc.priv) {
+ dev_err(dev, "unable to use BCH library\n");
+ return -EINVAL;
+ }
+ break;
+
+ case OMAP_ECC_BCH8_CODE_HW:
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ chip->ecc.bytes = 13 + 1;
+ chip->ecc.strength = 8;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = omap_elm_correct_data;
+ chip->ecc.read_page = omap_read_page_bch;
+ chip->ecc.write_page = omap_write_page_bch;
+ chip->ecc.write_subpage = omap_write_subpage_bch;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ err = elm_config(info->elm_dev, BCH8_ECC,
+ mtd->writesize / chip->ecc.size,
+ chip->ecc.size, chip->ecc.bytes);
+ if (err < 0)
+ return err;
+
+ break;
+
+ case OMAP_ECC_BCH16_CODE_HW:
+ pr_info("Using OMAP_ECC_BCH16_CODE_HW ECC scheme\n");
+ chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 26;
+ chip->ecc.strength = 16;
+ chip->ecc.hwctl = omap_enable_hwecc_bch;
+ chip->ecc.correct = omap_elm_correct_data;
+ chip->ecc.read_page = omap_read_page_bch;
+ chip->ecc.write_page = omap_write_page_bch;
+ chip->ecc.write_subpage = omap_write_subpage_bch;
+ mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
+ oobbytes_per_step = chip->ecc.bytes;
+
+ err = elm_config(info->elm_dev, BCH16_ECC,
+ mtd->writesize / chip->ecc.size,
+ chip->ecc.size, chip->ecc.bytes);
+ if (err < 0)
+ return err;
+
+ break;
+ default:
+ dev_err(dev, "Invalid or unsupported ECC scheme\n");
+ return -EINVAL;
+ }
+
+ /* Check if NAND device's OOB is enough to store ECC signatures */
+ min_oobbytes += (oobbytes_per_step *
+ (mtd->writesize / chip->ecc.size));
+ if (mtd->oobsize < min_oobbytes) {
+ dev_err(dev,
+ "Not enough OOB bytes: required = %d, available=%d\n",
+ min_oobbytes, mtd->oobsize);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
struct mtd_info *mtd;
struct nand_chip *nand_chip;
int err;
- dma_cap_mask_t mask;
struct resource *res;
struct device *dev = &pdev->dev;
- int min_oobbytes = BADBLOCK_MARKER_LENGTH;
- int oobbytes_per_step;
info = devm_kzalloc(&pdev->dev, sizeof(struct omap_nand_info),
GFP_KERNEL);
@@ -1998,266 +2248,9 @@ static int omap_nand_probe(struct platform_device *pdev)
/* scan NAND device connected to chip controller */
nand_chip->options |= info->devsize & NAND_BUSWIDTH_16;
- err = nand_scan_ident(mtd, 1, NULL);
- if (err) {
- dev_err(&info->pdev->dev,
- "scan failed, may be bus-width mismatch\n");
- goto return_error;
- }
- if (nand_chip->bbt_options & NAND_BBT_USE_FLASH)
- nand_chip->bbt_options |= NAND_BBT_NO_OOB;
- else
- nand_chip->options |= NAND_SKIP_BBTSCAN;
-
- /* re-populate low-level callbacks based on xfer modes */
- switch (info->xfer_type) {
- case NAND_OMAP_PREFETCH_POLLED:
- nand_chip->read_buf = omap_read_buf_pref;
- nand_chip->write_buf = omap_write_buf_pref;
- break;
-
- case NAND_OMAP_POLLED:
- /* Use nand_base defaults for {read,write}_buf */
- break;
-
- case NAND_OMAP_PREFETCH_DMA:
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
- info->dma = dma_request_chan(pdev->dev.parent, "rxtx");
-
- if (IS_ERR(info->dma)) {
- dev_err(&pdev->dev, "DMA engine request failed\n");
- err = PTR_ERR(info->dma);
- goto return_error;
- } else {
- struct dma_slave_config cfg;
-
- memset(&cfg, 0, sizeof(cfg));
- cfg.src_addr = info->phys_base;
- cfg.dst_addr = info->phys_base;
- cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- cfg.src_maxburst = 16;
- cfg.dst_maxburst = 16;
- err = dmaengine_slave_config(info->dma, &cfg);
- if (err) {
- dev_err(&pdev->dev, "DMA engine slave config failed: %d\n",
- err);
- goto return_error;
- }
- nand_chip->read_buf = omap_read_buf_dma_pref;
- nand_chip->write_buf = omap_write_buf_dma_pref;
- }
- break;
-
- case NAND_OMAP_PREFETCH_IRQ:
- info->gpmc_irq_fifo = platform_get_irq(pdev, 0);
- if (info->gpmc_irq_fifo <= 0) {
- dev_err(&pdev->dev, "error getting fifo irq\n");
- err = -ENODEV;
- goto return_error;
- }
- err = devm_request_irq(&pdev->dev, info->gpmc_irq_fifo,
- omap_nand_irq, IRQF_SHARED,
- "gpmc-nand-fifo", info);
- if (err) {
- dev_err(&pdev->dev, "requesting irq(%d) error:%d",
- info->gpmc_irq_fifo, err);
- info->gpmc_irq_fifo = 0;
- goto return_error;
- }
-
- info->gpmc_irq_count = platform_get_irq(pdev, 1);
- if (info->gpmc_irq_count <= 0) {
- dev_err(&pdev->dev, "error getting count irq\n");
- err = -ENODEV;
- goto return_error;
- }
- err = devm_request_irq(&pdev->dev, info->gpmc_irq_count,
- omap_nand_irq, IRQF_SHARED,
- "gpmc-nand-count", info);
- if (err) {
- dev_err(&pdev->dev, "requesting irq(%d) error:%d",
- info->gpmc_irq_count, err);
- info->gpmc_irq_count = 0;
- goto return_error;
- }
-
- nand_chip->read_buf = omap_read_buf_irq_pref;
- nand_chip->write_buf = omap_write_buf_irq_pref;
-
- break;
-
- default:
- dev_err(&pdev->dev,
- "xfer_type(%d) not supported!\n", info->xfer_type);
- err = -EINVAL;
- goto return_error;
- }
-
- if (!omap2_nand_ecc_check(info)) {
- err = -EINVAL;
- goto return_error;
- }
-
- /*
- * Bail out earlier to let NAND_ECC_SOFT code create its own
- * ooblayout instead of using ours.
- */
- if (info->ecc_opt == OMAP_ECC_HAM1_CODE_SW) {
- nand_chip->ecc.mode = NAND_ECC_SOFT;
- nand_chip->ecc.algo = NAND_ECC_HAMMING;
- goto scan_tail;
- }
-
- /* populate MTD interface based on ECC scheme */
- switch (info->ecc_opt) {
- case OMAP_ECC_HAM1_CODE_HW:
- pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.bytes = 3;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.strength = 1;
- nand_chip->ecc.calculate = omap_calculate_ecc;
- nand_chip->ecc.hwctl = omap_enable_hwecc;
- nand_chip->ecc.correct = omap_correct_data;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- if (!(nand_chip->options & NAND_BUSWIDTH_16))
- min_oobbytes = 1;
-
- break;
-
- case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
- pr_info("nand: using OMAP_ECC_BCH4_CODE_HW_DETECTION_SW\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.bytes = 7;
- nand_chip->ecc.strength = 4;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = nand_bch_correct_data;
- nand_chip->ecc.calculate = omap_calculate_ecc_bch_sw;
- mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
- /* Reserve one byte for the OMAP marker */
- oobbytes_per_step = nand_chip->ecc.bytes + 1;
- /* software bch library is used for locating errors */
- nand_chip->ecc.priv = nand_bch_init(mtd);
- if (!nand_chip->ecc.priv) {
- dev_err(&info->pdev->dev, "unable to use BCH library\n");
- err = -EINVAL;
- goto return_error;
- }
- break;
-
- case OMAP_ECC_BCH4_CODE_HW:
- pr_info("nand: using OMAP_ECC_BCH4_CODE_HW ECC scheme\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- /* 14th bit is kept reserved for ROM-code compatibility */
- nand_chip->ecc.bytes = 7 + 1;
- nand_chip->ecc.strength = 4;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = omap_elm_correct_data;
- nand_chip->ecc.read_page = omap_read_page_bch;
- nand_chip->ecc.write_page = omap_write_page_bch;
- nand_chip->ecc.write_subpage = omap_write_subpage_bch;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- err = elm_config(info->elm_dev, BCH4_ECC,
- mtd->writesize / nand_chip->ecc.size,
- nand_chip->ecc.size, nand_chip->ecc.bytes);
- if (err < 0)
- goto return_error;
- break;
-
- case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
- pr_info("nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.bytes = 13;
- nand_chip->ecc.strength = 8;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = nand_bch_correct_data;
- nand_chip->ecc.calculate = omap_calculate_ecc_bch_sw;
- mtd_set_ooblayout(mtd, &omap_sw_ooblayout_ops);
- /* Reserve one byte for the OMAP marker */
- oobbytes_per_step = nand_chip->ecc.bytes + 1;
- /* software bch library is used for locating errors */
- nand_chip->ecc.priv = nand_bch_init(mtd);
- if (!nand_chip->ecc.priv) {
- dev_err(&info->pdev->dev, "unable to use BCH library\n");
- err = -EINVAL;
- goto return_error;
- }
- break;
-
- case OMAP_ECC_BCH8_CODE_HW:
- pr_info("nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- /* 14th bit is kept reserved for ROM-code compatibility */
- nand_chip->ecc.bytes = 13 + 1;
- nand_chip->ecc.strength = 8;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = omap_elm_correct_data;
- nand_chip->ecc.read_page = omap_read_page_bch;
- nand_chip->ecc.write_page = omap_write_page_bch;
- nand_chip->ecc.write_subpage = omap_write_subpage_bch;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- err = elm_config(info->elm_dev, BCH8_ECC,
- mtd->writesize / nand_chip->ecc.size,
- nand_chip->ecc.size, nand_chip->ecc.bytes);
- if (err < 0)
- goto return_error;
-
- break;
-
- case OMAP_ECC_BCH16_CODE_HW:
- pr_info("using OMAP_ECC_BCH16_CODE_HW ECC scheme\n");
- nand_chip->ecc.mode = NAND_ECC_HW;
- nand_chip->ecc.size = 512;
- nand_chip->ecc.bytes = 26;
- nand_chip->ecc.strength = 16;
- nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
- nand_chip->ecc.correct = omap_elm_correct_data;
- nand_chip->ecc.read_page = omap_read_page_bch;
- nand_chip->ecc.write_page = omap_write_page_bch;
- nand_chip->ecc.write_subpage = omap_write_subpage_bch;
- mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
- oobbytes_per_step = nand_chip->ecc.bytes;
-
- err = elm_config(info->elm_dev, BCH16_ECC,
- mtd->writesize / nand_chip->ecc.size,
- nand_chip->ecc.size, nand_chip->ecc.bytes);
- if (err < 0)
- goto return_error;
-
- break;
- default:
- dev_err(&info->pdev->dev, "invalid or unsupported ECC scheme\n");
- err = -EINVAL;
- goto return_error;
- }
-
- /* check if NAND device's OOB is enough to store ECC signatures */
- min_oobbytes += (oobbytes_per_step *
- (mtd->writesize / nand_chip->ecc.size));
- if (mtd->oobsize < min_oobbytes) {
- dev_err(&info->pdev->dev,
- "not enough OOB bytes required = %d, available=%d\n",
- min_oobbytes, mtd->oobsize);
- err = -EINVAL;
- goto return_error;
- }
-
-scan_tail:
- /* second phase scan */
- err = nand_scan_tail(mtd);
+ nand_chip->ecc.attach_chip = omap_nand_attach_chip;
+ err = nand_scan(mtd, 1);
if (err)
goto return_error;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 33/52] mtd: rawnand: s3c2410: enhance the probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Prepare the migration of the lpc32xx_slc driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/s3c2410.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/raw/s3c2410.c b/drivers/mtd/nand/raw/s3c2410.c
index b5bc5f106c09..1bc0458063d8 100644
--- a/drivers/mtd/nand/raw/s3c2410.c
+++ b/drivers/mtd/nand/raw/s3c2410.c
@@ -124,13 +124,11 @@ struct s3c2410_nand_info;
* @chip: The NAND chip information.
* @set: The platform information supplied for this set of NAND chips.
* @info: Link back to the hardware information.
- * @scan_res: The result from calling nand_scan_ident().
*/
struct s3c2410_nand_mtd {
struct nand_chip chip;
struct s3c2410_nand_set *set;
struct s3c2410_nand_info *info;
- int scan_res;
};
enum s3c_cpu_type {
@@ -1163,17 +1161,19 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
mtd->dev.parent = &pdev->dev;
s3c2410_nand_init_chip(info, nmtd, sets);
- nmtd->scan_res = nand_scan_ident(mtd,
- (sets) ? sets->nr_chips : 1,
- NULL);
+ err = nand_scan_ident(mtd, (sets) ? sets->nr_chips : 1, NULL);
+ if (err)
+ goto exit_error;
- if (nmtd->scan_res == 0) {
- err = s3c2410_nand_update_chip(info, nmtd);
- if (err < 0)
- goto exit_error;
- nand_scan_tail(mtd);
- s3c2410_nand_add_partition(info, nmtd, sets);
- }
+ err = s3c2410_nand_update_chip(info, nmtd);
+ if (err < 0)
+ goto exit_error;
+
+ err = nand_scan_tail(mtd);
+ if (err)
+ goto exit_error;
+
+ s3c2410_nand_add_partition(info, nmtd, sets);
if (sets != NULL)
sets++;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 33/52] mtd: rawnand: s3c2410: enhance the probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Prepare the migration of the lpc32xx_slc driver to use nand_scan() by
cleaning the error path in the probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/s3c2410.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/raw/s3c2410.c b/drivers/mtd/nand/raw/s3c2410.c
index b5bc5f106c09..1bc0458063d8 100644
--- a/drivers/mtd/nand/raw/s3c2410.c
+++ b/drivers/mtd/nand/raw/s3c2410.c
@@ -124,13 +124,11 @@ struct s3c2410_nand_info;
* @chip: The NAND chip information.
* @set: The platform information supplied for this set of NAND chips.
* @info: Link back to the hardware information.
- * @scan_res: The result from calling nand_scan_ident().
*/
struct s3c2410_nand_mtd {
struct nand_chip chip;
struct s3c2410_nand_set *set;
struct s3c2410_nand_info *info;
- int scan_res;
};
enum s3c_cpu_type {
@@ -1163,17 +1161,19 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
mtd->dev.parent = &pdev->dev;
s3c2410_nand_init_chip(info, nmtd, sets);
- nmtd->scan_res = nand_scan_ident(mtd,
- (sets) ? sets->nr_chips : 1,
- NULL);
+ err = nand_scan_ident(mtd, (sets) ? sets->nr_chips : 1, NULL);
+ if (err)
+ goto exit_error;
- if (nmtd->scan_res == 0) {
- err = s3c2410_nand_update_chip(info, nmtd);
- if (err < 0)
- goto exit_error;
- nand_scan_tail(mtd);
- s3c2410_nand_add_partition(info, nmtd, sets);
- }
+ err = s3c2410_nand_update_chip(info, nmtd);
+ if (err < 0)
+ goto exit_error;
+
+ err = nand_scan_tail(mtd);
+ if (err)
+ goto exit_error;
+
+ s3c2410_nand_add_partition(info, nmtd, sets);
if (sets != NULL)
sets++;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 34/52] mtd: rawnand: s3c2410: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/s3c2410.c | 26 +++++++++-----------------
1 file changed, 9 insertions(+), 17 deletions(-)
diff --git a/drivers/mtd/nand/raw/s3c2410.c b/drivers/mtd/nand/raw/s3c2410.c
index 1bc0458063d8..67cf185ed116 100644
--- a/drivers/mtd/nand/raw/s3c2410.c
+++ b/drivers/mtd/nand/raw/s3c2410.c
@@ -915,20 +915,19 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
}
/**
- * s3c2410_nand_update_chip - post probe update
- * @info: The controller instance.
- * @nmtd: The driver version of the MTD instance.
+ * s3c2410_nand_attach_chip - Init the ECC engine after NAND scan
+ * @chip: The NAND chip
*
- * This routine is called after the chip probe has successfully completed
- * and the relevant per-chip information updated. This call ensure that
+ * This hook is called by the core after the identification of the NAND chip,
+ * once the relevant per-chip information is up to date.. This call ensure that
* we update the internal state accordingly.
*
* The internal state is currently limited to the ECC state information.
*/
-static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
- struct s3c2410_nand_mtd *nmtd)
+static int s3c2410_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &nmtd->chip;
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
switch (chip->ecc.mode) {
@@ -1161,15 +1160,8 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
mtd->dev.parent = &pdev->dev;
s3c2410_nand_init_chip(info, nmtd, sets);
- err = nand_scan_ident(mtd, (sets) ? sets->nr_chips : 1, NULL);
- if (err)
- goto exit_error;
-
- err = s3c2410_nand_update_chip(info, nmtd);
- if (err < 0)
- goto exit_error;
-
- err = nand_scan_tail(mtd);
+ nmtd->chip.ecc.attach_chip = s3c2410_nand_attach_chip;
+ err = nand_scan(mtd, sets ? sets->nr_chips : 1);
if (err)
goto exit_error;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 34/52] mtd: rawnand: s3c2410: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/s3c2410.c | 26 +++++++++-----------------
1 file changed, 9 insertions(+), 17 deletions(-)
diff --git a/drivers/mtd/nand/raw/s3c2410.c b/drivers/mtd/nand/raw/s3c2410.c
index 1bc0458063d8..67cf185ed116 100644
--- a/drivers/mtd/nand/raw/s3c2410.c
+++ b/drivers/mtd/nand/raw/s3c2410.c
@@ -915,20 +915,19 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
}
/**
- * s3c2410_nand_update_chip - post probe update
- * @info: The controller instance.
- * @nmtd: The driver version of the MTD instance.
+ * s3c2410_nand_attach_chip - Init the ECC engine after NAND scan
+ * @chip: The NAND chip
*
- * This routine is called after the chip probe has successfully completed
- * and the relevant per-chip information updated. This call ensure that
+ * This hook is called by the core after the identification of the NAND chip,
+ * once the relevant per-chip information is up to date.. This call ensure that
* we update the internal state accordingly.
*
* The internal state is currently limited to the ECC state information.
*/
-static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
- struct s3c2410_nand_mtd *nmtd)
+static int s3c2410_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &nmtd->chip;
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
switch (chip->ecc.mode) {
@@ -1161,15 +1160,8 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
mtd->dev.parent = &pdev->dev;
s3c2410_nand_init_chip(info, nmtd, sets);
- err = nand_scan_ident(mtd, (sets) ? sets->nr_chips : 1, NULL);
- if (err)
- goto exit_error;
-
- err = s3c2410_nand_update_chip(info, nmtd);
- if (err < 0)
- goto exit_error;
-
- err = nand_scan_tail(mtd);
+ nmtd->chip.ecc.attach_chip = s3c2410_nand_attach_chip;
+ err = nand_scan(mtd, sets ? sets->nr_chips : 1);
if (err)
goto exit_error;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 35/52] mtd: rawnand: sh_flctl: move all NAND chip related setup in one function
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Prepare the conversion of the sh_flctl driver to nand_scan() by moving
all the configuration that must be made after nand_scan_ident() in one
single function. Create a pdata entry in the controller structure for
that.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sh_flctl.c | 38 +++++++++++++++++++-------------------
include/linux/mtd/sh_flctl.h | 1 +
2 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index 9eb3cf9db111..d14c26cb59df 100644
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1007,6 +1007,16 @@ static int flctl_chip_init_tail(struct mtd_info *mtd)
struct sh_flctl *flctl = mtd_to_flctl(mtd);
struct nand_chip *chip = &flctl->chip;
+ if (chip->options & NAND_BUSWIDTH_16) {
+ /*
+ * NAND_BUSWIDTH_16 may have been set by nand_scan_ident().
+ * Add the SEL_16BIT flag in pdata->flcmncr_val and re-assign
+ * flctl->flcmncr_base to pdata->flcmncr_val.
+ */
+ flctl->pdata->flcmncr_val |= SEL_16BIT;
+ flctl->flcmncr_base = flctl->pdata->flcmncr_val;
+ }
+
if (mtd->writesize == 512) {
flctl->page_size = 0;
if (chip->chipsize > (32 << 20)) {
@@ -1122,7 +1132,6 @@ static int flctl_probe(struct platform_device *pdev)
struct sh_flctl *flctl;
struct mtd_info *flctl_mtd;
struct nand_chip *nand;
- struct sh_flctl_platform_data *pdata;
int ret;
int irq;
@@ -1150,11 +1159,11 @@ static int flctl_probe(struct platform_device *pdev)
}
if (pdev->dev.of_node)
- pdata = flctl_parse_dt(&pdev->dev);
+ flctl->pdata = flctl_parse_dt(&pdev->dev);
else
- pdata = dev_get_platdata(&pdev->dev);
+ flctl->pdata = dev_get_platdata(&pdev->dev);
- if (!pdata) {
+ if (!flctl->pdata) {
dev_err(&pdev->dev, "no setup data defined\n");
return -EINVAL;
}
@@ -1165,9 +1174,9 @@ static int flctl_probe(struct platform_device *pdev)
nand_set_flash_node(nand, pdev->dev.of_node);
flctl_mtd->dev.parent = &pdev->dev;
flctl->pdev = pdev;
- flctl->hwecc = pdata->has_hwecc;
- flctl->holden = pdata->use_holden;
- flctl->flcmncr_base = pdata->flcmncr_val;
+ flctl->hwecc = flctl->pdata->has_hwecc;
+ flctl->holden = flctl->pdata->use_holden;
+ flctl->flcmncr_base = flctl->pdata->flcmncr_val;
flctl->flintdmacr_base = flctl->hwecc ? (STERINTE | ECERB) : STERINTE;
/* Set address of hardware control function */
@@ -1183,7 +1192,7 @@ static int flctl_probe(struct platform_device *pdev)
nand->set_features = nand_get_set_features_notsupp;
nand->get_features = nand_get_set_features_notsupp;
- if (pdata->flcmncr_val & SEL_16BIT)
+ if (flctl->pdata->flcmncr_val & SEL_16BIT)
nand->options |= NAND_BUSWIDTH_16;
pm_runtime_enable(&pdev->dev);
@@ -1195,16 +1204,6 @@ static int flctl_probe(struct platform_device *pdev)
if (ret)
goto err_chip;
- if (nand->options & NAND_BUSWIDTH_16) {
- /*
- * NAND_BUSWIDTH_16 may have been set by nand_scan_ident().
- * Add the SEL_16BIT flag in pdata->flcmncr_val and re-assign
- * flctl->flcmncr_base to pdata->flcmncr_val.
- */
- pdata->flcmncr_val |= SEL_16BIT;
- flctl->flcmncr_base = pdata->flcmncr_val;
- }
-
ret = flctl_chip_init_tail(flctl_mtd);
if (ret)
goto err_chip;
@@ -1213,7 +1212,8 @@ static int flctl_probe(struct platform_device *pdev)
if (ret)
goto err_chip;
- ret = mtd_device_register(flctl_mtd, pdata->parts, pdata->nr_parts);
+ ret = mtd_device_register(flctl_mtd, flctl->pdata->parts,
+ flctl->pdata->nr_parts);
return 0;
diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
index c759d403cbc0..c9f486c6c019 100644
--- a/include/linux/mtd/sh_flctl.h
+++ b/include/linux/mtd/sh_flctl.h
@@ -148,6 +148,7 @@ struct sh_flctl {
struct dev_pm_qos_request pm_qos;
void __iomem *reg;
resource_size_t fifo;
+ struct sh_flctl_platform_data *pdata;
uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
int read_bytes;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 35/52] mtd: rawnand: sh_flctl: move all NAND chip related setup in one function
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Prepare the conversion of the sh_flctl driver to nand_scan() by moving
all the configuration that must be made after nand_scan_ident() in one
single function. Create a pdata entry in the controller structure for
that.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sh_flctl.c | 38 +++++++++++++++++++-------------------
include/linux/mtd/sh_flctl.h | 1 +
2 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index 9eb3cf9db111..d14c26cb59df 100644
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1007,6 +1007,16 @@ static int flctl_chip_init_tail(struct mtd_info *mtd)
struct sh_flctl *flctl = mtd_to_flctl(mtd);
struct nand_chip *chip = &flctl->chip;
+ if (chip->options & NAND_BUSWIDTH_16) {
+ /*
+ * NAND_BUSWIDTH_16 may have been set by nand_scan_ident().
+ * Add the SEL_16BIT flag in pdata->flcmncr_val and re-assign
+ * flctl->flcmncr_base to pdata->flcmncr_val.
+ */
+ flctl->pdata->flcmncr_val |= SEL_16BIT;
+ flctl->flcmncr_base = flctl->pdata->flcmncr_val;
+ }
+
if (mtd->writesize == 512) {
flctl->page_size = 0;
if (chip->chipsize > (32 << 20)) {
@@ -1122,7 +1132,6 @@ static int flctl_probe(struct platform_device *pdev)
struct sh_flctl *flctl;
struct mtd_info *flctl_mtd;
struct nand_chip *nand;
- struct sh_flctl_platform_data *pdata;
int ret;
int irq;
@@ -1150,11 +1159,11 @@ static int flctl_probe(struct platform_device *pdev)
}
if (pdev->dev.of_node)
- pdata = flctl_parse_dt(&pdev->dev);
+ flctl->pdata = flctl_parse_dt(&pdev->dev);
else
- pdata = dev_get_platdata(&pdev->dev);
+ flctl->pdata = dev_get_platdata(&pdev->dev);
- if (!pdata) {
+ if (!flctl->pdata) {
dev_err(&pdev->dev, "no setup data defined\n");
return -EINVAL;
}
@@ -1165,9 +1174,9 @@ static int flctl_probe(struct platform_device *pdev)
nand_set_flash_node(nand, pdev->dev.of_node);
flctl_mtd->dev.parent = &pdev->dev;
flctl->pdev = pdev;
- flctl->hwecc = pdata->has_hwecc;
- flctl->holden = pdata->use_holden;
- flctl->flcmncr_base = pdata->flcmncr_val;
+ flctl->hwecc = flctl->pdata->has_hwecc;
+ flctl->holden = flctl->pdata->use_holden;
+ flctl->flcmncr_base = flctl->pdata->flcmncr_val;
flctl->flintdmacr_base = flctl->hwecc ? (STERINTE | ECERB) : STERINTE;
/* Set address of hardware control function */
@@ -1183,7 +1192,7 @@ static int flctl_probe(struct platform_device *pdev)
nand->set_features = nand_get_set_features_notsupp;
nand->get_features = nand_get_set_features_notsupp;
- if (pdata->flcmncr_val & SEL_16BIT)
+ if (flctl->pdata->flcmncr_val & SEL_16BIT)
nand->options |= NAND_BUSWIDTH_16;
pm_runtime_enable(&pdev->dev);
@@ -1195,16 +1204,6 @@ static int flctl_probe(struct platform_device *pdev)
if (ret)
goto err_chip;
- if (nand->options & NAND_BUSWIDTH_16) {
- /*
- * NAND_BUSWIDTH_16 may have been set by nand_scan_ident().
- * Add the SEL_16BIT flag in pdata->flcmncr_val and re-assign
- * flctl->flcmncr_base to pdata->flcmncr_val.
- */
- pdata->flcmncr_val |= SEL_16BIT;
- flctl->flcmncr_base = pdata->flcmncr_val;
- }
-
ret = flctl_chip_init_tail(flctl_mtd);
if (ret)
goto err_chip;
@@ -1213,7 +1212,8 @@ static int flctl_probe(struct platform_device *pdev)
if (ret)
goto err_chip;
- ret = mtd_device_register(flctl_mtd, pdata->parts, pdata->nr_parts);
+ ret = mtd_device_register(flctl_mtd, flctl->pdata->parts,
+ flctl->pdata->nr_parts);
return 0;
diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
index c759d403cbc0..c9f486c6c019 100644
--- a/include/linux/mtd/sh_flctl.h
+++ b/include/linux/mtd/sh_flctl.h
@@ -148,6 +148,7 @@ struct sh_flctl {
struct dev_pm_qos_request pm_qos;
void __iomem *reg;
resource_size_t fifo;
+ struct sh_flctl_platform_data *pdata;
uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
int read_bytes;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 36/52] mtd: rawnand: sh_flctl: fix the probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() call should trigger a nand_release()
call. This is rightly handled in the remove function, but not in the
probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sh_flctl.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index d14c26cb59df..67f125d56771 100644
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1214,9 +1214,13 @@ static int flctl_probe(struct platform_device *pdev)
ret = mtd_device_register(flctl_mtd, flctl->pdata->parts,
flctl->pdata->nr_parts);
+ if (ret)
+ goto release_nand;
return 0;
+release_nand:
+ nand_release(flctl_mtd);
err_chip:
flctl_release_dma(flctl);
pm_runtime_disable(&pdev->dev);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 36/52] mtd: rawnand: sh_flctl: fix the probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() call should trigger a nand_release()
call. This is rightly handled in the remove function, but not in the
probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sh_flctl.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index d14c26cb59df..67f125d56771 100644
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1214,9 +1214,13 @@ static int flctl_probe(struct platform_device *pdev)
ret = mtd_device_register(flctl_mtd, flctl->pdata->parts,
flctl->pdata->nr_parts);
+ if (ret)
+ goto release_nand;
return 0;
+release_nand:
+ nand_release(flctl_mtd);
err_chip:
flctl_release_dma(flctl);
pm_runtime_disable(&pdev->dev);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 37/52] mtd: rawnand: sh_flctl: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sh_flctl.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index 67f125d56771..0f1b7db4fe7f 100644
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1002,10 +1002,10 @@ static void flctl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
flctl->index += len;
}
-static int flctl_chip_init_tail(struct mtd_info *mtd)
+static int flctl_chip_attach_chip(struct nand_chip *chip)
{
+ struct mtd_info *mtd = nand_to_mtd(chip);
struct sh_flctl *flctl = mtd_to_flctl(mtd);
- struct nand_chip *chip = &flctl->chip;
if (chip->options & NAND_BUSWIDTH_16) {
/*
@@ -1200,15 +1200,8 @@ static int flctl_probe(struct platform_device *pdev)
flctl_setup_dma(flctl);
- ret = nand_scan_ident(flctl_mtd, 1, NULL);
- if (ret)
- goto err_chip;
-
- ret = flctl_chip_init_tail(flctl_mtd);
- if (ret)
- goto err_chip;
-
- ret = nand_scan_tail(flctl_mtd);
+ nand->ecc.attach_chip = flctl_chip_attach_chip;
+ ret = nand_scan(flctl_mtd, 1);
if (ret)
goto err_chip;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 37/52] mtd: rawnand: sh_flctl: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sh_flctl.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index 67f125d56771..0f1b7db4fe7f 100644
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1002,10 +1002,10 @@ static void flctl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
flctl->index += len;
}
-static int flctl_chip_init_tail(struct mtd_info *mtd)
+static int flctl_chip_attach_chip(struct nand_chip *chip)
{
+ struct mtd_info *mtd = nand_to_mtd(chip);
struct sh_flctl *flctl = mtd_to_flctl(mtd);
- struct nand_chip *chip = &flctl->chip;
if (chip->options & NAND_BUSWIDTH_16) {
/*
@@ -1200,15 +1200,8 @@ static int flctl_probe(struct platform_device *pdev)
flctl_setup_dma(flctl);
- ret = nand_scan_ident(flctl_mtd, 1, NULL);
- if (ret)
- goto err_chip;
-
- ret = flctl_chip_init_tail(flctl_mtd);
- if (ret)
- goto err_chip;
-
- ret = nand_scan_tail(flctl_mtd);
+ nand->ecc.attach_chip = flctl_chip_attach_chip;
+ ret = nand_scan(flctl_mtd, 1);
if (ret)
goto err_chip;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 38/52] mtd: rawnand: sunxi: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sunxi_nand.c | 38 ++++++++++++++------------------------
1 file changed, 14 insertions(+), 24 deletions(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index f5a55c63935c..5ca3c7b42373 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1971,12 +1971,21 @@ static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc)
}
}
-static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc,
- struct device_node *np)
+static int sunxi_nand_attach_chip(struct nand_chip *nand)
{
- struct nand_chip *nand = mtd_to_nand(mtd);
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ struct nand_ecc_ctrl *ecc = &nand->ecc;
+ struct device_node *np = nand_get_flash_node(nand);
int ret;
+ if (nand->bbt_options & NAND_BBT_USE_FLASH)
+ nand->bbt_options |= NAND_BBT_NO_OOB;
+
+ if (nand->options & NAND_NEED_SCRAMBLING)
+ nand->options |= NAND_NO_SUBPAGE_WRITE;
+
+ nand->options |= NAND_SUBPAGE_READ;
+
if (!ecc->size) {
ecc->size = nand->ecc_step_ds;
ecc->strength = nand->ecc_strength_ds;
@@ -2103,30 +2112,11 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
mtd = nand_to_mtd(nand);
mtd->dev.parent = dev;
- ret = nand_scan_ident(mtd, nsels, NULL);
+ nand->ecc.attach_chip = sunxi_nand_attach_chip;
+ ret = nand_scan(mtd, nsels);
if (ret)
return ret;
- if (nand->bbt_options & NAND_BBT_USE_FLASH)
- nand->bbt_options |= NAND_BBT_NO_OOB;
-
- if (nand->options & NAND_NEED_SCRAMBLING)
- nand->options |= NAND_NO_SUBPAGE_WRITE;
-
- nand->options |= NAND_SUBPAGE_READ;
-
- ret = sunxi_nand_ecc_init(mtd, &nand->ecc, np);
- if (ret) {
- dev_err(dev, "ECC init failed: %d\n", ret);
- return ret;
- }
-
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(dev, "nand_scan_tail failed: %d\n", ret);
- return ret;
- }
-
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(dev, "failed to register mtd device: %d\n", ret);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 38/52] mtd: rawnand: sunxi: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sunxi_nand.c | 38 ++++++++++++++------------------------
1 file changed, 14 insertions(+), 24 deletions(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index f5a55c63935c..5ca3c7b42373 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1971,12 +1971,21 @@ static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc)
}
}
-static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc,
- struct device_node *np)
+static int sunxi_nand_attach_chip(struct nand_chip *nand)
{
- struct nand_chip *nand = mtd_to_nand(mtd);
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ struct nand_ecc_ctrl *ecc = &nand->ecc;
+ struct device_node *np = nand_get_flash_node(nand);
int ret;
+ if (nand->bbt_options & NAND_BBT_USE_FLASH)
+ nand->bbt_options |= NAND_BBT_NO_OOB;
+
+ if (nand->options & NAND_NEED_SCRAMBLING)
+ nand->options |= NAND_NO_SUBPAGE_WRITE;
+
+ nand->options |= NAND_SUBPAGE_READ;
+
if (!ecc->size) {
ecc->size = nand->ecc_step_ds;
ecc->strength = nand->ecc_strength_ds;
@@ -2103,30 +2112,11 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
mtd = nand_to_mtd(nand);
mtd->dev.parent = dev;
- ret = nand_scan_ident(mtd, nsels, NULL);
+ nand->ecc.attach_chip = sunxi_nand_attach_chip;
+ ret = nand_scan(mtd, nsels);
if (ret)
return ret;
- if (nand->bbt_options & NAND_BBT_USE_FLASH)
- nand->bbt_options |= NAND_BBT_NO_OOB;
-
- if (nand->options & NAND_NEED_SCRAMBLING)
- nand->options |= NAND_NO_SUBPAGE_WRITE;
-
- nand->options |= NAND_SUBPAGE_READ;
-
- ret = sunxi_nand_ecc_init(mtd, &nand->ecc, np);
- if (ret) {
- dev_err(dev, "ECC init failed: %d\n", ret);
- return ret;
- }
-
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(dev, "nand_scan_tail failed: %d\n", ret);
- return ret;
- }
-
ret = mtd_device_register(mtd, NULL, 0);
if (ret) {
dev_err(dev, "failed to register mtd device: %d\n", ret);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 39/52] mtd: rawnand: tango: fix probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() should trigger a nand_release().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/tango_nand.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/tango_nand.c b/drivers/mtd/nand/raw/tango_nand.c
index c5bee00b7f5e..69e5eb136edc 100644
--- a/drivers/mtd/nand/raw/tango_nand.c
+++ b/drivers/mtd/nand/raw/tango_nand.c
@@ -591,8 +591,10 @@ static int chip_init(struct device *dev, struct device_node *np)
tchip->bb_cfg = BB_CFG(mtd->writesize, BBM_SIZE);
err = mtd_device_register(mtd, NULL, 0);
- if (err)
+ if (err) {
+ nand_release(mtd);
return err;
+ }
nfc->chips[cs] = tchip;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 39/52] mtd: rawnand: tango: fix probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() should trigger a nand_release().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/tango_nand.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/tango_nand.c b/drivers/mtd/nand/raw/tango_nand.c
index c5bee00b7f5e..69e5eb136edc 100644
--- a/drivers/mtd/nand/raw/tango_nand.c
+++ b/drivers/mtd/nand/raw/tango_nand.c
@@ -591,8 +591,10 @@ static int chip_init(struct device *dev, struct device_node *np)
tchip->bb_cfg = BB_CFG(mtd->writesize, BBM_SIZE);
err = mtd_device_register(mtd, NULL, 0);
- if (err)
+ if (err) {
+ nand_release(mtd);
return err;
+ }
nfc->chips[cs] = tchip;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 40/52] mtd: rawnand: tango: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/tango_nand.c | 36 ++++++++++++++++++++----------------
1 file changed, 20 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/raw/tango_nand.c b/drivers/mtd/nand/raw/tango_nand.c
index 69e5eb136edc..a45ad30bc095 100644
--- a/drivers/mtd/nand/raw/tango_nand.c
+++ b/drivers/mtd/nand/raw/tango_nand.c
@@ -517,6 +517,24 @@ static int tango_set_timings(struct mtd_info *mtd, int csline,
return 0;
}
+static int tango_attach_chip(struct nand_chip *chip)
+{
+ struct nand_ecc_ctrl *ecc = &chip->ecc;
+
+ ecc->mode = NAND_ECC_HW;
+ ecc->algo = NAND_ECC_BCH;
+ ecc->bytes = DIV_ROUND_UP(ecc->strength * FIELD_ORDER, BITS_PER_BYTE);
+
+ ecc->read_page_raw = tango_read_page_raw;
+ ecc->write_page_raw = tango_write_page_raw;
+ ecc->read_page = tango_read_page;
+ ecc->write_page = tango_write_page;
+ ecc->read_oob = tango_read_oob;
+ ecc->write_oob = tango_write_oob;
+
+ return 0;
+}
+
static int chip_init(struct device *dev, struct device_node *np)
{
u32 cs;
@@ -566,22 +584,8 @@ static int chip_init(struct device *dev, struct device_node *np)
mtd_set_ooblayout(mtd, &tango_nand_ooblayout_ops);
mtd->dev.parent = dev;
- err = nand_scan_ident(mtd, 1, NULL);
- if (err)
- return err;
-
- ecc->mode = NAND_ECC_HW;
- ecc->algo = NAND_ECC_BCH;
- ecc->bytes = DIV_ROUND_UP(ecc->strength * FIELD_ORDER, BITS_PER_BYTE);
-
- ecc->read_page_raw = tango_read_page_raw;
- ecc->write_page_raw = tango_write_page_raw;
- ecc->read_page = tango_read_page;
- ecc->write_page = tango_write_page;
- ecc->read_oob = tango_read_oob;
- ecc->write_oob = tango_write_oob;
-
- err = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = tango_attach_chip;
+ err = nand_scan(mtd, 1);
if (err)
return err;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 40/52] mtd: rawnand: tango: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/tango_nand.c | 36 ++++++++++++++++++++----------------
1 file changed, 20 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/raw/tango_nand.c b/drivers/mtd/nand/raw/tango_nand.c
index 69e5eb136edc..a45ad30bc095 100644
--- a/drivers/mtd/nand/raw/tango_nand.c
+++ b/drivers/mtd/nand/raw/tango_nand.c
@@ -517,6 +517,24 @@ static int tango_set_timings(struct mtd_info *mtd, int csline,
return 0;
}
+static int tango_attach_chip(struct nand_chip *chip)
+{
+ struct nand_ecc_ctrl *ecc = &chip->ecc;
+
+ ecc->mode = NAND_ECC_HW;
+ ecc->algo = NAND_ECC_BCH;
+ ecc->bytes = DIV_ROUND_UP(ecc->strength * FIELD_ORDER, BITS_PER_BYTE);
+
+ ecc->read_page_raw = tango_read_page_raw;
+ ecc->write_page_raw = tango_write_page_raw;
+ ecc->read_page = tango_read_page;
+ ecc->write_page = tango_write_page;
+ ecc->read_oob = tango_read_oob;
+ ecc->write_oob = tango_write_oob;
+
+ return 0;
+}
+
static int chip_init(struct device *dev, struct device_node *np)
{
u32 cs;
@@ -566,22 +584,8 @@ static int chip_init(struct device *dev, struct device_node *np)
mtd_set_ooblayout(mtd, &tango_nand_ooblayout_ops);
mtd->dev.parent = dev;
- err = nand_scan_ident(mtd, 1, NULL);
- if (err)
- return err;
-
- ecc->mode = NAND_ECC_HW;
- ecc->algo = NAND_ECC_BCH;
- ecc->bytes = DIV_ROUND_UP(ecc->strength * FIELD_ORDER, BITS_PER_BYTE);
-
- ecc->read_page_raw = tango_read_page_raw;
- ecc->write_page_raw = tango_write_page_raw;
- ecc->read_page = tango_read_page;
- ecc->write_page = tango_write_page;
- ecc->read_oob = tango_read_oob;
- ecc->write_oob = tango_write_oob;
-
- err = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = tango_attach_chip;
+ err = nand_scan(mtd, 1);
if (err)
return err;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 41/52] mtd: rawnand: txx9ndfmc: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/txx9ndfmc.c | 25 +++++++++++--------------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/nand/raw/txx9ndfmc.c b/drivers/mtd/nand/raw/txx9ndfmc.c
index b567d212fe7d..5c20219bca98 100644
--- a/drivers/mtd/nand/raw/txx9ndfmc.c
+++ b/drivers/mtd/nand/raw/txx9ndfmc.c
@@ -254,21 +254,17 @@ static void txx9ndfmc_initialize(struct platform_device *dev)
#define TXX9NDFMC_NS_TO_CYC(gbusclk, ns) \
DIV_ROUND_UP((ns) * DIV_ROUND_UP(gbusclk, 1000), 1000000)
-static int txx9ndfmc_nand_scan(struct mtd_info *mtd)
+static int txx9ndfmc_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
- int ret;
+ struct mtd_info *mtd = nand_to_mtd(chip);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (!ret) {
- if (mtd->writesize >= 512) {
- /* Hardware ECC 6 byte ECC per 512 Byte data */
- chip->ecc.size = 512;
- chip->ecc.bytes = 6;
- }
- ret = nand_scan_tail(mtd);
+ if (mtd->writesize >= 512) {
+ /* Hardware ECC 6 byte ECC per 512 Byte data */
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 6;
}
- return ret;
+
+ return 0;
}
static int __init txx9ndfmc_probe(struct platform_device *dev)
@@ -332,7 +328,7 @@ static int __init txx9ndfmc_probe(struct platform_device *dev)
chip->ecc.correct = txx9ndfmc_correct_data;
chip->ecc.hwctl = txx9ndfmc_enable_hwecc;
chip->ecc.mode = NAND_ECC_HW;
- /* txx9ndfmc_nand_scan will overwrite ecc.size and ecc.bytes */
+ /* nand_scan() will overwrite ecc.size and ecc.bytes */
chip->ecc.size = 256;
chip->ecc.bytes = 3;
chip->ecc.strength = 1;
@@ -359,7 +355,8 @@ static int __init txx9ndfmc_probe(struct platform_device *dev)
if (plat->wide_mask & (1 << i))
chip->options |= NAND_BUSWIDTH_16;
- if (txx9ndfmc_nand_scan(mtd)) {
+ chip->ecc.attach_chip = txx9ndfmc_attach_chip;
+ if (nand_scan(mtd, 1)) {
kfree(txx9_priv->mtdname);
kfree(txx9_priv);
continue;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 41/52] mtd: rawnand: txx9ndfmc: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/txx9ndfmc.c | 25 +++++++++++--------------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/nand/raw/txx9ndfmc.c b/drivers/mtd/nand/raw/txx9ndfmc.c
index b567d212fe7d..5c20219bca98 100644
--- a/drivers/mtd/nand/raw/txx9ndfmc.c
+++ b/drivers/mtd/nand/raw/txx9ndfmc.c
@@ -254,21 +254,17 @@ static void txx9ndfmc_initialize(struct platform_device *dev)
#define TXX9NDFMC_NS_TO_CYC(gbusclk, ns) \
DIV_ROUND_UP((ns) * DIV_ROUND_UP(gbusclk, 1000), 1000000)
-static int txx9ndfmc_nand_scan(struct mtd_info *mtd)
+static int txx9ndfmc_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
- int ret;
+ struct mtd_info *mtd = nand_to_mtd(chip);
- ret = nand_scan_ident(mtd, 1, NULL);
- if (!ret) {
- if (mtd->writesize >= 512) {
- /* Hardware ECC 6 byte ECC per 512 Byte data */
- chip->ecc.size = 512;
- chip->ecc.bytes = 6;
- }
- ret = nand_scan_tail(mtd);
+ if (mtd->writesize >= 512) {
+ /* Hardware ECC 6 byte ECC per 512 Byte data */
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 6;
}
- return ret;
+
+ return 0;
}
static int __init txx9ndfmc_probe(struct platform_device *dev)
@@ -332,7 +328,7 @@ static int __init txx9ndfmc_probe(struct platform_device *dev)
chip->ecc.correct = txx9ndfmc_correct_data;
chip->ecc.hwctl = txx9ndfmc_enable_hwecc;
chip->ecc.mode = NAND_ECC_HW;
- /* txx9ndfmc_nand_scan will overwrite ecc.size and ecc.bytes */
+ /* nand_scan() will overwrite ecc.size and ecc.bytes */
chip->ecc.size = 256;
chip->ecc.bytes = 3;
chip->ecc.strength = 1;
@@ -359,7 +355,8 @@ static int __init txx9ndfmc_probe(struct platform_device *dev)
if (plat->wide_mask & (1 << i))
chip->options |= NAND_BUSWIDTH_16;
- if (txx9ndfmc_nand_scan(mtd)) {
+ chip->ecc.attach_chip = txx9ndfmc_attach_chip;
+ if (nand_scan(mtd, 1)) {
kfree(txx9_priv->mtdname);
kfree(txx9_priv);
continue;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 42/52] mtd: rawnand: vf610: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/vf610_nfc.c | 119 ++++++++++++++++++++-------------------
1 file changed, 60 insertions(+), 59 deletions(-)
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index 7c20915f2165..68f3d5efc519 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -615,6 +615,63 @@ static void vf610_nfc_init_controller(struct vf610_nfc *nfc)
}
}
+static int vf610_nfc_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct vf610_nfc *nfc = mtd_to_nfc(mtd);
+
+ vf610_nfc_init_controller(nfc);
+
+ /* Bad block options. */
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ /* Single buffer only, max 256 OOB minus ECC status */
+ if (mtd->writesize + mtd->oobsize > PAGE_2K + OOB_MAX - 8) {
+ dev_err(nfc->dev, "Unsupported flash page size\n");
+ return -ENXIO;
+ }
+
+ if (chip->ecc.mode != NAND_ECC_HW)
+ return 0;
+
+ if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
+ dev_err(nfc->dev, "Unsupported flash with hwecc\n");
+ return -ENXIO;
+ }
+
+ if (chip->ecc.size != mtd->writesize) {
+ dev_err(nfc->dev, "Step size needs to be page size\n");
+ return -ENXIO;
+ }
+
+ /* Only 64 byte ECC layouts known */
+ if (mtd->oobsize > 64)
+ mtd->oobsize = 64;
+
+ /*
+ * mtd->ecclayout is not specified here because we're using the
+ * default large page ECC layout defined in NAND core.
+ */
+ if (chip->ecc.strength == 32) {
+ nfc->ecc_mode = ECC_60_BYTE;
+ chip->ecc.bytes = 60;
+ } else if (chip->ecc.strength == 24) {
+ nfc->ecc_mode = ECC_45_BYTE;
+ chip->ecc.bytes = 45;
+ } else {
+ dev_err(nfc->dev, "Unsupported ECC strength\n");
+ return -ENXIO;
+ }
+
+ chip->ecc.read_page = vf610_nfc_read_page;
+ chip->ecc.write_page = vf610_nfc_write_page;
+
+ chip->ecc.size = PAGE_2K;
+
+ return 0;
+}
+
static int vf610_nfc_probe(struct platform_device *pdev)
{
struct vf610_nfc *nfc;
@@ -702,65 +759,9 @@ static int vf610_nfc_probe(struct platform_device *pdev)
vf610_nfc_preinit_controller(nfc);
- /* first scan to find the device and get the page size */
- err = nand_scan_ident(mtd, 1, NULL);
- if (err)
- goto err_disable_clk;
-
- vf610_nfc_init_controller(nfc);
-
- /* Bad block options. */
- if (chip->bbt_options & NAND_BBT_USE_FLASH)
- chip->bbt_options |= NAND_BBT_NO_OOB;
-
- /* Single buffer only, max 256 OOB minus ECC status */
- if (mtd->writesize + mtd->oobsize > PAGE_2K + OOB_MAX - 8) {
- dev_err(nfc->dev, "Unsupported flash page size\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- if (chip->ecc.mode == NAND_ECC_HW) {
- if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
- dev_err(nfc->dev, "Unsupported flash with hwecc\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- if (chip->ecc.size != mtd->writesize) {
- dev_err(nfc->dev, "Step size needs to be page size\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- /* Only 64 byte ECC layouts known */
- if (mtd->oobsize > 64)
- mtd->oobsize = 64;
-
- /*
- * mtd->ecclayout is not specified here because we're using the
- * default large page ECC layout defined in NAND core.
- */
- if (chip->ecc.strength == 32) {
- nfc->ecc_mode = ECC_60_BYTE;
- chip->ecc.bytes = 60;
- } else if (chip->ecc.strength == 24) {
- nfc->ecc_mode = ECC_45_BYTE;
- chip->ecc.bytes = 45;
- } else {
- dev_err(nfc->dev, "Unsupported ECC strength\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- chip->ecc.read_page = vf610_nfc_read_page;
- chip->ecc.write_page = vf610_nfc_write_page;
-
- chip->ecc.size = PAGE_2K;
- }
-
- /* second phase scan */
- err = nand_scan_tail(mtd);
+ /* Scan the NAND chip */
+ chip->ecc.attach_chip = vf610_nfc_attach_chip;
+ err = nand_scan(mtd, 1);
if (err)
goto err_disable_clk;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 42/52] mtd: rawnand: vf610: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/vf610_nfc.c | 119 ++++++++++++++++++++-------------------
1 file changed, 60 insertions(+), 59 deletions(-)
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index 7c20915f2165..68f3d5efc519 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -615,6 +615,63 @@ static void vf610_nfc_init_controller(struct vf610_nfc *nfc)
}
}
+static int vf610_nfc_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct vf610_nfc *nfc = mtd_to_nfc(mtd);
+
+ vf610_nfc_init_controller(nfc);
+
+ /* Bad block options. */
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->bbt_options |= NAND_BBT_NO_OOB;
+
+ /* Single buffer only, max 256 OOB minus ECC status */
+ if (mtd->writesize + mtd->oobsize > PAGE_2K + OOB_MAX - 8) {
+ dev_err(nfc->dev, "Unsupported flash page size\n");
+ return -ENXIO;
+ }
+
+ if (chip->ecc.mode != NAND_ECC_HW)
+ return 0;
+
+ if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
+ dev_err(nfc->dev, "Unsupported flash with hwecc\n");
+ return -ENXIO;
+ }
+
+ if (chip->ecc.size != mtd->writesize) {
+ dev_err(nfc->dev, "Step size needs to be page size\n");
+ return -ENXIO;
+ }
+
+ /* Only 64 byte ECC layouts known */
+ if (mtd->oobsize > 64)
+ mtd->oobsize = 64;
+
+ /*
+ * mtd->ecclayout is not specified here because we're using the
+ * default large page ECC layout defined in NAND core.
+ */
+ if (chip->ecc.strength == 32) {
+ nfc->ecc_mode = ECC_60_BYTE;
+ chip->ecc.bytes = 60;
+ } else if (chip->ecc.strength == 24) {
+ nfc->ecc_mode = ECC_45_BYTE;
+ chip->ecc.bytes = 45;
+ } else {
+ dev_err(nfc->dev, "Unsupported ECC strength\n");
+ return -ENXIO;
+ }
+
+ chip->ecc.read_page = vf610_nfc_read_page;
+ chip->ecc.write_page = vf610_nfc_write_page;
+
+ chip->ecc.size = PAGE_2K;
+
+ return 0;
+}
+
static int vf610_nfc_probe(struct platform_device *pdev)
{
struct vf610_nfc *nfc;
@@ -702,65 +759,9 @@ static int vf610_nfc_probe(struct platform_device *pdev)
vf610_nfc_preinit_controller(nfc);
- /* first scan to find the device and get the page size */
- err = nand_scan_ident(mtd, 1, NULL);
- if (err)
- goto err_disable_clk;
-
- vf610_nfc_init_controller(nfc);
-
- /* Bad block options. */
- if (chip->bbt_options & NAND_BBT_USE_FLASH)
- chip->bbt_options |= NAND_BBT_NO_OOB;
-
- /* Single buffer only, max 256 OOB minus ECC status */
- if (mtd->writesize + mtd->oobsize > PAGE_2K + OOB_MAX - 8) {
- dev_err(nfc->dev, "Unsupported flash page size\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- if (chip->ecc.mode == NAND_ECC_HW) {
- if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
- dev_err(nfc->dev, "Unsupported flash with hwecc\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- if (chip->ecc.size != mtd->writesize) {
- dev_err(nfc->dev, "Step size needs to be page size\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- /* Only 64 byte ECC layouts known */
- if (mtd->oobsize > 64)
- mtd->oobsize = 64;
-
- /*
- * mtd->ecclayout is not specified here because we're using the
- * default large page ECC layout defined in NAND core.
- */
- if (chip->ecc.strength == 32) {
- nfc->ecc_mode = ECC_60_BYTE;
- chip->ecc.bytes = 60;
- } else if (chip->ecc.strength == 24) {
- nfc->ecc_mode = ECC_45_BYTE;
- chip->ecc.bytes = 45;
- } else {
- dev_err(nfc->dev, "Unsupported ECC strength\n");
- err = -ENXIO;
- goto err_disable_clk;
- }
-
- chip->ecc.read_page = vf610_nfc_read_page;
- chip->ecc.write_page = vf610_nfc_write_page;
-
- chip->ecc.size = PAGE_2K;
- }
-
- /* second phase scan */
- err = nand_scan_tail(mtd);
+ /* Scan the NAND chip */
+ chip->ecc.attach_chip = vf610_nfc_attach_chip;
+ err = nand_scan(mtd, 1);
if (err)
goto err_disable_clk;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 43/52] mtd: rawnand: atmel: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 70 +++++++++++-----------------
1 file changed, 27 insertions(+), 43 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 12f6753d47ae..0808bc558bb8 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -197,7 +197,7 @@ struct atmel_nand_controller_ops {
int (*remove)(struct atmel_nand_controller *nc);
void (*nand_init)(struct atmel_nand_controller *nc,
struct atmel_nand *nand);
- int (*ecc_init)(struct atmel_nand *nand);
+ int (*ecc_init)(struct nand_chip *chip);
int (*setup_data_interface)(struct atmel_nand *nand, int csline,
const struct nand_data_interface *conf);
};
@@ -1128,9 +1128,8 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
return 0;
}
-static int atmel_nand_ecc_init(struct atmel_nand *nand)
+static int atmel_nand_ecc_init(struct nand_chip *chip)
{
- struct nand_chip *chip = &nand->base;
struct atmel_nand_controller *nc;
int ret;
@@ -1165,12 +1164,11 @@ static int atmel_nand_ecc_init(struct atmel_nand *nand)
return 0;
}
-static int atmel_hsmc_nand_ecc_init(struct atmel_nand *nand)
+static int atmel_hsmc_nand_ecc_init(struct nand_chip *chip)
{
- struct nand_chip *chip = &nand->base;
int ret;
- ret = atmel_nand_ecc_init(nand);
+ ret = atmel_nand_ecc_init(chip);
if (ret)
return ret;
@@ -1553,22 +1551,6 @@ static void atmel_hsmc_nand_init(struct atmel_nand_controller *nc,
chip->select_chip = atmel_hsmc_nand_select_chip;
}
-static int atmel_nand_detect(struct atmel_nand *nand)
-{
- struct nand_chip *chip = &nand->base;
- struct mtd_info *mtd = nand_to_mtd(chip);
- struct atmel_nand_controller *nc;
- int ret;
-
- nc = to_nand_controller(chip->controller);
-
- ret = nand_scan_ident(mtd, nand->numcs, NULL);
- if (ret)
- dev_err(nc->dev, "nand_scan_ident() failed: %d\n", ret);
-
- return ret;
-}
-
static int atmel_nand_unregister(struct atmel_nand *nand)
{
struct nand_chip *chip = &nand->base;
@@ -1590,7 +1572,6 @@ static int atmel_nand_register(struct atmel_nand *nand)
struct nand_chip *chip = &nand->base;
struct mtd_info *mtd = nand_to_mtd(chip);
struct atmel_nand_controller *nc;
- int ret;
nc = to_nand_controller(chip->controller);
@@ -1621,21 +1602,6 @@ static int atmel_nand_register(struct atmel_nand *nand)
}
}
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(nc->dev, "nand_scan_tail() failed: %d\n", ret);
- return ret;
- }
-
- ret = mtd_device_register(mtd, NULL, 0);
- if (ret) {
- dev_err(nc->dev, "Failed to register mtd device: %d\n", ret);
- nand_cleanup(chip);
- return ret;
- }
-
- list_add_tail(&nand->node, &nc->chips);
-
return 0;
}
@@ -1750,6 +1716,8 @@ static int
atmel_nand_controller_add_nand(struct atmel_nand_controller *nc,
struct atmel_nand *nand)
{
+ struct nand_chip *chip = &nand->base;
+ struct mtd_info *mtd = nand_to_mtd(chip);
int ret;
/* No card inserted, skip this NAND. */
@@ -1760,15 +1728,31 @@ atmel_nand_controller_add_nand(struct atmel_nand_controller *nc,
nc->caps->ops->nand_init(nc, nand);
- ret = atmel_nand_detect(nand);
- if (ret)
+ chip->ecc.attach_chip = nc->caps->ops->ecc_init;
+ ret = nand_scan(mtd, nand->numcs);
+ if (ret) {
+ dev_err(nc->dev, "NAND scan failed: %d\n", ret);
return ret;
+ }
- ret = nc->caps->ops->ecc_init(nand);
+ ret = atmel_nand_register(nand);
if (ret)
- return ret;
+ goto cleanup_nand;
+
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret) {
+ dev_err(nc->dev, "Failed to register mtd device: %d\n", ret);
+ goto cleanup_nand;
+ }
+
+ list_add_tail(&nand->node, &nc->chips);
+
+ return 0;
+
+cleanup_nand:
+ nand_cleanup(chip);
- return atmel_nand_register(nand);
+ return ret;
}
static int
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 43/52] mtd: rawnand: atmel: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 70 +++++++++++-----------------
1 file changed, 27 insertions(+), 43 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 12f6753d47ae..0808bc558bb8 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -197,7 +197,7 @@ struct atmel_nand_controller_ops {
int (*remove)(struct atmel_nand_controller *nc);
void (*nand_init)(struct atmel_nand_controller *nc,
struct atmel_nand *nand);
- int (*ecc_init)(struct atmel_nand *nand);
+ int (*ecc_init)(struct nand_chip *chip);
int (*setup_data_interface)(struct atmel_nand *nand, int csline,
const struct nand_data_interface *conf);
};
@@ -1128,9 +1128,8 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
return 0;
}
-static int atmel_nand_ecc_init(struct atmel_nand *nand)
+static int atmel_nand_ecc_init(struct nand_chip *chip)
{
- struct nand_chip *chip = &nand->base;
struct atmel_nand_controller *nc;
int ret;
@@ -1165,12 +1164,11 @@ static int atmel_nand_ecc_init(struct atmel_nand *nand)
return 0;
}
-static int atmel_hsmc_nand_ecc_init(struct atmel_nand *nand)
+static int atmel_hsmc_nand_ecc_init(struct nand_chip *chip)
{
- struct nand_chip *chip = &nand->base;
int ret;
- ret = atmel_nand_ecc_init(nand);
+ ret = atmel_nand_ecc_init(chip);
if (ret)
return ret;
@@ -1553,22 +1551,6 @@ static void atmel_hsmc_nand_init(struct atmel_nand_controller *nc,
chip->select_chip = atmel_hsmc_nand_select_chip;
}
-static int atmel_nand_detect(struct atmel_nand *nand)
-{
- struct nand_chip *chip = &nand->base;
- struct mtd_info *mtd = nand_to_mtd(chip);
- struct atmel_nand_controller *nc;
- int ret;
-
- nc = to_nand_controller(chip->controller);
-
- ret = nand_scan_ident(mtd, nand->numcs, NULL);
- if (ret)
- dev_err(nc->dev, "nand_scan_ident() failed: %d\n", ret);
-
- return ret;
-}
-
static int atmel_nand_unregister(struct atmel_nand *nand)
{
struct nand_chip *chip = &nand->base;
@@ -1590,7 +1572,6 @@ static int atmel_nand_register(struct atmel_nand *nand)
struct nand_chip *chip = &nand->base;
struct mtd_info *mtd = nand_to_mtd(chip);
struct atmel_nand_controller *nc;
- int ret;
nc = to_nand_controller(chip->controller);
@@ -1621,21 +1602,6 @@ static int atmel_nand_register(struct atmel_nand *nand)
}
}
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(nc->dev, "nand_scan_tail() failed: %d\n", ret);
- return ret;
- }
-
- ret = mtd_device_register(mtd, NULL, 0);
- if (ret) {
- dev_err(nc->dev, "Failed to register mtd device: %d\n", ret);
- nand_cleanup(chip);
- return ret;
- }
-
- list_add_tail(&nand->node, &nc->chips);
-
return 0;
}
@@ -1750,6 +1716,8 @@ static int
atmel_nand_controller_add_nand(struct atmel_nand_controller *nc,
struct atmel_nand *nand)
{
+ struct nand_chip *chip = &nand->base;
+ struct mtd_info *mtd = nand_to_mtd(chip);
int ret;
/* No card inserted, skip this NAND. */
@@ -1760,15 +1728,31 @@ atmel_nand_controller_add_nand(struct atmel_nand_controller *nc,
nc->caps->ops->nand_init(nc, nand);
- ret = atmel_nand_detect(nand);
- if (ret)
+ chip->ecc.attach_chip = nc->caps->ops->ecc_init;
+ ret = nand_scan(mtd, nand->numcs);
+ if (ret) {
+ dev_err(nc->dev, "NAND scan failed: %d\n", ret);
return ret;
+ }
- ret = nc->caps->ops->ecc_init(nand);
+ ret = atmel_nand_register(nand);
if (ret)
- return ret;
+ goto cleanup_nand;
+
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret) {
+ dev_err(nc->dev, "Failed to register mtd device: %d\n", ret);
+ goto cleanup_nand;
+ }
+
+ list_add_tail(&nand->node, &nc->chips);
+
+ return 0;
+
+cleanup_nand:
+ nand_cleanup(chip);
- return atmel_nand_register(nand);
+ return ret;
}
static int
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 44/52] mtd: rawnand: add a field in nand_chip to fill an array of IDs
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Add an alternate way to give to the core another ID table to later
remove the one given in nand_scan_ident() as part of the migration to
nand_scan().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 8 ++++++--
include/linux/mtd/rawnand.h | 3 +++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 182904b2fc07..0d850dbf843d 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5594,8 +5594,12 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
manufacturer = nand_get_manufacturer(maf_id);
chip->manufacturer.desc = manufacturer;
- if (!type)
- type = nand_flash_ids;
+ if (!type) {
+ if (chip->flash_ids)
+ type = chip->flash_ids;
+ else
+ type = nand_flash_ids;
+ }
/*
* Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 53bb6ef1a7c2..318c73a206fc 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1201,6 +1201,7 @@ int nand_op_parser_exec_op(struct nand_chip *chip,
* chipnr is set to %NAND_DATA_IFACE_CHECK_ONLY this
* means the configuration should not be applied but
* only checked.
+ * @flash_ids: [OPTIONAL] local NAND flash ID table
* @bbt: [INTERN] bad block table pointer
* @bbt_td: [REPLACEABLE] bad block table descriptor for flash
* lookup.
@@ -1287,6 +1288,8 @@ struct nand_chip {
unsigned long buf_align;
struct nand_hw_control hwcontrol;
+ struct nand_flash_dev *flash_ids;
+
uint8_t *bbt;
struct nand_bbt_descr *bbt_td;
struct nand_bbt_descr *bbt_md;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 44/52] mtd: rawnand: add a field in nand_chip to fill an array of IDs
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Add an alternate way to give to the core another ID table to later
remove the one given in nand_scan_ident() as part of the migration to
nand_scan().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 8 ++++++--
include/linux/mtd/rawnand.h | 3 +++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 182904b2fc07..0d850dbf843d 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5594,8 +5594,12 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
manufacturer = nand_get_manufacturer(maf_id);
chip->manufacturer.desc = manufacturer;
- if (!type)
- type = nand_flash_ids;
+ if (!type) {
+ if (chip->flash_ids)
+ type = chip->flash_ids;
+ else
+ type = nand_flash_ids;
+ }
/*
* Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 53bb6ef1a7c2..318c73a206fc 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1201,6 +1201,7 @@ int nand_op_parser_exec_op(struct nand_chip *chip,
* chipnr is set to %NAND_DATA_IFACE_CHECK_ONLY this
* means the configuration should not be applied but
* only checked.
+ * @flash_ids: [OPTIONAL] local NAND flash ID table
* @bbt: [INTERN] bad block table pointer
* @bbt_td: [REPLACEABLE] bad block table descriptor for flash
* lookup.
@@ -1287,6 +1288,8 @@ struct nand_chip {
unsigned long buf_align;
struct nand_hw_control hwcontrol;
+ struct nand_flash_dev *flash_ids;
+
uint8_t *bbt;
struct nand_bbt_descr *bbt_td;
struct nand_bbt_descr *bbt_md;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 45/52] mtd: rawnand: sm_common: make use of the new flash_ids table entry
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Use the new entry in nand_chip to fill a local ID table instead of the
traditional way through nand_scan_ident() as part of the transition to
use nand_scan() in every driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sm_common.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/sm_common.c b/drivers/mtd/nand/raw/sm_common.c
index c378705c6e2b..71b791634ee4 100644
--- a/drivers/mtd/nand/raw/sm_common.c
+++ b/drivers/mtd/nand/raw/sm_common.c
@@ -169,8 +169,9 @@ int sm_register_device(struct mtd_info *mtd, int smartmedia)
chip->options |= NAND_SKIP_BBTSCAN;
/* Scan for card properties */
- ret = nand_scan_ident(mtd, 1, smartmedia ?
- nand_smartmedia_flash_ids : nand_xd_flash_ids);
+ chip->flash_ids = smartmedia ? nand_smartmedia_flash_ids :
+ nand_xd_flash_ids;
+ ret = nand_scan_ident(mtd, 1, NULL);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 45/52] mtd: rawnand: sm_common: make use of the new flash_ids table entry
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Use the new entry in nand_chip to fill a local ID table instead of the
traditional way through nand_scan_ident() as part of the transition to
use nand_scan() in every driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sm_common.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/sm_common.c b/drivers/mtd/nand/raw/sm_common.c
index c378705c6e2b..71b791634ee4 100644
--- a/drivers/mtd/nand/raw/sm_common.c
+++ b/drivers/mtd/nand/raw/sm_common.c
@@ -169,8 +169,9 @@ int sm_register_device(struct mtd_info *mtd, int smartmedia)
chip->options |= NAND_SKIP_BBTSCAN;
/* Scan for card properties */
- ret = nand_scan_ident(mtd, 1, smartmedia ?
- nand_smartmedia_flash_ids : nand_xd_flash_ids);
+ chip->flash_ids = smartmedia ? nand_smartmedia_flash_ids :
+ nand_xd_flash_ids;
+ ret = nand_scan_ident(mtd, 1, NULL);
if (ret)
return ret;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 46/52] mtd: rawnand: sm_common: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sm_common.c | 36 +++++++++++++++++++++---------------
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/drivers/mtd/nand/raw/sm_common.c b/drivers/mtd/nand/raw/sm_common.c
index 71b791634ee4..895cc2e455e5 100644
--- a/drivers/mtd/nand/raw/sm_common.c
+++ b/drivers/mtd/nand/raw/sm_common.c
@@ -161,20 +161,9 @@ static struct nand_flash_dev nand_xd_flash_ids[] = {
{NULL}
};
-int sm_register_device(struct mtd_info *mtd, int smartmedia)
+static int sm_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
- int ret;
-
- chip->options |= NAND_SKIP_BBTSCAN;
-
- /* Scan for card properties */
- chip->flash_ids = smartmedia ? nand_smartmedia_flash_ids :
- nand_xd_flash_ids;
- ret = nand_scan_ident(mtd, 1, NULL);
-
- if (ret)
- return ret;
+ struct mtd_info *mtd = nand_to_mtd(chip);
/* Bad block marker position */
chip->badblockpos = 0x05;
@@ -189,12 +178,29 @@ int sm_register_device(struct mtd_info *mtd, int smartmedia)
else
return -ENODEV;
- ret = nand_scan_tail(mtd);
+ return 0;
+}
+int sm_register_device(struct mtd_info *mtd, int smartmedia)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ int ret;
+
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ /* Scan for card properties */
+ chip->flash_ids = smartmedia ? nand_smartmedia_flash_ids :
+ nand_xd_flash_ids;
+ chip->ecc.attach_chip = sm_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
- return mtd_device_register(mtd, NULL, 0);
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret)
+ nand_release(mtd);
+
+ return ret;
}
EXPORT_SYMBOL_GPL(sm_register_device);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 46/52] mtd: rawnand: sm_common: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/sm_common.c | 36 +++++++++++++++++++++---------------
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/drivers/mtd/nand/raw/sm_common.c b/drivers/mtd/nand/raw/sm_common.c
index 71b791634ee4..895cc2e455e5 100644
--- a/drivers/mtd/nand/raw/sm_common.c
+++ b/drivers/mtd/nand/raw/sm_common.c
@@ -161,20 +161,9 @@ static struct nand_flash_dev nand_xd_flash_ids[] = {
{NULL}
};
-int sm_register_device(struct mtd_info *mtd, int smartmedia)
+static int sm_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = mtd_to_nand(mtd);
- int ret;
-
- chip->options |= NAND_SKIP_BBTSCAN;
-
- /* Scan for card properties */
- chip->flash_ids = smartmedia ? nand_smartmedia_flash_ids :
- nand_xd_flash_ids;
- ret = nand_scan_ident(mtd, 1, NULL);
-
- if (ret)
- return ret;
+ struct mtd_info *mtd = nand_to_mtd(chip);
/* Bad block marker position */
chip->badblockpos = 0x05;
@@ -189,12 +178,29 @@ int sm_register_device(struct mtd_info *mtd, int smartmedia)
else
return -ENODEV;
- ret = nand_scan_tail(mtd);
+ return 0;
+}
+int sm_register_device(struct mtd_info *mtd, int smartmedia)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ int ret;
+
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ /* Scan for card properties */
+ chip->flash_ids = smartmedia ? nand_smartmedia_flash_ids :
+ nand_xd_flash_ids;
+ chip->ecc.attach_chip = sm_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
- return mtd_device_register(mtd, NULL, 0);
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret)
+ nand_release(mtd);
+
+ return ret;
}
EXPORT_SYMBOL_GPL(sm_register_device);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 47/52] mtd: rawnand: docg4: fix the probe function error path
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
An error after nand_scan_tail() call should trigger a nand_release()
call. This is rightly handled in the remove function, but not in the
probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/docg4.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/raw/docg4.c b/drivers/mtd/nand/raw/docg4.c
index 1314aa99b9ab..1d3d5ac24381 100644
--- a/drivers/mtd/nand/raw/docg4.c
+++ b/drivers/mtd/nand/raw/docg4.c
@@ -1341,7 +1341,7 @@ static int __init probe_docg4(struct platform_device *pdev)
nand = kzalloc(len, GFP_KERNEL);
if (nand == NULL) {
retval = -ENOMEM;
- goto fail_unmap;
+ goto unmap;
}
mtd = nand_to_mtd(nand);
@@ -1357,7 +1357,7 @@ static int __init probe_docg4(struct platform_device *pdev)
doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
if (doc->bch == NULL) {
retval = -EINVAL;
- goto fail;
+ goto free_nand;
}
platform_set_drvdata(pdev, doc);
@@ -1366,30 +1366,32 @@ static int __init probe_docg4(struct platform_device *pdev)
retval = read_id_reg(mtd);
if (retval == -ENODEV) {
dev_warn(dev, "No diskonchip G4 device found.\n");
- goto fail;
+ goto free_bch;
}
retval = nand_scan_tail(mtd);
if (retval)
- goto fail;
+ goto free_bch;
retval = read_factory_bbt(mtd);
if (retval)
- goto fail;
+ goto release_nand;
retval = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
if (retval)
- goto fail;
+ goto release_nand;
doc->mtd = mtd;
+
return 0;
-fail:
+release_nand:
nand_release(mtd); /* deletes partitions and mtd devices */
+free_bch:
free_bch(doc->bch);
+free_nand:
kfree(nand);
-
-fail_unmap:
+unmap:
iounmap(virtadr);
return retval;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 47/52] mtd: rawnand: docg4: fix the probe function error path
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
An error after nand_scan_tail() call should trigger a nand_release()
call. This is rightly handled in the remove function, but not in the
probe function.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/docg4.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/raw/docg4.c b/drivers/mtd/nand/raw/docg4.c
index 1314aa99b9ab..1d3d5ac24381 100644
--- a/drivers/mtd/nand/raw/docg4.c
+++ b/drivers/mtd/nand/raw/docg4.c
@@ -1341,7 +1341,7 @@ static int __init probe_docg4(struct platform_device *pdev)
nand = kzalloc(len, GFP_KERNEL);
if (nand == NULL) {
retval = -ENOMEM;
- goto fail_unmap;
+ goto unmap;
}
mtd = nand_to_mtd(nand);
@@ -1357,7 +1357,7 @@ static int __init probe_docg4(struct platform_device *pdev)
doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
if (doc->bch == NULL) {
retval = -EINVAL;
- goto fail;
+ goto free_nand;
}
platform_set_drvdata(pdev, doc);
@@ -1366,30 +1366,32 @@ static int __init probe_docg4(struct platform_device *pdev)
retval = read_id_reg(mtd);
if (retval == -ENODEV) {
dev_warn(dev, "No diskonchip G4 device found.\n");
- goto fail;
+ goto free_bch;
}
retval = nand_scan_tail(mtd);
if (retval)
- goto fail;
+ goto free_bch;
retval = read_factory_bbt(mtd);
if (retval)
- goto fail;
+ goto release_nand;
retval = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
if (retval)
- goto fail;
+ goto release_nand;
doc->mtd = mtd;
+
return 0;
-fail:
+release_nand:
nand_release(mtd); /* deletes partitions and mtd devices */
+free_bch:
free_bch(doc->bch);
+free_nand:
kfree(nand);
-
-fail_unmap:
+unmap:
iounmap(virtadr);
return retval;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 48/52] mtd: rawnand: docg4: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/docg4.c | 51 ++++++++++++++++++++++++--------------------
1 file changed, 28 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/docg4.c b/drivers/mtd/nand/raw/docg4.c
index 1d3d5ac24381..dce040d75af0 100644
--- a/drivers/mtd/nand/raw/docg4.c
+++ b/drivers/mtd/nand/raw/docg4.c
@@ -1227,10 +1227,9 @@ static void __init init_mtd_structs(struct mtd_info *mtd)
* required within a nand driver because they are performed by the nand
* infrastructure code as part of nand_scan(). In this case they need
* to be initialized here because we skip call to nand_scan_ident() (the
- * first half of nand_scan()). The call to nand_scan_ident() is skipped
- * because for this device the chip id is not read in the manner of a
- * standard nand device. Unfortunately, nand_scan_ident() does other
- * things as well, such as call nand_set_defaults().
+ * first half of nand_scan()). The call to nand_scan_ident() could be
+ * skipped because for this device the chip id is not read in the manner
+ * of a standard nand device.
*/
struct nand_chip *nand = mtd_to_nand(mtd);
@@ -1315,6 +1314,23 @@ static int __init read_id_reg(struct mtd_info *mtd)
static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL };
+static int docg4_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct docg4_priv *doc = (struct docg4_priv *)(chip + 1);
+
+ init_mtd_structs(mtd);
+
+ /* Initialize kernel BCH algorithm */
+ doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
+ if (!doc->bch)
+ return -EINVAL;
+
+ reset(mtd);
+
+ return read_id_reg(mtd);
+}
+
static int __init probe_docg4(struct platform_device *pdev)
{
struct mtd_info *mtd;
@@ -1350,26 +1366,16 @@ static int __init probe_docg4(struct platform_device *pdev)
mtd->dev.parent = &pdev->dev;
doc->virtadr = virtadr;
doc->dev = dev;
-
- init_mtd_structs(mtd);
-
- /* initialize kernel bch algorithm */
- doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
- if (doc->bch == NULL) {
- retval = -EINVAL;
- goto free_nand;
- }
-
platform_set_drvdata(pdev, doc);
- reset(mtd);
- retval = read_id_reg(mtd);
- if (retval == -ENODEV) {
- dev_warn(dev, "No diskonchip G4 device found.\n");
- goto free_bch;
- }
-
- retval = nand_scan_tail(mtd);
+ /*
+ * Asking for 0 chips is useless here but it warns the user that the use
+ * of the nand_scan() function is a bit abused here because the
+ * initialization is actually a bit specific and re-handled again in the
+ * ->attach_chip() hook. It will probably leak some memory though.
+ */
+ nand->ecc.attach_chip = docg4_attach_chip;
+ retval = nand_scan(mtd, 0);
if (retval)
goto free_bch;
@@ -1389,7 +1395,6 @@ static int __init probe_docg4(struct platform_device *pdev)
nand_release(mtd); /* deletes partitions and mtd devices */
free_bch:
free_bch(doc->bch);
-free_nand:
kfree(nand);
unmap:
iounmap(virtadr);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 48/52] mtd: rawnand: docg4: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/docg4.c | 51 ++++++++++++++++++++++++--------------------
1 file changed, 28 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/docg4.c b/drivers/mtd/nand/raw/docg4.c
index 1d3d5ac24381..dce040d75af0 100644
--- a/drivers/mtd/nand/raw/docg4.c
+++ b/drivers/mtd/nand/raw/docg4.c
@@ -1227,10 +1227,9 @@ static void __init init_mtd_structs(struct mtd_info *mtd)
* required within a nand driver because they are performed by the nand
* infrastructure code as part of nand_scan(). In this case they need
* to be initialized here because we skip call to nand_scan_ident() (the
- * first half of nand_scan()). The call to nand_scan_ident() is skipped
- * because for this device the chip id is not read in the manner of a
- * standard nand device. Unfortunately, nand_scan_ident() does other
- * things as well, such as call nand_set_defaults().
+ * first half of nand_scan()). The call to nand_scan_ident() could be
+ * skipped because for this device the chip id is not read in the manner
+ * of a standard nand device.
*/
struct nand_chip *nand = mtd_to_nand(mtd);
@@ -1315,6 +1314,23 @@ static int __init read_id_reg(struct mtd_info *mtd)
static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL };
+static int docg4_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct docg4_priv *doc = (struct docg4_priv *)(chip + 1);
+
+ init_mtd_structs(mtd);
+
+ /* Initialize kernel BCH algorithm */
+ doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
+ if (!doc->bch)
+ return -EINVAL;
+
+ reset(mtd);
+
+ return read_id_reg(mtd);
+}
+
static int __init probe_docg4(struct platform_device *pdev)
{
struct mtd_info *mtd;
@@ -1350,26 +1366,16 @@ static int __init probe_docg4(struct platform_device *pdev)
mtd->dev.parent = &pdev->dev;
doc->virtadr = virtadr;
doc->dev = dev;
-
- init_mtd_structs(mtd);
-
- /* initialize kernel bch algorithm */
- doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
- if (doc->bch == NULL) {
- retval = -EINVAL;
- goto free_nand;
- }
-
platform_set_drvdata(pdev, doc);
- reset(mtd);
- retval = read_id_reg(mtd);
- if (retval == -ENODEV) {
- dev_warn(dev, "No diskonchip G4 device found.\n");
- goto free_bch;
- }
-
- retval = nand_scan_tail(mtd);
+ /*
+ * Asking for 0 chips is useless here but it warns the user that the use
+ * of the nand_scan() function is a bit abused here because the
+ * initialization is actually a bit specific and re-handled again in the
+ * ->attach_chip() hook. It will probably leak some memory though.
+ */
+ nand->ecc.attach_chip = docg4_attach_chip;
+ retval = nand_scan(mtd, 0);
if (retval)
goto free_bch;
@@ -1389,7 +1395,6 @@ static int __init probe_docg4(struct platform_device *pdev)
nand_release(mtd); /* deletes partitions and mtd devices */
free_bch:
free_bch(doc->bch);
-free_nand:
kfree(nand);
unmap:
iounmap(virtadr);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 49/52] mtd: rawnand: qcom: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/qcom_nandc.c | 67 ++++++++++++---------------------------
1 file changed, 20 insertions(+), 47 deletions(-)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index b554fb6e609c..d45b4e50e6a5 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -2315,10 +2315,10 @@ static const struct mtd_ooblayout_ops qcom_nand_ooblayout_ops = {
.free = qcom_nand_ooblayout_free,
};
-static int qcom_nand_host_setup(struct qcom_nand_host *host)
+static int qcom_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &host->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct qcom_nand_host *host = to_qcom_nand_host(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
int cwperpage, bad_block_byte;
@@ -2623,9 +2623,9 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
return 0;
}
-static int qcom_nand_host_init(struct qcom_nand_controller *nandc,
- struct qcom_nand_host *host,
- struct device_node *dn)
+static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
+ struct qcom_nand_host *host,
+ struct device_node *dn)
{
struct nand_chip *chip = &host->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
@@ -2672,30 +2672,14 @@ static int qcom_nand_host_init(struct qcom_nand_controller *nandc,
/* set up initial status value */
host->status = NAND_STATUS_READY | NAND_STATUS_WP;
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
-
- ret = qcom_nand_host_setup(host);
-
- return ret;
-}
-
-static int qcom_nand_mtd_register(struct qcom_nand_controller *nandc,
- struct qcom_nand_host *host,
- struct device_node *dn)
-{
- struct nand_chip *chip = &host->chip;
- struct mtd_info *mtd = nand_to_mtd(chip);
- int ret;
-
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = qcom_nand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
ret = mtd_device_register(mtd, NULL, 0);
if (ret)
- nand_cleanup(mtd_to_nand(mtd));
+ nand_cleanup(chip);
return ret;
}
@@ -2704,9 +2688,19 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc)
{
struct device *dev = nandc->dev;
struct device_node *dn = dev->of_node, *child;
- struct qcom_nand_host *host, *tmp;
+ struct qcom_nand_host *host;
int ret;
+ if (nandc->props->is_bam) {
+ free_bam_transaction(nandc);
+ nandc->bam_txn = alloc_bam_transaction(nandc);
+ if (!nandc->bam_txn) {
+ dev_err(nandc->dev,
+ "failed to allocate bam transaction\n");
+ return -ENOMEM;
+ }
+ }
+
for_each_available_child_of_node(dn, child) {
host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
if (!host) {
@@ -2714,7 +2708,7 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc)
return -ENOMEM;
}
- ret = qcom_nand_host_init(nandc, host, child);
+ ret = qcom_nand_host_init_and_register(nandc, host, child);
if (ret) {
devm_kfree(dev, host);
continue;
@@ -2723,27 +2717,6 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc)
list_add_tail(&host->node, &nandc->host_list);
}
- if (list_empty(&nandc->host_list))
- return -ENODEV;
-
- if (nandc->props->is_bam) {
- free_bam_transaction(nandc);
- nandc->bam_txn = alloc_bam_transaction(nandc);
- if (!nandc->bam_txn) {
- dev_err(nandc->dev,
- "failed to allocate bam transaction\n");
- return -ENOMEM;
- }
- }
-
- list_for_each_entry_safe(host, tmp, &nandc->host_list, node) {
- ret = qcom_nand_mtd_register(nandc, host, child);
- if (ret) {
- list_del(&host->node);
- devm_kfree(dev, host);
- }
- }
-
if (list_empty(&nandc->host_list))
return -ENODEV;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 49/52] mtd: rawnand: qcom: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/qcom_nandc.c | 67 ++++++++++++---------------------------
1 file changed, 20 insertions(+), 47 deletions(-)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index b554fb6e609c..d45b4e50e6a5 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -2315,10 +2315,10 @@ static const struct mtd_ooblayout_ops qcom_nand_ooblayout_ops = {
.free = qcom_nand_ooblayout_free,
};
-static int qcom_nand_host_setup(struct qcom_nand_host *host)
+static int qcom_nand_attach_chip(struct nand_chip *chip)
{
- struct nand_chip *chip = &host->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct qcom_nand_host *host = to_qcom_nand_host(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
int cwperpage, bad_block_byte;
@@ -2623,9 +2623,9 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
return 0;
}
-static int qcom_nand_host_init(struct qcom_nand_controller *nandc,
- struct qcom_nand_host *host,
- struct device_node *dn)
+static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
+ struct qcom_nand_host *host,
+ struct device_node *dn)
{
struct nand_chip *chip = &host->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
@@ -2672,30 +2672,14 @@ static int qcom_nand_host_init(struct qcom_nand_controller *nandc,
/* set up initial status value */
host->status = NAND_STATUS_READY | NAND_STATUS_WP;
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret)
- return ret;
-
- ret = qcom_nand_host_setup(host);
-
- return ret;
-}
-
-static int qcom_nand_mtd_register(struct qcom_nand_controller *nandc,
- struct qcom_nand_host *host,
- struct device_node *dn)
-{
- struct nand_chip *chip = &host->chip;
- struct mtd_info *mtd = nand_to_mtd(chip);
- int ret;
-
- ret = nand_scan_tail(mtd);
+ chip->ecc.attach_chip = qcom_nand_attach_chip;
+ ret = nand_scan(mtd, 1);
if (ret)
return ret;
ret = mtd_device_register(mtd, NULL, 0);
if (ret)
- nand_cleanup(mtd_to_nand(mtd));
+ nand_cleanup(chip);
return ret;
}
@@ -2704,9 +2688,19 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc)
{
struct device *dev = nandc->dev;
struct device_node *dn = dev->of_node, *child;
- struct qcom_nand_host *host, *tmp;
+ struct qcom_nand_host *host;
int ret;
+ if (nandc->props->is_bam) {
+ free_bam_transaction(nandc);
+ nandc->bam_txn = alloc_bam_transaction(nandc);
+ if (!nandc->bam_txn) {
+ dev_err(nandc->dev,
+ "failed to allocate bam transaction\n");
+ return -ENOMEM;
+ }
+ }
+
for_each_available_child_of_node(dn, child) {
host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
if (!host) {
@@ -2714,7 +2708,7 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc)
return -ENOMEM;
}
- ret = qcom_nand_host_init(nandc, host, child);
+ ret = qcom_nand_host_init_and_register(nandc, host, child);
if (ret) {
devm_kfree(dev, host);
continue;
@@ -2723,27 +2717,6 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc)
list_add_tail(&host->node, &nandc->host_list);
}
- if (list_empty(&nandc->host_list))
- return -ENODEV;
-
- if (nandc->props->is_bam) {
- free_bam_transaction(nandc);
- nandc->bam_txn = alloc_bam_transaction(nandc);
- if (!nandc->bam_txn) {
- dev_err(nandc->dev,
- "failed to allocate bam transaction\n");
- return -ENOMEM;
- }
- }
-
- list_for_each_entry_safe(host, tmp, &nandc->host_list, node) {
- ret = qcom_nand_mtd_register(nandc, host, child);
- if (ret) {
- list_del(&host->node);
- devm_kfree(dev, host);
- }
- }
-
if (list_empty(&nandc->host_list))
return -ENODEV;
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 50/52] mtd: rawnand: jz4740: convert driver to nand_scan()
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/jz4740_nand.c | 42 +++++++++++++++++++++++---------------
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git a/drivers/mtd/nand/raw/jz4740_nand.c b/drivers/mtd/nand/raw/jz4740_nand.c
index 613b00a9604b..740145fd9ff2 100644
--- a/drivers/mtd/nand/raw/jz4740_nand.c
+++ b/drivers/mtd/nand/raw/jz4740_nand.c
@@ -59,6 +59,7 @@
struct jz_nand {
struct nand_chip chip;
+ struct platform_device *pdev;
void __iomem *base;
struct resource *mem;
@@ -329,8 +330,8 @@ static int jz_nand_detect_bank(struct platform_device *pdev,
writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
if (chipnr == 0) {
- /* Detect first chip. */
- ret = nand_scan_ident(mtd, 1, NULL);
+ /* Detect the first chip and register it */
+ ret = nand_scan(mtd, 1);
if (ret)
goto notfound_id;
@@ -367,6 +368,21 @@ static int jz_nand_detect_bank(struct platform_device *pdev,
return ret;
}
+static int jz_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct jz_nand *nand = mtd_to_jz_nand(mtd);
+ struct device *dev = mtd->dev.parent;
+ struct jz_nand_platform_data *pdata = dev_get_platdata(dev);
+
+ if (pdata && pdata->ident_callback) {
+ pdata->ident_callback(nand->pdev, mtd, &pdata->partitions,
+ &pdata->num_partitions);
+ }
+
+ return 0;
+}
+
static int jz_nand_probe(struct platform_device *pdev)
{
int ret;
@@ -397,6 +413,7 @@ static int jz_nand_probe(struct platform_device *pdev)
mtd = nand_to_mtd(chip);
mtd->dev.parent = &pdev->dev;
mtd->name = "jz4740-nand";
+ nand->pdev = pdev;
chip->ecc.hwctl = jz_nand_hwctl;
chip->ecc.calculate = jz_nand_calculate_ecc_rs;
@@ -406,6 +423,7 @@ static int jz_nand_probe(struct platform_device *pdev)
chip->ecc.bytes = 9;
chip->ecc.strength = 4;
chip->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+ chip->ecc.attach_chip = jz_nand_attach_chip;
chip->chip_delay = 50;
chip->cmd_ctrl = jz_nand_cmd_ctrl;
@@ -450,20 +468,10 @@ static int jz_nand_probe(struct platform_device *pdev)
else
nand->banks[chipnr] = 0;
}
+
if (chipnr == 0) {
dev_err(&pdev->dev, "No NAND chips found\n");
- goto err_iounmap_mmio;
- }
-
- if (pdata && pdata->ident_callback) {
- pdata->ident_callback(pdev, mtd, &pdata->partitions,
- &pdata->num_partitions);
- }
-
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(&pdev->dev, "Failed to scan NAND\n");
- goto err_unclaim_banks;
+ goto err_nand_release;
}
ret = mtd_device_parse_register(mtd, NULL, NULL,
@@ -472,15 +480,13 @@ static int jz_nand_probe(struct platform_device *pdev)
if (ret) {
dev_err(&pdev->dev, "Failed to add mtd device\n");
- goto err_nand_release;
+ goto err_unclaim_banks;
}
dev_info(&pdev->dev, "Successfully registered JZ4740 NAND driver\n");
return 0;
-err_nand_release:
- nand_release(mtd);
err_unclaim_banks:
while (chipnr--) {
unsigned char bank = nand->banks[chipnr];
@@ -488,6 +494,8 @@ static int jz_nand_probe(struct platform_device *pdev)
nand->bank_base[bank - 1]);
}
writel(0, nand->base + JZ_REG_NAND_CTRL);
+err_nand_release:
+ nand_release(mtd);
err_iounmap_mmio:
jz_nand_iounmap_resource(nand->mem, nand->base);
err_free:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 50/52] mtd: rawnand: jz4740: convert driver to nand_scan()
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Two helpers have been added to the core to make ECC-related
configuration between the detection phase and the final NAND scan. Use
these hooks and convert the driver to just use nand_scan() instead of
both nand_scan_ident() and nand_scan_tail().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/jz4740_nand.c | 42 +++++++++++++++++++++++---------------
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git a/drivers/mtd/nand/raw/jz4740_nand.c b/drivers/mtd/nand/raw/jz4740_nand.c
index 613b00a9604b..740145fd9ff2 100644
--- a/drivers/mtd/nand/raw/jz4740_nand.c
+++ b/drivers/mtd/nand/raw/jz4740_nand.c
@@ -59,6 +59,7 @@
struct jz_nand {
struct nand_chip chip;
+ struct platform_device *pdev;
void __iomem *base;
struct resource *mem;
@@ -329,8 +330,8 @@ static int jz_nand_detect_bank(struct platform_device *pdev,
writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
if (chipnr == 0) {
- /* Detect first chip. */
- ret = nand_scan_ident(mtd, 1, NULL);
+ /* Detect the first chip and register it */
+ ret = nand_scan(mtd, 1);
if (ret)
goto notfound_id;
@@ -367,6 +368,21 @@ static int jz_nand_detect_bank(struct platform_device *pdev,
return ret;
}
+static int jz_nand_attach_chip(struct nand_chip *chip)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct jz_nand *nand = mtd_to_jz_nand(mtd);
+ struct device *dev = mtd->dev.parent;
+ struct jz_nand_platform_data *pdata = dev_get_platdata(dev);
+
+ if (pdata && pdata->ident_callback) {
+ pdata->ident_callback(nand->pdev, mtd, &pdata->partitions,
+ &pdata->num_partitions);
+ }
+
+ return 0;
+}
+
static int jz_nand_probe(struct platform_device *pdev)
{
int ret;
@@ -397,6 +413,7 @@ static int jz_nand_probe(struct platform_device *pdev)
mtd = nand_to_mtd(chip);
mtd->dev.parent = &pdev->dev;
mtd->name = "jz4740-nand";
+ nand->pdev = pdev;
chip->ecc.hwctl = jz_nand_hwctl;
chip->ecc.calculate = jz_nand_calculate_ecc_rs;
@@ -406,6 +423,7 @@ static int jz_nand_probe(struct platform_device *pdev)
chip->ecc.bytes = 9;
chip->ecc.strength = 4;
chip->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+ chip->ecc.attach_chip = jz_nand_attach_chip;
chip->chip_delay = 50;
chip->cmd_ctrl = jz_nand_cmd_ctrl;
@@ -450,20 +468,10 @@ static int jz_nand_probe(struct platform_device *pdev)
else
nand->banks[chipnr] = 0;
}
+
if (chipnr == 0) {
dev_err(&pdev->dev, "No NAND chips found\n");
- goto err_iounmap_mmio;
- }
-
- if (pdata && pdata->ident_callback) {
- pdata->ident_callback(pdev, mtd, &pdata->partitions,
- &pdata->num_partitions);
- }
-
- ret = nand_scan_tail(mtd);
- if (ret) {
- dev_err(&pdev->dev, "Failed to scan NAND\n");
- goto err_unclaim_banks;
+ goto err_nand_release;
}
ret = mtd_device_parse_register(mtd, NULL, NULL,
@@ -472,15 +480,13 @@ static int jz_nand_probe(struct platform_device *pdev)
if (ret) {
dev_err(&pdev->dev, "Failed to add mtd device\n");
- goto err_nand_release;
+ goto err_unclaim_banks;
}
dev_info(&pdev->dev, "Successfully registered JZ4740 NAND driver\n");
return 0;
-err_nand_release:
- nand_release(mtd);
err_unclaim_banks:
while (chipnr--) {
unsigned char bank = nand->banks[chipnr];
@@ -488,6 +494,8 @@ static int jz_nand_probe(struct platform_device *pdev)
nand->bank_base[bank - 1]);
}
writel(0, nand->base + JZ_REG_NAND_CTRL);
+err_nand_release:
+ nand_release(mtd);
err_iounmap_mmio:
jz_nand_iounmap_resource(nand->mem, nand->base);
err_free:
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 51/52] mtd: rawnand: do not export nand_scan_[ident|tail]() anymore
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:03 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Both nand_scan_ident() and nand_scan_tail() helpers used to be called
directly from controller drivers that needed to tweak some ECC-related
parameters before nand_scan_tail(). This separation prevented dynamic
allocations during the phase of NAND identification, which was
inconvenient.
All controller drivers have been moved to use nand_scan(), in
conjunction with the chip->ecc.[attach|detach]_chip() hooks that
actually do the required tweaking sequence between both ident/tail
calls, allowing programmers to use dynamic allocation as they need all
across the scanning sequence.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 54 ++++++++++++++++++++++++++++++++--------
include/linux/mtd/rawnand.h | 12 +++------
2 files changed, 48 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 0d850dbf843d..82d52112907f 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5100,6 +5100,7 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_onfi_params *p;
+ char *model;
char id[4];
int i, ret, val;
@@ -5159,7 +5160,14 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
sanitize_string(p->manufacturer, sizeof(p->manufacturer));
sanitize_string(p->model, sizeof(p->model));
- memcpy(chip->parameters.model, p->model, sizeof(p->model));
+ model = kzalloc(sizeof(p->model), GFP_KERNEL);
+ if (!model) {
+ ret = -ENOMEM;
+ goto free_onfi_param_page;
+ }
+
+ memcpy(model, p->model, sizeof(p->model));
+ chip->parameters.model = model;
if (!mtd->name)
mtd->name = chip->parameters.model;
@@ -5240,6 +5248,7 @@ static int nand_flash_detect_jedec(struct nand_chip *chip)
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_jedec_params *p;
struct jedec_ecc_info *ecc;
+ char *model;
char id[5];
int i, val, ret;
@@ -5290,7 +5299,14 @@ static int nand_flash_detect_jedec(struct nand_chip *chip)
sanitize_string(p->manufacturer, sizeof(p->manufacturer));
sanitize_string(p->model, sizeof(p->model));
- memcpy(chip->parameters.model, p->model, sizeof(p->model));
+ model = kzalloc(sizeof(p->model), GFP_KERNEL);
+ if (!p) {
+ ret = -ENOMEM;
+ goto free_jedec_param_page;
+ }
+
+ memcpy(model, p->model, sizeof(p->model));
+ chip->parameters.model = model;
if (!mtd->name)
mtd->name = chip->parameters.model;
@@ -5858,7 +5874,7 @@ static int nand_dt_init(struct nand_chip *chip)
}
/**
- * nand_scan_ident - [NAND Interface] Scan for the NAND device
+ * nand_scan_ident - Scan for the NAND device
* @mtd: MTD device structure
* @maxchips: number of chips to scan for
* @table: alternative NAND ID table
@@ -5866,9 +5882,13 @@ static int nand_dt_init(struct nand_chip *chip)
* This is the first phase of the normal nand_scan() function. It reads the
* flash ID and sets up MTD fields accordingly.
*
+ * This helper used to be called directly from controller drivers that needed
+ * to tweak some ECC-related parameters before nand_scan_tail(). This separation
+ * prevented dynamic allocations during this phase which was unconvenient and
+ * as been banned for the benefit of the ->init_ecc()/cleanup_ecc() hooks.
*/
-int nand_scan_ident(struct mtd_info *mtd, int maxchips,
- struct nand_flash_dev *table)
+static int nand_scan_ident(struct mtd_info *mtd, int maxchips,
+ struct nand_flash_dev *table)
{
int i, nand_maf_id, nand_dev_id;
struct nand_chip *chip = mtd_to_nand(mtd);
@@ -5942,7 +5962,11 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
return 0;
}
-EXPORT_SYMBOL(nand_scan_ident);
+
+static void nand_scan_ident_cleanup(struct nand_chip *chip)
+{
+ kfree(chip->parameters.model);
+}
static int nand_set_ecc_soft_ops(struct mtd_info *mtd)
{
@@ -6295,14 +6319,14 @@ static bool nand_ecc_strength_good(struct mtd_info *mtd)
}
/**
- * nand_scan_tail - [NAND Interface] Scan for the NAND device
+ * nand_scan_tail - Scan for the NAND device
* @mtd: MTD device structure
*
* This is the second phase of the normal nand_scan() function. It fills out
* all the uninitialized function pointers with the defaults and scans for a
* bad block table if appropriate.
*/
-int nand_scan_tail(struct mtd_info *mtd)
+static int nand_scan_tail(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd_to_nand(mtd);
struct nand_ecc_ctrl *ecc = &chip->ecc;
@@ -6626,7 +6650,6 @@ int nand_scan_tail(struct mtd_info *mtd)
return ret;
}
-EXPORT_SYMBOL(nand_scan_tail);
/*
* is_module_text_address() isn't exported, and it's mostly a pointless
@@ -6661,12 +6684,20 @@ int nand_scan(struct mtd_info *mtd, int maxchips)
if (chip->ecc.attach_chip) {
ret = chip->ecc.attach_chip(chip);
if (ret)
- return ret;
+ goto cleanup_ident;
}
ret = nand_scan_tail(mtd);
+ if (ret)
+ goto detach_chip;
+
+ return 0;
+
+detach_chip:
if (ret && chip->ecc.detach_chip)
chip->ecc.detach_chip(chip);
+cleanup_ident:
+ nand_scan_ident_cleanup(chip);
return ret;
}
@@ -6699,6 +6730,9 @@ void nand_cleanup(struct nand_chip *chip)
/* Free controller specific allocations after chip identification */
if (chip->ecc.detach_chip)
chip->ecc.detach_chip(chip);
+
+ /* Free identification phase allocations */
+ nand_scan_ident_cleanup(chip);
}
EXPORT_SYMBOL_GPL(nand_cleanup);
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 318c73a206fc..9e15256bef2b 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -29,15 +29,11 @@ struct device_node;
/* Scan and identify a NAND device */
int nand_scan(struct mtd_info *mtd, int max_chips);
+
/*
- * Separate phases of nand_scan(), allowing board driver to intervene
- * and override command or ECC setup according to flash type.
+ * Unregister the MTD device and free resources held by the NAND device, must be
+ * called on error after a successful nand_scan().
*/
-int nand_scan_ident(struct mtd_info *mtd, int max_chips,
- struct nand_flash_dev *table);
-int nand_scan_tail(struct mtd_info *mtd);
-
-/* Unregister the MTD device and free resources held by the NAND device */
void nand_release(struct mtd_info *mtd);
/* Internal helper for board drivers which need to override command function */
@@ -443,7 +439,7 @@ struct onfi_params {
struct nand_parameters {
/* Generic parameters */
- char model[100];
+ const char *model;
bool supports_set_get_features;
DECLARE_BITMAP(set_feature_list, ONFI_FEATURE_NUMBER);
DECLARE_BITMAP(get_feature_list, ONFI_FEATURE_NUMBER);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 51/52] mtd: rawnand: do not export nand_scan_[ident|tail]() anymore
@ 2018-03-02 17:03 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:03 UTC (permalink / raw)
To: linux-arm-kernel
Both nand_scan_ident() and nand_scan_tail() helpers used to be called
directly from controller drivers that needed to tweak some ECC-related
parameters before nand_scan_tail(). This separation prevented dynamic
allocations during the phase of NAND identification, which was
inconvenient.
All controller drivers have been moved to use nand_scan(), in
conjunction with the chip->ecc.[attach|detach]_chip() hooks that
actually do the required tweaking sequence between both ident/tail
calls, allowing programmers to use dynamic allocation as they need all
across the scanning sequence.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 54 ++++++++++++++++++++++++++++++++--------
include/linux/mtd/rawnand.h | 12 +++------
2 files changed, 48 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 0d850dbf843d..82d52112907f 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5100,6 +5100,7 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_onfi_params *p;
+ char *model;
char id[4];
int i, ret, val;
@@ -5159,7 +5160,14 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
sanitize_string(p->manufacturer, sizeof(p->manufacturer));
sanitize_string(p->model, sizeof(p->model));
- memcpy(chip->parameters.model, p->model, sizeof(p->model));
+ model = kzalloc(sizeof(p->model), GFP_KERNEL);
+ if (!model) {
+ ret = -ENOMEM;
+ goto free_onfi_param_page;
+ }
+
+ memcpy(model, p->model, sizeof(p->model));
+ chip->parameters.model = model;
if (!mtd->name)
mtd->name = chip->parameters.model;
@@ -5240,6 +5248,7 @@ static int nand_flash_detect_jedec(struct nand_chip *chip)
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_jedec_params *p;
struct jedec_ecc_info *ecc;
+ char *model;
char id[5];
int i, val, ret;
@@ -5290,7 +5299,14 @@ static int nand_flash_detect_jedec(struct nand_chip *chip)
sanitize_string(p->manufacturer, sizeof(p->manufacturer));
sanitize_string(p->model, sizeof(p->model));
- memcpy(chip->parameters.model, p->model, sizeof(p->model));
+ model = kzalloc(sizeof(p->model), GFP_KERNEL);
+ if (!p) {
+ ret = -ENOMEM;
+ goto free_jedec_param_page;
+ }
+
+ memcpy(model, p->model, sizeof(p->model));
+ chip->parameters.model = model;
if (!mtd->name)
mtd->name = chip->parameters.model;
@@ -5858,7 +5874,7 @@ static int nand_dt_init(struct nand_chip *chip)
}
/**
- * nand_scan_ident - [NAND Interface] Scan for the NAND device
+ * nand_scan_ident - Scan for the NAND device
* @mtd: MTD device structure
* @maxchips: number of chips to scan for
* @table: alternative NAND ID table
@@ -5866,9 +5882,13 @@ static int nand_dt_init(struct nand_chip *chip)
* This is the first phase of the normal nand_scan() function. It reads the
* flash ID and sets up MTD fields accordingly.
*
+ * This helper used to be called directly from controller drivers that needed
+ * to tweak some ECC-related parameters before nand_scan_tail(). This separation
+ * prevented dynamic allocations during this phase which was unconvenient and
+ * as been banned for the benefit of the ->init_ecc()/cleanup_ecc() hooks.
*/
-int nand_scan_ident(struct mtd_info *mtd, int maxchips,
- struct nand_flash_dev *table)
+static int nand_scan_ident(struct mtd_info *mtd, int maxchips,
+ struct nand_flash_dev *table)
{
int i, nand_maf_id, nand_dev_id;
struct nand_chip *chip = mtd_to_nand(mtd);
@@ -5942,7 +5962,11 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
return 0;
}
-EXPORT_SYMBOL(nand_scan_ident);
+
+static void nand_scan_ident_cleanup(struct nand_chip *chip)
+{
+ kfree(chip->parameters.model);
+}
static int nand_set_ecc_soft_ops(struct mtd_info *mtd)
{
@@ -6295,14 +6319,14 @@ static bool nand_ecc_strength_good(struct mtd_info *mtd)
}
/**
- * nand_scan_tail - [NAND Interface] Scan for the NAND device
+ * nand_scan_tail - Scan for the NAND device
* @mtd: MTD device structure
*
* This is the second phase of the normal nand_scan() function. It fills out
* all the uninitialized function pointers with the defaults and scans for a
* bad block table if appropriate.
*/
-int nand_scan_tail(struct mtd_info *mtd)
+static int nand_scan_tail(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd_to_nand(mtd);
struct nand_ecc_ctrl *ecc = &chip->ecc;
@@ -6626,7 +6650,6 @@ int nand_scan_tail(struct mtd_info *mtd)
return ret;
}
-EXPORT_SYMBOL(nand_scan_tail);
/*
* is_module_text_address() isn't exported, and it's mostly a pointless
@@ -6661,12 +6684,20 @@ int nand_scan(struct mtd_info *mtd, int maxchips)
if (chip->ecc.attach_chip) {
ret = chip->ecc.attach_chip(chip);
if (ret)
- return ret;
+ goto cleanup_ident;
}
ret = nand_scan_tail(mtd);
+ if (ret)
+ goto detach_chip;
+
+ return 0;
+
+detach_chip:
if (ret && chip->ecc.detach_chip)
chip->ecc.detach_chip(chip);
+cleanup_ident:
+ nand_scan_ident_cleanup(chip);
return ret;
}
@@ -6699,6 +6730,9 @@ void nand_cleanup(struct nand_chip *chip)
/* Free controller specific allocations after chip identification */
if (chip->ecc.detach_chip)
chip->ecc.detach_chip(chip);
+
+ /* Free identification phase allocations */
+ nand_scan_ident_cleanup(chip);
}
EXPORT_SYMBOL_GPL(nand_cleanup);
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 318c73a206fc..9e15256bef2b 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -29,15 +29,11 @@ struct device_node;
/* Scan and identify a NAND device */
int nand_scan(struct mtd_info *mtd, int max_chips);
+
/*
- * Separate phases of nand_scan(), allowing board driver to intervene
- * and override command or ECC setup according to flash type.
+ * Unregister the MTD device and free resources held by the NAND device, must be
+ * called on error after a successful nand_scan().
*/
-int nand_scan_ident(struct mtd_info *mtd, int max_chips,
- struct nand_flash_dev *table);
-int nand_scan_tail(struct mtd_info *mtd);
-
-/* Unregister the MTD device and free resources held by the NAND device */
void nand_release(struct mtd_info *mtd);
/* Internal helper for board drivers which need to override command function */
@@ -443,7 +439,7 @@ struct onfi_params {
struct nand_parameters {
/* Generic parameters */
- char model[100];
+ const char *model;
bool supports_set_get_features;
DECLARE_BITMAP(set_feature_list, ONFI_FEATURE_NUMBER);
DECLARE_BITMAP(get_feature_list, ONFI_FEATURE_NUMBER);
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* [PATCH 52/52] mtd: rawnand: allocate dynamically ONFI parameters during detection
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-02 17:04 ` Miquel Raynal
-1 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:04 UTC (permalink / raw)
To: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen, Josh Wu, Kamal Dasu,
Harvey Hunt, Stefan Agner
Cc: linux-mtd, linux-arm-kernel, Miquel Raynal
Now that it is possible to do dynamic allocations during the
identification phase, convert the onfi_params structure (which is only
needed with ONFI compliant chips) into a pointer that will be allocated
only if needed.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 37 +++++++++++++++++++++++++------------
drivers/mtd/nand/raw/nand_micron.c | 4 ++--
drivers/mtd/nand/raw/nand_timings.c | 12 ++++++------
include/linux/mtd/rawnand.h | 6 +++---
4 files changed, 36 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 82d52112907f..1b9fdf51ed8e 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5100,6 +5100,7 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_onfi_params *p;
+ struct onfi_params *op;
char *model;
char id[4];
int i, ret, val;
@@ -5154,8 +5155,6 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
if (!chip->onfi_version) {
pr_info("unsupported ONFI version: %d\n", val);
goto free_onfi_param_page;
- } else {
- ret = 1;
}
sanitize_string(p->manufacturer, sizeof(p->manufacturer));
@@ -5224,19 +5223,31 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
bitmap_set(chip->parameters.set_feature_list,
ONFI_FEATURE_ADDR_TIMING_MODE, 1);
}
- chip->parameters.onfi_params.t_prog = le16_to_cpu(p->t_prog);
- chip->parameters.onfi_params.t_bers = le16_to_cpu(p->t_bers);
- chip->parameters.onfi_params.t_r = le16_to_cpu(p->t_r);
- chip->parameters.onfi_params.t_ccs = le16_to_cpu(p->t_ccs);
- chip->parameters.onfi_params.async_timing_mode =
- le16_to_cpu(p->async_timing_mode);
- chip->parameters.onfi_params.vendor_revision =
- le16_to_cpu(p->vendor_revision);
- memcpy(chip->parameters.onfi_params.vendor, p->vendor,
- sizeof(p->vendor));
+ op = kzalloc(sizeof(*op), GFP_KERNEL);
+ if (!op) {
+ ret = -ENOMEM;
+ goto free_model;
+ }
+ op->t_prog = le16_to_cpu(p->t_prog);
+ op->t_bers = le16_to_cpu(p->t_bers);
+ op->t_r = le16_to_cpu(p->t_r);
+ op->t_ccs = le16_to_cpu(p->t_ccs);
+ op->async_timing_mode = le16_to_cpu(p->async_timing_mode);
+ op->vendor_revision = le16_to_cpu(p->vendor_revision);
+ memcpy(op->vendor, p->vendor, sizeof(p->vendor));
+ chip->parameters.onfi_params = op;
+
+ /* Identification done, free the full ONFI parameter page and exit */
+ kfree(p);
+
+ return 1;
+
+free_model:
+ kfree(model);
free_onfi_param_page:
kfree(p);
+
return ret;
}
@@ -5966,6 +5977,8 @@ static int nand_scan_ident(struct mtd_info *mtd, int maxchips,
static void nand_scan_ident_cleanup(struct nand_chip *chip)
{
kfree(chip->parameters.model);
+ kfree(chip->parameters.onfi_params);
+
}
static int nand_set_ecc_soft_ops(struct mtd_info *mtd)
diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c
index 651129023257..0674721acad8 100644
--- a/drivers/mtd/nand/raw/nand_micron.c
+++ b/drivers/mtd/nand/raw/nand_micron.c
@@ -57,9 +57,9 @@ static int micron_nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
static int micron_nand_onfi_init(struct nand_chip *chip)
{
struct nand_parameters *p = &chip->parameters;
- struct nand_onfi_vendor_micron *micron = (void *)p->onfi_params.vendor;
+ struct nand_onfi_vendor_micron *micron = (void *)p->onfi_params->vendor;
- if (chip->onfi_version && p->onfi_params.vendor_revision) {
+ if (p->onfi_params && p->onfi_params->vendor_revision) {
chip->read_retries = micron->read_retry_options;
chip->setup_read_retry = micron_nand_setup_read_retry;
}
diff --git a/drivers/mtd/nand/raw/nand_timings.c b/drivers/mtd/nand/raw/nand_timings.c
index b97bcf29f75a..58dc524471fa 100644
--- a/drivers/mtd/nand/raw/nand_timings.c
+++ b/drivers/mtd/nand/raw/nand_timings.c
@@ -292,6 +292,7 @@ int onfi_fill_data_interface(struct nand_chip *chip,
int timing_mode)
{
struct nand_data_interface *iface = &chip->data_interface;
+ struct onfi_params *onfi_params = chip->parameters.onfi_params;
if (type != NAND_SDR_IFACE)
return -EINVAL;
@@ -306,17 +307,16 @@ int onfi_fill_data_interface(struct nand_chip *chip,
* tR, tPROG, tCCS, ...
* These information are part of the ONFI parameter page.
*/
- if (chip->onfi_version) {
- struct nand_parameters *params = &chip->parameters;
+ if (onfi_params) {
struct nand_sdr_timings *timings = &iface->timings.sdr;
/* microseconds -> picoseconds */
- timings->tPROG_max = 1000000ULL * params->onfi_params.t_prog;
- timings->tBERS_max = 1000000ULL * params->onfi_params.t_bers;
- timings->tR_max = 1000000ULL * params->onfi_params.t_r;
+ timings->tPROG_max = 1000000ULL * onfi_params->t_prog;
+ timings->tBERS_max = 1000000ULL * onfi_params->t_bers;
+ timings->tR_max = 1000000ULL * onfi_params->t_r;
/* nanoseconds -> picoseconds */
- timings->tCCS_min = 1000UL * params->onfi_params.t_ccs;
+ timings->tCCS_min = 1000UL * onfi_params->t_ccs;
}
return 0;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 9e15256bef2b..7d43fc05d009 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -445,7 +445,7 @@ struct nand_parameters {
DECLARE_BITMAP(get_feature_list, ONFI_FEATURE_NUMBER);
/* ONFI parameters */
- struct onfi_params onfi_params;
+ struct onfi_params *onfi_params;
};
/* The maximum expected count of bytes in the NAND ID sequence */
@@ -1559,10 +1559,10 @@ struct platform_nand_data {
/* return the supported asynchronous timing mode. */
static inline int onfi_get_async_timing_mode(struct nand_chip *chip)
{
- if (!chip->onfi_version)
+ if (!chip->parameters.onfi_params)
return ONFI_TIMING_MODE_UNKNOWN;
- return chip->parameters.onfi_params.async_timing_mode;
+ return chip->parameters.onfi_params->async_timing_mode;
}
int onfi_fill_data_interface(struct nand_chip *chip,
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread* [PATCH 52/52] mtd: rawnand: allocate dynamically ONFI parameters during detection
@ 2018-03-02 17:04 ` Miquel Raynal
0 siblings, 0 replies; 120+ messages in thread
From: Miquel Raynal @ 2018-03-02 17:04 UTC (permalink / raw)
To: linux-arm-kernel
Now that it is possible to do dynamic allocations during the
identification phase, convert the onfi_params structure (which is only
needed with ONFI compliant chips) into a pointer that will be allocated
only if needed.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 37 +++++++++++++++++++++++++------------
drivers/mtd/nand/raw/nand_micron.c | 4 ++--
drivers/mtd/nand/raw/nand_timings.c | 12 ++++++------
include/linux/mtd/rawnand.h | 6 +++---
4 files changed, 36 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 82d52112907f..1b9fdf51ed8e 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5100,6 +5100,7 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_onfi_params *p;
+ struct onfi_params *op;
char *model;
char id[4];
int i, ret, val;
@@ -5154,8 +5155,6 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
if (!chip->onfi_version) {
pr_info("unsupported ONFI version: %d\n", val);
goto free_onfi_param_page;
- } else {
- ret = 1;
}
sanitize_string(p->manufacturer, sizeof(p->manufacturer));
@@ -5224,19 +5223,31 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)
bitmap_set(chip->parameters.set_feature_list,
ONFI_FEATURE_ADDR_TIMING_MODE, 1);
}
- chip->parameters.onfi_params.t_prog = le16_to_cpu(p->t_prog);
- chip->parameters.onfi_params.t_bers = le16_to_cpu(p->t_bers);
- chip->parameters.onfi_params.t_r = le16_to_cpu(p->t_r);
- chip->parameters.onfi_params.t_ccs = le16_to_cpu(p->t_ccs);
- chip->parameters.onfi_params.async_timing_mode =
- le16_to_cpu(p->async_timing_mode);
- chip->parameters.onfi_params.vendor_revision =
- le16_to_cpu(p->vendor_revision);
- memcpy(chip->parameters.onfi_params.vendor, p->vendor,
- sizeof(p->vendor));
+ op = kzalloc(sizeof(*op), GFP_KERNEL);
+ if (!op) {
+ ret = -ENOMEM;
+ goto free_model;
+ }
+ op->t_prog = le16_to_cpu(p->t_prog);
+ op->t_bers = le16_to_cpu(p->t_bers);
+ op->t_r = le16_to_cpu(p->t_r);
+ op->t_ccs = le16_to_cpu(p->t_ccs);
+ op->async_timing_mode = le16_to_cpu(p->async_timing_mode);
+ op->vendor_revision = le16_to_cpu(p->vendor_revision);
+ memcpy(op->vendor, p->vendor, sizeof(p->vendor));
+ chip->parameters.onfi_params = op;
+
+ /* Identification done, free the full ONFI parameter page and exit */
+ kfree(p);
+
+ return 1;
+
+free_model:
+ kfree(model);
free_onfi_param_page:
kfree(p);
+
return ret;
}
@@ -5966,6 +5977,8 @@ static int nand_scan_ident(struct mtd_info *mtd, int maxchips,
static void nand_scan_ident_cleanup(struct nand_chip *chip)
{
kfree(chip->parameters.model);
+ kfree(chip->parameters.onfi_params);
+
}
static int nand_set_ecc_soft_ops(struct mtd_info *mtd)
diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c
index 651129023257..0674721acad8 100644
--- a/drivers/mtd/nand/raw/nand_micron.c
+++ b/drivers/mtd/nand/raw/nand_micron.c
@@ -57,9 +57,9 @@ static int micron_nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
static int micron_nand_onfi_init(struct nand_chip *chip)
{
struct nand_parameters *p = &chip->parameters;
- struct nand_onfi_vendor_micron *micron = (void *)p->onfi_params.vendor;
+ struct nand_onfi_vendor_micron *micron = (void *)p->onfi_params->vendor;
- if (chip->onfi_version && p->onfi_params.vendor_revision) {
+ if (p->onfi_params && p->onfi_params->vendor_revision) {
chip->read_retries = micron->read_retry_options;
chip->setup_read_retry = micron_nand_setup_read_retry;
}
diff --git a/drivers/mtd/nand/raw/nand_timings.c b/drivers/mtd/nand/raw/nand_timings.c
index b97bcf29f75a..58dc524471fa 100644
--- a/drivers/mtd/nand/raw/nand_timings.c
+++ b/drivers/mtd/nand/raw/nand_timings.c
@@ -292,6 +292,7 @@ int onfi_fill_data_interface(struct nand_chip *chip,
int timing_mode)
{
struct nand_data_interface *iface = &chip->data_interface;
+ struct onfi_params *onfi_params = chip->parameters.onfi_params;
if (type != NAND_SDR_IFACE)
return -EINVAL;
@@ -306,17 +307,16 @@ int onfi_fill_data_interface(struct nand_chip *chip,
* tR, tPROG, tCCS, ...
* These information are part of the ONFI parameter page.
*/
- if (chip->onfi_version) {
- struct nand_parameters *params = &chip->parameters;
+ if (onfi_params) {
struct nand_sdr_timings *timings = &iface->timings.sdr;
/* microseconds -> picoseconds */
- timings->tPROG_max = 1000000ULL * params->onfi_params.t_prog;
- timings->tBERS_max = 1000000ULL * params->onfi_params.t_bers;
- timings->tR_max = 1000000ULL * params->onfi_params.t_r;
+ timings->tPROG_max = 1000000ULL * onfi_params->t_prog;
+ timings->tBERS_max = 1000000ULL * onfi_params->t_bers;
+ timings->tR_max = 1000000ULL * onfi_params->t_r;
/* nanoseconds -> picoseconds */
- timings->tCCS_min = 1000UL * params->onfi_params.t_ccs;
+ timings->tCCS_min = 1000UL * onfi_params->t_ccs;
}
return 0;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 9e15256bef2b..7d43fc05d009 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -445,7 +445,7 @@ struct nand_parameters {
DECLARE_BITMAP(get_feature_list, ONFI_FEATURE_NUMBER);
/* ONFI parameters */
- struct onfi_params onfi_params;
+ struct onfi_params *onfi_params;
};
/* The maximum expected count of bytes in the NAND ID sequence */
@@ -1559,10 +1559,10 @@ struct platform_nand_data {
/* return the supported asynchronous timing mode. */
static inline int onfi_get_async_timing_mode(struct nand_chip *chip)
{
- if (!chip->onfi_version)
+ if (!chip->parameters.onfi_params)
return ONFI_TIMING_MODE_UNKNOWN;
- return chip->parameters.onfi_params.async_timing_mode;
+ return chip->parameters.onfi_params->async_timing_mode;
}
int onfi_fill_data_interface(struct nand_chip *chip,
--
2.14.1
^ permalink raw reply related [flat|nested] 120+ messages in thread
* Re: [PATCH 00/52] Allow dynamic allocations during NAND chip identification phase
2018-03-02 17:03 ` Miquel Raynal
@ 2018-03-15 15:19 ` Boris Brezillon
-1 siblings, 0 replies; 120+ messages in thread
From: Boris Brezillon @ 2018-03-15 15:19 UTC (permalink / raw)
To: Miquel Raynal
Cc: Richard Weinberger, David Woodhouse, Brian Norris, Marek Vasut,
Cyrille Pitchen, Josh Wu, Kamal Dasu, Harvey Hunt, Stefan Agner,
linux-mtd, linux-arm-kernel
Hi Miquel,
On Fri, 2 Mar 2018 18:03:08 +0100
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Hello,
>
> This series make a quite deep change in the NAND framework. Until now,
> the NAND chip identification phase could be done in two manners from the
> controller driver perspective:
>
> 1/ Call nand_scan()
>
> or
>
> 1/ Call nand_scan_ident()
> 2/ Do some controller-dependent configuration
> 3/ Call nand_scan_tail().
>
> The fact that the identifaction could be split in two operations
> involved that in the NAND framework, it was not possible to do any
> dynamic allocation without risking a memory leak.
Well, it's not entirely true. We could have a nand_scan_ident_cleanup()
function, but that means patching all the drivers anyway to make them
call this function when something fails between nand_scan_ident() and
nand_scan_tail().
> What if the core
> allocates a structure, then the driver between nand_scan_ident() and
> nand_scan_tail() decides it cannot handle the chip and errors out?
> The structure allocated by the core is lost: it is a memory leak.
>
> To avoid this situation, we migrate all drivers to use nand_scan(). But
> because drivers need to do some configuration before nand_scan_tail(), a
> first hook is offered, embedded in the nand_ecc_ctrl structure, called
> ->attach_chip().
> Drivers that need to tweak their configuration after
> nand_scan_ident() should implement it. Any dynamically allocated space
> in ->attach_chip() must be freed in the second hook: ->detach_chip().
As already discussed privately, I don't think these hooks belongs in
nand_ecc_ctrl. It's more something that is controller-related, so how
about adding them to the nand_hw_ctrl struct?
>
> The ->detach_chip() does not have to be called upon error in the
> controller driver probe function. The nand_realease() helper already
> exists for that and will do the call if needed.
nand_release() is not exactly the opposite of nand_scan() because it
also takes care of the mtd dev unregistration. I think what you're
looking for is nand_cleanup().
> Of course, this helper
> must be called on error after a successful nand_scan(), just like
> before.
>
> Once all drivers not using nand_scan() (yet) are migrated,
> nand_scan_ident() and nand_scan_tail() are unexported and only available
> internally.
>
> A previous work [1] removed the ONFI/JEDEC parameter pages and instead
> allocated a nand_parameters structure in nand_chip, embedding both
> generic entries and ONFI-related ones. The deal was, once dynamic
> allocation possible, allocate in nand_scan_ident() the ONFI strcuture
> only if actually needed. This is done in the last patches.
>
> All these changes have been tested with the GPMI driver and tested by
> the 0-day robot.
>
> Thank you,
> Miquèl
>
> [1] http://lists.infradead.org/pipermail/linux-mtd/2018-March/079456.html
>
>
> Miquel Raynal (52):
> mtd: rawnand: add hooks that may be called during nand_scan()
> mtd: rawnand: bf5xx: fix probe function error path
> mtd: rawnand: bf5xx: convert driver to nand_scan()
> mtd: rawnand: brcmnand: fix probe function error path
> mtd: rawnand: brcmnand: convert driver to nand_scan()
> mtd: rawnand: cafe: fix probe function error path
> mtd: rawnand: cafe: convert driver to nand_scan()
> mtd: rawnand: davinci: fix probe function error path
> mtd: rawnand: davinci: convert driver to nand_scan()
> mtd: rawnand: denali: fix probe function error path
> mtd: rawnand: denali: convert to nand_scan()
> mtd: rawnand: fsl_elbc: fix probe function error path
> mtd: rawnand: fsl_elbc: convert driver to nand_scan()
> mtd: rawnand: fsl_ifc: fix probe function error path
> mtd: rawnand: fsl_ifc: convert driver to nand_scan()
> mtd: rawnand: fsmc: fix probe function error path
> mtd: rawnand: fsmc: convert driver to nand_scan()
> mtd: rawnand: gpmi: convert driver to nand_scan()
> mtd: rawnand: hisi504: enhance the probe function error path
> mtd: rawnand: hisi504: convert driver to nand_scan()
> mtd: rawnand: jz4780: convert driver to nand_scan()
> mtd: rawnand: lpc32xx_mlc: enhance the probe function error path
> mtd: rawnand: lpc32xx_mlc: convert driver to nand_scan()
> mtd: rawnand: lpc32xx_slc: enhance the probe function error
> mtd: rawnand: lpc32xx_slc: convert driver to nand_scan()
> mtd: rawnand: marvell: convert driver to nand_scan()
> mtd: rawnand: mtk: convert driver to nand_scan()
> mtd: rawnand: mxc: fix probe function error path
> mtd: rawnand: mxc: convert driver to nand_scan()
> mtd: rawnand: nandsim: convert driver to nand_scan()
> mtd: rawnand: omap2: fix the probe function error path
> mtd: rawnand: omap2: convert driver to nand_scan()
> mtd: rawnand: s3c2410: enhance the probe function error path
> mtd: rawnand: s3c2410: convert driver to nand_scan()
> mtd: rawnand: sh_flctl: move all NAND chip related setup in one
> function
> mtd: rawnand: sh_flctl: fix the probe function error path
> mtd: rawnand: sh_flctl: convert driver to nand_scan()
> mtd: rawnand: sunxi: convert driver to nand_scan()
> mtd: rawnand: tango: fix probe function error path
> mtd: rawnand: tango: convert driver to nand_scan()
> mtd: rawnand: txx9ndfmc: convert driver to nand_scan()
> mtd: rawnand: vf610: convert driver to nand_scan()
> mtd: rawnand: atmel: convert driver to nand_scan()
> mtd: rawnand: add a field in nand_chip to fill an array of IDs
> mtd: rawnand: sm_common: make use of the new flash_ids table entry
> mtd: rawnand: sm_common: convert driver to nand_scan()
> mtd: rawnand: docg4: fix the probe function error path
> mtd: rawnand: docg4: convert driver to nand_scan()
> mtd: rawnand: qcom: convert driver to nand_scan()
> mtd: rawnand: jz4740: convert driver to nand_scan()
> mtd: rawnand: do not export nand_scan_[ident|tail]() anymore
> mtd: rawnand: allocate dynamically ONFI parameters during detection
Can we try to do this progressively instead of sending a new
version of a 50+ patch series? How about we first try to fix all
drivers that do not call nand_cleanup() when something fails after
nand_scan_tail()?
Once we have that fixed, I'd be happy to review the other patches ;-).
Anyway, thanks for working on that. The 'no dynamic allocation in
nand_scan_ident()' has been a painful limitation, and I'm glad to see
it disappear.
Regards,
Boris
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread
* [PATCH 00/52] Allow dynamic allocations during NAND chip identification phase
@ 2018-03-15 15:19 ` Boris Brezillon
0 siblings, 0 replies; 120+ messages in thread
From: Boris Brezillon @ 2018-03-15 15:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi Miquel,
On Fri, 2 Mar 2018 18:03:08 +0100
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Hello,
>
> This series make a quite deep change in the NAND framework. Until now,
> the NAND chip identification phase could be done in two manners from the
> controller driver perspective:
>
> 1/ Call nand_scan()
>
> or
>
> 1/ Call nand_scan_ident()
> 2/ Do some controller-dependent configuration
> 3/ Call nand_scan_tail().
>
> The fact that the identifaction could be split in two operations
> involved that in the NAND framework, it was not possible to do any
> dynamic allocation without risking a memory leak.
Well, it's not entirely true. We could have a nand_scan_ident_cleanup()
function, but that means patching all the drivers anyway to make them
call this function when something fails between nand_scan_ident() and
nand_scan_tail().
> What if the core
> allocates a structure, then the driver between nand_scan_ident() and
> nand_scan_tail() decides it cannot handle the chip and errors out?
> The structure allocated by the core is lost: it is a memory leak.
>
> To avoid this situation, we migrate all drivers to use nand_scan(). But
> because drivers need to do some configuration before nand_scan_tail(), a
> first hook is offered, embedded in the nand_ecc_ctrl structure, called
> ->attach_chip().
> Drivers that need to tweak their configuration after
> nand_scan_ident() should implement it. Any dynamically allocated space
> in ->attach_chip() must be freed in the second hook: ->detach_chip().
As already discussed privately, I don't think these hooks belongs in
nand_ecc_ctrl. It's more something that is controller-related, so how
about adding them to the nand_hw_ctrl struct?
>
> The ->detach_chip() does not have to be called upon error in the
> controller driver probe function. The nand_realease() helper already
> exists for that and will do the call if needed.
nand_release() is not exactly the opposite of nand_scan() because it
also takes care of the mtd dev unregistration. I think what you're
looking for is nand_cleanup().
> Of course, this helper
> must be called on error after a successful nand_scan(), just like
> before.
>
> Once all drivers not using nand_scan() (yet) are migrated,
> nand_scan_ident() and nand_scan_tail() are unexported and only available
> internally.
>
> A previous work [1] removed the ONFI/JEDEC parameter pages and instead
> allocated a nand_parameters structure in nand_chip, embedding both
> generic entries and ONFI-related ones. The deal was, once dynamic
> allocation possible, allocate in nand_scan_ident() the ONFI strcuture
> only if actually needed. This is done in the last patches.
>
> All these changes have been tested with the GPMI driver and tested by
> the 0-day robot.
>
> Thank you,
> Miqu?l
>
> [1] http://lists.infradead.org/pipermail/linux-mtd/2018-March/079456.html
>
>
> Miquel Raynal (52):
> mtd: rawnand: add hooks that may be called during nand_scan()
> mtd: rawnand: bf5xx: fix probe function error path
> mtd: rawnand: bf5xx: convert driver to nand_scan()
> mtd: rawnand: brcmnand: fix probe function error path
> mtd: rawnand: brcmnand: convert driver to nand_scan()
> mtd: rawnand: cafe: fix probe function error path
> mtd: rawnand: cafe: convert driver to nand_scan()
> mtd: rawnand: davinci: fix probe function error path
> mtd: rawnand: davinci: convert driver to nand_scan()
> mtd: rawnand: denali: fix probe function error path
> mtd: rawnand: denali: convert to nand_scan()
> mtd: rawnand: fsl_elbc: fix probe function error path
> mtd: rawnand: fsl_elbc: convert driver to nand_scan()
> mtd: rawnand: fsl_ifc: fix probe function error path
> mtd: rawnand: fsl_ifc: convert driver to nand_scan()
> mtd: rawnand: fsmc: fix probe function error path
> mtd: rawnand: fsmc: convert driver to nand_scan()
> mtd: rawnand: gpmi: convert driver to nand_scan()
> mtd: rawnand: hisi504: enhance the probe function error path
> mtd: rawnand: hisi504: convert driver to nand_scan()
> mtd: rawnand: jz4780: convert driver to nand_scan()
> mtd: rawnand: lpc32xx_mlc: enhance the probe function error path
> mtd: rawnand: lpc32xx_mlc: convert driver to nand_scan()
> mtd: rawnand: lpc32xx_slc: enhance the probe function error
> mtd: rawnand: lpc32xx_slc: convert driver to nand_scan()
> mtd: rawnand: marvell: convert driver to nand_scan()
> mtd: rawnand: mtk: convert driver to nand_scan()
> mtd: rawnand: mxc: fix probe function error path
> mtd: rawnand: mxc: convert driver to nand_scan()
> mtd: rawnand: nandsim: convert driver to nand_scan()
> mtd: rawnand: omap2: fix the probe function error path
> mtd: rawnand: omap2: convert driver to nand_scan()
> mtd: rawnand: s3c2410: enhance the probe function error path
> mtd: rawnand: s3c2410: convert driver to nand_scan()
> mtd: rawnand: sh_flctl: move all NAND chip related setup in one
> function
> mtd: rawnand: sh_flctl: fix the probe function error path
> mtd: rawnand: sh_flctl: convert driver to nand_scan()
> mtd: rawnand: sunxi: convert driver to nand_scan()
> mtd: rawnand: tango: fix probe function error path
> mtd: rawnand: tango: convert driver to nand_scan()
> mtd: rawnand: txx9ndfmc: convert driver to nand_scan()
> mtd: rawnand: vf610: convert driver to nand_scan()
> mtd: rawnand: atmel: convert driver to nand_scan()
> mtd: rawnand: add a field in nand_chip to fill an array of IDs
> mtd: rawnand: sm_common: make use of the new flash_ids table entry
> mtd: rawnand: sm_common: convert driver to nand_scan()
> mtd: rawnand: docg4: fix the probe function error path
> mtd: rawnand: docg4: convert driver to nand_scan()
> mtd: rawnand: qcom: convert driver to nand_scan()
> mtd: rawnand: jz4740: convert driver to nand_scan()
> mtd: rawnand: do not export nand_scan_[ident|tail]() anymore
> mtd: rawnand: allocate dynamically ONFI parameters during detection
Can we try to do this progressively instead of sending a new
version of a 50+ patch series? How about we first try to fix all
drivers that do not call nand_cleanup() when something fails after
nand_scan_tail()?
Once we have that fixed, I'd be happy to review the other patches ;-).
Anyway, thanks for working on that. The 'no dynamic allocation in
nand_scan_ident()' has been a painful limitation, and I'm glad to see
it disappear.
Regards,
Boris
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 120+ messages in thread