[PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL

[PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL

[Jani Nikula]

We don't want to preserve the DDI A 4 lane bit on ICL.

Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing limitation.")
Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index bfdaa5d86861..66417dd24bfc 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2932,9 +2932,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 	intel_encoder->cloneable = 0;
 
-	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
-					  (DDI_BUF_PORT_REVERSAL |
-					   DDI_A_4_LANES);
+	if (INTEL_GEN(dev_priv) >= 11)
+		intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
+			DDI_BUF_PORT_REVERSAL;
+	else
+		intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
+			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
 	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
 	intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
 
-- 
2.11.0

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✓ Fi.CI.BAT: success for drm/i915/icl: do not save DDI A/E sharing bit for ICL

[Patchwork]

== Series Details ==

Series: drm/i915/icl: do not save DDI A/E sharing bit for ICL
URL   : https://patchwork.freedesktop.org/series/39439/
State : success

== Summary ==

Series 39439v1 drm/i915/icl: do not save DDI A/E sharing bit for ICL
https://patchwork.freedesktop.org/api/1.0/series/39439/revisions/1/mbox/

---- Known issues:

Test prime_vgem:
        Subgroup basic-fence-flip:
                pass       -> FAIL       (fi-ilk-650) fdo#104008

fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:422s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:425s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:373s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:507s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:279s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:492s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:492s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:483s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:471s
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:408s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:574s
fi-cnl-y3        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:582s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:414s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:292s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:519s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:398s
fi-ilk-650       total:288  pass:227  dwarn:0   dfail:0   fail:1   skip:60  time:411s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:470s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:421s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:470s
fi-kbl-7560u     total:108  pass:104  dwarn:0   dfail:0   fail:0   skip:3  
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:462s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:510s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:585s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:437s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:519s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:532s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:498s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:481s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:422s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:434s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:518s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:397s

a994c52e8617418681c930460b436407b792f76e drm-tip: 2018y-03m-06d-09h-35m-22s UTC integration manifest
1a532d3f01fb drm/i915/icl: do not save DDI A/E sharing bit for ICL

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8241/issues.html
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Re: [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL

[Ville Syrjälä]

On Tue, Mar 06, 2018 at 12:41:55PM +0200, Jani Nikula wrote:
> We don't want to preserve the DDI A 4 lane bit on ICL.
> 
> Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing limitation.")
> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index bfdaa5d86861..66417dd24bfc 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2932,9 +2932,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
>  	intel_encoder->cloneable = 0;
>  
> -	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> -					  (DDI_BUF_PORT_REVERSAL |
> -					   DDI_A_4_LANES);
> +	if (INTEL_GEN(dev_priv) >= 11)
> +		intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> +			DDI_BUF_PORT_REVERSAL;
> +	else
> +		intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> +			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
>  	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
>  	intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
>  
> -- 
> 2.11.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL

[Paulo Zanoni]

Em Ter, 2018-03-06 às 12:41 +0200, Jani Nikula escreveu:
> We don't want to preserve the DDI A 4 lane bit on ICL.
> 

Why not review https://patchwork.freedesktop.org/patch/206118/ instead?
 :)

> Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing
> limitation.")
> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index bfdaa5d86861..66417dd24bfc 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2932,9 +2932,12 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
>  	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
>  	intel_encoder->cloneable = 0;
>  
> -	intel_dig_port->saved_port_bits =
> I915_READ(DDI_BUF_CTL(port)) &
> -					  (DDI_BUF_PORT_REVERSAL |
> -					   DDI_A_4_LANES);
> +	if (INTEL_GEN(dev_priv) >= 11)
> +		intel_dig_port->saved_port_bits =
> I915_READ(DDI_BUF_CTL(port)) &
> +			DDI_BUF_PORT_REVERSAL;
> +	else
> +		intel_dig_port->saved_port_bits =
> I915_READ(DDI_BUF_CTL(port)) &
> +			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
>  	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
>  	intel_dig_port->max_lanes =
> intel_ddi_max_lanes(intel_dig_port);
>  
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✗ Fi.CI.IGT: warning for drm/i915/icl: do not save DDI A/E sharing bit for ICL

[Patchwork]

== Series Details ==

Series: drm/i915/icl: do not save DDI A/E sharing bit for ICL
URL   : https://patchwork.freedesktop.org/series/39439/
State : warning

== Summary ==

---- Possible new issues:

Test kms_chv_cursor_fail:
        Subgroup pipe-c-64x64-top-edge:
                pass       -> DMESG-WARN (shard-apl)

---- Known issues:

Test kms_chv_cursor_fail:
        Subgroup pipe-b-128x128-right-edge:
                pass       -> DMESG-WARN (shard-snb) fdo#105185 +3
Test kms_cursor_crc:
        Subgroup cursor-64x64-suspend:
                pass       -> INCOMPLETE (shard-hsw) fdo#103540
Test kms_flip:
        Subgroup 2x-flip-vs-expired-vblank-interruptible:
                fail       -> PASS       (shard-hsw) fdo#102887
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-primscrn-pri-shrfb-draw-mmap-wc:
                fail       -> PASS       (shard-apl) fdo#103167
        Subgroup fbc-rgb565-draw-blt:
                fail       -> PASS       (shard-apl) fdo#101623
Test kms_plane_multiple:
        Subgroup atomic-pipe-b-tiling-yf:
                pass       -> FAIL       (shard-apl) fdo#103166

fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166

shard-apl        total:3468 pass:1825 dwarn:2   dfail:0   fail:8   skip:1633 time:12278s
shard-hsw        total:3454 pass:1763 dwarn:1   dfail:0   fail:1   skip:1687 time:11540s
shard-snb        total:3468 pass:1361 dwarn:4   dfail:0   fail:2   skip:2101 time:7145s
Blacklisted hosts:
shard-kbl        total:3375 pass:1897 dwarn:2   dfail:0   fail:6   skip:1468 time:8854s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8241/shards.html
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Re: [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL

[Jani Nikula]

On Tue, 06 Mar 2018, Paulo Zanoni <paulo.r.zanoni@intel.com> wrote:
> Em Ter, 2018-03-06 às 12:41 +0200, Jani Nikula escreveu:
>> We don't want to preserve the DDI A 4 lane bit on ICL.
>> 
>
> Why not review https://patchwork.freedesktop.org/patch/206118/ instead?
>  :)

Because Mahesh posted his version and I suck and missed your patch. I'm
sorry. :(

BR,
Jani.


>
>> Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing
>> limitation.")
>> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
>> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++---
>>  1 file changed, 6 insertions(+), 3 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
>> b/drivers/gpu/drm/i915/intel_ddi.c
>> index bfdaa5d86861..66417dd24bfc 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -2932,9 +2932,12 @@ void intel_ddi_init(struct drm_i915_private
>> *dev_priv, enum port port)
>>  	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
>>  	intel_encoder->cloneable = 0;
>>  
>> -	intel_dig_port->saved_port_bits =
>> I915_READ(DDI_BUF_CTL(port)) &
>> -					  (DDI_BUF_PORT_REVERSAL |
>> -					   DDI_A_4_LANES);
>> +	if (INTEL_GEN(dev_priv) >= 11)
>> +		intel_dig_port->saved_port_bits =
>> I915_READ(DDI_BUF_CTL(port)) &
>> +			DDI_BUF_PORT_REVERSAL;
>> +	else
>> +		intel_dig_port->saved_port_bits =
>> I915_READ(DDI_BUF_CTL(port)) &
>> +			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
>>  	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
>>  	intel_dig_port->max_lanes =
>> intel_ddi_max_lanes(intel_dig_port);
>>  

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL

[Jani Nikula]

On Tue, 06 Mar 2018, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Mar 06, 2018 at 12:41:55PM +0200, Jani Nikula wrote:
>> We don't want to preserve the DDI A 4 lane bit on ICL.
>> 
>> Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing limitation.")
>> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
>> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed, thanks for the review.

The one CI warning is unrelated.

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++---
>>  1 file changed, 6 insertions(+), 3 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
>> index bfdaa5d86861..66417dd24bfc 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -2932,9 +2932,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>>  	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
>>  	intel_encoder->cloneable = 0;
>>  
>> -	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> -					  (DDI_BUF_PORT_REVERSAL |
>> -					   DDI_A_4_LANES);
>> +	if (INTEL_GEN(dev_priv) >= 11)
>> +		intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> +			DDI_BUF_PORT_REVERSAL;
>> +	else
>> +		intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> +			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
>>  	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
>>  	intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
>>  
>> -- 
>> 2.11.0
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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