[Qemu-devel] [PATCH] misc, ide: remove use of HWADDR_PRIx in trace events

[Qemu-devel] [PATCH] misc, ide: remove use of HWADDR_PRIx in trace events

[Daniel P. Berrangé]

The trace events all use a uint64_t data type, so should be using the
corresponding PRIx64 format, not HWADDR_PRIx which is intended for use
with the 'hwaddr' type.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
 hw/ide/trace-events  | 4 ++--
 hw/misc/trace-events | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/ide/trace-events b/hw/ide/trace-events
index 0c39cabe72..5c0e59ec42 100644
--- a/hw/ide/trace-events
+++ b/hw/ide/trace-events
@@ -108,8 +108,8 @@ ahci_dma_prepare_buf_fail(void *s, int port) "ahci(%p)[%d]: sglist population fa
 ahci_dma_rw_buf(void *s, int port, int l) "ahci(%p)[%d] len=0x%x"
 ahci_cmd_done(void *s, int port) "ahci(%p)[%d]: cmd done"
 ahci_reset(void *s) "ahci(%p): HBA reset"
-allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"HWADDR_PRIx" val=0x%"PRIx64", size=%d"
-allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): write a=%p addr=0x%"HWADDR_PRIx" val=0x%"PRIx64", size=%d"
+allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d"
+allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): write a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d"
 
 # Warning: Verbose
 handle_reg_h2d_fis_dump(void *s, int port, const char *fis) "ahci(%p)[%d]: %s"
diff --git a/hw/misc/trace-events b/hw/misc/trace-events
index 562d9ed005..ec5a9f0da1 100644
--- a/hw/misc/trace-events
+++ b/hw/misc/trace-events
@@ -69,13 +69,13 @@ mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
 mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
 
 # hw/misc/msf2-sysreg.c
-msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" HWADDR_PRIx " data 0x%" PRIx32 " prev 0x%" PRIx32
-msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" HWADDR_PRIx " data 0x%08" PRIx32
+msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
+msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
 msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
 
 #hw/misc/imx7_gpr.c
-imx7_gpr_read(uint64_t offset) "addr 0x%08" HWADDR_PRIx
-imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" HWADDR_PRIx "value 0x%08" HWADDR_PRIx
+imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
+imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
 
 # hw/misc/mos6522.c
 mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
-- 
2.14.3

Re: [Qemu-devel] [PATCH] misc, ide: remove use of HWADDR_PRIx in trace events

[Mark Cave-Ayland]

On 06/03/18 13:44, Daniel P. Berrangé wrote:

> The trace events all use a uint64_t data type, so should be using the
> corresponding PRIx64 format, not HWADDR_PRIx which is intended for use
> with the 'hwaddr' type.

Ha okay looks like you beat me to it ;)  I wonder if we can teach 
checkpatch.pl about this...


ATB,

Mark.

Re: [Qemu-devel] [PATCH] misc, ide: remove use of HWADDR_PRIx in trace events

[Daniel P. Berrangé]

On Tue, Mar 06, 2018 at 02:16:00PM +0000, Mark Cave-Ayland wrote:
> On 06/03/18 13:44, Daniel P. Berrangé wrote:
> 
> > The trace events all use a uint64_t data type, so should be using the
> > corresponding PRIx64 format, not HWADDR_PRIx which is intended for use
> > with the 'hwaddr' type.
> 
> Ha okay looks like you beat me to it ;)  I wonder if we can teach
> checkpatch.pl about this...

We should just make tracetool whitelist the data types it permits, and
it could also report on unusual format macros like this - only allow
the standard PRI* ones. That way all build configs would immediately
fail, instead of only the  ust build config

Regards,
Daniel
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Re: [Qemu-devel] [Qemu-trivial] [PATCH] misc, ide: remove use of HWADDR_PRIx in trace events

[Philippe Mathieu-Daudé]

On 03/06/2018 10:44 AM, Daniel P. Berrangé wrote:
> The trace events all use a uint64_t data type, so should be using the
> corresponding PRIx64 format, not HWADDR_PRIx which is intended for use
> with the 'hwaddr' type.
> 
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  hw/ide/trace-events  | 4 ++--
>  hw/misc/trace-events | 8 ++++----
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/ide/trace-events b/hw/ide/trace-events
> index 0c39cabe72..5c0e59ec42 100644
> --- a/hw/ide/trace-events
> +++ b/hw/ide/trace-events
> @@ -108,8 +108,8 @@ ahci_dma_prepare_buf_fail(void *s, int port) "ahci(%p)[%d]: sglist population fa
>  ahci_dma_rw_buf(void *s, int port, int l) "ahci(%p)[%d] len=0x%x"
>  ahci_cmd_done(void *s, int port) "ahci(%p)[%d]: cmd done"
>  ahci_reset(void *s) "ahci(%p): HBA reset"
> -allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"HWADDR_PRIx" val=0x%"PRIx64", size=%d"
> -allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): write a=%p addr=0x%"HWADDR_PRIx" val=0x%"PRIx64", size=%d"
> +allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d"
> +allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): write a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d"
>  
>  # Warning: Verbose
>  handle_reg_h2d_fis_dump(void *s, int port, const char *fis) "ahci(%p)[%d]: %s"
> diff --git a/hw/misc/trace-events b/hw/misc/trace-events
> index 562d9ed005..ec5a9f0da1 100644
> --- a/hw/misc/trace-events
> +++ b/hw/misc/trace-events
> @@ -69,13 +69,13 @@ mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
>  mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
>  
>  # hw/misc/msf2-sysreg.c
> -msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" HWADDR_PRIx " data 0x%" PRIx32 " prev 0x%" PRIx32
> -msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" HWADDR_PRIx " data 0x%08" PRIx32
> +msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
> +msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
>  msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
>  
>  #hw/misc/imx7_gpr.c
> -imx7_gpr_read(uint64_t offset) "addr 0x%08" HWADDR_PRIx
> -imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" HWADDR_PRIx "value 0x%08" HWADDR_PRIx
> +imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
> +imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
>  
>  # hw/misc/mos6522.c
>  mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
>