* [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements
@ 2018-03-06 20:30 Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups Mark Cave-Ayland
` (21 more replies)
0 siblings, 22 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
[This is for New World Machines: there is a follow-up patch for Old World Machines]
This patchset is a combination of uninorth fixes/cleanup with the final aim
of removing the remaining custom init functions and switching IRQ arrays over
to qdev GPIOs.
The first couple of patches apply some style fixups and remove what appears to
be an obsolete set of uninorth registers according to my testing.
Following on from this, the next few patches QOMify the PCI/AGP host bridges
and change the existing _init() functions to return the device itself. This
allows the memory regions to be setup during device init, and using a temporary
qdev pointer property allows moving the remaining initialisation to device
realize.
Next we fix the mixup between the PCI/AGP host bridges making sure that the correct
PCI bus instance is instantiated for the corresponding host bridge , and enabling
the third PCI host bridge. This allows potential handling of any accesses although
it should be ignored for all OSs that correctly parse the DT since OpenBIOS currently
only supports (and exposes) a single PCI host bridge.
Once the legacy _init() functions have been removed and all devices are
instantiated via the qdev API, it is then possible to wire up the PCI IO
space to the relevant PCI bus.
After this we implement a separate uninorth device (equivalent to uni-n in the
Mac New World DT) as suggested by the TODO comment and wire it up as part of the
board initialisation.
Finally once this is done we can remove the temporary pics IRQ array and instead
wire up the macio_newworld device to the PIC directly using the existing object
link.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Mark Cave-Ayland (19):
uninorth: trivial style fixups
uninorth: remove second set of uninorth token registers
uninorth: QOMify PCI and AGP host bridges
uninorth: remove stray PCIBus realize from mac_newworld.c
uninorth: move uninorth definitions into uninorth.h
uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return
uninorth device
uninorth: move PCI mmio memory region initialisation into init
function
uninorth: introduce temporary pic_irqs device property
uninorth: move PCI host bridge bus initialisation into device realize
uninorth: fix PCI and AGP bus mixup
uninorth: enable internal PCI host bridge
uninorth: remove obsolete pci_pmac_init() function
uninorth: remove obsolete pci_pmac_u3_init() function
uninorth: use object link to pass OpenPIC object to uninorth
uninorth: move PCI IO (ISA) memory region into the uninorth device
uninorth: rename UNINState to UNINHostState
uninorth: create new uninorth device
mac_newworld: remove pics IRQ array and wire up macio to OpenPIC
directly
mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
hw/misc/macio/macio.c | 37 ++--
hw/pci-host/trace-events | 2 +
hw/pci-host/uninorth.c | 415 ++++++++++++++++++++++++-----------------
hw/ppc/mac.h | 20 +-
hw/ppc/mac_newworld.c | 124 ++++++------
hw/ppc/trace-events | 4 -
include/hw/misc/macio/macio.h | 1 -
include/hw/pci-host/uninorth.h | 65 +++++++
8 files changed, 404 insertions(+), 264 deletions(-)
create mode 100644 include/hw/pci-host/uninorth.h
--
2.11.0
^ permalink raw reply [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 22:49 ` Philippe Mathieu-Daudé
2018-03-07 2:25 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers Mark Cave-Ayland
` (20 subsequent siblings)
21 siblings, 2 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
This makes sure we keep patchew/checkpatch happy during the remainder of this
patchset.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 29 +++++++++++++++++++----------
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 66991da975..710818e355 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -272,7 +272,6 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
UNINState *d;
/* Uninorth AGP bus */
-
dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
@@ -302,16 +301,23 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
{
- d->config[0x0C] = 0x08; // cache_line_size
- d->config[0x0D] = 0x10; // latency_timer
- d->config[0x34] = 0x00; // capabilities_pointer
+ /* cache_line_size */
+ d->config[0x0C] = 0x08;
+ /* latency_timer */
+ d->config[0x0D] = 0x10;
+ /* capabilities_pointer */
+ d->config[0x34] = 0x00;
}
static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
{
- d->config[0x0C] = 0x08; // cache_line_size
- d->config[0x0D] = 0x10; // latency_timer
- // d->config[0x34] = 0x80; // capabilities_pointer
+ /* cache_line_size */
+ d->config[0x0C] = 0x08;
+ /* latency_timer */
+ d->config[0x0D] = 0x10;
+ /* capabilities_pointer
+ d->config[0x34] = 0x80; */
+
/*
* Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
* memory space with base 0x80000000, size 0x10000000 for Apple's
@@ -333,9 +339,12 @@ static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp)
static void unin_internal_pci_host_realize(PCIDevice *d, Error **errp)
{
- d->config[0x0C] = 0x08; // cache_line_size
- d->config[0x0D] = 0x10; // latency_timer
- d->config[0x34] = 0x00; // capabilities_pointer
+ /* cache_line_size */
+ d->config[0x0C] = 0x08;
+ /* latency_timer */
+ d->config[0x0D] = 0x10;
+ /* capabilities_pointer */
+ d->config[0x34] = 0x00;
}
static void unin_main_pci_host_class_init(ObjectClass *klass, void *data)
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-07 4:11 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges Mark Cave-Ayland
` (19 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Commit 593c181160: "PPC: Newworld: Add second uninorth control register set"
added a second set of uninorth registers at 0xf3000000.
Testing MacOS 9.2 to MacOS X 10.4 reveals no accesses to this address and I
can't find any reference to it in Apple's Core99.cpp source so I'm assuming
that this was the result of another bug that has now been fixed.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/ppc/mac_newworld.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index a749e2565d..1eba79d54b 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -148,7 +148,6 @@ static void ppc_core99_init(MachineState *machine)
qemu_irq *pic, **openpic_irqs;
MemoryRegion *isa = g_new(MemoryRegion, 1);
MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
- MemoryRegion *unin2_memory = g_new(MemoryRegion, 1);
int linux_boot, i, j, k;
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
hwaddr kernel_base, initrd_base, cmdline_base = 0;
@@ -283,9 +282,6 @@ static void ppc_core99_init(MachineState *machine)
memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
- memory_region_init_io(unin2_memory, NULL, &unin_ops, token, "unin", 0x1000);
- memory_region_add_subregion(get_system_memory(), 0xf3000000, unin2_memory);
-
openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
openpic_irqs[0] =
g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-09 0:32 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c Mark Cave-Ayland
` (18 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 79 ++++++++++++++++++++------------------------------
1 file changed, 32 insertions(+), 47 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 710818e355..1d4d3f5705 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -129,72 +129,61 @@ static const MemoryRegionOps unin_data_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static int pci_unin_main_init_device(SysBusDevice *dev)
+static void pci_unin_main_init(Object *obj)
{
- PCIHostState *h;
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ PCIHostState *h = PCI_HOST_BRIDGE(obj);
/* Use values found on a real PowerMac */
/* Uninorth main bus */
- h = PCI_HOST_BRIDGE(dev);
-
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
+ obj, "pci-conf-idx", 0x1000);
+ memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
"pci-conf-data", 0x1000);
- sysbus_init_mmio(dev, &h->conf_mem);
- sysbus_init_mmio(dev, &h->data_mem);
-
- return 0;
+ sysbus_init_mmio(sbd, &h->conf_mem);
+ sysbus_init_mmio(sbd, &h->data_mem);
}
-
-static int pci_u3_agp_init_device(SysBusDevice *dev)
+static void pci_u3_agp_init(Object *obj)
{
- PCIHostState *h;
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ PCIHostState *h = PCI_HOST_BRIDGE(obj);
/* Uninorth U3 AGP bus */
- h = PCI_HOST_BRIDGE(dev);
-
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
+ obj, "pci-conf-idx", 0x1000);
+ memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
"pci-conf-data", 0x1000);
- sysbus_init_mmio(dev, &h->conf_mem);
- sysbus_init_mmio(dev, &h->data_mem);
-
- return 0;
+ sysbus_init_mmio(sbd, &h->conf_mem);
+ sysbus_init_mmio(sbd, &h->data_mem);
}
-static int pci_unin_agp_init_device(SysBusDevice *dev)
+static void pci_unin_agp_init(Object *obj)
{
- PCIHostState *h;
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ PCIHostState *h = PCI_HOST_BRIDGE(obj);
/* Uninorth AGP bus */
- h = PCI_HOST_BRIDGE(dev);
-
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- dev, "pci-conf-idx", 0x1000);
+ obj, "pci-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
- dev, "pci-conf-data", 0x1000);
- sysbus_init_mmio(dev, &h->conf_mem);
- sysbus_init_mmio(dev, &h->data_mem);
- return 0;
+ obj, "pci-conf-data", 0x1000);
+ sysbus_init_mmio(sbd, &h->conf_mem);
+ sysbus_init_mmio(sbd, &h->data_mem);
}
-static int pci_unin_internal_init_device(SysBusDevice *dev)
+static void pci_unin_internal_init(Object *obj)
{
- PCIHostState *h;
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ PCIHostState *h = PCI_HOST_BRIDGE(obj);
/* Uninorth internal bus */
- h = PCI_HOST_BRIDGE(dev);
-
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- dev, "pci-conf-idx", 0x1000);
+ obj, "pci-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
- dev, "pci-conf-data", 0x1000);
- sysbus_init_mmio(dev, &h->conf_mem);
- sysbus_init_mmio(dev, &h->data_mem);
- return 0;
+ obj, "pci-conf-data", 0x1000);
+ sysbus_init_mmio(sbd, &h->conf_mem);
+ sysbus_init_mmio(sbd, &h->data_mem);
}
PCIBus *pci_pmac_init(qemu_irq *pic,
@@ -461,10 +450,8 @@ static const TypeInfo unin_internal_pci_host_info = {
static void pci_unin_main_class_init(ObjectClass *klass, void *data)
{
- SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
- sbc->init = pci_unin_main_init_device;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -472,15 +459,14 @@ static const TypeInfo pci_unin_main_info = {
.name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState),
+ .instance_init = pci_unin_main_init,
.class_init = pci_unin_main_class_init,
};
static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
{
- SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
- sbc->init = pci_u3_agp_init_device;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -488,15 +474,14 @@ static const TypeInfo pci_u3_agp_info = {
.name = TYPE_U3_AGP_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState),
+ .instance_init = pci_u3_agp_init,
.class_init = pci_u3_agp_class_init,
};
static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
{
- SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
- sbc->init = pci_unin_agp_init_device;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -504,15 +489,14 @@ static const TypeInfo pci_unin_agp_info = {
.name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState),
+ .instance_init = pci_unin_agp_init,
.class_init = pci_unin_agp_class_init,
};
static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
{
- SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
- sbc->init = pci_unin_internal_init_device;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -520,6 +504,7 @@ static const TypeInfo pci_unin_internal_info = {
.name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState),
+ .instance_init = pci_unin_internal_init,
.class_init = pci_unin_internal_class_init,
};
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (2 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-09 0:35 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h Mark Cave-Ayland
` (17 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
After QOMification this is clearly no longer needed (and possibly hasn't been
for some time).
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/ppc/mac_newworld.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 1eba79d54b..3410bb13ad 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -351,7 +351,6 @@ static void ppc_core99_init(MachineState *machine)
pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
machine_arch = ARCH_MAC99;
}
- object_property_set_bool(OBJECT(pci_bus), true, "realized", &error_abort);
machine->usb |= defaults_enabled() && !machine->usb_disabled;
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (3 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 22:50 ` Philippe Mathieu-Daudé
2018-03-14 5:43 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device Mark Cave-Ayland
` (16 subsequent siblings)
21 siblings, 2 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 22 +------------------
include/hw/pci-host/uninorth.h | 49 ++++++++++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+), 21 deletions(-)
create mode 100644 include/hw/pci-host/uninorth.h
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 1d4d3f5705..600d675573 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -26,31 +26,11 @@
#include "hw/ppc/mac.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
+#include "hw/pci-host/uninorth.h"
#include "trace.h"
static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e };
-#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
-#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
-#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
-#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
-
-#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
-#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
-#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
-#define U3_AGP_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
-
-typedef struct UNINState {
- PCIHostState parent_obj;
-
- MemoryRegion pci_mmio;
- MemoryRegion pci_hole;
-} UNINState;
-
static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
{
return (irq_num + (pci_dev->devfn >> 3)) & 3;
diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
new file mode 100644
index 0000000000..9364c14bdd
--- /dev/null
+++ b/include/hw/pci-host/uninorth.h
@@ -0,0 +1,49 @@
+/*
+ * QEMU Uninorth PCI host (for all Mac99 and newer machines)
+ *
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef UNINORTH_H
+#define UNINORTH_H
+
+#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
+#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
+#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
+#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
+
+#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
+ OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
+#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
+ OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
+#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
+ OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
+#define U3_AGP_HOST_BRIDGE(obj) \
+ OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
+
+typedef struct UNINState {
+ PCIHostState parent_obj;
+
+ MemoryRegion pci_mmio;
+ MemoryRegion pci_hole;
+} UNINState;
+
+#endif /* UNINORTH_H */
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (4 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-12 10:59 ` Philippe Mathieu-Daudé
2018-03-14 5:44 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function Mark Cave-Ayland
` (15 subsequent siblings)
21 siblings, 2 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
This is in preparation for moving the device wiring into the New World machine.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 16 ++++++++--------
hw/ppc/mac.h | 10 ++++++----
hw/ppc/mac_newworld.c | 10 ++++++++--
3 files changed, 22 insertions(+), 14 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 600d675573..b081e3c153 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -166,9 +166,9 @@ static void pci_unin_internal_init(Object *obj)
sysbus_init_mmio(sbd, &h->data_mem);
}
-PCIBus *pci_pmac_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io)
+UNINState *pci_pmac_init(qemu_irq *pic,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io)
{
DeviceState *dev;
SysBusDevice *s;
@@ -228,12 +228,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
sysbus_mmio_map(s, 1, 0xf4c00000);
#endif
- return h->bus;
+ return d;
}
-PCIBus *pci_pmac_u3_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io)
+UNINState *pci_pmac_u3_init(qemu_irq *pic,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io)
{
DeviceState *dev;
SysBusDevice *s;
@@ -265,7 +265,7 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
pci_create_simple(h->bus, 11 << 3, "u3-agp");
- return h->bus;
+ return d;
}
static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index a02f797598..fcf13cb757 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -31,6 +31,8 @@
#include "hw/ide/internal.h"
#include "hw/input/adb.h"
#include "hw/misc/mos6522.h"
+#include "hw/pci/pci_host.h"
+#include "hw/pci-host/uninorth.h"
/* SMP is not enabled, for now */
#define MAX_CPUS 1
@@ -86,12 +88,12 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
MemoryRegion *address_space_io);
/* UniNorth PCI */
-PCIBus *pci_pmac_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io);
-PCIBus *pci_pmac_u3_init(qemu_irq *pic,
+UNINState *pci_pmac_init(qemu_irq *pic,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io);
+UNINState *pci_pmac_u3_init(qemu_irq *pic,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io);
/* Mac NVRAM */
#define TYPE_MACIO_NVRAM "macio-nvram"
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 3410bb13ad..34908d0dd7 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -152,6 +152,7 @@ static void ppc_core99_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
hwaddr kernel_base, initrd_base, cmdline_base = 0;
long kernel_size, initrd_size;
+ UNINState *uninorth_pci;
PCIBus *pci_bus;
NewWorldMacIOState *macio;
MACIOIDEState *macio_ide;
@@ -345,10 +346,12 @@ static void ppc_core99_init(MachineState *machine)
if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
/* 970 gets a U3 bus */
- pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
+ uninorth_pci = pci_pmac_u3_init(pic, get_system_memory(),
+ get_system_io());
machine_arch = ARCH_MAC99_U3;
} else {
- pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
+ uninorth_pci = pci_pmac_init(pic, get_system_memory(),
+ get_system_io());
machine_arch = ARCH_MAC99;
}
@@ -361,6 +364,9 @@ static void ppc_core99_init(MachineState *machine)
tbfreq = TBFREQ;
}
+ /* init basic PC hardware */
+ pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
+
/* MacIO */
macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
dev = DEVICE(macio);
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (5 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 23:44 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
2018-03-06 20:30 ` [Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property Mark Cave-Ayland
` (14 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Whilst we are here, rename the memory regions to better reflect whether they
belong to either a PCI or an AGP bus.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 28 ++++++++++++++++++----------
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index b081e3c153..5b8fc3aa16 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -111,29 +111,39 @@ static const MemoryRegionOps unin_data_ops = {
static void pci_unin_main_init(Object *obj)
{
+ UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
/* Use values found on a real PowerMac */
/* Uninorth main bus */
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- obj, "pci-conf-idx", 0x1000);
+ obj, "unin-pci-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
- "pci-conf-data", 0x1000);
+ "unin-pci-conf-data", 0x1000);
+
+ memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
+ 0x100000000ULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
}
static void pci_u3_agp_init(Object *obj)
{
+ UNINState *s = U3_AGP_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
/* Uninorth U3 AGP bus */
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- obj, "pci-conf-idx", 0x1000);
+ obj, "unin-pci-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
- "pci-conf-data", 0x1000);
+ "unin-pci-conf-data", 0x1000);
+
+ memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
+ 0x100000000ULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
}
@@ -145,9 +155,9 @@ static void pci_unin_agp_init(Object *obj)
/* Uninorth AGP bus */
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- obj, "pci-conf-idx", 0x1000);
+ obj, "unin-agp-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
- obj, "pci-conf-data", 0x1000);
+ obj, "unin-agp-conf-data", 0x1000);
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
}
@@ -159,9 +169,9 @@ static void pci_unin_internal_init(Object *obj)
/* Uninorth internal bus */
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
- obj, "pci-conf-idx", 0x1000);
+ obj, "unin-pci-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
- obj, "pci-conf-data", 0x1000);
+ obj, "unin-pci-conf-data", 0x1000);
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
}
@@ -182,7 +192,6 @@ UNINState *pci_pmac_init(qemu_irq *pic,
s = SYS_BUS_DEVICE(dev);
h = PCI_HOST_BRIDGE(s);
d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL);
memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x10000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
@@ -247,7 +256,6 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
h = PCI_HOST_BRIDGE(dev);
d = U3_AGP_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL);
memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x70000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (6 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-14 6:20 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize Mark Cave-Ayland
` (13 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
This is in preparation for moving the PCI bus wiring inside the uninorth
host bridge devices. In the future it will be possible to remove this once the
PICs have been switched to use qdev GPIOs.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 25 +++++++++++++++++++++++--
include/hw/pci-host/uninorth.h | 1 +
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 5b8fc3aa16..fc59698f06 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -188,6 +188,7 @@ UNINState *pci_pmac_init(qemu_irq *pic,
/* Use values found on a real PowerMac */
/* Uninorth main bus */
dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
h = PCI_HOST_BRIDGE(s);
@@ -199,7 +200,7 @@ UNINState *pci_pmac_init(qemu_irq *pic,
h->bus = pci_register_root_bus(dev, NULL,
pci_unin_set_irq, pci_unin_map_irq,
- pic,
+ d->pic_irqs,
&d->pci_mmio,
address_space_io,
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
@@ -220,6 +221,7 @@ UNINState *pci_pmac_init(qemu_irq *pic,
/* Uninorth AGP bus */
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, 0xf0800000);
@@ -251,6 +253,7 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
/* Uninorth AGP bus */
dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
h = PCI_HOST_BRIDGE(dev);
@@ -263,7 +266,7 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
h->bus = pci_register_root_bus(dev, NULL,
pci_unin_set_irq, pci_unin_map_irq,
- pic,
+ d->pic_irqs,
&d->pci_mmio,
address_space_io,
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
@@ -436,10 +439,16 @@ static const TypeInfo unin_internal_pci_host_info = {
},
};
+static Property pci_unin_main_properties[] = {
+ DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void pci_unin_main_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->props = pci_unin_main_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -451,10 +460,16 @@ static const TypeInfo pci_unin_main_info = {
.class_init = pci_unin_main_class_init,
};
+static Property pci_u3_agp_properties[] = {
+ DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->props = pci_u3_agp_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -466,10 +481,16 @@ static const TypeInfo pci_u3_agp_info = {
.class_init = pci_u3_agp_class_init,
};
+static Property pci_unin_agp_class_properties[] = {
+ DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->props = pci_unin_agp_class_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
index 9364c14bdd..12979712d0 100644
--- a/include/hw/pci-host/uninorth.h
+++ b/include/hw/pci-host/uninorth.h
@@ -42,6 +42,7 @@
typedef struct UNINState {
PCIHostState parent_obj;
+ void *pic_irqs;
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
} UNINState;
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (7 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-12 11:04 ` Philippe Mathieu-Daudé
2018-03-06 20:30 ` [Qemu-devel] [PATCH 10/19] uninorth: fix PCI and AGP bus mixup Mark Cave-Ayland
` (12 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Since the IO address space is fixed to use the standard system IO address
space then we can also use the opportunity to remove the address_space_io
parameter from pci_pmac_init() and pci_pmac_u3_init().
Note we also move the default mac99 PCI bus to the end of the initialisation
list so that it becomes the default destination for any devices specified
via -device without an explicit PCI bus provided.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 117 ++++++++++++++++++++++++++++---------------------
hw/ppc/mac.h | 6 +--
hw/ppc/mac_newworld.c | 6 +--
3 files changed, 72 insertions(+), 57 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index fc59698f06..426b3c4e33 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -109,6 +109,27 @@ static const MemoryRegionOps unin_data_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
+static void pci_unin_main_realize(DeviceState *dev, Error **errp)
+{
+ UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
+ PCIHostState *h = PCI_HOST_BRIDGE(dev);
+
+ h->bus = pci_register_root_bus(dev, NULL,
+ pci_unin_set_irq, pci_unin_map_irq,
+ s->pic_irqs,
+ &s->pci_mmio,
+ get_system_io(),
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+
+ pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
+
+ /* DEC 21154 bridge */
+#if 0
+ /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
+ pci_create_simple(h->bus, PCI_DEVFN(12, 0), "dec-21154");
+#endif
+}
+
static void pci_unin_main_init(Object *obj)
{
UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
@@ -129,6 +150,21 @@ static void pci_unin_main_init(Object *obj)
sysbus_init_mmio(sbd, &h->data_mem);
}
+static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
+{
+ UNINState *s = U3_AGP_HOST_BRIDGE(dev);
+ PCIHostState *h = PCI_HOST_BRIDGE(dev);
+
+ h->bus = pci_register_root_bus(dev, NULL,
+ pci_unin_set_irq, pci_unin_map_irq,
+ s->pic_irqs,
+ &s->pci_mmio,
+ get_system_io(),
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+
+ pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp");
+}
+
static void pci_u3_agp_init(Object *obj)
{
UNINState *s = U3_AGP_HOST_BRIDGE(obj);
@@ -148,6 +184,19 @@ static void pci_u3_agp_init(Object *obj)
sysbus_init_mmio(sbd, &h->data_mem);
}
+static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
+{
+ UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
+ PCIHostState *h = PCI_HOST_BRIDGE(dev);
+
+ h->bus = pci_register_root_bus(dev, NULL,
+ pci_unin_set_irq, pci_unin_map_irq,
+ s->pic_irqs,
+ &s->pci_mmio,
+ get_system_io(),
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+}
+
static void pci_unin_agp_init(Object *obj)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
@@ -177,49 +226,14 @@ static void pci_unin_internal_init(Object *obj)
}
UNINState *pci_pmac_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io)
+ MemoryRegion *address_space_mem)
{
DeviceState *dev;
SysBusDevice *s;
- PCIHostState *h;
UNINState *d;
/* Use values found on a real PowerMac */
- /* Uninorth main bus */
- dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
- qdev_init_nofail(dev);
- s = SYS_BUS_DEVICE(dev);
- h = PCI_HOST_BRIDGE(s);
- d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
- memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
- 0x80000000ULL, 0x10000000ULL);
- memory_region_add_subregion(address_space_mem, 0x80000000ULL,
- &d->pci_hole);
-
- h->bus = pci_register_root_bus(dev, NULL,
- pci_unin_set_irq, pci_unin_map_irq,
- d->pic_irqs,
- &d->pci_mmio,
- address_space_io,
- PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
-
-#if 0
- pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north");
-#endif
-
- sysbus_mmio_map(s, 0, 0xf2800000);
- sysbus_mmio_map(s, 1, 0xf2c00000);
-
- /* DEC 21154 bridge */
-#if 0
- /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
- pci_create_simple(h->bus, PCI_DEVFN(12, 0), "dec-21154");
-#endif
-
/* Uninorth AGP bus */
- pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
qdev_prop_set_ptr(dev, "pic-irqs", pic);
qdev_init_nofail(dev);
@@ -239,16 +253,28 @@ UNINState *pci_pmac_init(qemu_irq *pic,
sysbus_mmio_map(s, 1, 0xf4c00000);
#endif
+ /* Uninorth main bus */
+ dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ qdev_init_nofail(dev);
+ s = SYS_BUS_DEVICE(dev);
+ d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
+ memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
+ 0x80000000ULL, 0x10000000ULL);
+ memory_region_add_subregion(address_space_mem, 0x80000000ULL,
+ &d->pci_hole);
+
+ sysbus_mmio_map(s, 0, 0xf2800000);
+ sysbus_mmio_map(s, 1, 0xf2c00000);
+
return d;
}
UNINState *pci_pmac_u3_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io)
+ MemoryRegion *address_space_mem)
{
DeviceState *dev;
SysBusDevice *s;
- PCIHostState *h;
UNINState *d;
/* Uninorth AGP bus */
@@ -256,7 +282,6 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
qdev_prop_set_ptr(dev, "pic-irqs", pic);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
- h = PCI_HOST_BRIDGE(dev);
d = U3_AGP_HOST_BRIDGE(dev);
memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
@@ -264,18 +289,9 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
- h->bus = pci_register_root_bus(dev, NULL,
- pci_unin_set_irq, pci_unin_map_irq,
- d->pic_irqs,
- &d->pci_mmio,
- address_space_io,
- PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
-
sysbus_mmio_map(s, 0, 0xf0800000);
sysbus_mmio_map(s, 1, 0xf0c00000);
- pci_create_simple(h->bus, 11 << 3, "u3-agp");
-
return d;
}
@@ -448,6 +464,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = pci_unin_main_realize;
dc->props = pci_unin_main_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -469,6 +486,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = pci_u3_agp_realize;
dc->props = pci_u3_agp_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -490,6 +508,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = pci_unin_agp_realize;
dc->props = pci_unin_agp_class_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index fcf13cb757..628415b255 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -89,11 +89,9 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
/* UniNorth PCI */
UNINState *pci_pmac_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io);
+ MemoryRegion *address_space_mem);
UNINState *pci_pmac_u3_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io);
+ MemoryRegion *address_space_mem);
/* Mac NVRAM */
#define TYPE_MACIO_NVRAM "macio-nvram"
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 34908d0dd7..f2b07207d3 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -346,12 +346,10 @@ static void ppc_core99_init(MachineState *machine)
if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
/* 970 gets a U3 bus */
- uninorth_pci = pci_pmac_u3_init(pic, get_system_memory(),
- get_system_io());
+ uninorth_pci = pci_pmac_u3_init(pic, get_system_memory());
machine_arch = ARCH_MAC99_U3;
} else {
- uninorth_pci = pci_pmac_init(pic, get_system_memory(),
- get_system_io());
+ uninorth_pci = pci_pmac_init(pic, get_system_memory());
machine_arch = ARCH_MAC99;
}
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 10/19] uninorth: fix PCI and AGP bus mixup
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (8 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 11/19] uninorth: enable internal PCI host bridge Mark Cave-Ayland
` (11 subsequent siblings)
21 siblings, 0 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Somewhere in the history of time, the initialisation of the PCI buses for the
AGP and PCI host bridges got mixed up in that the PCI host bridge was
creating an instance of the AGP PCI bus, and the AGP PCI bus was missing.
Swap the PCI host bridge over to use the correct PCI bus (including setting
the kMacRISCPCIAddressSelect register used by MacOS X) and add the missing
reference to the AGP PCI bus.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 24 +++++++++++++-----------
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 426b3c4e33..1f6752c294 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -121,7 +121,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
get_system_io(),
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
- pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
+ pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
/* DEC 21154 bridge */
#if 0
@@ -195,6 +195,8 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
&s->pci_mmio,
get_system_io(),
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+
+ pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
}
static void pci_unin_agp_init(Object *obj)
@@ -303,16 +305,6 @@ static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
d->config[0x0D] = 0x10;
/* capabilities_pointer */
d->config[0x34] = 0x00;
-}
-
-static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
-{
- /* cache_line_size */
- d->config[0x0C] = 0x08;
- /* latency_timer */
- d->config[0x0D] = 0x10;
- /* capabilities_pointer
- d->config[0x34] = 0x80; */
/*
* Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
@@ -325,6 +317,16 @@ static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
d->config[0x4b] = 0x1;
}
+static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
+{
+ /* cache_line_size */
+ d->config[0x0C] = 0x08;
+ /* latency_timer */
+ d->config[0x0D] = 0x10;
+ /* capabilities_pointer
+ d->config[0x34] = 0x80; */
+}
+
static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp)
{
/* cache line size */
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 11/19] uninorth: enable internal PCI host bridge
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (9 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 10/19] uninorth: fix PCI and AGP bus mixup Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 12/19] uninorth: remove obsolete pci_pmac_init() function Mark Cave-Ayland
` (10 subsequent siblings)
21 siblings, 0 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 28 +++++++++++++++++++++++-----
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 1f6752c294..ccde332fa9 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -213,6 +213,21 @@ static void pci_unin_agp_init(Object *obj)
sysbus_init_mmio(sbd, &h->data_mem);
}
+static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
+{
+ UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev);
+ PCIHostState *h = PCI_HOST_BRIDGE(dev);
+
+ h->bus = pci_register_root_bus(dev, NULL,
+ pci_unin_set_irq, pci_unin_map_irq,
+ s->pic_irqs,
+ &s->pci_mmio,
+ get_system_io(),
+ PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS);
+
+ pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci");
+}
+
static void pci_unin_internal_init(Object *obj)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
@@ -244,16 +259,12 @@ UNINState *pci_pmac_init(qemu_irq *pic,
sysbus_mmio_map(s, 1, 0xf0c00000);
/* Uninorth internal bus */
-#if 0
- /* XXX: not needed for now */
- pci_create_simple(h->bus, PCI_DEVFN(14, 0),
- "uni-north-internal-pci");
dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, 0xf4800000);
sysbus_mmio_map(s, 1, 0xf4c00000);
-#endif
/* Uninorth main bus */
dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
@@ -523,10 +534,17 @@ static const TypeInfo pci_unin_agp_info = {
.class_init = pci_unin_agp_class_init,
};
+static Property pci_unin_internal_class_properties[] = {
+ DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = pci_unin_internal_realize;
+ dc->props = pci_unin_internal_class_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 12/19] uninorth: remove obsolete pci_pmac_init() function
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (10 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 11/19] uninorth: enable internal PCI host bridge Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 13/19] uninorth: remove obsolete pci_pmac_u3_init() function Mark Cave-Ayland
` (9 subsequent siblings)
21 siblings, 0 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete
it is possible to move the initialisation of the PCI hole alias into
pci_unin_main_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 46 +++++-----------------------------------------
hw/ppc/mac_newworld.c | 30 +++++++++++++++++++++++++++++-
2 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index ccde332fa9..8e4e9b3d35 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -146,8 +146,13 @@ static void pci_unin_main_init(Object *obj)
memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
0x100000000ULL);
+ memory_region_init_alias(&s->pci_hole, OBJECT(s),
+ "unin-pci-hole", &s->pci_mmio,
+ 0x80000000ULL, 0x10000000ULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
+ sysbus_init_mmio(sbd, &s->pci_hole);
}
static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
@@ -242,47 +247,6 @@ static void pci_unin_internal_init(Object *obj)
sysbus_init_mmio(sbd, &h->data_mem);
}
-UNINState *pci_pmac_init(qemu_irq *pic,
- MemoryRegion *address_space_mem)
-{
- DeviceState *dev;
- SysBusDevice *s;
- UNINState *d;
-
- /* Use values found on a real PowerMac */
- /* Uninorth AGP bus */
- dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
- qdev_init_nofail(dev);
- s = SYS_BUS_DEVICE(dev);
- sysbus_mmio_map(s, 0, 0xf0800000);
- sysbus_mmio_map(s, 1, 0xf0c00000);
-
- /* Uninorth internal bus */
- dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
- qdev_init_nofail(dev);
- s = SYS_BUS_DEVICE(dev);
- sysbus_mmio_map(s, 0, 0xf4800000);
- sysbus_mmio_map(s, 1, 0xf4c00000);
-
- /* Uninorth main bus */
- dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
- qdev_init_nofail(dev);
- s = SYS_BUS_DEVICE(dev);
- d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
- memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
- 0x80000000ULL, 0x10000000ULL);
- memory_region_add_subregion(address_space_mem, 0x80000000ULL,
- &d->pci_hole);
-
- sysbus_mmio_map(s, 0, 0xf2800000);
- sysbus_mmio_map(s, 1, 0xf2c00000);
-
- return d;
-}
-
UNINState *pci_pmac_u3_init(qemu_irq *pic,
MemoryRegion *address_space_mem)
{
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index f2b07207d3..da76c33099 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -349,7 +349,35 @@ static void ppc_core99_init(MachineState *machine)
uninorth_pci = pci_pmac_u3_init(pic, get_system_memory());
machine_arch = ARCH_MAC99_U3;
} else {
- uninorth_pci = pci_pmac_init(pic, get_system_memory());
+ /* Use values found on a real PowerMac */
+ /* Uninorth AGP bus */
+ dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ qdev_init_nofail(dev);
+ s = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(s, 0, 0xf0800000);
+ sysbus_mmio_map(s, 1, 0xf0c00000);
+
+ /* Uninorth internal bus */
+ dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ qdev_init_nofail(dev);
+ s = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(s, 0, 0xf4800000);
+ sysbus_mmio_map(s, 1, 0xf4c00000);
+
+ /* Uninorth main bus */
+ dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ qdev_init_nofail(dev);
+ uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
+ s = SYS_BUS_DEVICE(dev);
+ /* PCI hole */
+ memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
+ sysbus_mmio_get_region(s, 2));
+ sysbus_mmio_map(s, 0, 0xf2800000);
+ sysbus_mmio_map(s, 1, 0xf2c00000);
+
machine_arch = ARCH_MAC99;
}
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 13/19] uninorth: remove obsolete pci_pmac_u3_init() function
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (11 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 12/19] uninorth: remove obsolete pci_pmac_init() function Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 14/19] uninorth: use object link to pass OpenPIC object to uninorth Mark Cave-Ayland
` (8 subsequent siblings)
21 siblings, 0 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete
it is possible to move the initialisation of the PCI hole alias into
pci_u3_agp_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 30 +++++-------------------------
hw/ppc/mac_newworld.c | 13 ++++++++++++-
2 files changed, 17 insertions(+), 26 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 8e4e9b3d35..ec6e529d66 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -185,8 +185,13 @@ static void pci_u3_agp_init(Object *obj)
memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
0x100000000ULL);
+ memory_region_init_alias(&s->pci_hole, OBJECT(s),
+ "unin-pci-hole", &s->pci_mmio,
+ 0x80000000ULL, 0x70000000ULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
+ sysbus_init_mmio(sbd, &s->pci_hole);
}
static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
@@ -247,31 +252,6 @@ static void pci_unin_internal_init(Object *obj)
sysbus_init_mmio(sbd, &h->data_mem);
}
-UNINState *pci_pmac_u3_init(qemu_irq *pic,
- MemoryRegion *address_space_mem)
-{
- DeviceState *dev;
- SysBusDevice *s;
- UNINState *d;
-
- /* Uninorth AGP bus */
- dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
- qdev_init_nofail(dev);
- s = SYS_BUS_DEVICE(dev);
- d = U3_AGP_HOST_BRIDGE(dev);
-
- memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
- 0x80000000ULL, 0x70000000ULL);
- memory_region_add_subregion(address_space_mem, 0x80000000ULL,
- &d->pci_hole);
-
- sysbus_mmio_map(s, 0, 0xf0800000);
- sysbus_mmio_map(s, 1, 0xf0c00000);
-
- return d;
-}
-
static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
{
/* cache_line_size */
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index da76c33099..f806187d8c 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -346,7 +346,18 @@ static void ppc_core99_init(MachineState *machine)
if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
/* 970 gets a U3 bus */
- uninorth_pci = pci_pmac_u3_init(pic, get_system_memory());
+ /* Uninorth AGP bus */
+ dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
+ qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ qdev_init_nofail(dev);
+ uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
+ s = SYS_BUS_DEVICE(dev);
+ /* PCI hole */
+ memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
+ sysbus_mmio_get_region(s, 2));
+ sysbus_mmio_map(s, 0, 0xf0800000);
+ sysbus_mmio_map(s, 1, 0xf0c00000);
+
machine_arch = ARCH_MAC99_U3;
} else {
/* Use values found on a real PowerMac */
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 14/19] uninorth: use object link to pass OpenPIC object to uninorth
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (12 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 13/19] uninorth: remove obsolete pci_pmac_u3_init() function Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device Mark Cave-Ayland
` (7 subsequent siblings)
21 siblings, 0 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Now that the OpenPIC is wired up via the board, we can now remove our temporary
PIC qdev pointer property and replace it with an object link instead.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 73 +++++++++++++++++++++++++-----------------
hw/ppc/mac_newworld.c | 12 ++++---
include/hw/pci-host/uninorth.h | 5 ++-
3 files changed, 55 insertions(+), 35 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index ec6e529d66..e2278fd0f0 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -38,10 +38,10 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
static void pci_unin_set_irq(void *opaque, int irq_num, int level)
{
- qemu_irq *pic = opaque;
+ UNINState *s = opaque;
trace_unin_set_irq(unin_irq_line[irq_num], level);
- qemu_set_irq(pic[unin_irq_line[irq_num]], level);
+ qemu_set_irq(s->irqs[irq_num], level);
}
static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
@@ -109,6 +109,15 @@ static const MemoryRegionOps unin_data_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
+static void pci_unin_init_irqs(UNINState *s)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(s->irqs); i++) {
+ s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), unin_irq_line[i]);
+ }
+}
+
static void pci_unin_main_realize(DeviceState *dev, Error **errp)
{
UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
@@ -116,12 +125,13 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
h->bus = pci_register_root_bus(dev, NULL,
pci_unin_set_irq, pci_unin_map_irq,
- s->pic_irqs,
+ s,
&s->pci_mmio,
get_system_io(),
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
+ pci_unin_init_irqs(s);
/* DEC 21154 bridge */
#if 0
@@ -150,6 +160,11 @@ static void pci_unin_main_init(Object *obj)
"unin-pci-hole", &s->pci_mmio,
0x80000000ULL, 0x10000000ULL);
+ object_property_add_link(obj, "pic", TYPE_OPENPIC,
+ (Object **) &s->pic,
+ qdev_prop_allow_set_link_before_realize,
+ 0, NULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
sysbus_init_mmio(sbd, &s->pci_hole);
@@ -162,12 +177,13 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
h->bus = pci_register_root_bus(dev, NULL,
pci_unin_set_irq, pci_unin_map_irq,
- s->pic_irqs,
+ s,
&s->pci_mmio,
get_system_io(),
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp");
+ pci_unin_init_irqs(s);
}
static void pci_u3_agp_init(Object *obj)
@@ -189,6 +205,11 @@ static void pci_u3_agp_init(Object *obj)
"unin-pci-hole", &s->pci_mmio,
0x80000000ULL, 0x70000000ULL);
+ object_property_add_link(obj, "pic", TYPE_OPENPIC,
+ (Object **) &s->pic,
+ qdev_prop_allow_set_link_before_realize,
+ 0, NULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
sysbus_init_mmio(sbd, &s->pci_hole);
@@ -201,16 +222,18 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
h->bus = pci_register_root_bus(dev, NULL,
pci_unin_set_irq, pci_unin_map_irq,
- s->pic_irqs,
+ s,
&s->pci_mmio,
get_system_io(),
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
+ pci_unin_init_irqs(s);
}
static void pci_unin_agp_init(Object *obj)
{
+ UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
@@ -219,6 +242,12 @@ static void pci_unin_agp_init(Object *obj)
obj, "unin-agp-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
obj, "unin-agp-conf-data", 0x1000);
+
+ object_property_add_link(obj, "pic", TYPE_OPENPIC,
+ (Object **) &s->pic,
+ qdev_prop_allow_set_link_before_realize,
+ 0, NULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
}
@@ -230,16 +259,18 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
h->bus = pci_register_root_bus(dev, NULL,
pci_unin_set_irq, pci_unin_map_irq,
- s->pic_irqs,
+ s,
&s->pci_mmio,
get_system_io(),
PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci");
+ pci_unin_init_irqs(s);
}
static void pci_unin_internal_init(Object *obj)
{
+ UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
@@ -248,6 +279,12 @@ static void pci_unin_internal_init(Object *obj)
obj, "unin-pci-conf-idx", 0x1000);
memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
obj, "unin-pci-conf-data", 0x1000);
+
+ object_property_add_link(obj, "pic", TYPE_OPENPIC,
+ (Object **) &s->pic,
+ qdev_prop_allow_set_link_before_realize,
+ 0, NULL);
+
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
}
@@ -412,17 +449,11 @@ static const TypeInfo unin_internal_pci_host_info = {
},
};
-static Property pci_unin_main_properties[] = {
- DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void pci_unin_main_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pci_unin_main_realize;
- dc->props = pci_unin_main_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -434,17 +465,11 @@ static const TypeInfo pci_unin_main_info = {
.class_init = pci_unin_main_class_init,
};
-static Property pci_u3_agp_properties[] = {
- DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pci_u3_agp_realize;
- dc->props = pci_u3_agp_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -456,17 +481,11 @@ static const TypeInfo pci_u3_agp_info = {
.class_init = pci_u3_agp_class_init,
};
-static Property pci_unin_agp_class_properties[] = {
- DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pci_unin_agp_realize;
- dc->props = pci_unin_agp_class_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -478,17 +497,11 @@ static const TypeInfo pci_unin_agp_info = {
.class_init = pci_unin_agp_class_init,
};
-static Property pci_unin_internal_class_properties[] = {
- DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pci_unin_internal_realize;
- dc->props = pci_unin_internal_class_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index f806187d8c..5d121a6071 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -348,7 +348,8 @@ static void ppc_core99_init(MachineState *machine)
/* 970 gets a U3 bus */
/* Uninorth AGP bus */
dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ &error_abort);
qdev_init_nofail(dev);
uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
s = SYS_BUS_DEVICE(dev);
@@ -363,7 +364,8 @@ static void ppc_core99_init(MachineState *machine)
/* Use values found on a real PowerMac */
/* Uninorth AGP bus */
dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ &error_abort);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, 0xf0800000);
@@ -371,7 +373,8 @@ static void ppc_core99_init(MachineState *machine)
/* Uninorth internal bus */
dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ &error_abort);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, 0xf4800000);
@@ -379,7 +382,8 @@ static void ppc_core99_init(MachineState *machine)
/* Uninorth main bus */
dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
- qdev_prop_set_ptr(dev, "pic-irqs", pic);
+ object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ &error_abort);
qdev_init_nofail(dev);
uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
s = SYS_BUS_DEVICE(dev);
diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
index 12979712d0..6b520e753c 100644
--- a/include/hw/pci-host/uninorth.h
+++ b/include/hw/pci-host/uninorth.h
@@ -25,6 +25,8 @@
#ifndef UNINORTH_H
#define UNINORTH_H
+#include "hw/ppc/openpic.h"
+
#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
@@ -42,7 +44,8 @@
typedef struct UNINState {
PCIHostState parent_obj;
- void *pic_irqs;
+ OpenPICState *pic;
+ qemu_irq irqs[4];
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
} UNINState;
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (13 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 14/19] uninorth: use object link to pass OpenPIC object to uninorth Mark Cave-Ayland
@ 2018-03-06 20:30 ` Mark Cave-Ayland
2018-03-12 11:01 ` Philippe Mathieu-Daudé
2018-03-06 20:31 ` [Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState Mark Cave-Ayland
` (6 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:30 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Do this for both the uninorth main and uninorth u3 AGP buses, using the main
PCI bus for each machine (this ensures the IO addresses still match those
used by OpenBIOS).
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 14 ++++++++++----
hw/ppc/mac_newworld.c | 12 ++++++------
include/hw/pci-host/uninorth.h | 1 +
3 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index e2278fd0f0..3a29a4410e 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -127,7 +127,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
pci_unin_set_irq, pci_unin_map_irq,
s,
&s->pci_mmio,
- get_system_io(),
+ &s->pci_io,
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
@@ -155,6 +155,8 @@ static void pci_unin_main_init(Object *obj)
memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
0x100000000ULL);
+ memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
+ "unin-pci-isa-mmio", 0x00800000);
memory_region_init_alias(&s->pci_hole, OBJECT(s),
"unin-pci-hole", &s->pci_mmio,
@@ -168,6 +170,7 @@ static void pci_unin_main_init(Object *obj)
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
sysbus_init_mmio(sbd, &s->pci_hole);
+ sysbus_init_mmio(sbd, &s->pci_io);
}
static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
@@ -179,7 +182,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
pci_unin_set_irq, pci_unin_map_irq,
s,
&s->pci_mmio,
- get_system_io(),
+ &s->pci_io,
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp");
@@ -200,6 +203,8 @@ static void pci_u3_agp_init(Object *obj)
memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
0x100000000ULL);
+ memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
+ "unin-pci-isa-mmio", 0x00800000);
memory_region_init_alias(&s->pci_hole, OBJECT(s),
"unin-pci-hole", &s->pci_mmio,
@@ -213,6 +218,7 @@ static void pci_u3_agp_init(Object *obj)
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
sysbus_init_mmio(sbd, &s->pci_hole);
+ sysbus_init_mmio(sbd, &s->pci_io);
}
static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
@@ -224,7 +230,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
pci_unin_set_irq, pci_unin_map_irq,
s,
&s->pci_mmio,
- get_system_io(),
+ &s->pci_io,
PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
@@ -261,7 +267,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
pci_unin_set_irq, pci_unin_map_irq,
s,
&s->pci_mmio,
- get_system_io(),
+ &s->pci_io,
PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS);
pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci");
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 5d121a6071..5cb9f9abd0 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -146,7 +146,6 @@ static void ppc_core99_init(MachineState *machine)
CPUPPCState *env = NULL;
char *filename;
qemu_irq *pic, **openpic_irqs;
- MemoryRegion *isa = g_new(MemoryRegion, 1);
MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
int linux_boot, i, j, k;
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
@@ -274,11 +273,6 @@ static void ppc_core99_init(MachineState *machine)
}
}
- /* Register 8 MB of ISA IO space */
- memory_region_init_alias(isa, NULL, "isa_mmio",
- get_system_io(), 0, 0x00800000);
- memory_region_add_subregion(get_system_memory(), 0xf2000000, isa);
-
/* UniN init: XXX should be a real device */
memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
@@ -356,6 +350,9 @@ static void ppc_core99_init(MachineState *machine)
/* PCI hole */
memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
sysbus_mmio_get_region(s, 2));
+ /* Register 8 MB of ISA IO space */
+ memory_region_add_subregion(get_system_memory(), 0xf2000000,
+ sysbus_mmio_get_region(s, 3));
sysbus_mmio_map(s, 0, 0xf0800000);
sysbus_mmio_map(s, 1, 0xf0c00000);
@@ -390,6 +387,9 @@ static void ppc_core99_init(MachineState *machine)
/* PCI hole */
memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
sysbus_mmio_get_region(s, 2));
+ /* Register 8 MB of ISA IO space */
+ memory_region_add_subregion(get_system_memory(), 0xf2000000,
+ sysbus_mmio_get_region(s, 3));
sysbus_mmio_map(s, 0, 0xf2800000);
sysbus_mmio_map(s, 1, 0xf2c00000);
diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
index 6b520e753c..c4771aa7fa 100644
--- a/include/hw/pci-host/uninorth.h
+++ b/include/hw/pci-host/uninorth.h
@@ -48,6 +48,7 @@ typedef struct UNINState {
qemu_irq irqs[4];
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
+ MemoryRegion pci_io;
} UNINState;
#endif /* UNINORTH_H */
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (14 preceding siblings ...)
2018-03-06 20:30 ` [Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device Mark Cave-Ayland
@ 2018-03-06 20:31 ` Mark Cave-Ayland
2018-03-06 22:52 ` Philippe Mathieu-Daudé
2018-03-06 20:31 ` [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device Mark Cave-Ayland
` (5 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:31 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
The existing UNINState actually represents the PCI/AGP host bridge stage so
rename it accordingly.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/uninorth.c | 32 ++++++++++++++++----------------
hw/ppc/mac.h | 8 ++++----
hw/ppc/mac_newworld.c | 2 +-
include/hw/pci-host/uninorth.h | 12 ++++++------
4 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 3a29a4410e..fada0ffd5f 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -38,7 +38,7 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
static void pci_unin_set_irq(void *opaque, int irq_num, int level)
{
- UNINState *s = opaque;
+ UNINHostState *s = opaque;
trace_unin_set_irq(unin_irq_line[irq_num], level);
qemu_set_irq(s->irqs[irq_num], level);
@@ -81,7 +81,7 @@ static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
static void unin_data_write(void *opaque, hwaddr addr,
uint64_t val, unsigned len)
{
- UNINState *s = opaque;
+ UNINHostState *s = opaque;
PCIHostState *phb = PCI_HOST_BRIDGE(s);
trace_unin_data_write(addr, len, val);
pci_data_write(phb->bus,
@@ -92,7 +92,7 @@ static void unin_data_write(void *opaque, hwaddr addr,
static uint64_t unin_data_read(void *opaque, hwaddr addr,
unsigned len)
{
- UNINState *s = opaque;
+ UNINHostState *s = opaque;
PCIHostState *phb = PCI_HOST_BRIDGE(s);
uint32_t val;
@@ -109,7 +109,7 @@ static const MemoryRegionOps unin_data_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static void pci_unin_init_irqs(UNINState *s)
+static void pci_unin_init_irqs(UNINHostState *s)
{
int i;
@@ -120,7 +120,7 @@ static void pci_unin_init_irqs(UNINState *s)
static void pci_unin_main_realize(DeviceState *dev, Error **errp)
{
- UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
+ UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
PCIHostState *h = PCI_HOST_BRIDGE(dev);
h->bus = pci_register_root_bus(dev, NULL,
@@ -142,7 +142,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
static void pci_unin_main_init(Object *obj)
{
- UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
+ UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
@@ -175,7 +175,7 @@ static void pci_unin_main_init(Object *obj)
static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
{
- UNINState *s = U3_AGP_HOST_BRIDGE(dev);
+ UNINHostState *s = U3_AGP_HOST_BRIDGE(dev);
PCIHostState *h = PCI_HOST_BRIDGE(dev);
h->bus = pci_register_root_bus(dev, NULL,
@@ -191,7 +191,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
static void pci_u3_agp_init(Object *obj)
{
- UNINState *s = U3_AGP_HOST_BRIDGE(obj);
+ UNINHostState *s = U3_AGP_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
@@ -223,7 +223,7 @@ static void pci_u3_agp_init(Object *obj)
static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
{
- UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
+ UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
PCIHostState *h = PCI_HOST_BRIDGE(dev);
h->bus = pci_register_root_bus(dev, NULL,
@@ -239,7 +239,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
static void pci_unin_agp_init(Object *obj)
{
- UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
+ UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
@@ -260,7 +260,7 @@ static void pci_unin_agp_init(Object *obj)
static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
{
- UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev);
+ UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev);
PCIHostState *h = PCI_HOST_BRIDGE(dev);
h->bus = pci_register_root_bus(dev, NULL,
@@ -276,7 +276,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
static void pci_unin_internal_init(Object *obj)
{
- UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
+ UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
PCIHostState *h = PCI_HOST_BRIDGE(obj);
@@ -466,7 +466,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_unin_main_info = {
.name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
- .instance_size = sizeof(UNINState),
+ .instance_size = sizeof(UNINHostState),
.instance_init = pci_unin_main_init,
.class_init = pci_unin_main_class_init,
};
@@ -482,7 +482,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_u3_agp_info = {
.name = TYPE_U3_AGP_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
- .instance_size = sizeof(UNINState),
+ .instance_size = sizeof(UNINHostState),
.instance_init = pci_u3_agp_init,
.class_init = pci_u3_agp_class_init,
};
@@ -498,7 +498,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_unin_agp_info = {
.name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
- .instance_size = sizeof(UNINState),
+ .instance_size = sizeof(UNINHostState),
.instance_init = pci_unin_agp_init,
.class_init = pci_unin_agp_class_init,
};
@@ -514,7 +514,7 @@ static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_unin_internal_info = {
.name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
- .instance_size = sizeof(UNINState),
+ .instance_size = sizeof(UNINHostState),
.instance_init = pci_unin_internal_init,
.class_init = pci_unin_internal_class_init,
};
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index 628415b255..5f5916252a 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -88,10 +88,10 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
MemoryRegion *address_space_io);
/* UniNorth PCI */
-UNINState *pci_pmac_init(qemu_irq *pic,
- MemoryRegion *address_space_mem);
-UNINState *pci_pmac_u3_init(qemu_irq *pic,
- MemoryRegion *address_space_mem);
+UNINHostState *pci_pmac_init(qemu_irq *pic,
+ MemoryRegion *address_space_mem);
+UNINHostState *pci_pmac_u3_init(qemu_irq *pic,
+ MemoryRegion *address_space_mem);
/* Mac NVRAM */
#define TYPE_MACIO_NVRAM "macio-nvram"
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 5cb9f9abd0..ae0de4e36e 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -151,7 +151,7 @@ static void ppc_core99_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
hwaddr kernel_base, initrd_base, cmdline_base = 0;
long kernel_size, initrd_size;
- UNINState *uninorth_pci;
+ UNINHostState *uninorth_pci;
PCIBus *pci_bus;
NewWorldMacIOState *macio;
MACIOIDEState *macio_ide;
diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
index c4771aa7fa..d1424b165a 100644
--- a/include/hw/pci-host/uninorth.h
+++ b/include/hw/pci-host/uninorth.h
@@ -33,15 +33,15 @@
#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
+ OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
+ OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
+ OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
#define U3_AGP_HOST_BRIDGE(obj) \
- OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
+ OBJECT_CHECK(UNINHostState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
-typedef struct UNINState {
+typedef struct UNINHostState {
PCIHostState parent_obj;
OpenPICState *pic;
@@ -49,6 +49,6 @@ typedef struct UNINState {
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
MemoryRegion pci_io;
-} UNINState;
+} UNINHostState;
#endif /* UNINORTH_H */
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (15 preceding siblings ...)
2018-03-06 20:31 ` [Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState Mark Cave-Ayland
@ 2018-03-06 20:31 ` Mark Cave-Ayland
2018-03-21 3:29 ` David Gibson
2018-03-06 20:31 ` [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly Mark Cave-Ayland
` (4 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:31 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Commit 4e46dcdbd3 "PPC: Newworld: Add uninorth token register" added a TODO
which was to convert the uninorth registers hack to a proper device. Move
these registers to a new uninorth device, removing the old hacks from
mac_newworld.c.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/pci-host/trace-events | 2 ++
hw/pci-host/uninorth.c | 58 ++++++++++++++++++++++++++++++++++++++++++
hw/ppc/mac_newworld.c | 41 +++++------------------------
hw/ppc/trace-events | 4 ---
include/hw/pci-host/uninorth.h | 11 ++++++++
5 files changed, 77 insertions(+), 39 deletions(-)
diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events
index 341a87a702..dd7a398e96 100644
--- a/hw/pci-host/trace-events
+++ b/hw/pci-host/trace-events
@@ -18,3 +18,5 @@ unin_set_irq(int irq_num, int level) "setting INT %d = %d"
unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32
unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64
unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64
+unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
+unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index fada0ffd5f..dbfad01d9d 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -519,6 +519,62 @@ static const TypeInfo pci_unin_internal_info = {
.class_init = pci_unin_internal_class_init,
};
+/* UniN device */
+static void unin_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+ trace_unin_write(addr, value);
+ if (addr == 0x0) {
+ *(int *)opaque = value;
+ }
+}
+
+static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
+{
+ uint32_t value;
+
+ value = 0;
+ switch (addr) {
+ case 0:
+ value = *(int *)opaque;
+ }
+
+ trace_unin_read(addr, value);
+
+ return value;
+}
+
+static const MemoryRegionOps unin_ops = {
+ .read = unin_read,
+ .write = unin_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static void unin_init(Object *obj)
+{
+ UNINState *s = UNI_NORTH(obj);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+ memory_region_init_io(&s->mem, obj, &unin_ops, &s->token, "unin", 0x1000);
+
+ sysbus_init_mmio(sbd, &s->mem);
+}
+
+static void unin_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
+}
+
+static const TypeInfo unin_info = {
+ .name = TYPE_UNI_NORTH,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(UNINState),
+ .instance_init = unin_init,
+ .class_init = unin_class_init,
+};
+
static void unin_register_types(void)
{
type_register_static(&unin_main_pci_host_info);
@@ -530,6 +586,8 @@ static void unin_register_types(void)
type_register_static(&pci_u3_agp_info);
type_register_static(&pci_unin_agp_info);
type_register_static(&pci_unin_internal_info);
+
+ type_register_static(&unin_info);
}
type_init(unin_register_types)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index ae0de4e36e..2fcb101982 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -83,36 +83,6 @@
#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
-/* UniN device */
-static void unin_write(void *opaque, hwaddr addr, uint64_t value,
- unsigned size)
-{
- trace_mac99_uninorth_write(addr, value);
- if (addr == 0x0) {
- *(int*)opaque = value;
- }
-}
-
-static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
-{
- uint32_t value;
-
- value = 0;
- switch (addr) {
- case 0:
- value = *(int*)opaque;
- }
-
- trace_mac99_uninorth_read(addr, value);
-
- return value;
-}
-
-static const MemoryRegionOps unin_ops = {
- .read = unin_read,
- .write = unin_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
-};
static void fw_cfg_boot_set(void *opaque, const char *boot_device,
Error **errp)
@@ -146,7 +116,6 @@ static void ppc_core99_init(MachineState *machine)
CPUPPCState *env = NULL;
char *filename;
qemu_irq *pic, **openpic_irqs;
- MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
int linux_boot, i, j, k;
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
hwaddr kernel_base, initrd_base, cmdline_base = 0;
@@ -165,7 +134,6 @@ static void ppc_core99_init(MachineState *machine)
int machine_arch;
SysBusDevice *s;
DeviceState *dev, *pic_dev;
- int *token = g_new(int, 1);
hwaddr nvram_addr = 0xFFF04000;
uint64_t tbfreq;
@@ -273,9 +241,12 @@ static void ppc_core99_init(MachineState *machine)
}
}
- /* UniN init: XXX should be a real device */
- memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
- memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
+ /* UniN init */
+ dev = qdev_create(NULL, TYPE_UNI_NORTH);
+ qdev_init_nofail(dev);
+ s = SYS_BUS_DEVICE(dev);
+ memory_region_add_subregion(get_system_memory(), 0xf8000000,
+ sysbus_mmio_get_region(s, 0));
openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
openpic_irqs[0] =
diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
index 66ec7eda6e..dc5e65aee9 100644
--- a/hw/ppc/trace-events
+++ b/hw/ppc/trace-events
@@ -92,10 +92,6 @@ rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
-# hw/ppc/mac_newworld.c
-mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
-mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
-
# hw/ppc/ppc4xx_pci.c
ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
index d1424b165a..b0eb093e72 100644
--- a/include/hw/pci-host/uninorth.h
+++ b/include/hw/pci-host/uninorth.h
@@ -51,4 +51,15 @@ typedef struct UNINHostState {
MemoryRegion pci_io;
} UNINHostState;
+typedef struct UNINState {
+ SysBusDevice parent_obj;
+
+ MemoryRegion mem;
+ int token[1];
+} UNINState;
+
+#define TYPE_UNI_NORTH "uni-north"
+#define UNI_NORTH(obj) \
+ OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH)
+
#endif /* UNINORTH_H */
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (16 preceding siblings ...)
2018-03-06 20:31 ` [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device Mark Cave-Ayland
@ 2018-03-06 20:31 ` Mark Cave-Ayland
2018-03-21 3:40 ` David Gibson
2018-03-22 8:38 ` Philippe Mathieu-Daudé
2018-03-06 20:31 ` [Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize() Mark Cave-Ayland
` (3 subsequent siblings)
21 siblings, 2 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:31 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Introduce constants for the pre-defined New World IRQs to help keep things
readable.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/ppc/mac.h | 8 ++++++++
hw/ppc/mac_newworld.c | 29 +++++++++++++++--------------
2 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index 5f5916252a..3819058310 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -47,6 +47,14 @@
#define ESCC_CLOCK 3686400
+/* New World IRQs */
+#define NEWWORLD_CUDA_IRQ 0x19
+#define NEWWORLD_ESCCB_IRQ 0x24
+#define NEWWORLD_ESCCA_IRQ 0x25
+#define NEWWORLD_IDE0_IRQ 0xd
+#define NEWWORLD_IDE0_DMA_IRQ 0x2
+#define NEWWORLD_IDE1_IRQ 0xe
+#define NEWWORLD_IDE1_DMA_IRQ 0x3
/* MacIO */
#define TYPE_MACIO_IDE "macio-ide"
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 2fcb101982..3cde507065 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -115,7 +115,7 @@ static void ppc_core99_init(MachineState *machine)
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;
char *filename;
- qemu_irq *pic, **openpic_irqs;
+ qemu_irq **openpic_irqs;
int linux_boot, i, j, k;
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
hwaddr kernel_base, initrd_base, cmdline_base = 0;
@@ -292,8 +292,6 @@ static void ppc_core99_init(MachineState *machine)
}
}
- pic = g_new0(qemu_irq, 64);
-
pic_dev = qdev_create(NULL, TYPE_OPENPIC);
qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
qdev_init_nofail(pic_dev);
@@ -305,10 +303,6 @@ static void ppc_core99_init(MachineState *machine)
}
}
- for (i = 0; i < 64; i++) {
- pic[i] = qdev_get_gpio_in(pic_dev, i);
- }
-
if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
/* 970 gets a U3 bus */
/* Uninorth AGP bus */
@@ -382,13 +376,20 @@ static void ppc_core99_init(MachineState *machine)
/* MacIO */
macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
dev = DEVICE(macio);
- qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */
- qdev_connect_gpio_out(dev, 1, pic[0x24]); /* ESCC-B */
- qdev_connect_gpio_out(dev, 2, pic[0x25]); /* ESCC-A */
- qdev_connect_gpio_out(dev, 3, pic[0x0d]); /* IDE */
- qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */
- qdev_connect_gpio_out(dev, 5, pic[0x0e]); /* IDE */
- qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE DMA */
+ qdev_connect_gpio_out(dev, 0,
+ qdev_get_gpio_in(pic_dev, NEWWORLD_CUDA_IRQ));
+ qdev_connect_gpio_out(dev, 1,
+ qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCB_IRQ));
+ qdev_connect_gpio_out(dev, 2,
+ qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCA_IRQ));
+ qdev_connect_gpio_out(dev, 3,
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ));
+ qdev_connect_gpio_out(dev, 4,
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ));
+ qdev_connect_gpio_out(dev, 5,
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ));
+ qdev_connect_gpio_out(dev, 6,
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ));
qdev_prop_set_uint64(dev, "frequency", tbfreq);
object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
&error_abort);
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (17 preceding siblings ...)
2018-03-06 20:31 ` [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly Mark Cave-Ayland
@ 2018-03-06 20:31 ` Mark Cave-Ayland
2018-03-21 3:42 ` David Gibson
2018-03-06 20:59 ` [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements no-reply
` (2 subsequent siblings)
21 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 20:31 UTC (permalink / raw)
To: qemu-devel, qemu-ppc, david
Since the macio device has a link to the PIC device, we can now wire up the
IRQs directly via qdev GPIOs rather than having to use an intermediate array.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/misc/macio/macio.c | 37 ++++++++++++++++++++++---------------
hw/ppc/mac_newworld.c | 14 --------------
include/hw/misc/macio/macio.h | 1 -
3 files changed, 22 insertions(+), 30 deletions(-)
diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
index af1bd46b4b..1aa7bb7c89 100644
--- a/hw/misc/macio/macio.c
+++ b/hw/misc/macio/macio.c
@@ -265,11 +265,10 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
{
MacIOState *s = MACIO(d);
NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
+ DeviceState *pic_dev = DEVICE(ns->pic);
Error *err = NULL;
SysBusDevice *sysbus_dev;
MemoryRegion *timer_memory = NULL;
- int i;
- int cur_irq = 0;
macio_common_realize(d, &err);
if (err) {
@@ -278,11 +277,14 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
}
sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
- sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
+ sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
+ NEWWORLD_CUDA_IRQ));
sysbus_dev = SYS_BUS_DEVICE(&s->escc);
- sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
- sysbus_connect_irq(sysbus_dev, 1, ns->irqs[cur_irq++]);
+ sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
+ NEWWORLD_ESCCB_IRQ));
+ sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
+ NEWWORLD_ESCCA_IRQ));
/* OpenPIC */
sysbus_dev = SYS_BUS_DEVICE(ns->pic);
@@ -290,15 +292,22 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
sysbus_mmio_get_region(sysbus_dev, 0));
/* IDE buses */
- for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
- qemu_irq irq0 = ns->irqs[cur_irq++];
- qemu_irq irq1 = ns->irqs[cur_irq++];
+ macio_realize_ide(s, &ns->ide[0],
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),
+ 0x16, &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
- macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
- if (err) {
- error_propagate(errp, err);
- return;
- }
+ macio_realize_ide(s, &ns->ide[1],
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),
+ qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),
+ 0x1a, &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
}
/* Timer */
@@ -314,8 +323,6 @@ static void macio_newworld_init(Object *obj)
NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
int i;
- qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
-
object_property_add_link(obj, "pic", TYPE_OPENPIC,
(Object **) &ns->pic,
qdev_prop_allow_set_link_before_realize,
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 3cde507065..ae2ce562a4 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -376,20 +376,6 @@ static void ppc_core99_init(MachineState *machine)
/* MacIO */
macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
dev = DEVICE(macio);
- qdev_connect_gpio_out(dev, 0,
- qdev_get_gpio_in(pic_dev, NEWWORLD_CUDA_IRQ));
- qdev_connect_gpio_out(dev, 1,
- qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCB_IRQ));
- qdev_connect_gpio_out(dev, 2,
- qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCA_IRQ));
- qdev_connect_gpio_out(dev, 3,
- qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ));
- qdev_connect_gpio_out(dev, 4,
- qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ));
- qdev_connect_gpio_out(dev, 5,
- qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ));
- qdev_connect_gpio_out(dev, 6,
- qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ));
qdev_prop_set_uint64(dev, "frequency", tbfreq);
object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
&error_abort);
diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h
index 4528282b36..e3b9ef48dd 100644
--- a/include/hw/misc/macio/macio.h
+++ b/include/hw/misc/macio/macio.h
@@ -72,7 +72,6 @@ typedef struct NewWorldMacIOState {
/*< public >*/
OpenPICState *pic;
- qemu_irq irqs[7];
MACIOIDEState ide[2];
} NewWorldMacIOState;
--
2.11.0
^ permalink raw reply related [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (18 preceding siblings ...)
2018-03-06 20:31 ` [Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize() Mark Cave-Ayland
@ 2018-03-06 20:59 ` no-reply
2018-03-06 21:08 ` Mark Cave-Ayland
2018-03-14 5:40 ` David Gibson
2018-03-14 6:42 ` David Gibson
21 siblings, 1 reply; 52+ messages in thread
From: no-reply @ 2018-03-06 20:59 UTC (permalink / raw)
To: mark.cave-ayland; +Cc: famz, qemu-devel, qemu-ppc, david
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180306203103.25563-1-mark.cave-ayland@ilande.co.uk
Subject: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/20180306203103.25563-1-mark.cave-ayland@ilande.co.uk -> patchew/20180306203103.25563-1-mark.cave-ayland@ilande.co.uk
Switched to a new branch 'test'
e7f510fb1c mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
e1cb6af9a4 mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly
cf16eb0223 uninorth: create new uninorth device
9a29524fc9 uninorth: rename UNINState to UNINHostState
bd3653709a uninorth: move PCI IO (ISA) memory region into the uninorth device
f1020004d7 uninorth: use object link to pass OpenPIC object to uninorth
000b78ebf1 uninorth: remove obsolete pci_pmac_u3_init() function
019ce970d1 uninorth: remove obsolete pci_pmac_init() function
d74cd9a986 uninorth: enable internal PCI host bridge
eb2d8bcf25 uninorth: fix PCI and AGP bus mixup
a444eabfcb uninorth: move PCI host bridge bus initialisation into device realize
6401c9c37f uninorth: introduce temporary pic_irqs device property
0f5fb4ec70 uninorth: move PCI mmio memory region initialisation into init function
2f7a628836 uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device
780535bf21 uninorth: move uninorth definitions into uninorth.h
d8816bc167 uninorth: remove stray PCIBus realize from mac_newworld.c
f82a1a6d5c uninorth: QOMify PCI and AGP host bridges
a0c06c803b uninorth: remove second set of uninorth token registers
4baa7ecf3b uninorth: trivial style fixups
=== OUTPUT BEGIN ===
Checking PATCH 1/19: uninorth: trivial style fixups...
Checking PATCH 2/19: uninorth: remove second set of uninorth token registers...
Checking PATCH 3/19: uninorth: QOMify PCI and AGP host bridges...
Checking PATCH 4/19: uninorth: remove stray PCIBus realize from mac_newworld.c...
Checking PATCH 5/19: uninorth: move uninorth definitions into uninorth.h...
Checking PATCH 6/19: uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device...
Checking PATCH 7/19: uninorth: move PCI mmio memory region initialisation into init function...
Checking PATCH 8/19: uninorth: introduce temporary pic_irqs device property...
Checking PATCH 9/19: uninorth: move PCI host bridge bus initialisation into device realize...
ERROR: if this code is redundant consider removing it
#41: FILE: hw/pci-host/uninorth.c:127:
+#if 0
total: 1 errors, 0 warnings, 221 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 10/19: uninorth: fix PCI and AGP bus mixup...
Checking PATCH 11/19: uninorth: enable internal PCI host bridge...
Checking PATCH 12/19: uninorth: remove obsolete pci_pmac_init() function...
Checking PATCH 13/19: uninorth: remove obsolete pci_pmac_u3_init() function...
Checking PATCH 14/19: uninorth: use object link to pass OpenPIC object to uninorth...
Checking PATCH 15/19: uninorth: move PCI IO (ISA) memory region into the uninorth device...
Checking PATCH 16/19: uninorth: rename UNINState to UNINHostState...
Checking PATCH 17/19: uninorth: create new uninorth device...
Checking PATCH 18/19: mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly...
Checking PATCH 19/19: mac_newworld: move wiring of macio IRQs to macio_newworld_realize()...
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements
2018-03-06 20:59 ` [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements no-reply
@ 2018-03-06 21:08 ` Mark Cave-Ayland
0 siblings, 0 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-06 21:08 UTC (permalink / raw)
To: qemu-devel; +Cc: famz, qemu-ppc, david
On 06/03/18 20:59, no-reply@patchew.org wrote:
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Type: series
> Message-id: 20180306203103.25563-1-mark.cave-ayland@ilande.co.uk
> Subject: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements
>
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
>
> BASE=base
> n=1
> total=$(git log --oneline $BASE.. | wc -l)
> failed=0
>
> git config --local diff.renamelimit 0
> git config --local diff.renames True
> git config --local diff.algorithm histogram
>
> commits="$(git log --format=%H --reverse $BASE..)"
> for c in $commits; do
> echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
> if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
> failed=1
> echo
> fi
> n=$((n+1))
> done
>
> exit $failed
> === TEST SCRIPT END ===
>
> Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
> From https://github.com/patchew-project/qemu
> * [new tag] patchew/20180306203103.25563-1-mark.cave-ayland@ilande.co.uk -> patchew/20180306203103.25563-1-mark.cave-ayland@ilande.co.uk
> Switched to a new branch 'test'
> e7f510fb1c mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
> e1cb6af9a4 mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly
> cf16eb0223 uninorth: create new uninorth device
> 9a29524fc9 uninorth: rename UNINState to UNINHostState
> bd3653709a uninorth: move PCI IO (ISA) memory region into the uninorth device
> f1020004d7 uninorth: use object link to pass OpenPIC object to uninorth
> 000b78ebf1 uninorth: remove obsolete pci_pmac_u3_init() function
> 019ce970d1 uninorth: remove obsolete pci_pmac_init() function
> d74cd9a986 uninorth: enable internal PCI host bridge
> eb2d8bcf25 uninorth: fix PCI and AGP bus mixup
> a444eabfcb uninorth: move PCI host bridge bus initialisation into device realize
> 6401c9c37f uninorth: introduce temporary pic_irqs device property
> 0f5fb4ec70 uninorth: move PCI mmio memory region initialisation into init function
> 2f7a628836 uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device
> 780535bf21 uninorth: move uninorth definitions into uninorth.h
> d8816bc167 uninorth: remove stray PCIBus realize from mac_newworld.c
> f82a1a6d5c uninorth: QOMify PCI and AGP host bridges
> a0c06c803b uninorth: remove second set of uninorth token registers
> 4baa7ecf3b uninorth: trivial style fixups
>
> === OUTPUT BEGIN ===
> Checking PATCH 1/19: uninorth: trivial style fixups...
> Checking PATCH 2/19: uninorth: remove second set of uninorth token registers...
> Checking PATCH 3/19: uninorth: QOMify PCI and AGP host bridges...
> Checking PATCH 4/19: uninorth: remove stray PCIBus realize from mac_newworld.c...
> Checking PATCH 5/19: uninorth: move uninorth definitions into uninorth.h...
> Checking PATCH 6/19: uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device...
> Checking PATCH 7/19: uninorth: move PCI mmio memory region initialisation into init function...
> Checking PATCH 8/19: uninorth: introduce temporary pic_irqs device property...
> Checking PATCH 9/19: uninorth: move PCI host bridge bus initialisation into device realize...
> ERROR: if this code is redundant consider removing it
> #41: FILE: hw/pci-host/uninorth.c:127:
> +#if 0
>
> total: 1 errors, 0 warnings, 221 lines checked
This is a false alarm since this #if 0 ... #endif block is removed in
patch 11.
> Your patch has style problems, please review. If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
>
> Checking PATCH 10/19: uninorth: fix PCI and AGP bus mixup...
> Checking PATCH 11/19: uninorth: enable internal PCI host bridge...
> Checking PATCH 12/19: uninorth: remove obsolete pci_pmac_init() function...
> Checking PATCH 13/19: uninorth: remove obsolete pci_pmac_u3_init() function...
> Checking PATCH 14/19: uninorth: use object link to pass OpenPIC object to uninorth...
> Checking PATCH 15/19: uninorth: move PCI IO (ISA) memory region into the uninorth device...
> Checking PATCH 16/19: uninorth: rename UNINState to UNINHostState...
> Checking PATCH 17/19: uninorth: create new uninorth device...
> Checking PATCH 18/19: mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly...
> Checking PATCH 19/19: mac_newworld: move wiring of macio IRQs to macio_newworld_realize()...
> === OUTPUT END ===
>
> Test command exited with code: 1
>
>
> ---
> Email generated automatically by Patchew [http://patchew.org/].
> Please send your feedback to patchew-devel@freelists.org
ATB,
Mark.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups
2018-03-06 20:30 ` [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups Mark Cave-Ayland
@ 2018-03-06 22:49 ` Philippe Mathieu-Daudé
2018-03-07 2:25 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-06 22:49 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel, qemu-ppc, david
On 03/06/2018 05:30 PM, Mark Cave-Ayland wrote:
> This makes sure we keep patchew/checkpatch happy during the remainder of this
> patchset.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/pci-host/uninorth.c | 29 +++++++++++++++++++----------
> 1 file changed, 19 insertions(+), 10 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 66991da975..710818e355 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -272,7 +272,6 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> UNINState *d;
>
> /* Uninorth AGP bus */
> -
> dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> @@ -302,16 +301,23 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
>
> static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
> {
> - d->config[0x0C] = 0x08; // cache_line_size
> - d->config[0x0D] = 0x10; // latency_timer
> - d->config[0x34] = 0x00; // capabilities_pointer
> + /* cache_line_size */
> + d->config[0x0C] = 0x08;
> + /* latency_timer */
> + d->config[0x0D] = 0x10;
> + /* capabilities_pointer */
> + d->config[0x34] = 0x00;
> }
>
> static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
> {
> - d->config[0x0C] = 0x08; // cache_line_size
> - d->config[0x0D] = 0x10; // latency_timer
> - // d->config[0x34] = 0x80; // capabilities_pointer
> + /* cache_line_size */
> + d->config[0x0C] = 0x08;
> + /* latency_timer */
> + d->config[0x0D] = 0x10;
> + /* capabilities_pointer
> + d->config[0x34] = 0x80; */
> +
> /*
> * Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
> * memory space with base 0x80000000, size 0x10000000 for Apple's
> @@ -333,9 +339,12 @@ static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp)
>
> static void unin_internal_pci_host_realize(PCIDevice *d, Error **errp)
> {
> - d->config[0x0C] = 0x08; // cache_line_size
> - d->config[0x0D] = 0x10; // latency_timer
> - d->config[0x34] = 0x00; // capabilities_pointer
> + /* cache_line_size */
> + d->config[0x0C] = 0x08;
> + /* latency_timer */
> + d->config[0x0D] = 0x10;
> + /* capabilities_pointer */
> + d->config[0x34] = 0x00;
> }
>
> static void unin_main_pci_host_class_init(ObjectClass *klass, void *data)
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h
2018-03-06 20:30 ` [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h Mark Cave-Ayland
@ 2018-03-06 22:50 ` Philippe Mathieu-Daudé
2018-03-14 5:43 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-06 22:50 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel, qemu-ppc, david
On 03/06/2018 05:30 PM, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/pci-host/uninorth.c | 22 +------------------
> include/hw/pci-host/uninorth.h | 49 ++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 50 insertions(+), 21 deletions(-)
> create mode 100644 include/hw/pci-host/uninorth.h
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 1d4d3f5705..600d675573 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -26,31 +26,11 @@
> #include "hw/ppc/mac.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_host.h"
> +#include "hw/pci-host/uninorth.h"
> #include "trace.h"
>
> static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e };
>
> -#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
> -#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
> -#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
> -#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
> -
> -#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
> -#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
> -#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
> -#define U3_AGP_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
> -
> -typedef struct UNINState {
> - PCIHostState parent_obj;
> -
> - MemoryRegion pci_mmio;
> - MemoryRegion pci_hole;
> -} UNINState;
> -
> static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
> {
> return (irq_num + (pci_dev->devfn >> 3)) & 3;
> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
> new file mode 100644
> index 0000000000..9364c14bdd
> --- /dev/null
> +++ b/include/hw/pci-host/uninorth.h
> @@ -0,0 +1,49 @@
> +/*
> + * QEMU Uninorth PCI host (for all Mac99 and newer machines)
> + *
> + * Copyright (c) 2006 Fabrice Bellard
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a copy
> + * of this software and associated documentation files (the "Software"), to deal
> + * in the Software without restriction, including without limitation the rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#ifndef UNINORTH_H
> +#define UNINORTH_H
missing:
#include "hw/hw.h"
with it:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> +
> +#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
> +#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
> +#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
> +#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
> +
> +#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
> +#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
> +#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
> +#define U3_AGP_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
> +
> +typedef struct UNINState {
> + PCIHostState parent_obj;
> +
> + MemoryRegion pci_mmio;
> + MemoryRegion pci_hole;
> +} UNINState;
> +
> +#endif /* UNINORTH_H */
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState
2018-03-06 20:31 ` [Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState Mark Cave-Ayland
@ 2018-03-06 22:52 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-06 22:52 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel, qemu-ppc, david
On 03/06/2018 05:31 PM, Mark Cave-Ayland wrote:
> The existing UNINState actually represents the PCI/AGP host bridge stage so
> rename it accordingly.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/pci-host/uninorth.c | 32 ++++++++++++++++----------------
> hw/ppc/mac.h | 8 ++++----
> hw/ppc/mac_newworld.c | 2 +-
> include/hw/pci-host/uninorth.h | 12 ++++++------
> 4 files changed, 27 insertions(+), 27 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 3a29a4410e..fada0ffd5f 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -38,7 +38,7 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
>
> static void pci_unin_set_irq(void *opaque, int irq_num, int level)
> {
> - UNINState *s = opaque;
> + UNINHostState *s = opaque;
>
> trace_unin_set_irq(unin_irq_line[irq_num], level);
> qemu_set_irq(s->irqs[irq_num], level);
> @@ -81,7 +81,7 @@ static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
> static void unin_data_write(void *opaque, hwaddr addr,
> uint64_t val, unsigned len)
> {
> - UNINState *s = opaque;
> + UNINHostState *s = opaque;
> PCIHostState *phb = PCI_HOST_BRIDGE(s);
> trace_unin_data_write(addr, len, val);
> pci_data_write(phb->bus,
> @@ -92,7 +92,7 @@ static void unin_data_write(void *opaque, hwaddr addr,
> static uint64_t unin_data_read(void *opaque, hwaddr addr,
> unsigned len)
> {
> - UNINState *s = opaque;
> + UNINHostState *s = opaque;
> PCIHostState *phb = PCI_HOST_BRIDGE(s);
> uint32_t val;
>
> @@ -109,7 +109,7 @@ static const MemoryRegionOps unin_data_ops = {
> .endianness = DEVICE_LITTLE_ENDIAN,
> };
>
> -static void pci_unin_init_irqs(UNINState *s)
> +static void pci_unin_init_irqs(UNINHostState *s)
> {
> int i;
>
> @@ -120,7 +120,7 @@ static void pci_unin_init_irqs(UNINState *s)
>
> static void pci_unin_main_realize(DeviceState *dev, Error **errp)
> {
> - UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
> + UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
> PCIHostState *h = PCI_HOST_BRIDGE(dev);
>
> h->bus = pci_register_root_bus(dev, NULL,
> @@ -142,7 +142,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
>
> static void pci_unin_main_init(Object *obj)
> {
> - UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
> + UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> @@ -175,7 +175,7 @@ static void pci_unin_main_init(Object *obj)
>
> static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
> {
> - UNINState *s = U3_AGP_HOST_BRIDGE(dev);
> + UNINHostState *s = U3_AGP_HOST_BRIDGE(dev);
> PCIHostState *h = PCI_HOST_BRIDGE(dev);
>
> h->bus = pci_register_root_bus(dev, NULL,
> @@ -191,7 +191,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
>
> static void pci_u3_agp_init(Object *obj)
> {
> - UNINState *s = U3_AGP_HOST_BRIDGE(obj);
> + UNINHostState *s = U3_AGP_HOST_BRIDGE(obj);
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> @@ -223,7 +223,7 @@ static void pci_u3_agp_init(Object *obj)
>
> static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
> {
> - UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
> + UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
> PCIHostState *h = PCI_HOST_BRIDGE(dev);
>
> h->bus = pci_register_root_bus(dev, NULL,
> @@ -239,7 +239,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
>
> static void pci_unin_agp_init(Object *obj)
> {
> - UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
> + UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> @@ -260,7 +260,7 @@ static void pci_unin_agp_init(Object *obj)
>
> static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
> {
> - UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev);
> + UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev);
> PCIHostState *h = PCI_HOST_BRIDGE(dev);
>
> h->bus = pci_register_root_bus(dev, NULL,
> @@ -276,7 +276,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
>
> static void pci_unin_internal_init(Object *obj)
> {
> - UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
> + UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> @@ -466,7 +466,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data)
> static const TypeInfo pci_unin_main_info = {
> .name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> - .instance_size = sizeof(UNINState),
> + .instance_size = sizeof(UNINHostState),
> .instance_init = pci_unin_main_init,
> .class_init = pci_unin_main_class_init,
> };
> @@ -482,7 +482,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
> static const TypeInfo pci_u3_agp_info = {
> .name = TYPE_U3_AGP_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> - .instance_size = sizeof(UNINState),
> + .instance_size = sizeof(UNINHostState),
> .instance_init = pci_u3_agp_init,
> .class_init = pci_u3_agp_class_init,
> };
> @@ -498,7 +498,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
> static const TypeInfo pci_unin_agp_info = {
> .name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> - .instance_size = sizeof(UNINState),
> + .instance_size = sizeof(UNINHostState),
> .instance_init = pci_unin_agp_init,
> .class_init = pci_unin_agp_class_init,
> };
> @@ -514,7 +514,7 @@ static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
> static const TypeInfo pci_unin_internal_info = {
> .name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> - .instance_size = sizeof(UNINState),
> + .instance_size = sizeof(UNINHostState),
> .instance_init = pci_unin_internal_init,
> .class_init = pci_unin_internal_class_init,
> };
> diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
> index 628415b255..5f5916252a 100644
> --- a/hw/ppc/mac.h
> +++ b/hw/ppc/mac.h
> @@ -88,10 +88,10 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
> MemoryRegion *address_space_io);
>
> /* UniNorth PCI */
> -UNINState *pci_pmac_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem);
> -UNINState *pci_pmac_u3_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem);
> +UNINHostState *pci_pmac_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem);
> +UNINHostState *pci_pmac_u3_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem);
>
> /* Mac NVRAM */
> #define TYPE_MACIO_NVRAM "macio-nvram"
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 5cb9f9abd0..ae0de4e36e 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -151,7 +151,7 @@ static void ppc_core99_init(MachineState *machine)
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> hwaddr kernel_base, initrd_base, cmdline_base = 0;
> long kernel_size, initrd_size;
> - UNINState *uninorth_pci;
> + UNINHostState *uninorth_pci;
> PCIBus *pci_bus;
> NewWorldMacIOState *macio;
> MACIOIDEState *macio_ide;
> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
> index c4771aa7fa..d1424b165a 100644
> --- a/include/hw/pci-host/uninorth.h
> +++ b/include/hw/pci-host/uninorth.h
> @@ -33,15 +33,15 @@
> #define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
>
> #define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
> + OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
> #define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
> + OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
> #define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
> + OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
> #define U3_AGP_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
> + OBJECT_CHECK(UNINHostState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
>
> -typedef struct UNINState {
> +typedef struct UNINHostState {
> PCIHostState parent_obj;
>
> OpenPICState *pic;
> @@ -49,6 +49,6 @@ typedef struct UNINState {
> MemoryRegion pci_mmio;
> MemoryRegion pci_hole;
> MemoryRegion pci_io;
> -} UNINState;
> +} UNINHostState;
>
> #endif /* UNINORTH_H */
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function
2018-03-06 20:30 ` [Qemu-devel] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function Mark Cave-Ayland
@ 2018-03-06 23:44 ` BALATON Zoltan
2018-03-07 7:02 ` Mark Cave-Ayland
0 siblings, 1 reply; 52+ messages in thread
From: BALATON Zoltan @ 2018-03-06 23:44 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc, david
On Tue, 6 Mar 2018, Mark Cave-Ayland wrote:
> Whilst we are here, rename the memory regions to better reflect whether they
> belong to either a PCI or an AGP bus.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/pci-host/uninorth.c | 28 ++++++++++++++++++----------
> 1 file changed, 18 insertions(+), 10 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index b081e3c153..5b8fc3aa16 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -111,29 +111,39 @@ static const MemoryRegionOps unin_data_ops = {
>
> static void pci_unin_main_init(Object *obj)
> {
> + UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Use values found on a real PowerMac */
> /* Uninorth main bus */
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - obj, "pci-conf-idx", 0x1000);
> + obj, "unin-pci-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
> - "pci-conf-data", 0x1000);
> + "unin-pci-conf-data", 0x1000);
> +
> + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
> + 0x100000000ULL);
> +
> sysbus_init_mmio(sbd, &h->conf_mem);
> sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> static void pci_u3_agp_init(Object *obj)
> {
> + UNINState *s = U3_AGP_HOST_BRIDGE(obj);
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Uninorth U3 AGP bus */
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - obj, "pci-conf-idx", 0x1000);
> + obj, "unin-pci-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
> - "pci-conf-data", 0x1000);
> + "unin-pci-conf-data", 0x1000);
> +
> + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
The name of this function and the above comment both suggest this is an
AGP bus so did you mean to rename these to unin-agp-* instead of
unin-pci-*?
Regards,
BALATON Zoltan
> + 0x100000000ULL);
> +
> sysbus_init_mmio(sbd, &h->conf_mem);
> sysbus_init_mmio(sbd, &h->data_mem);
> }
> @@ -145,9 +155,9 @@ static void pci_unin_agp_init(Object *obj)
>
> /* Uninorth AGP bus */
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - obj, "pci-conf-idx", 0x1000);
> + obj, "unin-agp-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
> - obj, "pci-conf-data", 0x1000);
> + obj, "unin-agp-conf-data", 0x1000);
> sysbus_init_mmio(sbd, &h->conf_mem);
> sysbus_init_mmio(sbd, &h->data_mem);
> }
> @@ -159,9 +169,9 @@ static void pci_unin_internal_init(Object *obj)
>
> /* Uninorth internal bus */
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - obj, "pci-conf-idx", 0x1000);
> + obj, "unin-pci-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
> - obj, "pci-conf-data", 0x1000);
> + obj, "unin-pci-conf-data", 0x1000);
> sysbus_init_mmio(sbd, &h->conf_mem);
> sysbus_init_mmio(sbd, &h->data_mem);
> }
> @@ -182,7 +192,6 @@ UNINState *pci_pmac_init(qemu_irq *pic,
> s = SYS_BUS_DEVICE(dev);
> h = PCI_HOST_BRIDGE(s);
> d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
> - memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL);
> memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
> 0x80000000ULL, 0x10000000ULL);
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> @@ -247,7 +256,6 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
> h = PCI_HOST_BRIDGE(dev);
> d = U3_AGP_HOST_BRIDGE(dev);
>
> - memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL);
> memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
> 0x80000000ULL, 0x70000000ULL);
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups
2018-03-06 20:30 ` [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups Mark Cave-Ayland
2018-03-06 22:49 ` Philippe Mathieu-Daudé
@ 2018-03-07 2:25 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-07 2:25 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 2692 bytes --]
On Tue, Mar 06, 2018 at 08:30:45PM +0000, Mark Cave-Ayland wrote:
> This makes sure we keep patchew/checkpatch happy during the remainder of this
> patchset.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied, thanks.
> ---
> hw/pci-host/uninorth.c | 29 +++++++++++++++++++----------
> 1 file changed, 19 insertions(+), 10 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 66991da975..710818e355 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -272,7 +272,6 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> UNINState *d;
>
> /* Uninorth AGP bus */
> -
> dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> @@ -302,16 +301,23 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
>
> static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
> {
> - d->config[0x0C] = 0x08; // cache_line_size
> - d->config[0x0D] = 0x10; // latency_timer
> - d->config[0x34] = 0x00; // capabilities_pointer
> + /* cache_line_size */
> + d->config[0x0C] = 0x08;
> + /* latency_timer */
> + d->config[0x0D] = 0x10;
> + /* capabilities_pointer */
> + d->config[0x34] = 0x00;
> }
>
> static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
> {
> - d->config[0x0C] = 0x08; // cache_line_size
> - d->config[0x0D] = 0x10; // latency_timer
> - // d->config[0x34] = 0x80; // capabilities_pointer
> + /* cache_line_size */
> + d->config[0x0C] = 0x08;
> + /* latency_timer */
> + d->config[0x0D] = 0x10;
> + /* capabilities_pointer
> + d->config[0x34] = 0x80; */
> +
> /*
> * Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
> * memory space with base 0x80000000, size 0x10000000 for Apple's
> @@ -333,9 +339,12 @@ static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp)
>
> static void unin_internal_pci_host_realize(PCIDevice *d, Error **errp)
> {
> - d->config[0x0C] = 0x08; // cache_line_size
> - d->config[0x0D] = 0x10; // latency_timer
> - d->config[0x34] = 0x00; // capabilities_pointer
> + /* cache_line_size */
> + d->config[0x0C] = 0x08;
> + /* latency_timer */
> + d->config[0x0D] = 0x10;
> + /* capabilities_pointer */
> + d->config[0x34] = 0x00;
> }
>
> static void unin_main_pci_host_class_init(ObjectClass *klass, void *data)
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers
2018-03-06 20:30 ` [Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers Mark Cave-Ayland
@ 2018-03-07 4:11 ` David Gibson
0 siblings, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-07 4:11 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 2014 bytes --]
On Tue, Mar 06, 2018 at 08:30:46PM +0000, Mark Cave-Ayland wrote:
> Commit 593c181160: "PPC: Newworld: Add second uninorth control register set"
> added a second set of uninorth registers at 0xf3000000.
>
> Testing MacOS 9.2 to MacOS X 10.4 reveals no accesses to this address and I
> can't find any reference to it in Apple's Core99.cpp source so I'm assuming
> that this was the result of another bug that has now been fixed.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied, thanks.
> ---
> hw/ppc/mac_newworld.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index a749e2565d..1eba79d54b 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -148,7 +148,6 @@ static void ppc_core99_init(MachineState *machine)
> qemu_irq *pic, **openpic_irqs;
> MemoryRegion *isa = g_new(MemoryRegion, 1);
> MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
> - MemoryRegion *unin2_memory = g_new(MemoryRegion, 1);
> int linux_boot, i, j, k;
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> hwaddr kernel_base, initrd_base, cmdline_base = 0;
> @@ -283,9 +282,6 @@ static void ppc_core99_init(MachineState *machine)
> memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
> memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
>
> - memory_region_init_io(unin2_memory, NULL, &unin_ops, token, "unin", 0x1000);
> - memory_region_add_subregion(get_system_memory(), 0xf3000000, unin2_memory);
> -
> openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
> openpic_irqs[0] =
> g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function
2018-03-06 23:44 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
@ 2018-03-07 7:02 ` Mark Cave-Ayland
2018-03-07 7:23 ` Mark Cave-Ayland
0 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-07 7:02 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel, david
On 06/03/18 23:44, BALATON Zoltan wrote:
> On Tue, 6 Mar 2018, Mark Cave-Ayland wrote:
>> Whilst we are here, rename the memory regions to better reflect
>> whether they
>> belong to either a PCI or an AGP bus.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>> ---
>> hw/pci-host/uninorth.c | 28 ++++++++++++++++++----------
>> 1 file changed, 18 insertions(+), 10 deletions(-)
>>
>> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
>> index b081e3c153..5b8fc3aa16 100644
>> --- a/hw/pci-host/uninorth.c
>> +++ b/hw/pci-host/uninorth.c
>> @@ -111,29 +111,39 @@ static const MemoryRegionOps unin_data_ops = {
>>
>> static void pci_unin_main_init(Object *obj)
>> {
>> + UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
>> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>>
>> /* Use values found on a real PowerMac */
>> /* Uninorth main bus */
>> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
>> - obj, "pci-conf-idx", 0x1000);
>> + obj, "unin-pci-conf-idx", 0x1000);
>> memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
>> - "pci-conf-data", 0x1000);
>> + "unin-pci-conf-data", 0x1000);
>> +
>> + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
>> + 0x100000000ULL);
>> +
>> sysbus_init_mmio(sbd, &h->conf_mem);
>> sysbus_init_mmio(sbd, &h->data_mem);
>> }
>>
>> static void pci_u3_agp_init(Object *obj)
>> {
>> + UNINState *s = U3_AGP_HOST_BRIDGE(obj);
>> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>>
>> /* Uninorth U3 AGP bus */
>> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
>> - obj, "pci-conf-idx", 0x1000);
>> + obj, "unin-pci-conf-idx", 0x1000);
>> memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
>> - "pci-conf-data", 0x1000);
>> + "unin-pci-conf-data", 0x1000);
>> +
>> + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
>
> The name of this function and the above comment both suggest this is an
> AGP bus so did you mean to rename these to unin-agp-* instead of
> unin-pci-*?
Well this patchset purposely avoids doing anything with the U3 model
other than the required refactoring to move the wiring to board level as
really the entire U3 model needs some love - I can't even boot Linux
without this patchset (I suspect it's probably DT related).
Having said that the wiring changes are such an improvement that I would
argue for applying this patchset if possible since any future fixes will
be considerably easier based upon it.
ATB,
Mark.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function
2018-03-07 7:02 ` Mark Cave-Ayland
@ 2018-03-07 7:23 ` Mark Cave-Ayland
0 siblings, 0 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-07 7:23 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel, david
On 07/03/18 07:02, Mark Cave-Ayland wrote:
> On 06/03/18 23:44, BALATON Zoltan wrote:
>
>> On Tue, 6 Mar 2018, Mark Cave-Ayland wrote:
>>> Whilst we are here, rename the memory regions to better reflect
>>> whether they
>>> belong to either a PCI or an AGP bus.
>>>
>>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>>> ---
>>> hw/pci-host/uninorth.c | 28 ++++++++++++++++++----------
>>> 1 file changed, 18 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
>>> index b081e3c153..5b8fc3aa16 100644
>>> --- a/hw/pci-host/uninorth.c
>>> +++ b/hw/pci-host/uninorth.c
>>> @@ -111,29 +111,39 @@ static const MemoryRegionOps unin_data_ops = {
>>>
>>> static void pci_unin_main_init(Object *obj)
>>> {
>>> + UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
>>> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>>> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>>>
>>> /* Use values found on a real PowerMac */
>>> /* Uninorth main bus */
>>> memory_region_init_io(&h->conf_mem, OBJECT(h),
>>> &pci_host_conf_le_ops,
>>> - obj, "pci-conf-idx", 0x1000);
>>> + obj, "unin-pci-conf-idx", 0x1000);
>>> memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
>>> - "pci-conf-data", 0x1000);
>>> + "unin-pci-conf-data", 0x1000);
>>> +
>>> + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
>>> + 0x100000000ULL);
>>> +
>>> sysbus_init_mmio(sbd, &h->conf_mem);
>>> sysbus_init_mmio(sbd, &h->data_mem);
>>> }
>>>
>>> static void pci_u3_agp_init(Object *obj)
>>> {
>>> + UNINState *s = U3_AGP_HOST_BRIDGE(obj);
>>> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>>> PCIHostState *h = PCI_HOST_BRIDGE(obj);
>>>
>>> /* Uninorth U3 AGP bus */
>>> memory_region_init_io(&h->conf_mem, OBJECT(h),
>>> &pci_host_conf_le_ops,
>>> - obj, "pci-conf-idx", 0x1000);
>>> + obj, "unin-pci-conf-idx", 0x1000);
>>> memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
>>> - "pci-conf-data", 0x1000);
>>> + "unin-pci-conf-data", 0x1000);
>>> +
>>> + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
>>
>> The name of this function and the above comment both suggest this is
>> an AGP bus so did you mean to rename these to unin-agp-* instead of
>> unin-pci-*?
>
> Well this patchset purposely avoids doing anything with the U3 model
> other than the required refactoring to move the wiring to board level as
> really the entire U3 model needs some love - I can't even boot Linux
> without this patchset (I suspect it's probably DT related).
>
> Having said that the wiring changes are such an improvement that I would
> argue for applying this patchset if possible since any future fixes will
> be considerably easier based upon it.
Looking in detail I think this naming is still correct: the U3 PCI bus
address is currently 0xf0000000 which is actually the AGP bus rather
than the PCI bus at 0xf2000000...
ATB,
Mark.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges
2018-03-06 20:30 ` [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges Mark Cave-Ayland
@ 2018-03-09 0:32 ` David Gibson
0 siblings, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-09 0:32 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 7217 bytes --]
On Tue, Mar 06, 2018 at 08:30:47PM +0000, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied, thanks.
> ---
> hw/pci-host/uninorth.c | 79 ++++++++++++++++++++------------------------------
> 1 file changed, 32 insertions(+), 47 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 710818e355..1d4d3f5705 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -129,72 +129,61 @@ static const MemoryRegionOps unin_data_ops = {
> .endianness = DEVICE_LITTLE_ENDIAN,
> };
>
> -static int pci_unin_main_init_device(SysBusDevice *dev)
> +static void pci_unin_main_init(Object *obj)
> {
> - PCIHostState *h;
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> + PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Use values found on a real PowerMac */
> /* Uninorth main bus */
> - h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> - memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
> + obj, "pci-conf-idx", 0x1000);
> + memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
> "pci-conf-data", 0x1000);
> - sysbus_init_mmio(dev, &h->conf_mem);
> - sysbus_init_mmio(dev, &h->data_mem);
> -
> - return 0;
> + sysbus_init_mmio(sbd, &h->conf_mem);
> + sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -
> -static int pci_u3_agp_init_device(SysBusDevice *dev)
> +static void pci_u3_agp_init(Object *obj)
> {
> - PCIHostState *h;
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> + PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Uninorth U3 AGP bus */
> - h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> - memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
> + obj, "pci-conf-idx", 0x1000);
> + memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
> "pci-conf-data", 0x1000);
> - sysbus_init_mmio(dev, &h->conf_mem);
> - sysbus_init_mmio(dev, &h->data_mem);
> -
> - return 0;
> + sysbus_init_mmio(sbd, &h->conf_mem);
> + sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -static int pci_unin_agp_init_device(SysBusDevice *dev)
> +static void pci_unin_agp_init(Object *obj)
> {
> - PCIHostState *h;
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> + PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Uninorth AGP bus */
> - h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> + obj, "pci-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
> - dev, "pci-conf-data", 0x1000);
> - sysbus_init_mmio(dev, &h->conf_mem);
> - sysbus_init_mmio(dev, &h->data_mem);
> - return 0;
> + obj, "pci-conf-data", 0x1000);
> + sysbus_init_mmio(sbd, &h->conf_mem);
> + sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -static int pci_unin_internal_init_device(SysBusDevice *dev)
> +static void pci_unin_internal_init(Object *obj)
> {
> - PCIHostState *h;
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> + PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Uninorth internal bus */
> - h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> + obj, "pci-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
> - dev, "pci-conf-data", 0x1000);
> - sysbus_init_mmio(dev, &h->conf_mem);
> - sysbus_init_mmio(dev, &h->data_mem);
> - return 0;
> + obj, "pci-conf-data", 0x1000);
> + sysbus_init_mmio(sbd, &h->conf_mem);
> + sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> PCIBus *pci_pmac_init(qemu_irq *pic,
> @@ -461,10 +450,8 @@ static const TypeInfo unin_internal_pci_host_info = {
>
> static void pci_unin_main_class_init(ObjectClass *klass, void *data)
> {
> - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> - sbc->init = pci_unin_main_init_device;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> @@ -472,15 +459,14 @@ static const TypeInfo pci_unin_main_info = {
> .name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> .instance_size = sizeof(UNINState),
> + .instance_init = pci_unin_main_init,
> .class_init = pci_unin_main_class_init,
> };
>
> static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
> {
> - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> - sbc->init = pci_u3_agp_init_device;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> @@ -488,15 +474,14 @@ static const TypeInfo pci_u3_agp_info = {
> .name = TYPE_U3_AGP_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> .instance_size = sizeof(UNINState),
> + .instance_init = pci_u3_agp_init,
> .class_init = pci_u3_agp_class_init,
> };
>
> static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
> {
> - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> - sbc->init = pci_unin_agp_init_device;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> @@ -504,15 +489,14 @@ static const TypeInfo pci_unin_agp_info = {
> .name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> .instance_size = sizeof(UNINState),
> + .instance_init = pci_unin_agp_init,
> .class_init = pci_unin_agp_class_init,
> };
>
> static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
> {
> - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> - sbc->init = pci_unin_internal_init_device;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> @@ -520,6 +504,7 @@ static const TypeInfo pci_unin_internal_info = {
> .name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE,
> .parent = TYPE_PCI_HOST_BRIDGE,
> .instance_size = sizeof(UNINState),
> + .instance_init = pci_unin_internal_init,
> .class_init = pci_unin_internal_class_init,
> };
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c
2018-03-06 20:30 ` [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c Mark Cave-Ayland
@ 2018-03-09 0:35 ` David Gibson
0 siblings, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-09 0:35 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 1062 bytes --]
On Tue, Mar 06, 2018 at 08:30:48PM +0000, Mark Cave-Ayland wrote:
> After QOMification this is clearly no longer needed (and possibly hasn't been
> for some time).
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied, thanks.
> ---
> hw/ppc/mac_newworld.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 1eba79d54b..3410bb13ad 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -351,7 +351,6 @@ static void ppc_core99_init(MachineState *machine)
> pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
> machine_arch = ARCH_MAC99;
> }
> - object_property_set_bool(OBJECT(pci_bus), true, "realized", &error_abort);
>
> machine->usb |= defaults_enabled() && !machine->usb_disabled;
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device
2018-03-06 20:30 ` [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device Mark Cave-Ayland
@ 2018-03-12 10:59 ` Philippe Mathieu-Daudé
2018-03-14 5:44 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-12 10:59 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel, qemu-ppc, david
On 03/06/2018 09:30 PM, Mark Cave-Ayland wrote:
> This is in preparation for moving the device wiring into the New World machine.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/pci-host/uninorth.c | 16 ++++++++--------
> hw/ppc/mac.h | 10 ++++++----
> hw/ppc/mac_newworld.c | 10 ++++++++--
> 3 files changed, 22 insertions(+), 14 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 600d675573..b081e3c153 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -166,9 +166,9 @@ static void pci_unin_internal_init(Object *obj)
> sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -PCIBus *pci_pmac_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io)
> +UNINState *pci_pmac_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io)
> {
> DeviceState *dev;
> SysBusDevice *s;
> @@ -228,12 +228,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
> sysbus_mmio_map(s, 1, 0xf4c00000);
> #endif
>
> - return h->bus;
> + return d;
> }
>
> -PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io)
> +UNINState *pci_pmac_u3_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io)
> {
> DeviceState *dev;
> SysBusDevice *s;
> @@ -265,7 +265,7 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
>
> pci_create_simple(h->bus, 11 << 3, "u3-agp");
>
> - return h->bus;
> + return d;
> }
>
> static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
> diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
> index a02f797598..fcf13cb757 100644
> --- a/hw/ppc/mac.h
> +++ b/hw/ppc/mac.h
> @@ -31,6 +31,8 @@
> #include "hw/ide/internal.h"
> #include "hw/input/adb.h"
> #include "hw/misc/mos6522.h"
> +#include "hw/pci/pci_host.h"
> +#include "hw/pci-host/uninorth.h"
>
> /* SMP is not enabled, for now */
> #define MAX_CPUS 1
> @@ -86,12 +88,12 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
> MemoryRegion *address_space_io);
>
> /* UniNorth PCI */
> -PCIBus *pci_pmac_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io);
> -PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> +UNINState *pci_pmac_init(qemu_irq *pic,
> MemoryRegion *address_space_mem,
> MemoryRegion *address_space_io);
> +UNINState *pci_pmac_u3_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io);
>
> /* Mac NVRAM */
> #define TYPE_MACIO_NVRAM "macio-nvram"
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 3410bb13ad..34908d0dd7 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -152,6 +152,7 @@ static void ppc_core99_init(MachineState *machine)
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> hwaddr kernel_base, initrd_base, cmdline_base = 0;
> long kernel_size, initrd_size;
> + UNINState *uninorth_pci;
> PCIBus *pci_bus;
> NewWorldMacIOState *macio;
> MACIOIDEState *macio_ide;
> @@ -345,10 +346,12 @@ static void ppc_core99_init(MachineState *machine)
>
> if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
> /* 970 gets a U3 bus */
> - pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
> + uninorth_pci = pci_pmac_u3_init(pic, get_system_memory(),
> + get_system_io());
> machine_arch = ARCH_MAC99_U3;
> } else {
> - pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
> + uninorth_pci = pci_pmac_init(pic, get_system_memory(),
> + get_system_io());
> machine_arch = ARCH_MAC99;
> }
>
> @@ -361,6 +364,9 @@ static void ppc_core99_init(MachineState *machine)
> tbfreq = TBFREQ;
> }
>
> + /* init basic PC hardware */
> + pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
> +
> /* MacIO */
> macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
> dev = DEVICE(macio);
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device
2018-03-06 20:30 ` [Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device Mark Cave-Ayland
@ 2018-03-12 11:01 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-12 11:01 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel, qemu-ppc, david
On 03/06/2018 09:30 PM, Mark Cave-Ayland wrote:
> Do this for both the uninorth main and uninorth u3 AGP buses, using the main
> PCI bus for each machine (this ensures the IO addresses still match those
> used by OpenBIOS).
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/pci-host/uninorth.c | 14 ++++++++++----
> hw/ppc/mac_newworld.c | 12 ++++++------
> include/hw/pci-host/uninorth.h | 1 +
> 3 files changed, 17 insertions(+), 10 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index e2278fd0f0..3a29a4410e 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -127,7 +127,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
> pci_unin_set_irq, pci_unin_map_irq,
> s,
> &s->pci_mmio,
> - get_system_io(),
> + &s->pci_io,
> PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
>
> pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
> @@ -155,6 +155,8 @@ static void pci_unin_main_init(Object *obj)
>
> memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
> 0x100000000ULL);
> + memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
> + "unin-pci-isa-mmio", 0x00800000);
>
> memory_region_init_alias(&s->pci_hole, OBJECT(s),
> "unin-pci-hole", &s->pci_mmio,
> @@ -168,6 +170,7 @@ static void pci_unin_main_init(Object *obj)
> sysbus_init_mmio(sbd, &h->conf_mem);
> sysbus_init_mmio(sbd, &h->data_mem);
> sysbus_init_mmio(sbd, &s->pci_hole);
> + sysbus_init_mmio(sbd, &s->pci_io);
> }
>
> static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
> @@ -179,7 +182,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
> pci_unin_set_irq, pci_unin_map_irq,
> s,
> &s->pci_mmio,
> - get_system_io(),
> + &s->pci_io,
> PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
>
> pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp");
> @@ -200,6 +203,8 @@ static void pci_u3_agp_init(Object *obj)
>
> memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio",
> 0x100000000ULL);
> + memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
> + "unin-pci-isa-mmio", 0x00800000);
>
> memory_region_init_alias(&s->pci_hole, OBJECT(s),
> "unin-pci-hole", &s->pci_mmio,
> @@ -213,6 +218,7 @@ static void pci_u3_agp_init(Object *obj)
> sysbus_init_mmio(sbd, &h->conf_mem);
> sysbus_init_mmio(sbd, &h->data_mem);
> sysbus_init_mmio(sbd, &s->pci_hole);
> + sysbus_init_mmio(sbd, &s->pci_io);
> }
>
> static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
> @@ -224,7 +230,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
> pci_unin_set_irq, pci_unin_map_irq,
> s,
> &s->pci_mmio,
> - get_system_io(),
> + &s->pci_io,
> PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
>
> pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
> @@ -261,7 +267,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
> pci_unin_set_irq, pci_unin_map_irq,
> s,
> &s->pci_mmio,
> - get_system_io(),
> + &s->pci_io,
> PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS);
>
> pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci");
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 5d121a6071..5cb9f9abd0 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -146,7 +146,6 @@ static void ppc_core99_init(MachineState *machine)
> CPUPPCState *env = NULL;
> char *filename;
> qemu_irq *pic, **openpic_irqs;
> - MemoryRegion *isa = g_new(MemoryRegion, 1);
> MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
> int linux_boot, i, j, k;
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> @@ -274,11 +273,6 @@ static void ppc_core99_init(MachineState *machine)
> }
> }
>
> - /* Register 8 MB of ISA IO space */
> - memory_region_init_alias(isa, NULL, "isa_mmio",
> - get_system_io(), 0, 0x00800000);
> - memory_region_add_subregion(get_system_memory(), 0xf2000000, isa);
> -
> /* UniN init: XXX should be a real device */
> memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
> memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
> @@ -356,6 +350,9 @@ static void ppc_core99_init(MachineState *machine)
> /* PCI hole */
> memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
> sysbus_mmio_get_region(s, 2));
> + /* Register 8 MB of ISA IO space */
> + memory_region_add_subregion(get_system_memory(), 0xf2000000,
> + sysbus_mmio_get_region(s, 3));
> sysbus_mmio_map(s, 0, 0xf0800000);
> sysbus_mmio_map(s, 1, 0xf0c00000);
>
> @@ -390,6 +387,9 @@ static void ppc_core99_init(MachineState *machine)
> /* PCI hole */
> memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
> sysbus_mmio_get_region(s, 2));
> + /* Register 8 MB of ISA IO space */
> + memory_region_add_subregion(get_system_memory(), 0xf2000000,
> + sysbus_mmio_get_region(s, 3));
> sysbus_mmio_map(s, 0, 0xf2800000);
> sysbus_mmio_map(s, 1, 0xf2c00000);
>
> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
> index 6b520e753c..c4771aa7fa 100644
> --- a/include/hw/pci-host/uninorth.h
> +++ b/include/hw/pci-host/uninorth.h
> @@ -48,6 +48,7 @@ typedef struct UNINState {
> qemu_irq irqs[4];
> MemoryRegion pci_mmio;
> MemoryRegion pci_hole;
> + MemoryRegion pci_io;
> } UNINState;
>
> #endif /* UNINORTH_H */
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize
2018-03-06 20:30 ` [Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize Mark Cave-Ayland
@ 2018-03-12 11:04 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-12 11:04 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel, qemu-ppc, david
On 03/06/2018 09:30 PM, Mark Cave-Ayland wrote:
> Since the IO address space is fixed to use the standard system IO address
> space then we can also use the opportunity to remove the address_space_io
> parameter from pci_pmac_init() and pci_pmac_u3_init().
>
> Note we also move the default mac99 PCI bus to the end of the initialisation
> list so that it becomes the default destination for any devices specified
> via -device without an explicit PCI bus provided.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/pci-host/uninorth.c | 117 ++++++++++++++++++++++++++++---------------------
> hw/ppc/mac.h | 6 +--
> hw/ppc/mac_newworld.c | 6 +--
> 3 files changed, 72 insertions(+), 57 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index fc59698f06..426b3c4e33 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -109,6 +109,27 @@ static const MemoryRegionOps unin_data_ops = {
> .endianness = DEVICE_LITTLE_ENDIAN,
> };
>
> +static void pci_unin_main_realize(DeviceState *dev, Error **errp)
> +{
> + UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
> + PCIHostState *h = PCI_HOST_BRIDGE(dev);
> +
> + h->bus = pci_register_root_bus(dev, NULL,
> + pci_unin_set_irq, pci_unin_map_irq,
> + s->pic_irqs,
> + &s->pci_mmio,
> + get_system_io(),
> + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> +
> + pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
> +
> + /* DEC 21154 bridge */
> +#if 0
> + /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
> + pci_create_simple(h->bus, PCI_DEVFN(12, 0), "dec-21154");
> +#endif
> +}
> +
> static void pci_unin_main_init(Object *obj)
> {
> UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
> @@ -129,6 +150,21 @@ static void pci_unin_main_init(Object *obj)
> sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> +static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
> +{
> + UNINState *s = U3_AGP_HOST_BRIDGE(dev);
> + PCIHostState *h = PCI_HOST_BRIDGE(dev);
> +
> + h->bus = pci_register_root_bus(dev, NULL,
> + pci_unin_set_irq, pci_unin_map_irq,
> + s->pic_irqs,
> + &s->pci_mmio,
> + get_system_io(),
> + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> +
> + pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp");
> +}
> +
> static void pci_u3_agp_init(Object *obj)
> {
> UNINState *s = U3_AGP_HOST_BRIDGE(obj);
> @@ -148,6 +184,19 @@ static void pci_u3_agp_init(Object *obj)
> sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> +static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
> +{
> + UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
> + PCIHostState *h = PCI_HOST_BRIDGE(dev);
> +
> + h->bus = pci_register_root_bus(dev, NULL,
> + pci_unin_set_irq, pci_unin_map_irq,
> + s->pic_irqs,
> + &s->pci_mmio,
> + get_system_io(),
> + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> +}
> +
> static void pci_unin_agp_init(Object *obj)
> {
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> @@ -177,49 +226,14 @@ static void pci_unin_internal_init(Object *obj)
> }
>
> UNINState *pci_pmac_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io)
> + MemoryRegion *address_space_mem)
> {
> DeviceState *dev;
> SysBusDevice *s;
> - PCIHostState *h;
> UNINState *d;
>
> /* Use values found on a real PowerMac */
> - /* Uninorth main bus */
> - dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
> - qdev_prop_set_ptr(dev, "pic-irqs", pic);
> - qdev_init_nofail(dev);
> - s = SYS_BUS_DEVICE(dev);
> - h = PCI_HOST_BRIDGE(s);
> - d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
> - memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
> - 0x80000000ULL, 0x10000000ULL);
> - memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> - &d->pci_hole);
> -
> - h->bus = pci_register_root_bus(dev, NULL,
> - pci_unin_set_irq, pci_unin_map_irq,
> - d->pic_irqs,
> - &d->pci_mmio,
> - address_space_io,
> - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> -
> -#if 0
> - pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north");
> -#endif
> -
> - sysbus_mmio_map(s, 0, 0xf2800000);
> - sysbus_mmio_map(s, 1, 0xf2c00000);
> -
> - /* DEC 21154 bridge */
> -#if 0
> - /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
> - pci_create_simple(h->bus, PCI_DEVFN(12, 0), "dec-21154");
> -#endif
> -
> /* Uninorth AGP bus */
> - pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
> dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
> qdev_prop_set_ptr(dev, "pic-irqs", pic);
> qdev_init_nofail(dev);
> @@ -239,16 +253,28 @@ UNINState *pci_pmac_init(qemu_irq *pic,
> sysbus_mmio_map(s, 1, 0xf4c00000);
> #endif
>
> + /* Uninorth main bus */
> + dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
> + qdev_prop_set_ptr(dev, "pic-irqs", pic);
> + qdev_init_nofail(dev);
> + s = SYS_BUS_DEVICE(dev);
> + d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
> + memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
> + 0x80000000ULL, 0x10000000ULL);
> + memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> + &d->pci_hole);
> +
> + sysbus_mmio_map(s, 0, 0xf2800000);
> + sysbus_mmio_map(s, 1, 0xf2c00000);
> +
> return d;
> }
>
> UNINState *pci_pmac_u3_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io)
> + MemoryRegion *address_space_mem)
> {
> DeviceState *dev;
> SysBusDevice *s;
> - PCIHostState *h;
> UNINState *d;
>
> /* Uninorth AGP bus */
> @@ -256,7 +282,6 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
> qdev_prop_set_ptr(dev, "pic-irqs", pic);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> - h = PCI_HOST_BRIDGE(dev);
> d = U3_AGP_HOST_BRIDGE(dev);
>
> memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
> @@ -264,18 +289,9 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
> memory_region_add_subregion(address_space_mem, 0x80000000ULL,
> &d->pci_hole);
>
> - h->bus = pci_register_root_bus(dev, NULL,
> - pci_unin_set_irq, pci_unin_map_irq,
> - d->pic_irqs,
> - &d->pci_mmio,
> - address_space_io,
> - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> -
> sysbus_mmio_map(s, 0, 0xf0800000);
> sysbus_mmio_map(s, 1, 0xf0c00000);
>
> - pci_create_simple(h->bus, 11 << 3, "u3-agp");
> -
> return d;
> }
>
> @@ -448,6 +464,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->realize = pci_unin_main_realize;
> dc->props = pci_unin_main_properties;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
> @@ -469,6 +486,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->realize = pci_u3_agp_realize;
> dc->props = pci_u3_agp_properties;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
> @@ -490,6 +508,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->realize = pci_unin_agp_realize;
> dc->props = pci_unin_agp_class_properties;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
> diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
> index fcf13cb757..628415b255 100644
> --- a/hw/ppc/mac.h
> +++ b/hw/ppc/mac.h
> @@ -89,11 +89,9 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
>
> /* UniNorth PCI */
> UNINState *pci_pmac_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io);
> + MemoryRegion *address_space_mem);
> UNINState *pci_pmac_u3_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io);
> + MemoryRegion *address_space_mem);
>
> /* Mac NVRAM */
> #define TYPE_MACIO_NVRAM "macio-nvram"
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 34908d0dd7..f2b07207d3 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -346,12 +346,10 @@ static void ppc_core99_init(MachineState *machine)
>
> if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
> /* 970 gets a U3 bus */
> - uninorth_pci = pci_pmac_u3_init(pic, get_system_memory(),
> - get_system_io());
> + uninorth_pci = pci_pmac_u3_init(pic, get_system_memory());
> machine_arch = ARCH_MAC99_U3;
> } else {
> - uninorth_pci = pci_pmac_init(pic, get_system_memory(),
> - get_system_io());
> + uninorth_pci = pci_pmac_init(pic, get_system_memory());
> machine_arch = ARCH_MAC99;
> }
>
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (19 preceding siblings ...)
2018-03-06 20:59 ` [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements no-reply
@ 2018-03-14 5:40 ` David Gibson
2018-03-14 6:42 ` David Gibson
21 siblings, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-14 5:40 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 3973 bytes --]
On Tue, Mar 06, 2018 at 08:30:44PM +0000, Mark Cave-Ayland wrote:
> [This is for New World Machines: there is a follow-up patch for Old World Machines]
>
> This patchset is a combination of uninorth fixes/cleanup with the final aim
> of removing the remaining custom init functions and switching IRQ arrays over
> to qdev GPIOs.
>
> The first couple of patches apply some style fixups and remove what appears to
> be an obsolete set of uninorth registers according to my testing.
>
> Following on from this, the next few patches QOMify the PCI/AGP host bridges
> and change the existing _init() functions to return the device itself. This
> allows the memory regions to be setup during device init, and using a temporary
> qdev pointer property allows moving the remaining initialisation to device
> realize.
>
> Next we fix the mixup between the PCI/AGP host bridges making sure that the correct
> PCI bus instance is instantiated for the corresponding host bridge , and enabling
> the third PCI host bridge. This allows potential handling of any accesses although
> it should be ignored for all OSs that correctly parse the DT since OpenBIOS currently
> only supports (and exposes) a single PCI host bridge.
>
> Once the legacy _init() functions have been removed and all devices are
> instantiated via the qdev API, it is then possible to wire up the PCI IO
> space to the relevant PCI bus.
>
> After this we implement a separate uninorth device (equivalent to uni-n in the
> Mac New World DT) as suggested by the TODO comment and wire it up as part of the
> board initialisation.
>
> Finally once this is done we can remove the temporary pics IRQ array and instead
> wire up the macio_newworld device to the PIC directly using the existing object
> link.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
I'm afraid I haven't been able to have enough of a look at these in
time for the 2.12 soft freeze, so they'll have to wait until 2.13. I
have started a ppc-for-2.13 tree though.
>
> Mark Cave-Ayland (19):
> uninorth: trivial style fixups
> uninorth: remove second set of uninorth token registers
> uninorth: QOMify PCI and AGP host bridges
> uninorth: remove stray PCIBus realize from mac_newworld.c
> uninorth: move uninorth definitions into uninorth.h
> uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return
> uninorth device
> uninorth: move PCI mmio memory region initialisation into init
> function
> uninorth: introduce temporary pic_irqs device property
> uninorth: move PCI host bridge bus initialisation into device realize
> uninorth: fix PCI and AGP bus mixup
> uninorth: enable internal PCI host bridge
> uninorth: remove obsolete pci_pmac_init() function
> uninorth: remove obsolete pci_pmac_u3_init() function
> uninorth: use object link to pass OpenPIC object to uninorth
> uninorth: move PCI IO (ISA) memory region into the uninorth device
> uninorth: rename UNINState to UNINHostState
> uninorth: create new uninorth device
> mac_newworld: remove pics IRQ array and wire up macio to OpenPIC
> directly
> mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
>
> hw/misc/macio/macio.c | 37 ++--
> hw/pci-host/trace-events | 2 +
> hw/pci-host/uninorth.c | 415 ++++++++++++++++++++++++-----------------
> hw/ppc/mac.h | 20 +-
> hw/ppc/mac_newworld.c | 124 ++++++------
> hw/ppc/trace-events | 4 -
> include/hw/misc/macio/macio.h | 1 -
> include/hw/pci-host/uninorth.h | 65 +++++++
> 8 files changed, 404 insertions(+), 264 deletions(-)
> create mode 100644 include/hw/pci-host/uninorth.h
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h
2018-03-06 20:30 ` [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h Mark Cave-Ayland
2018-03-06 22:50 ` Philippe Mathieu-Daudé
@ 2018-03-14 5:43 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-14 5:43 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 4544 bytes --]
On Tue, Mar 06, 2018 at 08:30:49PM +0000, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied to ppc-for-2.13.
> ---
> hw/pci-host/uninorth.c | 22 +------------------
> include/hw/pci-host/uninorth.h | 49 ++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 50 insertions(+), 21 deletions(-)
> create mode 100644 include/hw/pci-host/uninorth.h
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 1d4d3f5705..600d675573 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -26,31 +26,11 @@
> #include "hw/ppc/mac.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_host.h"
> +#include "hw/pci-host/uninorth.h"
> #include "trace.h"
>
> static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e };
>
> -#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
> -#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
> -#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
> -#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
> -
> -#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
> -#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
> -#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
> -#define U3_AGP_HOST_BRIDGE(obj) \
> - OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
> -
> -typedef struct UNINState {
> - PCIHostState parent_obj;
> -
> - MemoryRegion pci_mmio;
> - MemoryRegion pci_hole;
> -} UNINState;
> -
> static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
> {
> return (irq_num + (pci_dev->devfn >> 3)) & 3;
> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
> new file mode 100644
> index 0000000000..9364c14bdd
> --- /dev/null
> +++ b/include/hw/pci-host/uninorth.h
> @@ -0,0 +1,49 @@
> +/*
> + * QEMU Uninorth PCI host (for all Mac99 and newer machines)
> + *
> + * Copyright (c) 2006 Fabrice Bellard
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a copy
> + * of this software and associated documentation files (the "Software"), to deal
> + * in the Software without restriction, including without limitation the rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#ifndef UNINORTH_H
> +#define UNINORTH_H
> +
> +#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
> +#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
> +#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
> +#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost"
> +
> +#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE)
> +#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE)
> +#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE)
> +#define U3_AGP_HOST_BRIDGE(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE)
> +
> +typedef struct UNINState {
> + PCIHostState parent_obj;
> +
> + MemoryRegion pci_mmio;
> + MemoryRegion pci_hole;
> +} UNINState;
> +
> +#endif /* UNINORTH_H */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device
2018-03-06 20:30 ` [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device Mark Cave-Ayland
2018-03-12 10:59 ` Philippe Mathieu-Daudé
@ 2018-03-14 5:44 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-14 5:44 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 4903 bytes --]
On Tue, Mar 06, 2018 at 08:30:50PM +0000, Mark Cave-Ayland wrote:
> This is in preparation for moving the device wiring into the New World machine.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied to ppc-for-2.13.
> ---
> hw/pci-host/uninorth.c | 16 ++++++++--------
> hw/ppc/mac.h | 10 ++++++----
> hw/ppc/mac_newworld.c | 10 ++++++++--
> 3 files changed, 22 insertions(+), 14 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 600d675573..b081e3c153 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -166,9 +166,9 @@ static void pci_unin_internal_init(Object *obj)
> sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -PCIBus *pci_pmac_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io)
> +UNINState *pci_pmac_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io)
> {
> DeviceState *dev;
> SysBusDevice *s;
> @@ -228,12 +228,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
> sysbus_mmio_map(s, 1, 0xf4c00000);
> #endif
>
> - return h->bus;
> + return d;
> }
>
> -PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io)
> +UNINState *pci_pmac_u3_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io)
> {
> DeviceState *dev;
> SysBusDevice *s;
> @@ -265,7 +265,7 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
>
> pci_create_simple(h->bus, 11 << 3, "u3-agp");
>
> - return h->bus;
> + return d;
> }
>
> static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
> diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
> index a02f797598..fcf13cb757 100644
> --- a/hw/ppc/mac.h
> +++ b/hw/ppc/mac.h
> @@ -31,6 +31,8 @@
> #include "hw/ide/internal.h"
> #include "hw/input/adb.h"
> #include "hw/misc/mos6522.h"
> +#include "hw/pci/pci_host.h"
> +#include "hw/pci-host/uninorth.h"
>
> /* SMP is not enabled, for now */
> #define MAX_CPUS 1
> @@ -86,12 +88,12 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
> MemoryRegion *address_space_io);
>
> /* UniNorth PCI */
> -PCIBus *pci_pmac_init(qemu_irq *pic,
> - MemoryRegion *address_space_mem,
> - MemoryRegion *address_space_io);
> -PCIBus *pci_pmac_u3_init(qemu_irq *pic,
> +UNINState *pci_pmac_init(qemu_irq *pic,
> MemoryRegion *address_space_mem,
> MemoryRegion *address_space_io);
> +UNINState *pci_pmac_u3_init(qemu_irq *pic,
> + MemoryRegion *address_space_mem,
> + MemoryRegion *address_space_io);
>
> /* Mac NVRAM */
> #define TYPE_MACIO_NVRAM "macio-nvram"
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 3410bb13ad..34908d0dd7 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -152,6 +152,7 @@ static void ppc_core99_init(MachineState *machine)
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> hwaddr kernel_base, initrd_base, cmdline_base = 0;
> long kernel_size, initrd_size;
> + UNINState *uninorth_pci;
> PCIBus *pci_bus;
> NewWorldMacIOState *macio;
> MACIOIDEState *macio_ide;
> @@ -345,10 +346,12 @@ static void ppc_core99_init(MachineState *machine)
>
> if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
> /* 970 gets a U3 bus */
> - pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
> + uninorth_pci = pci_pmac_u3_init(pic, get_system_memory(),
> + get_system_io());
> machine_arch = ARCH_MAC99_U3;
> } else {
> - pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
> + uninorth_pci = pci_pmac_init(pic, get_system_memory(),
> + get_system_io());
> machine_arch = ARCH_MAC99;
> }
>
> @@ -361,6 +364,9 @@ static void ppc_core99_init(MachineState *machine)
> tbfreq = TBFREQ;
> }
>
> + /* init basic PC hardware */
> + pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
> +
> /* MacIO */
> macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
> dev = DEVICE(macio);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property
2018-03-06 20:30 ` [Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property Mark Cave-Ayland
@ 2018-03-14 6:20 ` David Gibson
0 siblings, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-14 6:20 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 5267 bytes --]
On Tue, Mar 06, 2018 at 08:30:52PM +0000, Mark Cave-Ayland wrote:
> This is in preparation for moving the PCI bus wiring inside the uninorth
> host bridge devices. In the future it will be possible to remove this once the
> PICs have been switched to use qdev GPIOs.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
It's not worth changing now, but for future reference. For an interim
hack like this, it's probably simpler to just make it a field in the
object and have the "callers" just reach in and set it, rather than
making it a formal property.
Yes, that's an abstraction violation, but as a temporary measure to a
better place I think it's acceptable, and avoids a little bit of extra
churn creating then removing the property.
> ---
> hw/pci-host/uninorth.c | 25 +++++++++++++++++++++++--
> include/hw/pci-host/uninorth.h | 1 +
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 5b8fc3aa16..fc59698f06 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -188,6 +188,7 @@ UNINState *pci_pmac_init(qemu_irq *pic,
> /* Use values found on a real PowerMac */
> /* Uninorth main bus */
> dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
> + qdev_prop_set_ptr(dev, "pic-irqs", pic);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> h = PCI_HOST_BRIDGE(s);
> @@ -199,7 +200,7 @@ UNINState *pci_pmac_init(qemu_irq *pic,
>
> h->bus = pci_register_root_bus(dev, NULL,
> pci_unin_set_irq, pci_unin_map_irq,
> - pic,
> + d->pic_irqs,
> &d->pci_mmio,
> address_space_io,
> PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> @@ -220,6 +221,7 @@ UNINState *pci_pmac_init(qemu_irq *pic,
> /* Uninorth AGP bus */
> pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
> dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
> + qdev_prop_set_ptr(dev, "pic-irqs", pic);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> sysbus_mmio_map(s, 0, 0xf0800000);
> @@ -251,6 +253,7 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
>
> /* Uninorth AGP bus */
> dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
> + qdev_prop_set_ptr(dev, "pic-irqs", pic);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> h = PCI_HOST_BRIDGE(dev);
> @@ -263,7 +266,7 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic,
>
> h->bus = pci_register_root_bus(dev, NULL,
> pci_unin_set_irq, pci_unin_map_irq,
> - pic,
> + d->pic_irqs,
> &d->pci_mmio,
> address_space_io,
> PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
> @@ -436,10 +439,16 @@ static const TypeInfo unin_internal_pci_host_info = {
> },
> };
>
> +static Property pci_unin_main_properties[] = {
> + DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> static void pci_unin_main_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->props = pci_unin_main_properties;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> @@ -451,10 +460,16 @@ static const TypeInfo pci_unin_main_info = {
> .class_init = pci_unin_main_class_init,
> };
>
> +static Property pci_u3_agp_properties[] = {
> + DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->props = pci_u3_agp_properties;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> @@ -466,10 +481,16 @@ static const TypeInfo pci_u3_agp_info = {
> .class_init = pci_u3_agp_class_init,
> };
>
> +static Property pci_unin_agp_class_properties[] = {
> + DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->props = pci_unin_agp_class_properties;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
> index 9364c14bdd..12979712d0 100644
> --- a/include/hw/pci-host/uninorth.h
> +++ b/include/hw/pci-host/uninorth.h
> @@ -42,6 +42,7 @@
> typedef struct UNINState {
> PCIHostState parent_obj;
>
> + void *pic_irqs;
> MemoryRegion pci_mmio;
> MemoryRegion pci_hole;
> } UNINState;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
` (20 preceding siblings ...)
2018-03-14 5:40 ` David Gibson
@ 2018-03-14 6:42 ` David Gibson
21 siblings, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-14 6:42 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 3846 bytes --]
On Tue, Mar 06, 2018 at 08:30:44PM +0000, Mark Cave-Ayland wrote:
> [This is for New World Machines: there is a follow-up patch for Old World Machines]
>
> This patchset is a combination of uninorth fixes/cleanup with the final aim
> of removing the remaining custom init functions and switching IRQ arrays over
> to qdev GPIOs.
>
> The first couple of patches apply some style fixups and remove what appears to
> be an obsolete set of uninorth registers according to my testing.
>
> Following on from this, the next few patches QOMify the PCI/AGP host bridges
> and change the existing _init() functions to return the device itself. This
> allows the memory regions to be setup during device init, and using a temporary
> qdev pointer property allows moving the remaining initialisation to device
> realize.
>
> Next we fix the mixup between the PCI/AGP host bridges making sure that the correct
> PCI bus instance is instantiated for the corresponding host bridge , and enabling
> the third PCI host bridge. This allows potential handling of any accesses although
> it should be ignored for all OSs that correctly parse the DT since OpenBIOS currently
> only supports (and exposes) a single PCI host bridge.
>
> Once the legacy _init() functions have been removed and all devices are
> instantiated via the qdev API, it is then possible to wire up the PCI IO
> space to the relevant PCI bus.
>
> After this we implement a separate uninorth device (equivalent to uni-n in the
> Mac New World DT) as suggested by the TODO comment and wire it up as part of the
> board initialisation.
>
> Finally once this is done we can remove the temporary pics IRQ array and instead
> wire up the macio_newworld device to the PIC directly using the existing object
> link.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
I've applied the patches up to 16/19 to ppc-for-2.13.
>
> Mark Cave-Ayland (19):
> uninorth: trivial style fixups
> uninorth: remove second set of uninorth token registers
> uninorth: QOMify PCI and AGP host bridges
> uninorth: remove stray PCIBus realize from mac_newworld.c
> uninorth: move uninorth definitions into uninorth.h
> uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return
> uninorth device
> uninorth: move PCI mmio memory region initialisation into init
> function
> uninorth: introduce temporary pic_irqs device property
> uninorth: move PCI host bridge bus initialisation into device realize
> uninorth: fix PCI and AGP bus mixup
> uninorth: enable internal PCI host bridge
> uninorth: remove obsolete pci_pmac_init() function
> uninorth: remove obsolete pci_pmac_u3_init() function
> uninorth: use object link to pass OpenPIC object to uninorth
> uninorth: move PCI IO (ISA) memory region into the uninorth device
> uninorth: rename UNINState to UNINHostState
> uninorth: create new uninorth device
> mac_newworld: remove pics IRQ array and wire up macio to OpenPIC
> directly
> mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
>
> hw/misc/macio/macio.c | 37 ++--
> hw/pci-host/trace-events | 2 +
> hw/pci-host/uninorth.c | 415 ++++++++++++++++++++++++-----------------
> hw/ppc/mac.h | 20 +-
> hw/ppc/mac_newworld.c | 124 ++++++------
> hw/ppc/trace-events | 4 -
> include/hw/misc/macio/macio.h | 1 -
> include/hw/pci-host/uninorth.h | 65 +++++++
> 8 files changed, 404 insertions(+), 264 deletions(-)
> create mode 100644 include/hw/pci-host/uninorth.h
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-03-06 20:31 ` [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device Mark Cave-Ayland
@ 2018-03-21 3:29 ` David Gibson
2018-03-22 9:00 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 52+ messages in thread
From: David Gibson @ 2018-03-21 3:29 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 7943 bytes --]
On Tue, Mar 06, 2018 at 08:31:01PM +0000, Mark Cave-Ayland wrote:
> Commit 4e46dcdbd3 "PPC: Newworld: Add uninorth token register" added a TODO
> which was to convert the uninorth registers hack to a proper device. Move
> these registers to a new uninorth device, removing the old hacks from
> mac_newworld.c.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/pci-host/trace-events | 2 ++
> hw/pci-host/uninorth.c | 58 ++++++++++++++++++++++++++++++++++++++++++
> hw/ppc/mac_newworld.c | 41 +++++------------------------
> hw/ppc/trace-events | 4 ---
> include/hw/pci-host/uninorth.h | 11 ++++++++
> 5 files changed, 77 insertions(+), 39 deletions(-)
>
> diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events
> index 341a87a702..dd7a398e96 100644
> --- a/hw/pci-host/trace-events
> +++ b/hw/pci-host/trace-events
> @@ -18,3 +18,5 @@ unin_set_irq(int irq_num, int level) "setting INT %d = %d"
> unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32
> unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64
> unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64
> +unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
> +unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index fada0ffd5f..dbfad01d9d 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -519,6 +519,62 @@ static const TypeInfo pci_unin_internal_info = {
> .class_init = pci_unin_internal_class_init,
> };
>
> +/* UniN device */
> +static void unin_write(void *opaque, hwaddr addr, uint64_t value,
> + unsigned size)
> +{
> + trace_unin_write(addr, value);
> + if (addr == 0x0) {
> + *(int *)opaque = value;
> + }
> +}
> +
> +static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
> +{
> + uint32_t value;
> +
> + value = 0;
> + switch (addr) {
> + case 0:
> + value = *(int *)opaque;
> + }
> +
> + trace_unin_read(addr, value);
> +
> + return value;
> +}
> +
> +static const MemoryRegionOps unin_ops = {
> + .read = unin_read,
> + .write = unin_write,
> + .endianness = DEVICE_NATIVE_ENDIAN,
DEVICE_NATIVE_ENDIAN is almost always wrong. I'm pretty sure it
should be DEVICE_BIG_ENDIAN. I realize this is just a code motion,
but while you're making a proper device of it, you might as well fix
this to.
> +};
> +
> +static void unin_init(Object *obj)
> +{
> + UNINState *s = UNI_NORTH(obj);
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +
> + memory_region_init_io(&s->mem, obj, &unin_ops, &s->token, "unin", 0x1000);
> +
> + sysbus_init_mmio(sbd, &s->mem);
> +}
> +
> +static void unin_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> +}
> +
> +static const TypeInfo unin_info = {
> + .name = TYPE_UNI_NORTH,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(UNINState),
> + .instance_init = unin_init,
> + .class_init = unin_class_init,
> +};
> +
> static void unin_register_types(void)
> {
> type_register_static(&unin_main_pci_host_info);
> @@ -530,6 +586,8 @@ static void unin_register_types(void)
> type_register_static(&pci_u3_agp_info);
> type_register_static(&pci_unin_agp_info);
> type_register_static(&pci_unin_internal_info);
> +
> + type_register_static(&unin_info);
> }
>
> type_init(unin_register_types)
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index ae0de4e36e..2fcb101982 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -83,36 +83,6 @@
>
> #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
>
> -/* UniN device */
> -static void unin_write(void *opaque, hwaddr addr, uint64_t value,
> - unsigned size)
> -{
> - trace_mac99_uninorth_write(addr, value);
> - if (addr == 0x0) {
> - *(int*)opaque = value;
> - }
> -}
> -
> -static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
> -{
> - uint32_t value;
> -
> - value = 0;
> - switch (addr) {
> - case 0:
> - value = *(int*)opaque;
> - }
> -
> - trace_mac99_uninorth_read(addr, value);
> -
> - return value;
> -}
> -
> -static const MemoryRegionOps unin_ops = {
> - .read = unin_read,
> - .write = unin_write,
> - .endianness = DEVICE_NATIVE_ENDIAN,
> -};
>
> static void fw_cfg_boot_set(void *opaque, const char *boot_device,
> Error **errp)
> @@ -146,7 +116,6 @@ static void ppc_core99_init(MachineState *machine)
> CPUPPCState *env = NULL;
> char *filename;
> qemu_irq *pic, **openpic_irqs;
> - MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
> int linux_boot, i, j, k;
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> hwaddr kernel_base, initrd_base, cmdline_base = 0;
> @@ -165,7 +134,6 @@ static void ppc_core99_init(MachineState *machine)
> int machine_arch;
> SysBusDevice *s;
> DeviceState *dev, *pic_dev;
> - int *token = g_new(int, 1);
> hwaddr nvram_addr = 0xFFF04000;
> uint64_t tbfreq;
>
> @@ -273,9 +241,12 @@ static void ppc_core99_init(MachineState *machine)
> }
> }
>
> - /* UniN init: XXX should be a real device */
> - memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
> - memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
> + /* UniN init */
> + dev = qdev_create(NULL, TYPE_UNI_NORTH);
> + qdev_init_nofail(dev);
> + s = SYS_BUS_DEVICE(dev);
> + memory_region_add_subregion(get_system_memory(), 0xf8000000,
> + sysbus_mmio_get_region(s, 0));
>
> openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
> openpic_irqs[0] =
> diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
> index 66ec7eda6e..dc5e65aee9 100644
> --- a/hw/ppc/trace-events
> +++ b/hw/ppc/trace-events
> @@ -92,10 +92,6 @@ rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
> rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
> rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
>
> -# hw/ppc/mac_newworld.c
> -mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
> -mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
> -
> # hw/ppc/ppc4xx_pci.c
> ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
> ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
> index d1424b165a..b0eb093e72 100644
> --- a/include/hw/pci-host/uninorth.h
> +++ b/include/hw/pci-host/uninorth.h
> @@ -51,4 +51,15 @@ typedef struct UNINHostState {
> MemoryRegion pci_io;
> } UNINHostState;
>
> +typedef struct UNINState {
> + SysBusDevice parent_obj;
> +
> + MemoryRegion mem;
> + int token[1];
> +} UNINState;
> +
> +#define TYPE_UNI_NORTH "uni-north"
> +#define UNI_NORTH(obj) \
> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH)
> +
> #endif /* UNINORTH_H */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly
2018-03-06 20:31 ` [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly Mark Cave-Ayland
@ 2018-03-21 3:40 ` David Gibson
2018-03-22 8:38 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-21 3:40 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 3912 bytes --]
On Tue, Mar 06, 2018 at 08:31:02PM +0000, Mark Cave-Ayland wrote:
> Introduce constants for the pre-defined New World IRQs to help keep things
> readable.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/ppc/mac.h | 8 ++++++++
> hw/ppc/mac_newworld.c | 29 +++++++++++++++--------------
> 2 files changed, 23 insertions(+), 14 deletions(-)
>
> diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
> index 5f5916252a..3819058310 100644
> --- a/hw/ppc/mac.h
> +++ b/hw/ppc/mac.h
> @@ -47,6 +47,14 @@
>
> #define ESCC_CLOCK 3686400
>
> +/* New World IRQs */
> +#define NEWWORLD_CUDA_IRQ 0x19
> +#define NEWWORLD_ESCCB_IRQ 0x24
> +#define NEWWORLD_ESCCA_IRQ 0x25
> +#define NEWWORLD_IDE0_IRQ 0xd
> +#define NEWWORLD_IDE0_DMA_IRQ 0x2
> +#define NEWWORLD_IDE1_IRQ 0xe
> +#define NEWWORLD_IDE1_DMA_IRQ 0x3
>
> /* MacIO */
> #define TYPE_MACIO_IDE "macio-ide"
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 2fcb101982..3cde507065 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -115,7 +115,7 @@ static void ppc_core99_init(MachineState *machine)
> PowerPCCPU *cpu = NULL;
> CPUPPCState *env = NULL;
> char *filename;
> - qemu_irq *pic, **openpic_irqs;
> + qemu_irq **openpic_irqs;
> int linux_boot, i, j, k;
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> hwaddr kernel_base, initrd_base, cmdline_base = 0;
> @@ -292,8 +292,6 @@ static void ppc_core99_init(MachineState *machine)
> }
> }
>
> - pic = g_new0(qemu_irq, 64);
> -
> pic_dev = qdev_create(NULL, TYPE_OPENPIC);
> qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
> qdev_init_nofail(pic_dev);
> @@ -305,10 +303,6 @@ static void ppc_core99_init(MachineState *machine)
> }
> }
>
> - for (i = 0; i < 64; i++) {
> - pic[i] = qdev_get_gpio_in(pic_dev, i);
> - }
> -
> if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
> /* 970 gets a U3 bus */
> /* Uninorth AGP bus */
> @@ -382,13 +376,20 @@ static void ppc_core99_init(MachineState *machine)
> /* MacIO */
> macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
> dev = DEVICE(macio);
> - qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */
> - qdev_connect_gpio_out(dev, 1, pic[0x24]); /* ESCC-B */
> - qdev_connect_gpio_out(dev, 2, pic[0x25]); /* ESCC-A */
> - qdev_connect_gpio_out(dev, 3, pic[0x0d]); /* IDE */
> - qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */
> - qdev_connect_gpio_out(dev, 5, pic[0x0e]); /* IDE */
> - qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE DMA */
> + qdev_connect_gpio_out(dev, 0,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_CUDA_IRQ));
> + qdev_connect_gpio_out(dev, 1,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCB_IRQ));
> + qdev_connect_gpio_out(dev, 2,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCA_IRQ));
> + qdev_connect_gpio_out(dev, 3,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ));
> + qdev_connect_gpio_out(dev, 4,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ));
> + qdev_connect_gpio_out(dev, 5,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ));
> + qdev_connect_gpio_out(dev, 6,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ));
> qdev_prop_set_uint64(dev, "frequency", tbfreq);
> object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
> &error_abort);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
2018-03-06 20:31 ` [Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize() Mark Cave-Ayland
@ 2018-03-21 3:42 ` David Gibson
0 siblings, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-03-21 3:42 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 5531 bytes --]
On Tue, Mar 06, 2018 at 08:31:03PM +0000, Mark Cave-Ayland wrote:
> Since the macio device has a link to the PIC device, we can now wire up the
> IRQs directly via qdev GPIOs rather than having to use an intermediate array.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/misc/macio/macio.c | 37 ++++++++++++++++++++++---------------
> hw/ppc/mac_newworld.c | 14 --------------
> include/hw/misc/macio/macio.h | 1 -
> 3 files changed, 22 insertions(+), 30 deletions(-)
>
> diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
> index af1bd46b4b..1aa7bb7c89 100644
> --- a/hw/misc/macio/macio.c
> +++ b/hw/misc/macio/macio.c
> @@ -265,11 +265,10 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
> {
> MacIOState *s = MACIO(d);
> NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
> + DeviceState *pic_dev = DEVICE(ns->pic);
> Error *err = NULL;
> SysBusDevice *sysbus_dev;
> MemoryRegion *timer_memory = NULL;
> - int i;
> - int cur_irq = 0;
>
> macio_common_realize(d, &err);
> if (err) {
> @@ -278,11 +277,14 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
> }
>
> sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
> - sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
> + sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
> + NEWWORLD_CUDA_IRQ));
>
> sysbus_dev = SYS_BUS_DEVICE(&s->escc);
> - sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
> - sysbus_connect_irq(sysbus_dev, 1, ns->irqs[cur_irq++]);
> + sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
> + NEWWORLD_ESCCB_IRQ));
> + sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
> + NEWWORLD_ESCCA_IRQ));
>
> /* OpenPIC */
> sysbus_dev = SYS_BUS_DEVICE(ns->pic);
> @@ -290,15 +292,22 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
> sysbus_mmio_get_region(sysbus_dev, 0));
>
> /* IDE buses */
> - for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
> - qemu_irq irq0 = ns->irqs[cur_irq++];
> - qemu_irq irq1 = ns->irqs[cur_irq++];
> + macio_realize_ide(s, &ns->ide[0],
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),
> + 0x16, &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
>
> - macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
> - if (err) {
> - error_propagate(errp, err);
> - return;
> - }
> + macio_realize_ide(s, &ns->ide[1],
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),
> + 0x1a, &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> }
>
> /* Timer */
> @@ -314,8 +323,6 @@ static void macio_newworld_init(Object *obj)
> NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
> int i;
>
> - qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
> -
> object_property_add_link(obj, "pic", TYPE_OPENPIC,
> (Object **) &ns->pic,
> qdev_prop_allow_set_link_before_realize,
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 3cde507065..ae2ce562a4 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -376,20 +376,6 @@ static void ppc_core99_init(MachineState *machine)
> /* MacIO */
> macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
> dev = DEVICE(macio);
> - qdev_connect_gpio_out(dev, 0,
> - qdev_get_gpio_in(pic_dev, NEWWORLD_CUDA_IRQ));
> - qdev_connect_gpio_out(dev, 1,
> - qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCB_IRQ));
> - qdev_connect_gpio_out(dev, 2,
> - qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCA_IRQ));
> - qdev_connect_gpio_out(dev, 3,
> - qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ));
> - qdev_connect_gpio_out(dev, 4,
> - qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ));
> - qdev_connect_gpio_out(dev, 5,
> - qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ));
> - qdev_connect_gpio_out(dev, 6,
> - qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ));
> qdev_prop_set_uint64(dev, "frequency", tbfreq);
> object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
> &error_abort);
> diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h
> index 4528282b36..e3b9ef48dd 100644
> --- a/include/hw/misc/macio/macio.h
> +++ b/include/hw/misc/macio/macio.h
> @@ -72,7 +72,6 @@ typedef struct NewWorldMacIOState {
> /*< public >*/
>
> OpenPICState *pic;
> - qemu_irq irqs[7];
> MACIOIDEState ide[2];
> } NewWorldMacIOState;
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly
2018-03-06 20:31 ` [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly Mark Cave-Ayland
2018-03-21 3:40 ` David Gibson
@ 2018-03-22 8:38 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-22 8:38 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel, qemu-ppc, david
On 03/06/2018 05:31 PM, Mark Cave-Ayland wrote:
> Introduce constants for the pre-defined New World IRQs to help keep things
> readable.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/ppc/mac.h | 8 ++++++++
> hw/ppc/mac_newworld.c | 29 +++++++++++++++--------------
> 2 files changed, 23 insertions(+), 14 deletions(-)
>
> diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
> index 5f5916252a..3819058310 100644
> --- a/hw/ppc/mac.h
> +++ b/hw/ppc/mac.h
> @@ -47,6 +47,14 @@
>
> #define ESCC_CLOCK 3686400
>
> +/* New World IRQs */
Related type could be enum {
> +#define NEWWORLD_CUDA_IRQ 0x19
> +#define NEWWORLD_ESCCB_IRQ 0x24
> +#define NEWWORLD_ESCCA_IRQ 0x25
> +#define NEWWORLD_IDE0_IRQ 0xd
> +#define NEWWORLD_IDE0_DMA_IRQ 0x2
> +#define NEWWORLD_IDE1_IRQ 0xe
> +#define NEWWORLD_IDE1_DMA_IRQ 0x3
}
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> /* MacIO */
> #define TYPE_MACIO_IDE "macio-ide"
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 2fcb101982..3cde507065 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -115,7 +115,7 @@ static void ppc_core99_init(MachineState *machine)
> PowerPCCPU *cpu = NULL;
> CPUPPCState *env = NULL;
> char *filename;
> - qemu_irq *pic, **openpic_irqs;
> + qemu_irq **openpic_irqs;
> int linux_boot, i, j, k;
> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
> hwaddr kernel_base, initrd_base, cmdline_base = 0;
> @@ -292,8 +292,6 @@ static void ppc_core99_init(MachineState *machine)
> }
> }
>
> - pic = g_new0(qemu_irq, 64);
> -
> pic_dev = qdev_create(NULL, TYPE_OPENPIC);
> qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
> qdev_init_nofail(pic_dev);
> @@ -305,10 +303,6 @@ static void ppc_core99_init(MachineState *machine)
> }
> }
>
> - for (i = 0; i < 64; i++) {
> - pic[i] = qdev_get_gpio_in(pic_dev, i);
> - }
> -
> if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
> /* 970 gets a U3 bus */
> /* Uninorth AGP bus */
> @@ -382,13 +376,20 @@ static void ppc_core99_init(MachineState *machine)
> /* MacIO */
> macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
> dev = DEVICE(macio);
> - qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */
> - qdev_connect_gpio_out(dev, 1, pic[0x24]); /* ESCC-B */
> - qdev_connect_gpio_out(dev, 2, pic[0x25]); /* ESCC-A */
> - qdev_connect_gpio_out(dev, 3, pic[0x0d]); /* IDE */
> - qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */
> - qdev_connect_gpio_out(dev, 5, pic[0x0e]); /* IDE */
> - qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE DMA */
> + qdev_connect_gpio_out(dev, 0,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_CUDA_IRQ));
> + qdev_connect_gpio_out(dev, 1,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCB_IRQ));
> + qdev_connect_gpio_out(dev, 2,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCA_IRQ));
> + qdev_connect_gpio_out(dev, 3,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ));
> + qdev_connect_gpio_out(dev, 4,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ));
> + qdev_connect_gpio_out(dev, 5,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ));
> + qdev_connect_gpio_out(dev, 6,
> + qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ));
> qdev_prop_set_uint64(dev, "frequency", tbfreq);
> object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
> &error_abort);
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-03-21 3:29 ` David Gibson
@ 2018-03-22 9:00 ` Philippe Mathieu-Daudé
2018-03-25 21:11 ` Mark Cave-Ayland
0 siblings, 1 reply; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-03-22 9:00 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: David Gibson, qemu-ppc, qemu-devel
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Hi Mark,
On 03/21/2018 12:29 AM, David Gibson wrote:
> On Tue, Mar 06, 2018 at 08:31:01PM +0000, Mark Cave-Ayland wrote:
>> Commit 4e46dcdbd3 "PPC: Newworld: Add uninorth token register" added a TODO
>> which was to convert the uninorth registers hack to a proper device. Move
>> these registers to a new uninorth device, removing the old hacks from
>> mac_newworld.c.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>> ---
>> hw/pci-host/trace-events | 2 ++
>> hw/pci-host/uninorth.c | 58 ++++++++++++++++++++++++++++++++++++++++++
>> hw/ppc/mac_newworld.c | 41 +++++------------------------
>> hw/ppc/trace-events | 4 ---
>> include/hw/pci-host/uninorth.h | 11 ++++++++
>> 5 files changed, 77 insertions(+), 39 deletions(-)
>>
>> diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events
>> index 341a87a702..dd7a398e96 100644
>> --- a/hw/pci-host/trace-events
>> +++ b/hw/pci-host/trace-events
>> @@ -18,3 +18,5 @@ unin_set_irq(int irq_num, int level) "setting INT %d = %d"
>> unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32
>> unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64
>> unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64
>> +unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>> +unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
>> index fada0ffd5f..dbfad01d9d 100644
>> --- a/hw/pci-host/uninorth.c
>> +++ b/hw/pci-host/uninorth.c
>> @@ -519,6 +519,62 @@ static const TypeInfo pci_unin_internal_info = {
>> .class_init = pci_unin_internal_class_init,
>> };
>>
>> +/* UniN device */
>> +static void unin_write(void *opaque, hwaddr addr, uint64_t value,
>> + unsigned size)
>> +{
>> + trace_unin_write(addr, value);
>> + if (addr == 0x0) {
>> + *(int *)opaque = value;
This looks a dirty insecure optimization...
I see this is code motion, can you clean up using UNINState:
UNINState *s = UNI_NORTH(obj);
...
s->token = value;
>> + }
>> +}
>> +
>> +static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
>> +{
>> + uint32_t value;
>> +
>> + value = 0;
>> + switch (addr) {
>> + case 0:
>> + value = *(int *)opaque;
Same,
>> + }
>> +
>> + trace_unin_read(addr, value);
>> +
>> + return value;
>> +}
>> +
>> +static const MemoryRegionOps unin_ops = {
>> + .read = unin_read,
>> + .write = unin_write,
>> + .endianness = DEVICE_NATIVE_ENDIAN,
>
> DEVICE_NATIVE_ENDIAN is almost always wrong. I'm pretty sure it
> should be DEVICE_BIG_ENDIAN. I realize this is just a code motion,
> but while you're making a proper device of it, you might as well fix
> this to.
>
>> +};
>> +
>> +static void unin_init(Object *obj)
>> +{
>> + UNINState *s = UNI_NORTH(obj);
>> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>> +
>> + memory_region_init_io(&s->mem, obj, &unin_ops, &s->token, "unin", 0x1000);
And here:
memory_region_init_io(&s->mem, obj, &unin_ops, s, "unin", 0x1000);
>> +
>> + sysbus_init_mmio(sbd, &s->mem);
>> +}
>> +
>> +static void unin_class_init(ObjectClass *klass, void *data)
>> +{
>> + DeviceClass *dc = DEVICE_CLASS(klass);
>> +
>> + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
>> +}
>> +
>> +static const TypeInfo unin_info = {
>> + .name = TYPE_UNI_NORTH,
>> + .parent = TYPE_SYS_BUS_DEVICE,
>> + .instance_size = sizeof(UNINState),
>> + .instance_init = unin_init,
>> + .class_init = unin_class_init,
>> +};
>> +
>> static void unin_register_types(void)
>> {
>> type_register_static(&unin_main_pci_host_info);
>> @@ -530,6 +586,8 @@ static void unin_register_types(void)
>> type_register_static(&pci_u3_agp_info);
>> type_register_static(&pci_unin_agp_info);
>> type_register_static(&pci_unin_internal_info);
>> +
>> + type_register_static(&unin_info);
>> }
>>
>> type_init(unin_register_types)
>> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
>> index ae0de4e36e..2fcb101982 100644
>> --- a/hw/ppc/mac_newworld.c
>> +++ b/hw/ppc/mac_newworld.c
>> @@ -83,36 +83,6 @@
>>
>> #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
>>
>> -/* UniN device */
>> -static void unin_write(void *opaque, hwaddr addr, uint64_t value,
>> - unsigned size)
>> -{
>> - trace_mac99_uninorth_write(addr, value);
>> - if (addr == 0x0) {
>> - *(int*)opaque = value;
>> - }
>> -}
>> -
>> -static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
>> -{
>> - uint32_t value;
>> -
>> - value = 0;
>> - switch (addr) {
>> - case 0:
>> - value = *(int*)opaque;
>> - }
>> -
>> - trace_mac99_uninorth_read(addr, value);
>> -
>> - return value;
>> -}
>> -
>> -static const MemoryRegionOps unin_ops = {
>> - .read = unin_read,
>> - .write = unin_write,
>> - .endianness = DEVICE_NATIVE_ENDIAN,
>> -};
>>
>> static void fw_cfg_boot_set(void *opaque, const char *boot_device,
>> Error **errp)
>> @@ -146,7 +116,6 @@ static void ppc_core99_init(MachineState *machine)
>> CPUPPCState *env = NULL;
>> char *filename;
>> qemu_irq *pic, **openpic_irqs;
>> - MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
>> int linux_boot, i, j, k;
>> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
>> hwaddr kernel_base, initrd_base, cmdline_base = 0;
>> @@ -165,7 +134,6 @@ static void ppc_core99_init(MachineState *machine)
>> int machine_arch;
>> SysBusDevice *s;
>> DeviceState *dev, *pic_dev;
>> - int *token = g_new(int, 1);
>> hwaddr nvram_addr = 0xFFF04000;
>> uint64_t tbfreq;
>>
>> @@ -273,9 +241,12 @@ static void ppc_core99_init(MachineState *machine)
>> }
>> }
>>
>> - /* UniN init: XXX should be a real device */
>> - memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
>> - memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
>> + /* UniN init */
>> + dev = qdev_create(NULL, TYPE_UNI_NORTH);
>> + qdev_init_nofail(dev);
>> + s = SYS_BUS_DEVICE(dev);
>> + memory_region_add_subregion(get_system_memory(), 0xf8000000,
>> + sysbus_mmio_get_region(s, 0));
>>
>> openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
>> openpic_irqs[0] =
>> diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
>> index 66ec7eda6e..dc5e65aee9 100644
>> --- a/hw/ppc/trace-events
>> +++ b/hw/ppc/trace-events
>> @@ -92,10 +92,6 @@ rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
>> rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
>> rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
>>
>> -# hw/ppc/mac_newworld.c
>> -mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>> -mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>> -
>> # hw/ppc/ppc4xx_pci.c
>> ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
>> ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
>> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
>> index d1424b165a..b0eb093e72 100644
>> --- a/include/hw/pci-host/uninorth.h
>> +++ b/include/hw/pci-host/uninorth.h
>> @@ -51,4 +51,15 @@ typedef struct UNINHostState {
>> MemoryRegion pci_io;
>> } UNINHostState;
>>
>> +typedef struct UNINState {
>> + SysBusDevice parent_obj;
>> +
>> + MemoryRegion mem;
>> + int token[1];
having 'token' being 'int' type also looks weird.
Maybe target_ulong is better?
>> +} UNINState;
>> +
>> +#define TYPE_UNI_NORTH "uni-north"
>> +#define UNI_NORTH(obj) \
>> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH)
>> +
>> #endif /* UNINORTH_H */
>
Regards,
Phil.
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-03-22 9:00 ` Philippe Mathieu-Daudé
@ 2018-03-25 21:11 ` Mark Cave-Ayland
2018-04-06 5:33 ` Mark Cave-Ayland
0 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-03-25 21:11 UTC (permalink / raw)
To: Philippe Mathieu-Daudé; +Cc: qemu-ppc, qemu-devel, David Gibson
On 22/03/18 09:00, Philippe Mathieu-Daudé wrote:
> Hi Mark,
>
> On 03/21/2018 12:29 AM, David Gibson wrote:
>> On Tue, Mar 06, 2018 at 08:31:01PM +0000, Mark Cave-Ayland wrote:
>>> Commit 4e46dcdbd3 "PPC: Newworld: Add uninorth token register" added a TODO
>>> which was to convert the uninorth registers hack to a proper device. Move
>>> these registers to a new uninorth device, removing the old hacks from
>>> mac_newworld.c.
>>>
>>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>>> ---
>>> hw/pci-host/trace-events | 2 ++
>>> hw/pci-host/uninorth.c | 58 ++++++++++++++++++++++++++++++++++++++++++
>>> hw/ppc/mac_newworld.c | 41 +++++------------------------
>>> hw/ppc/trace-events | 4 ---
>>> include/hw/pci-host/uninorth.h | 11 ++++++++
>>> 5 files changed, 77 insertions(+), 39 deletions(-)
>>>
>>> diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events
>>> index 341a87a702..dd7a398e96 100644
>>> --- a/hw/pci-host/trace-events
>>> +++ b/hw/pci-host/trace-events
>>> @@ -18,3 +18,5 @@ unin_set_irq(int irq_num, int level) "setting INT %d = %d"
>>> unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32
>>> unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64
>>> unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64
>>> +unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>>> +unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>>> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
>>> index fada0ffd5f..dbfad01d9d 100644
>>> --- a/hw/pci-host/uninorth.c
>>> +++ b/hw/pci-host/uninorth.c
>>> @@ -519,6 +519,62 @@ static const TypeInfo pci_unin_internal_info = {
>>> .class_init = pci_unin_internal_class_init,
>>> };
>>>
>>> +/* UniN device */
>>> +static void unin_write(void *opaque, hwaddr addr, uint64_t value,
>>> + unsigned size)
>>> +{
>>> + trace_unin_write(addr, value);
>>> + if (addr == 0x0) {
>>> + *(int *)opaque = value;
>
> This looks a dirty insecure optimization...
>
> I see this is code motion, can you clean up using UNINState:
>
> UNINState *s = UNI_NORTH(obj);
>
> ...
> s->token = value;
>
>>> + }
>>> +}
>>> +
>>> +static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
>>> +{
>>> + uint32_t value;
>>> +
>>> + value = 0;
>>> + switch (addr) {
>>> + case 0:
>>> + value = *(int *)opaque;
>
> Same,
>
>>> + }
>>> +
>>> + trace_unin_read(addr, value);
>>> +
>>> + return value;
>>> +}
>>> +
>>> +static const MemoryRegionOps unin_ops = {
>>> + .read = unin_read,
>>> + .write = unin_write,
>>> + .endianness = DEVICE_NATIVE_ENDIAN,
>>
>> DEVICE_NATIVE_ENDIAN is almost always wrong. I'm pretty sure it
>> should be DEVICE_BIG_ENDIAN. I realize this is just a code motion,
>> but while you're making a proper device of it, you might as well fix
>> this to.
>>
>>> +};
>>> +
>>> +static void unin_init(Object *obj)
>>> +{
>>> + UNINState *s = UNI_NORTH(obj);
>>> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>>> +
>>> + memory_region_init_io(&s->mem, obj, &unin_ops, &s->token, "unin", 0x1000);
>
> And here:
>
> memory_region_init_io(&s->mem, obj, &unin_ops, s, "unin", 0x1000);
>
>>> +
>>> + sysbus_init_mmio(sbd, &s->mem);
>>> +}
>>> +
>>> +static void unin_class_init(ObjectClass *klass, void *data)
>>> +{
>>> + DeviceClass *dc = DEVICE_CLASS(klass);
>>> +
>>> + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
>>> +}
>>> +
>>> +static const TypeInfo unin_info = {
>>> + .name = TYPE_UNI_NORTH,
>>> + .parent = TYPE_SYS_BUS_DEVICE,
>>> + .instance_size = sizeof(UNINState),
>>> + .instance_init = unin_init,
>>> + .class_init = unin_class_init,
>>> +};
>>> +
>>> static void unin_register_types(void)
>>> {
>>> type_register_static(&unin_main_pci_host_info);
>>> @@ -530,6 +586,8 @@ static void unin_register_types(void)
>>> type_register_static(&pci_u3_agp_info);
>>> type_register_static(&pci_unin_agp_info);
>>> type_register_static(&pci_unin_internal_info);
>>> +
>>> + type_register_static(&unin_info);
>>> }
>>>
>>> type_init(unin_register_types)
>>> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
>>> index ae0de4e36e..2fcb101982 100644
>>> --- a/hw/ppc/mac_newworld.c
>>> +++ b/hw/ppc/mac_newworld.c
>>> @@ -83,36 +83,6 @@
>>>
>>> #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
>>>
>>> -/* UniN device */
>>> -static void unin_write(void *opaque, hwaddr addr, uint64_t value,
>>> - unsigned size)
>>> -{
>>> - trace_mac99_uninorth_write(addr, value);
>>> - if (addr == 0x0) {
>>> - *(int*)opaque = value;
>>> - }
>>> -}
>>> -
>>> -static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
>>> -{
>>> - uint32_t value;
>>> -
>>> - value = 0;
>>> - switch (addr) {
>>> - case 0:
>>> - value = *(int*)opaque;
>>> - }
>>> -
>>> - trace_mac99_uninorth_read(addr, value);
>>> -
>>> - return value;
>>> -}
>>> -
>>> -static const MemoryRegionOps unin_ops = {
>>> - .read = unin_read,
>>> - .write = unin_write,
>>> - .endianness = DEVICE_NATIVE_ENDIAN,
>>> -};
>>>
>>> static void fw_cfg_boot_set(void *opaque, const char *boot_device,
>>> Error **errp)
>>> @@ -146,7 +116,6 @@ static void ppc_core99_init(MachineState *machine)
>>> CPUPPCState *env = NULL;
>>> char *filename;
>>> qemu_irq *pic, **openpic_irqs;
>>> - MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
>>> int linux_boot, i, j, k;
>>> MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
>>> hwaddr kernel_base, initrd_base, cmdline_base = 0;
>>> @@ -165,7 +134,6 @@ static void ppc_core99_init(MachineState *machine)
>>> int machine_arch;
>>> SysBusDevice *s;
>>> DeviceState *dev, *pic_dev;
>>> - int *token = g_new(int, 1);
>>> hwaddr nvram_addr = 0xFFF04000;
>>> uint64_t tbfreq;
>>>
>>> @@ -273,9 +241,12 @@ static void ppc_core99_init(MachineState *machine)
>>> }
>>> }
>>>
>>> - /* UniN init: XXX should be a real device */
>>> - memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);
>>> - memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
>>> + /* UniN init */
>>> + dev = qdev_create(NULL, TYPE_UNI_NORTH);
>>> + qdev_init_nofail(dev);
>>> + s = SYS_BUS_DEVICE(dev);
>>> + memory_region_add_subregion(get_system_memory(), 0xf8000000,
>>> + sysbus_mmio_get_region(s, 0));
>>>
>>> openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
>>> openpic_irqs[0] =
>>> diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
>>> index 66ec7eda6e..dc5e65aee9 100644
>>> --- a/hw/ppc/trace-events
>>> +++ b/hw/ppc/trace-events
>>> @@ -92,10 +92,6 @@ rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
>>> rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
>>> rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
>>>
>>> -# hw/ppc/mac_newworld.c
>>> -mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>>> -mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
>>> -
>>> # hw/ppc/ppc4xx_pci.c
>>> ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
>>> ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
>>> diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
>>> index d1424b165a..b0eb093e72 100644
>>> --- a/include/hw/pci-host/uninorth.h
>>> +++ b/include/hw/pci-host/uninorth.h
>>> @@ -51,4 +51,15 @@ typedef struct UNINHostState {
>>> MemoryRegion pci_io;
>>> } UNINHostState;
>>>
>>> +typedef struct UNINState {
>>> + SysBusDevice parent_obj;
>>> +
>>> + MemoryRegion mem;
>>> + int token[1];
>
> having 'token' being 'int' type also looks weird.
>
> Maybe target_ulong is better?
>
>>> +} UNINState;
>>> +
>>> +#define TYPE_UNI_NORTH "uni-north"
>>> +#define UNI_NORTH(obj) \
>>> + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH)
>>> +
>>> #endif /* UNINORTH_H */
Just to follow up on this, I spent a bit looking at what this register
is trying to do and from the Darwin source I can see that in fact it is
simply a hard-wired hardware register which should return the revision
of the UniNorth hardware.
So in fact the code in its current form is completely bogus which is
visible when trying to boot FreeBSD, which as the register is never
written to, returns a completely different random number each time.
David - are you okay to change DEVICE_NATIVE_ENDIAN to DEVICE_BIG_ENDIAN
and then apply this and the final patch to your for-2.13 queue? I can
then follow up with another patch later that will implement this
register (and also the matching PCI revision ID) correctly.
ATB,
Mark.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-03-25 21:11 ` Mark Cave-Ayland
@ 2018-04-06 5:33 ` Mark Cave-Ayland
2018-04-25 6:06 ` Mark Cave-Ayland
0 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-04-06 5:33 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel
On 25/03/18 22:11, Mark Cave-Ayland wrote:
> Just to follow up on this, I spent a bit looking at what this register
> is trying to do and from the Darwin source I can see that in fact it is
> simply a hard-wired hardware register which should return the revision
> of the UniNorth hardware.
>
> So in fact the code in its current form is completely bogus which is
> visible when trying to boot FreeBSD, which as the register is never
> written to, returns a completely different random number each time.
>
> David - are you okay to change DEVICE_NATIVE_ENDIAN to DEVICE_BIG_ENDIAN
> and then apply this and the final patch to your for-2.13 queue? I can
> then follow up with another patch later that will implement this
> register (and also the matching PCI revision ID) correctly.
Ping? I can see that more patches are being added to the for-2.13 branch
so I was just wondering if there is now anything else needed from me in
order to get the last 3 patches from this patchset queued?
ATB,
Mark.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-04-06 5:33 ` Mark Cave-Ayland
@ 2018-04-25 6:06 ` Mark Cave-Ayland
2018-04-25 6:34 ` David Gibson
0 siblings, 1 reply; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-04-25 6:06 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel
On 06/04/18 06:33, Mark Cave-Ayland wrote:
> On 25/03/18 22:11, Mark Cave-Ayland wrote:
>
>> Just to follow up on this, I spent a bit looking at what this register
>> is trying to do and from the Darwin source I can see that in fact it
>> is simply a hard-wired hardware register which should return the
>> revision of the UniNorth hardware.
>>
>> So in fact the code in its current form is completely bogus which is
>> visible when trying to boot FreeBSD, which as the register is never
>> written to, returns a completely different random number each time.
>>
>> David - are you okay to change DEVICE_NATIVE_ENDIAN to
>> DEVICE_BIG_ENDIAN and then apply this and the final patch to your
>> for-2.13 queue? I can then follow up with another patch later that
>> will implement this register (and also the matching PCI revision ID)
>> correctly.
>
> Ping? I can see that more patches are being added to the for-2.13 branch
> so I was just wondering if there is now anything else needed from me in
> order to get the last 3 patches from this patchset queued?
Ping again? The reason for asking is because my next set of Mac branches
are all rebased on this patchset since they rely on this, plus the final
two patches in this series which remove the need for
qdev_connect_gpio_out() when wiring up macio devices.
ATB,
Mark.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-04-25 6:06 ` Mark Cave-Ayland
@ 2018-04-25 6:34 ` David Gibson
2018-04-25 6:58 ` Mark Cave-Ayland
0 siblings, 1 reply; 52+ messages in thread
From: David Gibson @ 2018-04-25 6:34 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1900 bytes --]
On Wed, Apr 25, 2018 at 07:06:03AM +0100, Mark Cave-Ayland wrote:
> On 06/04/18 06:33, Mark Cave-Ayland wrote:
>
> > On 25/03/18 22:11, Mark Cave-Ayland wrote:
> >
> > > Just to follow up on this, I spent a bit looking at what this
> > > register is trying to do and from the Darwin source I can see that
> > > in fact it is simply a hard-wired hardware register which should
> > > return the revision of the UniNorth hardware.
> > >
> > > So in fact the code in its current form is completely bogus which is
> > > visible when trying to boot FreeBSD, which as the register is never
> > > written to, returns a completely different random number each time.
> > >
> > > David - are you okay to change DEVICE_NATIVE_ENDIAN to
> > > DEVICE_BIG_ENDIAN and then apply this and the final patch to your
> > > for-2.13 queue? I can then follow up with another patch later that
> > > will implement this register (and also the matching PCI revision ID)
> > > correctly.
> >
> > Ping? I can see that more patches are being added to the for-2.13 branch
> > so I was just wondering if there is now anything else needed from me in
> > order to get the last 3 patches from this patchset queued?
>
> Ping again? The reason for asking is because my next set of Mac branches are
> all rebased on this patchset since they rely on this, plus the final two
> patches in this series which remove the need for qdev_connect_gpio_out()
> when wiring up macio devices.
Uh... sorry. I completely missed this series. And, apparently, your
earlier ping. Can you resend, please. Make sure you explicitly CC
me, I occasionally go through the lists but it's easy for me to miss
stuff there.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-04-25 6:34 ` David Gibson
@ 2018-04-25 6:58 ` Mark Cave-Ayland
2018-04-25 14:35 ` Philippe Mathieu-Daudé
2018-04-26 3:06 ` David Gibson
0 siblings, 2 replies; 52+ messages in thread
From: Mark Cave-Ayland @ 2018-04-25 6:58 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel
On 25/04/18 07:34, David Gibson wrote:
> On Wed, Apr 25, 2018 at 07:06:03AM +0100, Mark Cave-Ayland wrote:
>> On 06/04/18 06:33, Mark Cave-Ayland wrote:
>>
>>> On 25/03/18 22:11, Mark Cave-Ayland wrote:
>>>
>>>> Just to follow up on this, I spent a bit looking at what this
>>>> register is trying to do and from the Darwin source I can see that
>>>> in fact it is simply a hard-wired hardware register which should
>>>> return the revision of the UniNorth hardware.
>>>>
>>>> So in fact the code in its current form is completely bogus which is
>>>> visible when trying to boot FreeBSD, which as the register is never
>>>> written to, returns a completely different random number each time.
>>>>
>>>> David - are you okay to change DEVICE_NATIVE_ENDIAN to
>>>> DEVICE_BIG_ENDIAN and then apply this and the final patch to your
>>>> for-2.13 queue? I can then follow up with another patch later that
>>>> will implement this register (and also the matching PCI revision ID)
>>>> correctly.
>>>
>>> Ping? I can see that more patches are being added to the for-2.13 branch
>>> so I was just wondering if there is now anything else needed from me in
>>> order to get the last 3 patches from this patchset queued?
>>
>> Ping again? The reason for asking is because my next set of Mac branches are
>> all rebased on this patchset since they rely on this, plus the final two
>> patches in this series which remove the need for qdev_connect_gpio_out()
>> when wiring up macio devices.
>
> Uh... sorry. I completely missed this series. And, apparently, your
> earlier ping. Can you resend, please. Make sure you explicitly CC
> me, I occasionally go through the lists but it's easy for me to miss
> stuff there.
No it's okay - you've already got the majority of the patchset applied
to ppc-for-2.13 (see
https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg04312.html) but
it's the last 3 patches which are still missing, presumably because
Philippe had some questions about them at
https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg06026.html and
you queried the DEVICE_NATIVE_ENDIAN at
https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg05597.html.
If you're happy to consider patch 17 as just code movement and touch it
up locally to use DEVICE_BIG_ENDIAN rather than have me resend, then
does that allow the remaining patches 17-19 to be applied to ppc-for-2.13?
Once they are there I can send a follow-up patch which will completely
remove the original implementation in patch 17 and replace it with a
proper versioned register, updating the PCI config space to match
accordingly.
In short: without the follow-up patch the code for the uninorth register
both before and after patch 17 is wrong regardless of which endian is
used, so that itself doesn't affect whether or not it can be applied.
ATB,
Mark.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-04-25 6:58 ` Mark Cave-Ayland
@ 2018-04-25 14:35 ` Philippe Mathieu-Daudé
2018-04-26 3:06 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-04-25 14:35 UTC (permalink / raw)
To: Mark Cave-Ayland, David Gibson; +Cc: qemu-ppc, qemu-devel
On 04/25/2018 03:58 AM, Mark Cave-Ayland wrote:
> On 25/04/18 07:34, David Gibson wrote:
>> On Wed, Apr 25, 2018 at 07:06:03AM +0100, Mark Cave-Ayland wrote:
>>> On 06/04/18 06:33, Mark Cave-Ayland wrote:
>>>> On 25/03/18 22:11, Mark Cave-Ayland wrote:
>>>>
>>>>> Just to follow up on this, I spent a bit looking at what this
>>>>> register is trying to do and from the Darwin source I can see that
>>>>> in fact it is simply a hard-wired hardware register which should
>>>>> return the revision of the UniNorth hardware.
>>>>>
>>>>> So in fact the code in its current form is completely bogus which is
>>>>> visible when trying to boot FreeBSD, which as the register is never
>>>>> written to, returns a completely different random number each time.
This is scary...
>>>>>
>>>>> David - are you okay to change DEVICE_NATIVE_ENDIAN to
>>>>> DEVICE_BIG_ENDIAN and then apply this and the final patch to your
>>>>> for-2.13 queue? I can then follow up with another patch later that
>>>>> will implement this register (and also the matching PCI revision ID)
>>>>> correctly.
>>>>
>>>> Ping? I can see that more patches are being added to the for-2.13
>>>> branch
>>>> so I was just wondering if there is now anything else needed from me in
>>>> order to get the last 3 patches from this patchset queued?
>>>
>>> Ping again? The reason for asking is because my next set of Mac
>>> branches are
>>> all rebased on this patchset since they rely on this, plus the final two
>>> patches in this series which remove the need for qdev_connect_gpio_out()
>>> when wiring up macio devices.
>>
>> Uh... sorry. I completely missed this series. And, apparently, your
>> earlier ping. Can you resend, please. Make sure you explicitly CC
>> me, I occasionally go through the lists but it's easy for me to miss
>> stuff there.
>
> No it's okay - you've already got the majority of the patchset applied
> to ppc-for-2.13 (see
> https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg04312.html) but
> it's the last 3 patches which are still missing, presumably because
> Philippe had some questions about them at
> https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg06026.html and
> you queried the DEVICE_NATIVE_ENDIAN at
> https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg05597.html.
>
> If you're happy to consider patch 17 as just code movement and touch it
> up locally to use DEVICE_BIG_ENDIAN rather than have me resend, then
> does that allow the remaining patches 17-19 to be applied to ppc-for-2.13?
>
> Once they are there I can send a follow-up patch which will completely
> remove the original implementation in patch 17 and replace it with a
> proper versioned register, updating the PCI config space to match
> accordingly.
>
> In short: without the follow-up patch the code for the uninorth register
> both before and after patch 17 is wrong regardless of which endian is
> used, so that itself doesn't affect whether or not it can be applied.
With this explanation you have my blessing :)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device
2018-04-25 6:58 ` Mark Cave-Ayland
2018-04-25 14:35 ` Philippe Mathieu-Daudé
@ 2018-04-26 3:06 ` David Gibson
1 sibling, 0 replies; 52+ messages in thread
From: David Gibson @ 2018-04-26 3:06 UTC (permalink / raw)
To: Mark Cave-Ayland; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 3477 bytes --]
On Wed, Apr 25, 2018 at 07:58:31AM +0100, Mark Cave-Ayland wrote:
> On 25/04/18 07:34, David Gibson wrote:
>
> > On Wed, Apr 25, 2018 at 07:06:03AM +0100, Mark Cave-Ayland wrote:
> > > On 06/04/18 06:33, Mark Cave-Ayland wrote:
> > >
> > > > On 25/03/18 22:11, Mark Cave-Ayland wrote:
> > > >
> > > > > Just to follow up on this, I spent a bit looking at what this
> > > > > register is trying to do and from the Darwin source I can see that
> > > > > in fact it is simply a hard-wired hardware register which should
> > > > > return the revision of the UniNorth hardware.
> > > > >
> > > > > So in fact the code in its current form is completely bogus which is
> > > > > visible when trying to boot FreeBSD, which as the register is never
> > > > > written to, returns a completely different random number each time.
> > > > >
> > > > > David - are you okay to change DEVICE_NATIVE_ENDIAN to
> > > > > DEVICE_BIG_ENDIAN and then apply this and the final patch to your
> > > > > for-2.13 queue? I can then follow up with another patch later that
> > > > > will implement this register (and also the matching PCI revision ID)
> > > > > correctly.
> > > >
> > > > Ping? I can see that more patches are being added to the for-2.13 branch
> > > > so I was just wondering if there is now anything else needed from me in
> > > > order to get the last 3 patches from this patchset queued?
> > >
> > > Ping again? The reason for asking is because my next set of Mac branches are
> > > all rebased on this patchset since they rely on this, plus the final two
> > > patches in this series which remove the need for qdev_connect_gpio_out()
> > > when wiring up macio devices.
> >
> > Uh... sorry. I completely missed this series. And, apparently, your
> > earlier ping. Can you resend, please. Make sure you explicitly CC
> > me, I occasionally go through the lists but it's easy for me to miss
> > stuff there.
>
> No it's okay - you've already got the majority of the patchset applied to
> ppc-for-2.13 (see
> https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg04312.html) but
> it's the last 3 patches which are still missing, presumably because Philippe
> had some questions about them at
> https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg06026.html and you
> queried the DEVICE_NATIVE_ENDIAN at
> https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg05597.html.
>
> If you're happy to consider patch 17 as just code movement and touch it up
> locally to use DEVICE_BIG_ENDIAN rather than have me resend, then does that
> allow the remaining patches 17-19 to be applied to ppc-for-2.13?
Uh.. right. Yeah, I've lost my context on this, sorry. Can you
rebase and resend just the patches that aren't included yet.
> Once they are there I can send a follow-up patch which will completely
> remove the original implementation in patch 17 and replace it with a proper
> versioned register, updating the PCI config space to match accordingly.
>
> In short: without the follow-up patch the code for the uninorth register
> both before and after patch 17 is wrong regardless of which endian is used,
> so that itself doesn't affect whether or not it can be applied.
>
>
> ATB,
>
> Mark.
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 52+ messages in thread
end of thread, other threads:[~2018-04-26 3:09 UTC | newest]
Thread overview: 52+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-03-06 20:30 [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups Mark Cave-Ayland
2018-03-06 22:49 ` Philippe Mathieu-Daudé
2018-03-07 2:25 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers Mark Cave-Ayland
2018-03-07 4:11 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges Mark Cave-Ayland
2018-03-09 0:32 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c Mark Cave-Ayland
2018-03-09 0:35 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h Mark Cave-Ayland
2018-03-06 22:50 ` Philippe Mathieu-Daudé
2018-03-14 5:43 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device Mark Cave-Ayland
2018-03-12 10:59 ` Philippe Mathieu-Daudé
2018-03-14 5:44 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function Mark Cave-Ayland
2018-03-06 23:44 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
2018-03-07 7:02 ` Mark Cave-Ayland
2018-03-07 7:23 ` Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property Mark Cave-Ayland
2018-03-14 6:20 ` David Gibson
2018-03-06 20:30 ` [Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize Mark Cave-Ayland
2018-03-12 11:04 ` Philippe Mathieu-Daudé
2018-03-06 20:30 ` [Qemu-devel] [PATCH 10/19] uninorth: fix PCI and AGP bus mixup Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 11/19] uninorth: enable internal PCI host bridge Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 12/19] uninorth: remove obsolete pci_pmac_init() function Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 13/19] uninorth: remove obsolete pci_pmac_u3_init() function Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 14/19] uninorth: use object link to pass OpenPIC object to uninorth Mark Cave-Ayland
2018-03-06 20:30 ` [Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device Mark Cave-Ayland
2018-03-12 11:01 ` Philippe Mathieu-Daudé
2018-03-06 20:31 ` [Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState Mark Cave-Ayland
2018-03-06 22:52 ` Philippe Mathieu-Daudé
2018-03-06 20:31 ` [Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device Mark Cave-Ayland
2018-03-21 3:29 ` David Gibson
2018-03-22 9:00 ` Philippe Mathieu-Daudé
2018-03-25 21:11 ` Mark Cave-Ayland
2018-04-06 5:33 ` Mark Cave-Ayland
2018-04-25 6:06 ` Mark Cave-Ayland
2018-04-25 6:34 ` David Gibson
2018-04-25 6:58 ` Mark Cave-Ayland
2018-04-25 14:35 ` Philippe Mathieu-Daudé
2018-04-26 3:06 ` David Gibson
2018-03-06 20:31 ` [Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly Mark Cave-Ayland
2018-03-21 3:40 ` David Gibson
2018-03-22 8:38 ` Philippe Mathieu-Daudé
2018-03-06 20:31 ` [Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize() Mark Cave-Ayland
2018-03-21 3:42 ` David Gibson
2018-03-06 20:59 ` [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements no-reply
2018-03-06 21:08 ` Mark Cave-Ayland
2018-03-14 5:40 ` David Gibson
2018-03-14 6:42 ` David Gibson
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