All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
@ 2018-03-08 14:07 Chris Wilson
  2018-03-08 14:45 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2018-03-08 14:07 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mika Kuoppala

There is some redundancy between dma_fence->ops->enable_signaling (via
i915_fence_enable_signaling) and our backend,
intel_engine_enable_signaling() in that both levels recheck the fence
status multiple times. If we convert intel_engine_enable_signaling() to
return the information desired by dma_fence->ops->enable_signaling, we
can reduce i915_fence_enable_signaling to a simple stub and avoid
trying to reinterpret the same information.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/i915/i915_request.c      |  6 +-----
 drivers/gpu/drm/i915/intel_breadcrumbs.c | 21 +++++++++++++--------
 drivers/gpu/drm/i915/intel_ringbuffer.h  |  2 +-
 3 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index d437beac3969..2a841800d4cf 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -59,11 +59,7 @@ static bool i915_fence_signaled(struct dma_fence *fence)
 
 static bool i915_fence_enable_signaling(struct dma_fence *fence)
 {
-	if (i915_fence_signaled(fence))
-		return false;
-
-	intel_engine_enable_signaling(to_request(fence), true);
-	return !i915_fence_signaled(fence);
+	return intel_engine_enable_signaling(to_request(fence), true);
 }
 
 static signed long i915_fence_wait(struct dma_fence *fence,
diff --git a/drivers/gpu/drm/i915/intel_breadcrumbs.c b/drivers/gpu/drm/i915/intel_breadcrumbs.c
index 1f79e7a47433..671a6d61e29d 100644
--- a/drivers/gpu/drm/i915/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/intel_breadcrumbs.c
@@ -730,10 +730,11 @@ static void insert_signal(struct intel_breadcrumbs *b,
 	list_add(&request->signaling.link, &iter->signaling.link);
 }
 
-void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
+bool intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
 {
 	struct intel_engine_cs *engine = request->engine;
 	struct intel_breadcrumbs *b = &engine->breadcrumbs;
+	struct intel_wait *wait = &request->signaling.wait;
 	u32 seqno;
 
 	/*
@@ -750,12 +751,12 @@ void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
 
 	seqno = i915_request_global_seqno(request);
 	if (!seqno) /* will be enabled later upon execution */
-		return;
+		return true;
 
-	GEM_BUG_ON(request->signaling.wait.seqno);
-	request->signaling.wait.tsk = b->signaler;
-	request->signaling.wait.request = request;
-	request->signaling.wait.seqno = seqno;
+	GEM_BUG_ON(wait->seqno);
+	wait->tsk = b->signaler;
+	wait->request = request;
+	wait->seqno = seqno;
 
 	/*
 	 * Add ourselves into the list of waiters, but registering our
@@ -768,11 +769,15 @@ void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
 	 */
 	spin_lock(&b->rb_lock);
 	insert_signal(b, request, seqno);
-	wakeup &= __intel_engine_add_wait(engine, &request->signaling.wait);
+	wakeup &= __intel_engine_add_wait(engine, wait);
 	spin_unlock(&b->rb_lock);
 
-	if (wakeup)
+	if (wakeup) {
 		wake_up_process(b->signaler);
+		return !intel_wait_complete(wait);
+	}
+
+	return true;
 }
 
 void intel_engine_cancel_signaling(struct i915_request *request)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 0320c2c4cfba..aa34b2ff04bc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -939,7 +939,7 @@ bool intel_engine_add_wait(struct intel_engine_cs *engine,
 			   struct intel_wait *wait);
 void intel_engine_remove_wait(struct intel_engine_cs *engine,
 			      struct intel_wait *wait);
-void intel_engine_enable_signaling(struct i915_request *request, bool wakeup);
+bool intel_engine_enable_signaling(struct i915_request *request, bool wakeup);
 void intel_engine_cancel_signaling(struct i915_request *request);
 
 static inline bool intel_engine_has_waiter(const struct intel_engine_cs *engine)
-- 
2.16.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
  2018-03-08 14:07 [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling Chris Wilson
@ 2018-03-08 14:45 ` Patchwork
  2018-03-08 18:59 ` ✓ Fi.CI.IGT: " Patchwork
  2018-03-09 17:24 ` [PATCH] " Tvrtko Ursulin
  2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-03-08 14:45 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
URL   : https://patchwork.freedesktop.org/series/39605/
State : success

== Summary ==

Series 39605v1 drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
https://patchwork.freedesktop.org/api/1.0/series/39605/revisions/1/mbox/

---- Known issues:

Test kms_frontbuffer_tracking:
        Subgroup basic:
                fail       -> PASS       (fi-cnl-y3) fdo#103167

fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:425s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:423s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:380s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:504s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:281s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:491s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:491s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:485s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:470s
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:412s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:581s
fi-cnl-y3        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:582s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:420s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:289s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:521s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:400s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:411s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:461s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:419s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:470s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:462s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:507s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:599s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:428s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:522s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:535s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:505s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:491s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:423s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:428s
fi-snb-2520m     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:404s

da319f89899feb1b6206d7092b10189a926a893c drm-tip: 2018y-03m-08d-12h-49m-27s UTC integration manifest
45635bc67d25 drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8273/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.IGT: success for drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
  2018-03-08 14:07 [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling Chris Wilson
  2018-03-08 14:45 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-03-08 18:59 ` Patchwork
  2018-03-09 17:24 ` [PATCH] " Tvrtko Ursulin
  2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-03-08 18:59 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
URL   : https://patchwork.freedesktop.org/series/39605/
State : success

== Summary ==

---- Possible new issues:

Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-primscrn-spr-indfb-draw-render:
                fail       -> PASS       (shard-apl)

---- Known issues:

Test kms_chv_cursor_fail:
        Subgroup pipe-b-256x256-top-edge:
                pass       -> DMESG-WARN (shard-snb) fdo#105185 +4
Test kms_flip:
        Subgroup 2x-plain-flip-ts-check:
                fail       -> PASS       (shard-hsw) fdo#100368
Test pm_lpsp:
        Subgroup screens-disabled:
                fail       -> PASS       (shard-hsw) fdo#104941

fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#104941 https://bugs.freedesktop.org/show_bug.cgi?id=104941

shard-apl        total:3467 pass:1824 dwarn:1   dfail:0   fail:9   skip:1632 time:12318s
shard-hsw        total:3448 pass:1761 dwarn:1   dfail:0   fail:1   skip:1683 time:11697s
shard-snb        total:3467 pass:1361 dwarn:3   dfail:0   fail:2   skip:2101 time:7033s
Blacklisted hosts:
shard-kbl        total:3381 pass:1871 dwarn:27  dfail:2   fail:9   skip:1471 time:9014s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8273/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
  2018-03-08 14:07 [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling Chris Wilson
  2018-03-08 14:45 ` ✓ Fi.CI.BAT: success for " Patchwork
  2018-03-08 18:59 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-03-09 17:24 ` Tvrtko Ursulin
  2018-03-09 17:33   ` Chris Wilson
  2 siblings, 1 reply; 6+ messages in thread
From: Tvrtko Ursulin @ 2018-03-09 17:24 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx; +Cc: Mika Kuoppala


On 08/03/2018 14:07, Chris Wilson wrote:
> There is some redundancy between dma_fence->ops->enable_signaling (via
> i915_fence_enable_signaling) and our backend,
> intel_engine_enable_signaling() in that both levels recheck the fence
> status multiple times. If we convert intel_engine_enable_signaling() to
> return the information desired by dma_fence->ops->enable_signaling, we
> can reduce i915_fence_enable_signaling to a simple stub and avoid
> trying to reinterpret the same information.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_request.c      |  6 +-----
>   drivers/gpu/drm/i915/intel_breadcrumbs.c | 21 +++++++++++++--------
>   drivers/gpu/drm/i915/intel_ringbuffer.h  |  2 +-
>   3 files changed, 15 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> index d437beac3969..2a841800d4cf 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -59,11 +59,7 @@ static bool i915_fence_signaled(struct dma_fence *fence)
>   
>   static bool i915_fence_enable_signaling(struct dma_fence *fence)
>   {
> -	if (i915_fence_signaled(fence))
> -		return false;

This was based on hws seqno check...

> -
> -	intel_engine_enable_signaling(to_request(fence), true);
> -	return !i915_fence_signaled(fence);
> +	return intel_engine_enable_signaling(to_request(fence), true);
>   }
>   
>   static signed long i915_fence_wait(struct dma_fence *fence,
> diff --git a/drivers/gpu/drm/i915/intel_breadcrumbs.c b/drivers/gpu/drm/i915/intel_breadcrumbs.c
> index 1f79e7a47433..671a6d61e29d 100644
> --- a/drivers/gpu/drm/i915/intel_breadcrumbs.c
> +++ b/drivers/gpu/drm/i915/intel_breadcrumbs.c
> @@ -730,10 +730,11 @@ static void insert_signal(struct intel_breadcrumbs *b,
>   	list_add(&request->signaling.link, &iter->signaling.link);
>   }
>   
> -void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
> +bool intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
>   {
>   	struct intel_engine_cs *engine = request->engine;
>   	struct intel_breadcrumbs *b = &engine->breadcrumbs;
> +	struct intel_wait *wait = &request->signaling.wait;
>   	u32 seqno;
>   
>   	/*
> @@ -750,12 +751,12 @@ void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
>   
>   	seqno = i915_request_global_seqno(request);
>   	if (!seqno) /* will be enabled later upon execution */
> -		return;
> +		return true;
>   
> -	GEM_BUG_ON(request->signaling.wait.seqno);
> -	request->signaling.wait.tsk = b->signaler;
> -	request->signaling.wait.request = request;
> -	request->signaling.wait.seqno = seqno;
> +	GEM_BUG_ON(wait->seqno);
> +	wait->tsk = b->signaler;
> +	wait->request = request;
> +	wait->seqno = seqno;
>   
>   	/*
>   	 * Add ourselves into the list of waiters, but registering our
> @@ -768,11 +769,15 @@ void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
>   	 */
>   	spin_lock(&b->rb_lock);
>   	insert_signal(b, request, seqno);
> -	wakeup &= __intel_engine_add_wait(engine, &request->signaling.wait);
> +	wakeup &= __intel_engine_add_wait(engine, wait);
>   	spin_unlock(&b->rb_lock);
>   
> -	if (wakeup)
> +	if (wakeup) {
>   		wake_up_process(b->signaler);
> +		return !intel_wait_complete(wait);

... and would now be based on breadcrumb waiter waking up and removing 
itself from the tree.

So some potential latency where it wasn't before, well, enable-disable 
signalling cycles actually.

If I got it right.. breadcrumbs code confuses me massively these days.

Regards,

Tvrtko

> +	}
> +
> +	return true;
>   }
>   
>   void intel_engine_cancel_signaling(struct i915_request *request)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 0320c2c4cfba..aa34b2ff04bc 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -939,7 +939,7 @@ bool intel_engine_add_wait(struct intel_engine_cs *engine,
>   			   struct intel_wait *wait);
>   void intel_engine_remove_wait(struct intel_engine_cs *engine,
>   			      struct intel_wait *wait);
> -void intel_engine_enable_signaling(struct i915_request *request, bool wakeup);
> +bool intel_engine_enable_signaling(struct i915_request *request, bool wakeup);
>   void intel_engine_cancel_signaling(struct i915_request *request);
>   
>   static inline bool intel_engine_has_waiter(const struct intel_engine_cs *engine)
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
  2018-03-09 17:24 ` [PATCH] " Tvrtko Ursulin
@ 2018-03-09 17:33   ` Chris Wilson
  2018-03-12 11:33     ` Tvrtko Ursulin
  0 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2018-03-09 17:33 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx; +Cc: Mika Kuoppala

Quoting Tvrtko Ursulin (2018-03-09 17:24:33)
> 
> On 08/03/2018 14:07, Chris Wilson wrote:
> > There is some redundancy between dma_fence->ops->enable_signaling (via
> > i915_fence_enable_signaling) and our backend,
> > intel_engine_enable_signaling() in that both levels recheck the fence
> > status multiple times. If we convert intel_engine_enable_signaling() to
> > return the information desired by dma_fence->ops->enable_signaling, we
> > can reduce i915_fence_enable_signaling to a simple stub and avoid
> > trying to reinterpret the same information.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > Cc: Michal Winiarski <michal.winiarski@intel.com>
> > ---
> >   drivers/gpu/drm/i915/i915_request.c      |  6 +-----
> >   drivers/gpu/drm/i915/intel_breadcrumbs.c | 21 +++++++++++++--------
> >   drivers/gpu/drm/i915/intel_ringbuffer.h  |  2 +-
> >   3 files changed, 15 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> > index d437beac3969..2a841800d4cf 100644
> > --- a/drivers/gpu/drm/i915/i915_request.c
> > +++ b/drivers/gpu/drm/i915/i915_request.c
> > @@ -59,11 +59,7 @@ static bool i915_fence_signaled(struct dma_fence *fence)
> >   
> >   static bool i915_fence_enable_signaling(struct dma_fence *fence)
> >   {
> > -     if (i915_fence_signaled(fence))
> > -             return false;
> 
> This was based on hws seqno check...
> 
> > -
> > -     intel_engine_enable_signaling(to_request(fence), true);
> > -     return !i915_fence_signaled(fence);
> > +     return intel_engine_enable_signaling(to_request(fence), true);
> >   }

> > @@ -768,11 +769,15 @@ void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
> >        */
> >       spin_lock(&b->rb_lock);
> >       insert_signal(b, request, seqno);
> > -     wakeup &= __intel_engine_add_wait(engine, &request->signaling.wait);
> > +     wakeup &= __intel_engine_add_wait(engine, wait);
> >       spin_unlock(&b->rb_lock);
> >   
> > -     if (wakeup)
> > +     if (wakeup) {
> >               wake_up_process(b->signaler);
> > +             return !intel_wait_complete(wait);
> 
> ... and would now be based on breadcrumb waiter waking up and removing 
> itself from the tree.

And don't forget the same HWS check before the waiter is inserted. So we
have the same guards as before, just inside yet another spinlock.

> So some potential latency where it wasn't before, well, enable-disable 
> signalling cycles actually.

The extra steps would be the insert_signal(). Fwiw, we could reorder the
insert_signal() but frankly this, dma_fence enable signaling of an
inflight request, is not a fast path. More commonly we will be enabling
signaling on the request as it is submitted (where wakeup is false and
we know that the HWS cannot be complete).
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling
  2018-03-09 17:33   ` Chris Wilson
@ 2018-03-12 11:33     ` Tvrtko Ursulin
  0 siblings, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2018-03-12 11:33 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx; +Cc: Mika Kuoppala


On 09/03/2018 17:33, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-03-09 17:24:33)
>>
>> On 08/03/2018 14:07, Chris Wilson wrote:
>>> There is some redundancy between dma_fence->ops->enable_signaling (via
>>> i915_fence_enable_signaling) and our backend,
>>> intel_engine_enable_signaling() in that both levels recheck the fence
>>> status multiple times. If we convert intel_engine_enable_signaling() to
>>> return the information desired by dma_fence->ops->enable_signaling, we
>>> can reduce i915_fence_enable_signaling to a simple stub and avoid
>>> trying to reinterpret the same information.
>>>
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
>>> Cc: Michal Winiarski <michal.winiarski@intel.com>
>>> ---
>>>    drivers/gpu/drm/i915/i915_request.c      |  6 +-----
>>>    drivers/gpu/drm/i915/intel_breadcrumbs.c | 21 +++++++++++++--------
>>>    drivers/gpu/drm/i915/intel_ringbuffer.h  |  2 +-
>>>    3 files changed, 15 insertions(+), 14 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
>>> index d437beac3969..2a841800d4cf 100644
>>> --- a/drivers/gpu/drm/i915/i915_request.c
>>> +++ b/drivers/gpu/drm/i915/i915_request.c
>>> @@ -59,11 +59,7 @@ static bool i915_fence_signaled(struct dma_fence *fence)
>>>    
>>>    static bool i915_fence_enable_signaling(struct dma_fence *fence)
>>>    {
>>> -     if (i915_fence_signaled(fence))
>>> -             return false;
>>
>> This was based on hws seqno check...
>>
>>> -
>>> -     intel_engine_enable_signaling(to_request(fence), true);
>>> -     return !i915_fence_signaled(fence);
>>> +     return intel_engine_enable_signaling(to_request(fence), true);
>>>    }
> 
>>> @@ -768,11 +769,15 @@ void intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
>>>         */
>>>        spin_lock(&b->rb_lock);
>>>        insert_signal(b, request, seqno);
>>> -     wakeup &= __intel_engine_add_wait(engine, &request->signaling.wait);
>>> +     wakeup &= __intel_engine_add_wait(engine, wait);
>>>        spin_unlock(&b->rb_lock);
>>>    
>>> -     if (wakeup)
>>> +     if (wakeup) {
>>>                wake_up_process(b->signaler);
>>> +             return !intel_wait_complete(wait);
>>
>> ... and would now be based on breadcrumb waiter waking up and removing
>> itself from the tree.
> 
> And don't forget the same HWS check before the waiter is inserted. So we
> have the same guards as before, just inside yet another spinlock.

True, did not think of this. So it may proceed a bit deeper in the call 
chain but there is no actual behaviour change as I described it.

>> So some potential latency where it wasn't before, well, enable-disable
>> signalling cycles actually.
> 
> The extra steps would be the insert_signal(). Fwiw, we could reorder the
> insert_signal() but frankly this, dma_fence enable signaling of an
> inflight request, is not a fast path. More commonly we will be enabling
> signaling on the request as it is submitted (where wakeup is false and
> we know that the HWS cannot be complete).

Yes, no complaints after realizing the above.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko



_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2018-03-12 11:33 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-03-08 14:07 [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling Chris Wilson
2018-03-08 14:45 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-03-08 18:59 ` ✓ Fi.CI.IGT: " Patchwork
2018-03-09 17:24 ` [PATCH] " Tvrtko Ursulin
2018-03-09 17:33   ` Chris Wilson
2018-03-12 11:33     ` Tvrtko Ursulin

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.