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From: Andre Przywara <andre.przywara@linaro.org>
To: Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien.grall@arm.com>
Cc: xen-devel@lists.xenproject.org
Subject: [PATCH v2 11/45] ARM: timer: Handle level triggered IRQs correctly
Date: Thu, 15 Mar 2018 20:30:16 +0000	[thread overview]
Message-ID: <20180315203050.19791-12-andre.przywara@linaro.org> (raw)
In-Reply-To: <20180315203050.19791-1-andre.przywara@linaro.org>

The ARM Generic Timer uses a level-sensitive interrupt semantic. We
easily catch when the line goes high, as this triggers the hardware IRQ.
However we have to sync the state of the interrupt condition at certain
points to catch when the line goes low and we can remove the vtimer vIRQ
from the vGIC (and the LR).
The VGIC in Xen so far only implemented edge triggered vIRQs, really, so
we need to add new functionality to re-sample the interrupt state.
Do this only when the new VGIC is in use.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
---
Changelog v1 ... v2:
- restrict to new VGIC
- add TODO: comment

 xen/arch/arm/time.c     | 36 ++++++++++++++++++++++++++++++++++++
 xen/arch/arm/traps.c    | 11 +++++++++++
 xen/include/xen/timer.h |  2 ++
 3 files changed, 49 insertions(+)

diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c
index c11fcfeadd..c0ae781ecd 100644
--- a/xen/arch/arm/time.c
+++ b/xen/arch/arm/time.c
@@ -263,6 +263,42 @@ static void vtimer_interrupt(int irq, void *dev_id, struct cpu_user_regs *regs)
     vgic_inject_irq(current->domain, current, current->arch.virt_timer.irq, true);
 }
 
+/**
+ * vtimer_sync() - update the state of the virtual timer after a guest run
+ * @vcpu: The VCPU to sync the arch timer state
+ *
+ * After returning from a guest, update the state of the virtual interrupt
+ * line, to model the level triggered interrupt correctly.
+ * If the guest has handled a timer interrupt, the virtual interrupt line
+ * needs to be lowered explicitly. vgic_inject_irq() takes care of that.
+ */
+void vtimer_sync(struct vcpu *vcpu)
+{
+    struct vtimer *vtimer = &vcpu->arch.virt_timer;
+    uint32_t vtimer_ctl = READ_SYSREG32(CNTV_CTL_EL0);
+    bool level;
+
+    /*
+     * Technically the mask should include the CNTx_CTL_MASK bit here,
+     * to catch if the timer interrupt is masked. However Xen always masks
+     * the timer upon entering the hypervisor, leaving it up to the guest
+     * to un-mask it. So we would always read a "low" level, despite the
+     * condition being actually "high".
+     * Ignoring the mask bit solves this (for now).
+     * Another possible check would be to compare the value of CNTVCT_EL0
+     * against vtimer->cval and derive the interrupt state from that.
+     */
+    vtimer_ctl &= (CNTx_CTL_ENABLE | CNTx_CTL_PENDING);
+    level = (vtimer_ctl == (CNTx_CTL_ENABLE | CNTx_CTL_PENDING));
+
+     /*
+      * TODO: The proper fix for this is to make vtimer vIRQ hardware mapped,
+      * but this requires reworking the arch timer to implement this.
+      */
+
+    vgic_inject_irq(vcpu->domain, vcpu, vtimer->irq, level);
+}
+
 /*
  * Arch timer interrupt really ought to be level triggered, since the
  * design of the timer/comparator mechanism is based around that
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 7411bff7a7..46464d7bb9 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -2024,6 +2024,17 @@ static void enter_hypervisor_head(struct cpu_user_regs *regs)
         if ( current->arch.hcr_el2 & HCR_VA )
             current->arch.hcr_el2 = READ_SYSREG(HCR_EL2);
 
+#ifdef CONFIG_NEW_VGIC
+        /*
+         * We need to update the state of our emulated devices using level
+         * triggered interrupts before syncing back the VGIC state.
+         *
+         * TODO: Investigate whether this is necessary to do on every
+         * trap and how it can be optimised.
+         */
+        vtimer_sync(current);
+#endif
+
         vgic_sync_from_lrs(current);
     }
 }
diff --git a/xen/include/xen/timer.h b/xen/include/xen/timer.h
index 4513260b0d..eddbbf3903 100644
--- a/xen/include/xen/timer.h
+++ b/xen/include/xen/timer.h
@@ -94,6 +94,8 @@ DECLARE_PER_CPU(s_time_t, timer_deadline);
 /* Arch-defined function to reprogram timer hardware for new deadline. */
 int reprogram_timer(s_time_t timeout);
 
+void vtimer_sync(struct vcpu *vcpu);
+
 /* Calculate the aligned first tick time for a given periodic timer. */
 s_time_t align_timer(s_time_t firsttick, uint64_t period);
 
-- 
2.14.1


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  parent reply	other threads:[~2018-03-15 20:31 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-15 20:30 [PATCH v2 00/45] New VGIC(-v2) implementation Andre Przywara
2018-03-15 20:30 ` [PATCH v2 01/45] ARM: VGIC: rename gic_event_needs_delivery() Andre Przywara
2018-03-16 10:58   ` Julien Grall
2018-03-16 21:21   ` Stefano Stabellini
2018-03-15 20:30 ` [PATCH v2 02/45] ARM: Implement vcpu_kick() Andre Przywara
2018-03-16 10:59   ` Julien Grall
2018-03-16 21:23   ` Stefano Stabellini
2018-03-20 10:35   ` Jan Beulich
2018-03-21  4:10     ` Julien Grall
2018-03-21  7:40       ` Jan Beulich
2018-03-15 20:30 ` [PATCH v2 03/45] xen/arm: gic: Fix indentation in gic_update_one_lr Andre Przywara
2018-03-15 20:30 ` [PATCH v2 04/45] xen/arm: vgic: Override the group in lr everytime Andre Przywara
2018-03-16 21:25   ` Stefano Stabellini
2018-03-15 20:30 ` [PATCH v2 05/45] xen/arm: gic: Use bool instead of uint8_t for the hw_status in gic_lr Andre Przywara
2018-03-16 21:25   ` Stefano Stabellini
2018-03-15 20:30 ` [PATCH v2 06/45] xen/arm: gic: Split the field state in gic_lr in 2 fields active and pending Andre Przywara
2018-03-16 21:34   ` Stefano Stabellini
2018-03-16 22:14     ` Julien Grall
2018-03-16 22:52       ` Stefano Stabellini
2018-03-19  9:10         ` Andre Przywara
2018-03-15 20:30 ` [PATCH v2 07/45] xen/arm: GIC: Only set pirq in the LR when hw_status is set Andre Przywara
2018-03-16 21:38   ` Stefano Stabellini
2018-03-15 20:30 ` [PATCH v2 08/45] ARM: GIC: extend LR read/write functions to cover EOI and source Andre Przywara
2018-03-16 21:43   ` Stefano Stabellini
2018-03-15 20:30 ` [PATCH v2 09/45] ARM: GIC: Allow tweaking the active and pending state of an IRQ Andre Przywara
2018-03-16 16:05   ` Andre Przywara
2018-03-19  9:30     ` Julien Grall
2018-03-19 17:54       ` Andre Przywara
2018-03-20  0:57         ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 10/45] ARM: GIC: Allow reading pending state of a hardware IRQ Andre Przywara
2018-03-19 10:04   ` Julien Grall
2018-03-15 20:30 ` Andre Przywara [this message]
2018-03-19 10:07   ` [PATCH v2 11/45] ARM: timer: Handle level triggered IRQs correctly Julien Grall
2018-03-15 20:30 ` [PATCH v2 12/45] ARM: evtchn: " Andre Przywara
2018-03-19 10:54   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 13/45] ARM: vPL011: Use the VGIC's level triggered IRQs handling if available Andre Przywara
2018-03-19 10:59   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 14/45] ARM: new VGIC: Add data structure definitions Andre Przywara
2018-03-19 11:01   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 15/45] ARM: new VGIC: Add acccessor to new struct vgic_irq instance Andre Przywara
2018-03-19 11:04   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 16/45] ARM: new VGIC: Implement virtual IRQ injection Andre Przywara
2018-03-19 12:48   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 17/45] Add list_sort() routine from Linux Andre Przywara
2018-03-16 10:47   ` Jan Beulich
2018-03-15 20:30 ` [PATCH v2 18/45] ARM: new VGIC: Add IRQ sorting Andre Przywara
2018-03-19 12:51   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 19/45] ARM: new VGIC: Add IRQ sync/flush framework Andre Przywara
2018-03-19 14:17   ` Julien Grall
2018-03-19 17:32     ` Andre Przywara
2018-03-15 20:30 ` [PATCH v2 20/45] ARM: new VGIC: Add GICv2 world switch backend Andre Przywara
2018-03-19 14:36   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 21/45] ARM: new VGIC: Implement vgic_vcpu_pending_irq Andre Przywara
2018-03-19  7:55   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 22/45] ARM: new VGIC: Add MMIO handling framework Andre Przywara
2018-03-19  7:59   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 23/45] ARM: new VGIC: Add GICv2 " Andre Przywara
2018-03-15 20:30 ` [PATCH v2 24/45] ARM: new VGIC: Add CTLR, TYPER and IIDR handlers Andre Przywara
2018-03-19  8:13   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 25/45] ARM: new VGIC: Add ENABLE registers handlers Andre Przywara
2018-03-19  8:22   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 26/45] ARM: new VGIC: Add PENDING " Andre Przywara
2018-03-19  8:25   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 27/45] ARM: new VGIC: Add ACTIVE " Andre Przywara
2018-03-19  8:27   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 28/45] ARM: new VGIC: Add PRIORITY " Andre Przywara
2018-03-19  9:40   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 29/45] ARM: new VGIC: Add CONFIG " Andre Przywara
2018-03-15 20:30 ` [PATCH v2 30/45] ARM: new VGIC: Add TARGET " Andre Przywara
2018-03-19  9:44   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 31/45] ARM: new VGIC: Add SGIR register handler Andre Przywara
2018-03-19  9:47   ` Julien Grall
2018-03-19 16:21     ` Andre Przywara
2018-03-15 20:30 ` [PATCH v2 32/45] ARM: new VGIC: Add SGIPENDR register handlers Andre Przywara
2018-03-15 20:30 ` [PATCH v2 33/45] ARM: new VGIC: Handle hardware mapped IRQs Andre Przywara
2018-03-15 20:30 ` [PATCH v2 34/45] ARM: new VGIC: Add event channel IRQ handling Andre Przywara
2018-03-15 20:30 ` [PATCH v2 35/45] ARM: new VGIC: Handle virtual IRQ allocation/reservation Andre Przywara
2018-03-15 20:30 ` [PATCH v2 36/45] ARM: new VGIC: Dump virtual IRQ info Andre Przywara
2018-03-15 20:30 ` [PATCH v2 37/45] ARM: new VGIC: Provide system register emulation stub Andre Przywara
2018-03-15 20:30 ` [PATCH v2 38/45] ARM: new VGIC: Implement arch_move_irqs() Andre Przywara
2018-03-19  9:53   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 39/45] ARM: new VGIC: Add preliminary stub implementation Andre Przywara
2018-03-19  9:54   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 40/45] ARM: new VGIC: vgic-init: register VGIC Andre Przywara
2018-03-20  1:17   ` Julien Grall
2018-03-20 17:11     ` Andre Przywara
2018-03-21  4:29       ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 41/45] ARM: new VGIC: Add vgic_v2_enable Andre Przywara
2018-03-19  9:57   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 42/45] ARM: new VGIC: vgic-init: implement vgic_init Andre Przywara
2018-03-20  3:02   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 43/45] ARM: new VGIC: vgic-init: implement map_resources Andre Przywara
2018-03-20  3:10   ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 44/45] ARM: new VGIC: Allocate two pages for struct vcpu Andre Przywara
2018-03-19 10:00   ` Julien Grall
2018-03-19 10:04     ` Julien Grall
2018-03-15 20:30 ` [PATCH v2 45/45] ARM: VGIC: wire new VGIC(-v2) files into Xen build system Andre Przywara
2018-03-16 10:48   ` Jan Beulich
2018-03-16 11:10     ` Andre Przywara
2018-03-16 11:32       ` Jan Beulich
2018-03-16 15:13         ` Andre Przywara
2018-03-16 15:34           ` Jan Beulich
2018-03-20  3:13   ` Julien Grall
2018-03-20 15:57     ` Andre Przywara
2018-03-20  8:30 ` [PATCH v2 00/45] New VGIC(-v2) implementation Julien Grall
2018-03-20 11:20   ` Andre Przywara

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